./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/rfi000_rmo.oepc_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_e2633187-03a1-4b61-8284-49107f98d7de/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_e2633187-03a1-4b61-8284-49107f98d7de/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_e2633187-03a1-4b61-8284-49107f98d7de/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_e2633187-03a1-4b61-8284-49107f98d7de/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/rfi000_rmo.oepc_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_e2633187-03a1-4b61-8284-49107f98d7de/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_e2633187-03a1-4b61-8284-49107f98d7de/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d91977178f61573ac26351ff9e6b1e19d063b580 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 14:25:37,811 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 14:25:37,812 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 14:25:37,819 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 14:25:37,820 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 14:25:37,820 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 14:25:37,822 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 14:25:37,823 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 14:25:37,824 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 14:25:37,825 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 14:25:37,826 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 14:25:37,826 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 14:25:37,827 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 14:25:37,827 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 14:25:37,828 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 14:25:37,829 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 14:25:37,829 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 14:25:37,830 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 14:25:37,832 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 14:25:37,833 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 14:25:37,834 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 14:25:37,835 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 14:25:37,837 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 14:25:37,837 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 14:25:37,838 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 14:25:37,838 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 14:25:37,839 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 14:25:37,840 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 14:25:37,840 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 14:25:37,841 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 14:25:37,842 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 14:25:37,842 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 14:25:37,843 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 14:25:37,843 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 14:25:37,843 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 14:25:37,844 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 14:25:37,844 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_e2633187-03a1-4b61-8284-49107f98d7de/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-11-23 14:25:37,856 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 14:25:37,856 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 14:25:37,857 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 14:25:37,857 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 14:25:37,857 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-23 14:25:37,857 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-23 14:25:37,857 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-23 14:25:37,858 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-23 14:25:37,858 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-23 14:25:37,858 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-23 14:25:37,858 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-23 14:25:37,858 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-23 14:25:37,858 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-23 14:25:37,859 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 14:25:37,859 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 14:25:37,859 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 14:25:37,859 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 14:25:37,859 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 14:25:37,860 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 14:25:37,860 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 14:25:37,860 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 14:25:37,860 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 14:25:37,860 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 14:25:37,860 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 14:25:37,860 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 14:25:37,861 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 14:25:37,861 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 14:25:37,861 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 14:25:37,861 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 14:25:37,861 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 14:25:37,863 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 14:25:37,864 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 14:25:37,864 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 14:25:37,864 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-23 14:25:37,864 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 14:25:37,864 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 14:25:37,864 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 14:25:37,864 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_e2633187-03a1-4b61-8284-49107f98d7de/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d91977178f61573ac26351ff9e6b1e19d063b580 [2018-11-23 14:25:37,888 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 14:25:37,898 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 14:25:37,900 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 14:25:37,902 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 14:25:37,902 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 14:25:37,902 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_e2633187-03a1-4b61-8284-49107f98d7de/bin-2019/utaipan/../../sv-benchmarks/c/pthread-wmm/rfi000_rmo.oepc_false-unreach-call.i [2018-11-23 14:25:37,944 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_e2633187-03a1-4b61-8284-49107f98d7de/bin-2019/utaipan/data/45a66038e/187d18b000c648a9acf305db71d55c82/FLAG536b54c18 [2018-11-23 14:25:38,386 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 14:25:38,386 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_e2633187-03a1-4b61-8284-49107f98d7de/sv-benchmarks/c/pthread-wmm/rfi000_rmo.oepc_false-unreach-call.i [2018-11-23 14:25:38,395 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_e2633187-03a1-4b61-8284-49107f98d7de/bin-2019/utaipan/data/45a66038e/187d18b000c648a9acf305db71d55c82/FLAG536b54c18 [2018-11-23 14:25:38,407 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_e2633187-03a1-4b61-8284-49107f98d7de/bin-2019/utaipan/data/45a66038e/187d18b000c648a9acf305db71d55c82 [2018-11-23 14:25:38,409 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 14:25:38,410 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 14:25:38,410 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 14:25:38,410 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 14:25:38,413 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 14:25:38,413 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 02:25:38" (1/1) ... [2018-11-23 14:25:38,415 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4d05c556 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:25:38, skipping insertion in model container [2018-11-23 14:25:38,415 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 02:25:38" (1/1) ... [2018-11-23 14:25:38,422 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 14:25:38,452 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 14:25:38,700 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 14:25:38,710 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 14:25:38,818 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 14:25:38,866 INFO L195 MainTranslator]: Completed translation [2018-11-23 14:25:38,867 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:25:38 WrapperNode [2018-11-23 14:25:38,867 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 14:25:38,867 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 14:25:38,867 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 14:25:38,868 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 14:25:38,875 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:25:38" (1/1) ... [2018-11-23 14:25:38,888 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:25:38" (1/1) ... [2018-11-23 14:25:38,906 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 14:25:38,907 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 14:25:38,907 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 14:25:38,907 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 14:25:38,913 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:25:38" (1/1) ... [2018-11-23 14:25:38,913 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:25:38" (1/1) ... [2018-11-23 14:25:38,917 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:25:38" (1/1) ... [2018-11-23 14:25:38,917 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:25:38" (1/1) ... [2018-11-23 14:25:38,928 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:25:38" (1/1) ... [2018-11-23 14:25:38,933 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:25:38" (1/1) ... [2018-11-23 14:25:38,936 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:25:38" (1/1) ... [2018-11-23 14:25:38,940 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 14:25:38,940 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 14:25:38,940 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 14:25:38,940 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 14:25:38,941 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:25:38" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2633187-03a1-4b61-8284-49107f98d7de/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 14:25:38,998 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 14:25:38,998 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-23 14:25:38,998 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-23 14:25:38,998 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 14:25:38,998 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-23 14:25:38,998 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-23 14:25:38,998 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-23 14:25:38,998 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-23 14:25:38,999 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-23 14:25:38,999 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 14:25:38,999 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 14:25:39,000 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-23 14:25:39,690 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 14:25:39,690 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-23 14:25:39,691 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 02:25:39 BoogieIcfgContainer [2018-11-23 14:25:39,691 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 14:25:39,692 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 14:25:39,692 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 14:25:39,694 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 14:25:39,694 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 02:25:38" (1/3) ... [2018-11-23 14:25:39,694 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3c4a80ef and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 02:25:39, skipping insertion in model container [2018-11-23 14:25:39,694 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:25:38" (2/3) ... [2018-11-23 14:25:39,695 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3c4a80ef and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 02:25:39, skipping insertion in model container [2018-11-23 14:25:39,695 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 02:25:39" (3/3) ... [2018-11-23 14:25:39,696 INFO L112 eAbstractionObserver]: Analyzing ICFG rfi000_rmo.oepc_false-unreach-call.i [2018-11-23 14:25:39,735 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,735 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,735 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,735 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,735 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,735 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,736 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,736 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,736 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,736 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,736 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,737 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,737 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,737 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,737 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,737 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,737 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,737 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,737 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,738 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,738 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,738 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,738 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,738 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,738 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,738 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,739 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,739 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,739 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,739 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,739 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,739 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,740 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,740 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,740 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,740 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,740 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,740 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,741 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,741 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,742 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,743 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,746 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,746 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,746 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,746 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,746 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,746 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,746 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,746 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,747 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,747 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,747 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,747 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,747 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,747 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,747 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,747 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,748 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,748 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,748 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,748 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,748 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,748 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,748 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,749 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,749 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,749 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,749 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,749 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,749 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,749 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,750 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,750 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,750 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,750 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,750 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,750 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,750 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,751 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,751 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,751 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,751 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,751 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,751 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,751 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,752 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,752 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,752 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,752 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,752 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,752 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,752 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,752 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,753 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,753 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,753 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,753 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,753 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,753 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,753 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,754 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,754 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet33.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,754 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet34.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,754 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,754 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet34.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,754 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet33.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,754 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet33.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,754 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet34.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,754 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet33.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,754 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet34.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,755 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,755 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,755 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,755 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,755 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,755 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,755 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,755 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,756 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,756 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,756 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,756 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,756 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,756 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,756 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,756 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,757 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,757 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,757 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,757 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,757 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,757 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,757 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,758 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,758 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,758 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,758 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,758 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,758 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,758 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,758 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,758 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,759 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,759 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,759 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,759 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,759 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,759 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,759 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,759 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,760 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,760 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,760 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,760 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,760 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,760 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,760 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,760 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,760 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,761 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,761 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,761 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,761 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,761 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,761 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,761 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,761 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,762 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,762 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,762 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,762 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,762 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,762 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,762 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,762 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,762 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,763 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,763 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,763 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,763 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,763 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,763 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,763 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,763 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,763 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,764 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,764 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,764 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,764 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,764 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,764 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,764 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,764 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,765 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,765 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,765 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,765 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,765 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,765 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,765 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,765 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,765 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,766 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,766 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,766 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,766 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,766 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,766 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,766 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,766 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,767 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,767 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,767 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,767 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,767 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,767 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,767 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,768 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,768 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,768 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,768 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,768 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet62.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,768 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet62.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,768 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,768 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,768 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet62.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,769 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet62.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 14:25:39,786 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-23 14:25:39,786 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 14:25:39,793 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-23 14:25:39,806 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-23 14:25:39,827 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 14:25:39,827 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 14:25:39,827 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 14:25:39,827 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 14:25:39,827 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 14:25:39,827 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 14:25:39,827 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 14:25:39,827 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 14:25:39,838 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 226places, 306 transitions [2018-11-23 14:25:53,968 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 148584 states. [2018-11-23 14:25:53,970 INFO L276 IsEmpty]: Start isEmpty. Operand 148584 states. [2018-11-23 14:25:53,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-23 14:25:53,976 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:25:53,977 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:25:53,978 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:25:53,982 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:25:53,982 INFO L82 PathProgramCache]: Analyzing trace with hash -614504401, now seen corresponding path program 1 times [2018-11-23 14:25:53,984 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:25:54,021 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:25:54,021 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:25:54,021 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:25:54,022 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:25:54,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:25:54,141 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:25:54,143 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:25:54,144 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 14:25:54,144 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:25:54,148 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 14:25:54,160 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 14:25:54,161 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 14:25:54,163 INFO L87 Difference]: Start difference. First operand 148584 states. Second operand 4 states. [2018-11-23 14:25:55,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:25:55,601 INFO L93 Difference]: Finished difference Result 272092 states and 1113406 transitions. [2018-11-23 14:25:55,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 14:25:55,602 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 33 [2018-11-23 14:25:55,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:25:59,395 INFO L225 Difference]: With dead ends: 272092 [2018-11-23 14:25:59,395 INFO L226 Difference]: Without dead ends: 243812 [2018-11-23 14:25:59,397 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 14:26:02,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243812 states. [2018-11-23 14:26:04,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243812 to 140486. [2018-11-23 14:26:04,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140486 states. [2018-11-23 14:26:04,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140486 states to 140486 states and 574639 transitions. [2018-11-23 14:26:04,992 INFO L78 Accepts]: Start accepts. Automaton has 140486 states and 574639 transitions. Word has length 33 [2018-11-23 14:26:04,993 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:04,993 INFO L480 AbstractCegarLoop]: Abstraction has 140486 states and 574639 transitions. [2018-11-23 14:26:04,993 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 14:26:04,993 INFO L276 IsEmpty]: Start isEmpty. Operand 140486 states and 574639 transitions. [2018-11-23 14:26:04,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-23 14:26:04,997 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:04,998 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:04,998 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:04,998 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:04,998 INFO L82 PathProgramCache]: Analyzing trace with hash 1643249749, now seen corresponding path program 1 times [2018-11-23 14:26:04,998 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:05,002 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:05,003 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:05,003 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:05,003 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:05,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:05,079 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:05,080 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:05,080 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 14:26:05,080 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:05,081 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 14:26:05,081 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 14:26:05,081 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 14:26:05,082 INFO L87 Difference]: Start difference. First operand 140486 states and 574639 transitions. Second operand 4 states. [2018-11-23 14:26:05,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:05,327 INFO L93 Difference]: Finished difference Result 33560 states and 119400 transitions. [2018-11-23 14:26:05,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 14:26:05,327 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 45 [2018-11-23 14:26:05,328 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:05,379 INFO L225 Difference]: With dead ends: 33560 [2018-11-23 14:26:05,379 INFO L226 Difference]: Without dead ends: 31742 [2018-11-23 14:26:05,380 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:26:05,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31742 states. [2018-11-23 14:26:05,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31742 to 31742. [2018-11-23 14:26:05,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31742 states. [2018-11-23 14:26:05,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31742 states to 31742 states and 112962 transitions. [2018-11-23 14:26:05,807 INFO L78 Accepts]: Start accepts. Automaton has 31742 states and 112962 transitions. Word has length 45 [2018-11-23 14:26:05,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:05,807 INFO L480 AbstractCegarLoop]: Abstraction has 31742 states and 112962 transitions. [2018-11-23 14:26:05,807 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 14:26:05,807 INFO L276 IsEmpty]: Start isEmpty. Operand 31742 states and 112962 transitions. [2018-11-23 14:26:05,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-23 14:26:05,808 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:05,808 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:05,808 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:05,808 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:05,809 INFO L82 PathProgramCache]: Analyzing trace with hash 1175559771, now seen corresponding path program 1 times [2018-11-23 14:26:05,809 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:05,811 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:05,811 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:05,812 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:05,812 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:05,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:05,868 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:05,869 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:05,869 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 14:26:05,869 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:05,869 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 14:26:05,869 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 14:26:05,869 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:26:05,870 INFO L87 Difference]: Start difference. First operand 31742 states and 112962 transitions. Second operand 5 states. [2018-11-23 14:26:06,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:06,386 INFO L93 Difference]: Finished difference Result 63360 states and 222752 transitions. [2018-11-23 14:26:06,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 14:26:06,386 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2018-11-23 14:26:06,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:06,524 INFO L225 Difference]: With dead ends: 63360 [2018-11-23 14:26:06,524 INFO L226 Difference]: Without dead ends: 63250 [2018-11-23 14:26:06,524 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-23 14:26:06,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63250 states. [2018-11-23 14:26:07,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63250 to 39276. [2018-11-23 14:26:07,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39276 states. [2018-11-23 14:26:07,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39276 states to 39276 states and 136384 transitions. [2018-11-23 14:26:07,177 INFO L78 Accepts]: Start accepts. Automaton has 39276 states and 136384 transitions. Word has length 46 [2018-11-23 14:26:07,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:07,177 INFO L480 AbstractCegarLoop]: Abstraction has 39276 states and 136384 transitions. [2018-11-23 14:26:07,177 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 14:26:07,178 INFO L276 IsEmpty]: Start isEmpty. Operand 39276 states and 136384 transitions. [2018-11-23 14:26:07,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-23 14:26:07,179 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:07,179 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:07,179 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:07,179 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:07,179 INFO L82 PathProgramCache]: Analyzing trace with hash 1108738337, now seen corresponding path program 1 times [2018-11-23 14:26:07,179 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:07,180 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:07,180 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:07,180 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:07,181 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:07,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:07,213 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:07,213 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:07,213 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 14:26:07,213 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:07,213 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 14:26:07,213 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 14:26:07,213 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 14:26:07,214 INFO L87 Difference]: Start difference. First operand 39276 states and 136384 transitions. Second operand 3 states. [2018-11-23 14:26:07,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:07,458 INFO L93 Difference]: Finished difference Result 60855 states and 203999 transitions. [2018-11-23 14:26:07,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 14:26:07,458 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2018-11-23 14:26:07,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:07,551 INFO L225 Difference]: With dead ends: 60855 [2018-11-23 14:26:07,551 INFO L226 Difference]: Without dead ends: 60855 [2018-11-23 14:26:07,552 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 14:26:07,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60855 states. [2018-11-23 14:26:08,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60855 to 54767. [2018-11-23 14:26:08,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54767 states. [2018-11-23 14:26:08,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54767 states to 54767 states and 184631 transitions. [2018-11-23 14:26:08,808 INFO L78 Accepts]: Start accepts. Automaton has 54767 states and 184631 transitions. Word has length 48 [2018-11-23 14:26:08,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:08,808 INFO L480 AbstractCegarLoop]: Abstraction has 54767 states and 184631 transitions. [2018-11-23 14:26:08,808 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 14:26:08,808 INFO L276 IsEmpty]: Start isEmpty. Operand 54767 states and 184631 transitions. [2018-11-23 14:26:08,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-23 14:26:08,809 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:08,809 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:08,810 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:08,810 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:08,810 INFO L82 PathProgramCache]: Analyzing trace with hash 28084908, now seen corresponding path program 1 times [2018-11-23 14:26:08,810 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:08,811 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:08,811 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:08,812 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:08,812 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:08,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:08,915 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:08,915 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:08,916 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 14:26:08,916 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:08,916 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 14:26:08,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 14:26:08,916 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-23 14:26:08,916 INFO L87 Difference]: Start difference. First operand 54767 states and 184631 transitions. Second operand 8 states. [2018-11-23 14:26:09,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:09,767 INFO L93 Difference]: Finished difference Result 69731 states and 227684 transitions. [2018-11-23 14:26:09,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 14:26:09,768 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 52 [2018-11-23 14:26:09,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:09,872 INFO L225 Difference]: With dead ends: 69731 [2018-11-23 14:26:09,872 INFO L226 Difference]: Without dead ends: 69607 [2018-11-23 14:26:09,872 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=69, Invalid=203, Unknown=0, NotChecked=0, Total=272 [2018-11-23 14:26:10,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69607 states. [2018-11-23 14:26:10,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69607 to 56775. [2018-11-23 14:26:10,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56775 states. [2018-11-23 14:26:10,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56775 states to 56775 states and 189920 transitions. [2018-11-23 14:26:10,674 INFO L78 Accepts]: Start accepts. Automaton has 56775 states and 189920 transitions. Word has length 52 [2018-11-23 14:26:10,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:10,674 INFO L480 AbstractCegarLoop]: Abstraction has 56775 states and 189920 transitions. [2018-11-23 14:26:10,674 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 14:26:10,674 INFO L276 IsEmpty]: Start isEmpty. Operand 56775 states and 189920 transitions. [2018-11-23 14:26:10,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-11-23 14:26:10,678 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:10,678 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:10,679 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:10,679 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:10,679 INFO L82 PathProgramCache]: Analyzing trace with hash -1485356584, now seen corresponding path program 1 times [2018-11-23 14:26:10,679 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:10,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:10,681 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:10,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:10,681 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:10,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:10,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:10,770 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:10,770 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 14:26:10,771 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:10,771 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 14:26:10,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 14:26:10,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 14:26:10,771 INFO L87 Difference]: Start difference. First operand 56775 states and 189920 transitions. Second operand 6 states. [2018-11-23 14:26:11,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:11,485 INFO L93 Difference]: Finished difference Result 110773 states and 367372 transitions. [2018-11-23 14:26:11,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 14:26:11,485 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 62 [2018-11-23 14:26:11,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:11,668 INFO L225 Difference]: With dead ends: 110773 [2018-11-23 14:26:11,668 INFO L226 Difference]: Without dead ends: 110717 [2018-11-23 14:26:11,668 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-11-23 14:26:11,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110717 states. [2018-11-23 14:26:12,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110717 to 72935. [2018-11-23 14:26:12,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72935 states. [2018-11-23 14:26:13,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72935 states to 72935 states and 238398 transitions. [2018-11-23 14:26:13,102 INFO L78 Accepts]: Start accepts. Automaton has 72935 states and 238398 transitions. Word has length 62 [2018-11-23 14:26:13,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:13,102 INFO L480 AbstractCegarLoop]: Abstraction has 72935 states and 238398 transitions. [2018-11-23 14:26:13,102 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 14:26:13,102 INFO L276 IsEmpty]: Start isEmpty. Operand 72935 states and 238398 transitions. [2018-11-23 14:26:13,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-11-23 14:26:13,109 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:13,109 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:13,110 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:13,110 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:13,110 INFO L82 PathProgramCache]: Analyzing trace with hash -260667191, now seen corresponding path program 1 times [2018-11-23 14:26:13,110 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:13,111 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:13,111 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:13,112 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:13,112 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:13,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:13,224 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:13,224 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:13,224 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-23 14:26:13,224 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:13,225 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 14:26:13,225 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 14:26:13,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-11-23 14:26:13,225 INFO L87 Difference]: Start difference. First operand 72935 states and 238398 transitions. Second operand 9 states. [2018-11-23 14:26:14,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:14,882 INFO L93 Difference]: Finished difference Result 96796 states and 308161 transitions. [2018-11-23 14:26:14,882 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-23 14:26:14,882 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 68 [2018-11-23 14:26:14,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:15,021 INFO L225 Difference]: With dead ends: 96796 [2018-11-23 14:26:15,021 INFO L226 Difference]: Without dead ends: 96724 [2018-11-23 14:26:15,022 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 113 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=178, Invalid=524, Unknown=0, NotChecked=0, Total=702 [2018-11-23 14:26:15,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96724 states. [2018-11-23 14:26:15,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96724 to 81133. [2018-11-23 14:26:15,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81133 states. [2018-11-23 14:26:16,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81133 states to 81133 states and 261702 transitions. [2018-11-23 14:26:16,127 INFO L78 Accepts]: Start accepts. Automaton has 81133 states and 261702 transitions. Word has length 68 [2018-11-23 14:26:16,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:16,127 INFO L480 AbstractCegarLoop]: Abstraction has 81133 states and 261702 transitions. [2018-11-23 14:26:16,127 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 14:26:16,127 INFO L276 IsEmpty]: Start isEmpty. Operand 81133 states and 261702 transitions. [2018-11-23 14:26:16,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-11-23 14:26:16,139 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:16,139 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:16,139 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:16,139 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:16,139 INFO L82 PathProgramCache]: Analyzing trace with hash -760398597, now seen corresponding path program 1 times [2018-11-23 14:26:16,139 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:16,141 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:16,141 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:16,141 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:16,141 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:16,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:16,248 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:16,248 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:16,248 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-23 14:26:16,248 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:16,248 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 14:26:16,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 14:26:16,248 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-11-23 14:26:16,249 INFO L87 Difference]: Start difference. First operand 81133 states and 261702 transitions. Second operand 9 states. [2018-11-23 14:26:18,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:18,011 INFO L93 Difference]: Finished difference Result 108445 states and 342684 transitions. [2018-11-23 14:26:18,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-23 14:26:18,011 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 74 [2018-11-23 14:26:18,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:18,174 INFO L225 Difference]: With dead ends: 108445 [2018-11-23 14:26:18,174 INFO L226 Difference]: Without dead ends: 108389 [2018-11-23 14:26:18,175 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 77 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=115, Invalid=391, Unknown=0, NotChecked=0, Total=506 [2018-11-23 14:26:18,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108389 states. [2018-11-23 14:26:19,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108389 to 80494. [2018-11-23 14:26:19,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80494 states. [2018-11-23 14:26:19,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80494 states to 80494 states and 259961 transitions. [2018-11-23 14:26:19,317 INFO L78 Accepts]: Start accepts. Automaton has 80494 states and 259961 transitions. Word has length 74 [2018-11-23 14:26:19,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:19,317 INFO L480 AbstractCegarLoop]: Abstraction has 80494 states and 259961 transitions. [2018-11-23 14:26:19,317 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 14:26:19,317 INFO L276 IsEmpty]: Start isEmpty. Operand 80494 states and 259961 transitions. [2018-11-23 14:26:19,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-11-23 14:26:19,332 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:19,332 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:19,332 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:19,332 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:19,333 INFO L82 PathProgramCache]: Analyzing trace with hash -2014750299, now seen corresponding path program 1 times [2018-11-23 14:26:19,333 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:19,334 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:19,334 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:19,334 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:19,334 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:19,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:19,395 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:19,396 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:19,396 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 14:26:19,396 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:19,396 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 14:26:19,396 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 14:26:19,396 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:26:19,396 INFO L87 Difference]: Start difference. First operand 80494 states and 259961 transitions. Second operand 5 states. [2018-11-23 14:26:19,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:19,821 INFO L93 Difference]: Finished difference Result 112217 states and 365175 transitions. [2018-11-23 14:26:19,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 14:26:19,821 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 76 [2018-11-23 14:26:19,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:20,003 INFO L225 Difference]: With dead ends: 112217 [2018-11-23 14:26:20,003 INFO L226 Difference]: Without dead ends: 112217 [2018-11-23 14:26:20,003 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 14:26:20,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112217 states. [2018-11-23 14:26:21,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112217 to 104142. [2018-11-23 14:26:21,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104142 states. [2018-11-23 14:26:21,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104142 states to 104142 states and 338553 transitions. [2018-11-23 14:26:21,435 INFO L78 Accepts]: Start accepts. Automaton has 104142 states and 338553 transitions. Word has length 76 [2018-11-23 14:26:21,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:21,435 INFO L480 AbstractCegarLoop]: Abstraction has 104142 states and 338553 transitions. [2018-11-23 14:26:21,435 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 14:26:21,435 INFO L276 IsEmpty]: Start isEmpty. Operand 104142 states and 338553 transitions. [2018-11-23 14:26:21,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-11-23 14:26:21,452 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:21,452 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:21,453 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:21,453 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:21,453 INFO L82 PathProgramCache]: Analyzing trace with hash -271939964, now seen corresponding path program 1 times [2018-11-23 14:26:21,453 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:21,454 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:21,454 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:21,454 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:21,454 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:21,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:21,508 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:21,508 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:21,509 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 14:26:21,509 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:21,509 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 14:26:21,509 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 14:26:21,509 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-23 14:26:21,509 INFO L87 Difference]: Start difference. First operand 104142 states and 338553 transitions. Second operand 7 states. [2018-11-23 14:26:22,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:22,836 INFO L93 Difference]: Finished difference Result 189824 states and 618954 transitions. [2018-11-23 14:26:22,837 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 14:26:22,837 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 76 [2018-11-23 14:26:22,837 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:23,146 INFO L225 Difference]: With dead ends: 189824 [2018-11-23 14:26:23,146 INFO L226 Difference]: Without dead ends: 189753 [2018-11-23 14:26:23,147 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=185, Unknown=0, NotChecked=0, Total=240 [2018-11-23 14:26:23,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189753 states. [2018-11-23 14:26:24,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189753 to 123930. [2018-11-23 14:26:24,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123930 states. [2018-11-23 14:26:25,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123930 states to 123930 states and 397571 transitions. [2018-11-23 14:26:25,115 INFO L78 Accepts]: Start accepts. Automaton has 123930 states and 397571 transitions. Word has length 76 [2018-11-23 14:26:25,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:25,115 INFO L480 AbstractCegarLoop]: Abstraction has 123930 states and 397571 transitions. [2018-11-23 14:26:25,115 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 14:26:25,115 INFO L276 IsEmpty]: Start isEmpty. Operand 123930 states and 397571 transitions. [2018-11-23 14:26:25,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-11-23 14:26:25,140 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:25,140 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:25,140 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:25,140 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:25,140 INFO L82 PathProgramCache]: Analyzing trace with hash 2068033077, now seen corresponding path program 1 times [2018-11-23 14:26:25,141 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:25,142 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:25,142 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:25,142 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:25,142 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:25,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:25,194 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:25,194 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:25,194 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 14:26:25,194 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:25,194 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 14:26:25,194 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 14:26:25,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 14:26:25,195 INFO L87 Difference]: Start difference. First operand 123930 states and 397571 transitions. Second operand 4 states. [2018-11-23 14:26:25,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:25,826 INFO L93 Difference]: Finished difference Result 134224 states and 427691 transitions. [2018-11-23 14:26:25,826 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 14:26:25,826 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 80 [2018-11-23 14:26:25,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:26,036 INFO L225 Difference]: With dead ends: 134224 [2018-11-23 14:26:26,036 INFO L226 Difference]: Without dead ends: 134224 [2018-11-23 14:26:26,036 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 14:26:26,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134224 states. [2018-11-23 14:26:27,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134224 to 130356. [2018-11-23 14:26:27,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130356 states. [2018-11-23 14:26:27,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130356 states to 130356 states and 416512 transitions. [2018-11-23 14:26:27,900 INFO L78 Accepts]: Start accepts. Automaton has 130356 states and 416512 transitions. Word has length 80 [2018-11-23 14:26:27,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:27,900 INFO L480 AbstractCegarLoop]: Abstraction has 130356 states and 416512 transitions. [2018-11-23 14:26:27,900 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 14:26:27,900 INFO L276 IsEmpty]: Start isEmpty. Operand 130356 states and 416512 transitions. [2018-11-23 14:26:27,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-11-23 14:26:27,927 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:27,928 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:27,928 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:27,928 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:27,928 INFO L82 PathProgramCache]: Analyzing trace with hash 132372790, now seen corresponding path program 1 times [2018-11-23 14:26:27,928 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:27,929 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:27,930 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:27,930 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:27,930 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:27,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:27,985 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:27,985 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:27,986 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 14:26:27,986 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:27,986 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 14:26:27,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 14:26:27,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 14:26:27,986 INFO L87 Difference]: Start difference. First operand 130356 states and 416512 transitions. Second operand 3 states. [2018-11-23 14:26:28,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:28,532 INFO L93 Difference]: Finished difference Result 132173 states and 421679 transitions. [2018-11-23 14:26:28,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 14:26:28,532 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2018-11-23 14:26:28,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:28,742 INFO L225 Difference]: With dead ends: 132173 [2018-11-23 14:26:28,742 INFO L226 Difference]: Without dead ends: 132173 [2018-11-23 14:26:28,743 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 14:26:29,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132173 states. [2018-11-23 14:26:30,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132173 to 131296. [2018-11-23 14:26:30,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131296 states. [2018-11-23 14:26:30,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131296 states to 131296 states and 419170 transitions. [2018-11-23 14:26:30,341 INFO L78 Accepts]: Start accepts. Automaton has 131296 states and 419170 transitions. Word has length 80 [2018-11-23 14:26:30,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:30,341 INFO L480 AbstractCegarLoop]: Abstraction has 131296 states and 419170 transitions. [2018-11-23 14:26:30,341 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 14:26:30,341 INFO L276 IsEmpty]: Start isEmpty. Operand 131296 states and 419170 transitions. [2018-11-23 14:26:30,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-11-23 14:26:30,375 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:30,375 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:30,375 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:30,375 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:30,375 INFO L82 PathProgramCache]: Analyzing trace with hash 394157484, now seen corresponding path program 1 times [2018-11-23 14:26:30,376 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:30,377 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:30,377 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:30,377 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:30,377 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:30,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:30,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:30,456 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:30,456 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-23 14:26:30,456 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:30,456 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 14:26:30,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 14:26:30,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-11-23 14:26:30,457 INFO L87 Difference]: Start difference. First operand 131296 states and 419170 transitions. Second operand 10 states. [2018-11-23 14:26:32,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:32,684 INFO L93 Difference]: Finished difference Result 166835 states and 524111 transitions. [2018-11-23 14:26:32,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-11-23 14:26:32,685 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 80 [2018-11-23 14:26:32,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:32,944 INFO L225 Difference]: With dead ends: 166835 [2018-11-23 14:26:32,944 INFO L226 Difference]: Without dead ends: 166759 [2018-11-23 14:26:32,944 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 189 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=208, Invalid=784, Unknown=0, NotChecked=0, Total=992 [2018-11-23 14:26:33,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166759 states. [2018-11-23 14:26:34,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166759 to 127980. [2018-11-23 14:26:34,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127980 states. [2018-11-23 14:26:34,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127980 states to 127980 states and 410098 transitions. [2018-11-23 14:26:34,831 INFO L78 Accepts]: Start accepts. Automaton has 127980 states and 410098 transitions. Word has length 80 [2018-11-23 14:26:34,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:34,831 INFO L480 AbstractCegarLoop]: Abstraction has 127980 states and 410098 transitions. [2018-11-23 14:26:34,831 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 14:26:34,831 INFO L276 IsEmpty]: Start isEmpty. Operand 127980 states and 410098 transitions. [2018-11-23 14:26:34,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-23 14:26:34,859 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:34,859 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:34,860 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:34,860 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:34,860 INFO L82 PathProgramCache]: Analyzing trace with hash 1341674495, now seen corresponding path program 1 times [2018-11-23 14:26:34,860 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:34,861 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:34,862 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:34,862 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:34,862 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:34,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:34,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:34,932 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:34,932 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 14:26:34,932 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:34,932 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 14:26:34,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 14:26:34,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 14:26:34,932 INFO L87 Difference]: Start difference. First operand 127980 states and 410098 transitions. Second operand 6 states. [2018-11-23 14:26:36,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:36,190 INFO L93 Difference]: Finished difference Result 139402 states and 443686 transitions. [2018-11-23 14:26:36,191 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 14:26:36,191 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2018-11-23 14:26:36,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:36,732 INFO L225 Difference]: With dead ends: 139402 [2018-11-23 14:26:36,732 INFO L226 Difference]: Without dead ends: 139402 [2018-11-23 14:26:36,732 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-23 14:26:37,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139402 states. [2018-11-23 14:26:38,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139402 to 135898. [2018-11-23 14:26:38,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135898 states. [2018-11-23 14:26:38,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135898 states to 135898 states and 433872 transitions. [2018-11-23 14:26:38,263 INFO L78 Accepts]: Start accepts. Automaton has 135898 states and 433872 transitions. Word has length 82 [2018-11-23 14:26:38,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:38,264 INFO L480 AbstractCegarLoop]: Abstraction has 135898 states and 433872 transitions. [2018-11-23 14:26:38,264 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 14:26:38,264 INFO L276 IsEmpty]: Start isEmpty. Operand 135898 states and 433872 transitions. [2018-11-23 14:26:38,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-23 14:26:38,294 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:38,294 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:38,294 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:38,295 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:38,295 INFO L82 PathProgramCache]: Analyzing trace with hash -593985792, now seen corresponding path program 1 times [2018-11-23 14:26:38,295 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:38,296 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:38,296 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:38,296 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:38,296 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:38,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:38,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:38,381 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:38,381 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 14:26:38,381 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:38,381 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 14:26:38,381 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 14:26:38,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 14:26:38,382 INFO L87 Difference]: Start difference. First operand 135898 states and 433872 transitions. Second operand 6 states. [2018-11-23 14:26:39,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:39,212 INFO L93 Difference]: Finished difference Result 143883 states and 451858 transitions. [2018-11-23 14:26:39,212 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 14:26:39,212 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2018-11-23 14:26:39,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:39,451 INFO L225 Difference]: With dead ends: 143883 [2018-11-23 14:26:39,451 INFO L226 Difference]: Without dead ends: 143883 [2018-11-23 14:26:39,451 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-23 14:26:39,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143883 states. [2018-11-23 14:26:41,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143883 to 138092. [2018-11-23 14:26:41,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138092 states. [2018-11-23 14:26:41,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138092 states to 138092 states and 437140 transitions. [2018-11-23 14:26:41,382 INFO L78 Accepts]: Start accepts. Automaton has 138092 states and 437140 transitions. Word has length 82 [2018-11-23 14:26:41,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:41,382 INFO L480 AbstractCegarLoop]: Abstraction has 138092 states and 437140 transitions. [2018-11-23 14:26:41,382 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 14:26:41,383 INFO L276 IsEmpty]: Start isEmpty. Operand 138092 states and 437140 transitions. [2018-11-23 14:26:41,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-23 14:26:41,414 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:41,414 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:41,414 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:41,414 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:41,414 INFO L82 PathProgramCache]: Analyzing trace with hash -264220031, now seen corresponding path program 1 times [2018-11-23 14:26:41,414 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:41,415 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:41,415 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:41,415 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:41,415 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:41,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:41,474 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:41,474 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:41,474 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 14:26:41,474 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:41,475 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 14:26:41,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 14:26:41,475 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:26:41,475 INFO L87 Difference]: Start difference. First operand 138092 states and 437140 transitions. Second operand 5 states. [2018-11-23 14:26:42,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:42,366 INFO L93 Difference]: Finished difference Result 160064 states and 502579 transitions. [2018-11-23 14:26:42,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 14:26:42,367 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2018-11-23 14:26:42,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:42,612 INFO L225 Difference]: With dead ends: 160064 [2018-11-23 14:26:42,612 INFO L226 Difference]: Without dead ends: 160064 [2018-11-23 14:26:42,612 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 14:26:42,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160064 states. [2018-11-23 14:26:44,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160064 to 148241. [2018-11-23 14:26:44,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148241 states. [2018-11-23 14:26:45,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148241 states to 148241 states and 466166 transitions. [2018-11-23 14:26:45,079 INFO L78 Accepts]: Start accepts. Automaton has 148241 states and 466166 transitions. Word has length 82 [2018-11-23 14:26:45,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:45,079 INFO L480 AbstractCegarLoop]: Abstraction has 148241 states and 466166 transitions. [2018-11-23 14:26:45,079 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 14:26:45,079 INFO L276 IsEmpty]: Start isEmpty. Operand 148241 states and 466166 transitions. [2018-11-23 14:26:45,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-23 14:26:45,114 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:45,114 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:45,115 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:45,115 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:45,115 INFO L82 PathProgramCache]: Analyzing trace with hash 2020643424, now seen corresponding path program 1 times [2018-11-23 14:26:45,115 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:45,116 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:45,116 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:45,116 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:45,116 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:45,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:45,187 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:45,188 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:45,188 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 14:26:45,188 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:45,188 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 14:26:45,188 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 14:26:45,188 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:26:45,188 INFO L87 Difference]: Start difference. First operand 148241 states and 466166 transitions. Second operand 5 states. [2018-11-23 14:26:46,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:46,195 INFO L93 Difference]: Finished difference Result 177929 states and 555113 transitions. [2018-11-23 14:26:46,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 14:26:46,196 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2018-11-23 14:26:46,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:46,472 INFO L225 Difference]: With dead ends: 177929 [2018-11-23 14:26:46,472 INFO L226 Difference]: Without dead ends: 177929 [2018-11-23 14:26:46,473 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-23 14:26:46,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177929 states. [2018-11-23 14:26:51,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177929 to 167311. [2018-11-23 14:26:51,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167311 states. [2018-11-23 14:26:51,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167311 states to 167311 states and 524219 transitions. [2018-11-23 14:26:51,977 INFO L78 Accepts]: Start accepts. Automaton has 167311 states and 524219 transitions. Word has length 82 [2018-11-23 14:26:51,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:51,977 INFO L480 AbstractCegarLoop]: Abstraction has 167311 states and 524219 transitions. [2018-11-23 14:26:51,977 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 14:26:51,977 INFO L276 IsEmpty]: Start isEmpty. Operand 167311 states and 524219 transitions. [2018-11-23 14:26:52,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-23 14:26:52,018 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:52,018 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:52,018 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:52,018 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:52,018 INFO L82 PathProgramCache]: Analyzing trace with hash -56565919, now seen corresponding path program 1 times [2018-11-23 14:26:52,018 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:52,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:52,020 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:52,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:52,020 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:52,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:52,077 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:52,077 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:52,077 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 14:26:52,078 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:52,078 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 14:26:52,078 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 14:26:52,078 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 14:26:52,078 INFO L87 Difference]: Start difference. First operand 167311 states and 524219 transitions. Second operand 4 states. [2018-11-23 14:26:53,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:53,200 INFO L93 Difference]: Finished difference Result 233999 states and 731439 transitions. [2018-11-23 14:26:53,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 14:26:53,201 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 82 [2018-11-23 14:26:53,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:53,591 INFO L225 Difference]: With dead ends: 233999 [2018-11-23 14:26:53,591 INFO L226 Difference]: Without dead ends: 233767 [2018-11-23 14:26:53,591 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:26:54,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233767 states. [2018-11-23 14:26:56,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233767 to 204343. [2018-11-23 14:26:56,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204343 states. [2018-11-23 14:26:56,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204343 states to 204343 states and 641541 transitions. [2018-11-23 14:26:56,624 INFO L78 Accepts]: Start accepts. Automaton has 204343 states and 641541 transitions. Word has length 82 [2018-11-23 14:26:56,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:26:56,625 INFO L480 AbstractCegarLoop]: Abstraction has 204343 states and 641541 transitions. [2018-11-23 14:26:56,625 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 14:26:56,625 INFO L276 IsEmpty]: Start isEmpty. Operand 204343 states and 641541 transitions. [2018-11-23 14:26:56,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-23 14:26:56,686 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:26:56,686 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:26:56,687 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:26:56,687 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:26:56,687 INFO L82 PathProgramCache]: Analyzing trace with hash 905048098, now seen corresponding path program 1 times [2018-11-23 14:26:56,687 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:26:56,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:56,688 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:26:56,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:26:56,688 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:26:56,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:26:56,755 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:26:56,755 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:26:56,755 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 14:26:56,755 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:26:56,756 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 14:26:56,756 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 14:26:56,756 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:26:56,756 INFO L87 Difference]: Start difference. First operand 204343 states and 641541 transitions. Second operand 5 states. [2018-11-23 14:26:57,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:26:57,725 INFO L93 Difference]: Finished difference Result 219711 states and 678043 transitions. [2018-11-23 14:26:57,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 14:26:57,726 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2018-11-23 14:26:57,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:26:58,086 INFO L225 Difference]: With dead ends: 219711 [2018-11-23 14:26:58,086 INFO L226 Difference]: Without dead ends: 219535 [2018-11-23 14:26:58,087 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 14:26:58,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219535 states. [2018-11-23 14:27:00,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219535 to 181816. [2018-11-23 14:27:00,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181816 states. [2018-11-23 14:27:01,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181816 states to 181816 states and 565629 transitions. [2018-11-23 14:27:01,085 INFO L78 Accepts]: Start accepts. Automaton has 181816 states and 565629 transitions. Word has length 82 [2018-11-23 14:27:01,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:01,085 INFO L480 AbstractCegarLoop]: Abstraction has 181816 states and 565629 transitions. [2018-11-23 14:27:01,085 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 14:27:01,085 INFO L276 IsEmpty]: Start isEmpty. Operand 181816 states and 565629 transitions. [2018-11-23 14:27:01,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-23 14:27:01,125 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:01,125 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:01,125 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:01,125 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:01,126 INFO L82 PathProgramCache]: Analyzing trace with hash -2145154717, now seen corresponding path program 1 times [2018-11-23 14:27:01,126 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:01,126 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:01,127 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:27:01,127 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:01,127 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:01,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:01,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:01,183 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:01,183 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 14:27:01,183 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:01,184 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 14:27:01,184 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 14:27:01,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:27:01,184 INFO L87 Difference]: Start difference. First operand 181816 states and 565629 transitions. Second operand 5 states. [2018-11-23 14:27:01,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:01,233 INFO L93 Difference]: Finished difference Result 18256 states and 44415 transitions. [2018-11-23 14:27:01,234 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 14:27:01,234 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2018-11-23 14:27:01,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:01,245 INFO L225 Difference]: With dead ends: 18256 [2018-11-23 14:27:01,245 INFO L226 Difference]: Without dead ends: 15627 [2018-11-23 14:27:01,246 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-23 14:27:01,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15627 states. [2018-11-23 14:27:01,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15627 to 14310. [2018-11-23 14:27:01,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14310 states. [2018-11-23 14:27:01,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14310 states to 14310 states and 33903 transitions. [2018-11-23 14:27:01,364 INFO L78 Accepts]: Start accepts. Automaton has 14310 states and 33903 transitions. Word has length 82 [2018-11-23 14:27:01,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:01,364 INFO L480 AbstractCegarLoop]: Abstraction has 14310 states and 33903 transitions. [2018-11-23 14:27:01,364 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 14:27:01,364 INFO L276 IsEmpty]: Start isEmpty. Operand 14310 states and 33903 transitions. [2018-11-23 14:27:01,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-11-23 14:27:01,372 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:01,372 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:01,373 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:01,373 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:01,373 INFO L82 PathProgramCache]: Analyzing trace with hash -1849176376, now seen corresponding path program 1 times [2018-11-23 14:27:01,373 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:01,374 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:01,374 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:27:01,374 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:01,374 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:01,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:01,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:01,441 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:01,441 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 14:27:01,441 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:01,442 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 14:27:01,442 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 14:27:01,442 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 14:27:01,442 INFO L87 Difference]: Start difference. First operand 14310 states and 33903 transitions. Second operand 6 states. [2018-11-23 14:27:01,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:01,631 INFO L93 Difference]: Finished difference Result 18366 states and 43448 transitions. [2018-11-23 14:27:01,631 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-23 14:27:01,631 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 88 [2018-11-23 14:27:01,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:01,644 INFO L225 Difference]: With dead ends: 18366 [2018-11-23 14:27:01,644 INFO L226 Difference]: Without dead ends: 18366 [2018-11-23 14:27:01,644 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-11-23 14:27:01,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18366 states. [2018-11-23 14:27:01,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18366 to 16694. [2018-11-23 14:27:01,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16694 states. [2018-11-23 14:27:01,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16694 states to 16694 states and 39650 transitions. [2018-11-23 14:27:01,813 INFO L78 Accepts]: Start accepts. Automaton has 16694 states and 39650 transitions. Word has length 88 [2018-11-23 14:27:01,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:01,813 INFO L480 AbstractCegarLoop]: Abstraction has 16694 states and 39650 transitions. [2018-11-23 14:27:01,813 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 14:27:01,813 INFO L276 IsEmpty]: Start isEmpty. Operand 16694 states and 39650 transitions. [2018-11-23 14:27:01,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-11-23 14:27:01,822 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:01,822 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:01,822 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:01,823 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:01,823 INFO L82 PathProgramCache]: Analyzing trace with hash -106366041, now seen corresponding path program 1 times [2018-11-23 14:27:01,823 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:01,823 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:01,823 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:27:01,823 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:01,824 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:01,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:01,927 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:01,928 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:01,928 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-23 14:27:01,928 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:01,928 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 14:27:01,928 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 14:27:01,928 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-11-23 14:27:01,929 INFO L87 Difference]: Start difference. First operand 16694 states and 39650 transitions. Second operand 10 states. [2018-11-23 14:27:02,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:02,808 INFO L93 Difference]: Finished difference Result 20494 states and 48001 transitions. [2018-11-23 14:27:02,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-11-23 14:27:02,808 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 88 [2018-11-23 14:27:02,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:02,822 INFO L225 Difference]: With dead ends: 20494 [2018-11-23 14:27:02,822 INFO L226 Difference]: Without dead ends: 20380 [2018-11-23 14:27:02,823 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 172 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=189, Invalid=741, Unknown=0, NotChecked=0, Total=930 [2018-11-23 14:27:02,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20380 states. [2018-11-23 14:27:02,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20380 to 17809. [2018-11-23 14:27:02,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17809 states. [2018-11-23 14:27:02,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17809 states to 17809 states and 42023 transitions. [2018-11-23 14:27:02,972 INFO L78 Accepts]: Start accepts. Automaton has 17809 states and 42023 transitions. Word has length 88 [2018-11-23 14:27:02,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:02,972 INFO L480 AbstractCegarLoop]: Abstraction has 17809 states and 42023 transitions. [2018-11-23 14:27:02,972 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 14:27:02,972 INFO L276 IsEmpty]: Start isEmpty. Operand 17809 states and 42023 transitions. [2018-11-23 14:27:02,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-11-23 14:27:02,982 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:02,982 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:02,982 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:02,982 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:02,982 INFO L82 PathProgramCache]: Analyzing trace with hash -594830456, now seen corresponding path program 1 times [2018-11-23 14:27:02,982 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:02,983 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:02,983 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:27:02,983 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:02,983 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:02,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:03,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:03,046 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:03,046 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 14:27:03,046 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:03,046 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 14:27:03,048 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 14:27:03,048 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 14:27:03,048 INFO L87 Difference]: Start difference. First operand 17809 states and 42023 transitions. Second operand 6 states. [2018-11-23 14:27:03,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:03,226 INFO L93 Difference]: Finished difference Result 22682 states and 53302 transitions. [2018-11-23 14:27:03,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-23 14:27:03,227 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 88 [2018-11-23 14:27:03,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:03,245 INFO L225 Difference]: With dead ends: 22682 [2018-11-23 14:27:03,245 INFO L226 Difference]: Without dead ends: 22682 [2018-11-23 14:27:03,245 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-11-23 14:27:03,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22682 states. [2018-11-23 14:27:03,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22682 to 17804. [2018-11-23 14:27:03,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17804 states. [2018-11-23 14:27:03,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17804 states to 17804 states and 42001 transitions. [2018-11-23 14:27:03,407 INFO L78 Accepts]: Start accepts. Automaton has 17804 states and 42001 transitions. Word has length 88 [2018-11-23 14:27:03,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:03,408 INFO L480 AbstractCegarLoop]: Abstraction has 17804 states and 42001 transitions. [2018-11-23 14:27:03,408 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 14:27:03,408 INFO L276 IsEmpty]: Start isEmpty. Operand 17804 states and 42001 transitions. [2018-11-23 14:27:03,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-11-23 14:27:03,417 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:03,417 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:03,417 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:03,418 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:03,418 INFO L82 PathProgramCache]: Analyzing trace with hash 1147979879, now seen corresponding path program 1 times [2018-11-23 14:27:03,418 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:03,419 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:03,419 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:27:03,419 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:03,419 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:03,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:03,518 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:03,518 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:03,519 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-23 14:27:03,519 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:03,519 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 14:27:03,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 14:27:03,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-11-23 14:27:03,519 INFO L87 Difference]: Start difference. First operand 17804 states and 42001 transitions. Second operand 10 states. [2018-11-23 14:27:04,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:04,285 INFO L93 Difference]: Finished difference Result 20835 states and 48650 transitions. [2018-11-23 14:27:04,285 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-23 14:27:04,285 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 88 [2018-11-23 14:27:04,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:04,300 INFO L225 Difference]: With dead ends: 20835 [2018-11-23 14:27:04,300 INFO L226 Difference]: Without dead ends: 20749 [2018-11-23 14:27:04,300 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 126 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=119, Invalid=531, Unknown=0, NotChecked=0, Total=650 [2018-11-23 14:27:04,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20749 states. [2018-11-23 14:27:04,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20749 to 17590. [2018-11-23 14:27:04,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17590 states. [2018-11-23 14:27:04,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17590 states to 17590 states and 41562 transitions. [2018-11-23 14:27:04,450 INFO L78 Accepts]: Start accepts. Automaton has 17590 states and 41562 transitions. Word has length 88 [2018-11-23 14:27:04,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:04,451 INFO L480 AbstractCegarLoop]: Abstraction has 17590 states and 41562 transitions. [2018-11-23 14:27:04,451 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 14:27:04,451 INFO L276 IsEmpty]: Start isEmpty. Operand 17590 states and 41562 transitions. [2018-11-23 14:27:04,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-23 14:27:04,461 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:04,461 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:04,462 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:04,462 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:04,462 INFO L82 PathProgramCache]: Analyzing trace with hash -968928213, now seen corresponding path program 1 times [2018-11-23 14:27:04,462 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:04,463 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:04,463 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:27:04,463 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:04,463 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:04,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:04,516 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:04,516 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:04,516 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 14:27:04,516 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:04,516 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 14:27:04,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 14:27:04,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-23 14:27:04,517 INFO L87 Difference]: Start difference. First operand 17590 states and 41562 transitions. Second operand 7 states. [2018-11-23 14:27:04,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:04,745 INFO L93 Difference]: Finished difference Result 22434 states and 52977 transitions. [2018-11-23 14:27:04,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 14:27:04,746 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 100 [2018-11-23 14:27:04,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:04,762 INFO L225 Difference]: With dead ends: 22434 [2018-11-23 14:27:04,762 INFO L226 Difference]: Without dead ends: 22434 [2018-11-23 14:27:04,762 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-11-23 14:27:04,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22434 states. [2018-11-23 14:27:04,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22434 to 18153. [2018-11-23 14:27:04,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18153 states. [2018-11-23 14:27:04,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18153 states to 18153 states and 42901 transitions. [2018-11-23 14:27:04,915 INFO L78 Accepts]: Start accepts. Automaton has 18153 states and 42901 transitions. Word has length 100 [2018-11-23 14:27:04,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:04,915 INFO L480 AbstractCegarLoop]: Abstraction has 18153 states and 42901 transitions. [2018-11-23 14:27:04,915 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 14:27:04,915 INFO L276 IsEmpty]: Start isEmpty. Operand 18153 states and 42901 transitions. [2018-11-23 14:27:04,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-23 14:27:04,926 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:04,926 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:04,926 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:04,926 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:04,926 INFO L82 PathProgramCache]: Analyzing trace with hash 773882122, now seen corresponding path program 1 times [2018-11-23 14:27:04,926 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:04,927 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:04,927 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:27:04,927 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:04,927 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:04,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:05,021 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:05,021 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:05,021 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-11-23 14:27:05,021 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:05,021 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-23 14:27:05,022 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-23 14:27:05,022 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-11-23 14:27:05,022 INFO L87 Difference]: Start difference. First operand 18153 states and 42901 transitions. Second operand 11 states. [2018-11-23 14:27:05,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:05,766 INFO L93 Difference]: Finished difference Result 21139 states and 49475 transitions. [2018-11-23 14:27:05,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-11-23 14:27:05,767 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 100 [2018-11-23 14:27:05,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:05,781 INFO L225 Difference]: With dead ends: 21139 [2018-11-23 14:27:05,782 INFO L226 Difference]: Without dead ends: 21009 [2018-11-23 14:27:05,782 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 264 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=200, Invalid=990, Unknown=0, NotChecked=0, Total=1190 [2018-11-23 14:27:05,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21009 states. [2018-11-23 14:27:05,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21009 to 16774. [2018-11-23 14:27:05,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16774 states. [2018-11-23 14:27:05,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16774 states to 16774 states and 39914 transitions. [2018-11-23 14:27:05,933 INFO L78 Accepts]: Start accepts. Automaton has 16774 states and 39914 transitions. Word has length 100 [2018-11-23 14:27:05,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:05,933 INFO L480 AbstractCegarLoop]: Abstraction has 16774 states and 39914 transitions. [2018-11-23 14:27:05,933 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-23 14:27:05,934 INFO L276 IsEmpty]: Start isEmpty. Operand 16774 states and 39914 transitions. [2018-11-23 14:27:05,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-11-23 14:27:05,944 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:05,945 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:05,945 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:05,945 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:05,945 INFO L82 PathProgramCache]: Analyzing trace with hash -906257866, now seen corresponding path program 1 times [2018-11-23 14:27:05,945 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:05,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:05,946 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:27:05,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:05,946 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:05,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:06,083 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:06,083 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:06,083 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 14:27:06,083 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:06,084 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 14:27:06,084 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 14:27:06,084 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-23 14:27:06,084 INFO L87 Difference]: Start difference. First operand 16774 states and 39914 transitions. Second operand 7 states. [2018-11-23 14:27:06,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:06,635 INFO L93 Difference]: Finished difference Result 20448 states and 48334 transitions. [2018-11-23 14:27:06,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 14:27:06,635 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 125 [2018-11-23 14:27:06,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:06,650 INFO L225 Difference]: With dead ends: 20448 [2018-11-23 14:27:06,650 INFO L226 Difference]: Without dead ends: 20448 [2018-11-23 14:27:06,650 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-23 14:27:06,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20448 states. [2018-11-23 14:27:06,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20448 to 17150. [2018-11-23 14:27:06,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17150 states. [2018-11-23 14:27:06,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17150 states to 17150 states and 40983 transitions. [2018-11-23 14:27:06,799 INFO L78 Accepts]: Start accepts. Automaton has 17150 states and 40983 transitions. Word has length 125 [2018-11-23 14:27:06,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:06,799 INFO L480 AbstractCegarLoop]: Abstraction has 17150 states and 40983 transitions. [2018-11-23 14:27:06,799 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 14:27:06,799 INFO L276 IsEmpty]: Start isEmpty. Operand 17150 states and 40983 transitions. [2018-11-23 14:27:06,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-11-23 14:27:06,811 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:06,811 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:06,811 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:06,811 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:06,811 INFO L82 PathProgramCache]: Analyzing trace with hash 295243193, now seen corresponding path program 1 times [2018-11-23 14:27:06,811 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:06,812 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:06,812 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:27:06,812 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:06,812 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:06,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:06,876 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:06,876 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:06,876 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 14:27:06,877 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:06,877 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 14:27:06,877 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 14:27:06,877 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:27:06,877 INFO L87 Difference]: Start difference. First operand 17150 states and 40983 transitions. Second operand 5 states. [2018-11-23 14:27:07,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:07,053 INFO L93 Difference]: Finished difference Result 26994 states and 63376 transitions. [2018-11-23 14:27:07,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 14:27:07,054 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 125 [2018-11-23 14:27:07,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:07,074 INFO L225 Difference]: With dead ends: 26994 [2018-11-23 14:27:07,074 INFO L226 Difference]: Without dead ends: 26994 [2018-11-23 14:27:07,074 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 14:27:07,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26994 states. [2018-11-23 14:27:07,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26994 to 24454. [2018-11-23 14:27:07,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24454 states. [2018-11-23 14:27:07,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24454 states to 24454 states and 57989 transitions. [2018-11-23 14:27:07,282 INFO L78 Accepts]: Start accepts. Automaton has 24454 states and 57989 transitions. Word has length 125 [2018-11-23 14:27:07,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:07,283 INFO L480 AbstractCegarLoop]: Abstraction has 24454 states and 57989 transitions. [2018-11-23 14:27:07,283 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 14:27:07,283 INFO L276 IsEmpty]: Start isEmpty. Operand 24454 states and 57989 transitions. [2018-11-23 14:27:07,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-23 14:27:07,301 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:07,301 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:07,301 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:07,301 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:07,301 INFO L82 PathProgramCache]: Analyzing trace with hash 25931487, now seen corresponding path program 1 times [2018-11-23 14:27:07,301 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:07,302 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:07,302 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:27:07,303 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:07,303 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:07,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:07,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:07,356 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:07,356 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 14:27:07,356 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:07,356 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 14:27:07,356 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 14:27:07,356 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 14:27:07,357 INFO L87 Difference]: Start difference. First operand 24454 states and 57989 transitions. Second operand 6 states. [2018-11-23 14:27:07,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:07,532 INFO L93 Difference]: Finished difference Result 37692 states and 89177 transitions. [2018-11-23 14:27:07,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 14:27:07,533 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 127 [2018-11-23 14:27:07,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:07,561 INFO L225 Difference]: With dead ends: 37692 [2018-11-23 14:27:07,561 INFO L226 Difference]: Without dead ends: 37692 [2018-11-23 14:27:07,562 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-11-23 14:27:07,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37692 states. [2018-11-23 14:27:07,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37692 to 24305. [2018-11-23 14:27:07,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24305 states. [2018-11-23 14:27:07,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24305 states to 24305 states and 57756 transitions. [2018-11-23 14:27:07,807 INFO L78 Accepts]: Start accepts. Automaton has 24305 states and 57756 transitions. Word has length 127 [2018-11-23 14:27:07,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:07,807 INFO L480 AbstractCegarLoop]: Abstraction has 24305 states and 57756 transitions. [2018-11-23 14:27:07,807 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 14:27:07,807 INFO L276 IsEmpty]: Start isEmpty. Operand 24305 states and 57756 transitions. [2018-11-23 14:27:07,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-23 14:27:07,823 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:07,823 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:07,823 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:07,823 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:07,823 INFO L82 PathProgramCache]: Analyzing trace with hash -1157415810, now seen corresponding path program 1 times [2018-11-23 14:27:07,823 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:07,824 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:07,824 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:27:07,824 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:07,824 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:07,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:07,864 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:07,864 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:07,864 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 14:27:07,865 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:07,865 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 14:27:07,865 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 14:27:07,865 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 14:27:07,865 INFO L87 Difference]: Start difference. First operand 24305 states and 57756 transitions. Second operand 4 states. [2018-11-23 14:27:08,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:08,112 INFO L93 Difference]: Finished difference Result 30698 states and 71631 transitions. [2018-11-23 14:27:08,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 14:27:08,112 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 127 [2018-11-23 14:27:08,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:08,135 INFO L225 Difference]: With dead ends: 30698 [2018-11-23 14:27:08,135 INFO L226 Difference]: Without dead ends: 30631 [2018-11-23 14:27:08,135 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:27:08,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30631 states. [2018-11-23 14:27:08,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30631 to 28665. [2018-11-23 14:27:08,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28665 states. [2018-11-23 14:27:08,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28665 states to 28665 states and 67379 transitions. [2018-11-23 14:27:08,377 INFO L78 Accepts]: Start accepts. Automaton has 28665 states and 67379 transitions. Word has length 127 [2018-11-23 14:27:08,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:08,378 INFO L480 AbstractCegarLoop]: Abstraction has 28665 states and 67379 transitions. [2018-11-23 14:27:08,378 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 14:27:08,378 INFO L276 IsEmpty]: Start isEmpty. Operand 28665 states and 67379 transitions. [2018-11-23 14:27:08,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-23 14:27:08,397 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:08,397 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:08,398 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:08,398 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:08,398 INFO L82 PathProgramCache]: Analyzing trace with hash 1201891199, now seen corresponding path program 1 times [2018-11-23 14:27:08,398 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:08,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:08,399 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:27:08,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:08,399 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:08,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:08,512 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:08,513 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:08,513 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-11-23 14:27:08,513 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:08,513 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-23 14:27:08,513 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-23 14:27:08,513 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2018-11-23 14:27:08,513 INFO L87 Difference]: Start difference. First operand 28665 states and 67379 transitions. Second operand 11 states. [2018-11-23 14:27:09,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:09,823 INFO L93 Difference]: Finished difference Result 75448 states and 177106 transitions. [2018-11-23 14:27:09,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-23 14:27:09,824 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 127 [2018-11-23 14:27:09,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:09,875 INFO L225 Difference]: With dead ends: 75448 [2018-11-23 14:27:09,875 INFO L226 Difference]: Without dead ends: 57405 [2018-11-23 14:27:09,875 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=130, Invalid=626, Unknown=0, NotChecked=0, Total=756 [2018-11-23 14:27:09,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57405 states. [2018-11-23 14:27:10,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57405 to 27910. [2018-11-23 14:27:10,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27910 states. [2018-11-23 14:27:10,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27910 states to 27910 states and 65707 transitions. [2018-11-23 14:27:10,287 INFO L78 Accepts]: Start accepts. Automaton has 27910 states and 65707 transitions. Word has length 127 [2018-11-23 14:27:10,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:10,287 INFO L480 AbstractCegarLoop]: Abstraction has 27910 states and 65707 transitions. [2018-11-23 14:27:10,287 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-23 14:27:10,287 INFO L276 IsEmpty]: Start isEmpty. Operand 27910 states and 65707 transitions. [2018-11-23 14:27:10,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-23 14:27:10,306 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:10,306 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:10,306 INFO L423 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:10,306 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:10,306 INFO L82 PathProgramCache]: Analyzing trace with hash -60439278, now seen corresponding path program 1 times [2018-11-23 14:27:10,307 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:10,307 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:10,307 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:27:10,307 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:10,307 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:10,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:10,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:10,384 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:10,384 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 14:27:10,384 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:10,384 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 14:27:10,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 14:27:10,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 14:27:10,384 INFO L87 Difference]: Start difference. First operand 27910 states and 65707 transitions. Second operand 6 states. [2018-11-23 14:27:10,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:10,601 INFO L93 Difference]: Finished difference Result 30652 states and 71268 transitions. [2018-11-23 14:27:10,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 14:27:10,601 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 127 [2018-11-23 14:27:10,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:10,626 INFO L225 Difference]: With dead ends: 30652 [2018-11-23 14:27:10,626 INFO L226 Difference]: Without dead ends: 30610 [2018-11-23 14:27:10,626 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-23 14:27:10,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30610 states. [2018-11-23 14:27:10,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30610 to 27193. [2018-11-23 14:27:10,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27193 states. [2018-11-23 14:27:10,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27193 states to 27193 states and 63382 transitions. [2018-11-23 14:27:10,883 INFO L78 Accepts]: Start accepts. Automaton has 27193 states and 63382 transitions. Word has length 127 [2018-11-23 14:27:10,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:10,883 INFO L480 AbstractCegarLoop]: Abstraction has 27193 states and 63382 transitions. [2018-11-23 14:27:10,883 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 14:27:10,883 INFO L276 IsEmpty]: Start isEmpty. Operand 27193 states and 63382 transitions. [2018-11-23 14:27:10,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-23 14:27:10,904 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:10,904 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:10,904 INFO L423 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:10,904 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:10,904 INFO L82 PathProgramCache]: Analyzing trace with hash 577542988, now seen corresponding path program 1 times [2018-11-23 14:27:10,904 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:10,905 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:10,905 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:27:10,906 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:10,906 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:10,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:10,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:10,941 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:10,941 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 14:27:10,941 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:10,942 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 14:27:10,942 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 14:27:10,942 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:27:10,942 INFO L87 Difference]: Start difference. First operand 27193 states and 63382 transitions. Second operand 5 states. [2018-11-23 14:27:11,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:11,147 INFO L93 Difference]: Finished difference Result 28839 states and 66769 transitions. [2018-11-23 14:27:11,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 14:27:11,147 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 127 [2018-11-23 14:27:11,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:11,169 INFO L225 Difference]: With dead ends: 28839 [2018-11-23 14:27:11,169 INFO L226 Difference]: Without dead ends: 28839 [2018-11-23 14:27:11,169 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 14:27:11,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28839 states. [2018-11-23 14:27:11,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28839 to 27412. [2018-11-23 14:27:11,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27412 states. [2018-11-23 14:27:11,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27412 states to 27412 states and 63848 transitions. [2018-11-23 14:27:11,410 INFO L78 Accepts]: Start accepts. Automaton has 27412 states and 63848 transitions. Word has length 127 [2018-11-23 14:27:11,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:11,410 INFO L480 AbstractCegarLoop]: Abstraction has 27412 states and 63848 transitions. [2018-11-23 14:27:11,410 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 14:27:11,410 INFO L276 IsEmpty]: Start isEmpty. Operand 27412 states and 63848 transitions. [2018-11-23 14:27:11,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-23 14:27:11,431 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:11,431 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:11,431 INFO L423 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:11,431 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:11,431 INFO L82 PathProgramCache]: Analyzing trace with hash 1488351502, now seen corresponding path program 2 times [2018-11-23 14:27:11,431 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:11,432 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:11,432 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:27:11,432 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:11,433 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:11,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:11,503 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:11,503 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:11,503 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 14:27:11,503 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:11,503 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 14:27:11,504 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 14:27:11,504 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 14:27:11,504 INFO L87 Difference]: Start difference. First operand 27412 states and 63848 transitions. Second operand 6 states. [2018-11-23 14:27:11,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:11,699 INFO L93 Difference]: Finished difference Result 27526 states and 63909 transitions. [2018-11-23 14:27:11,700 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 14:27:11,700 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 127 [2018-11-23 14:27:11,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:11,720 INFO L225 Difference]: With dead ends: 27526 [2018-11-23 14:27:11,720 INFO L226 Difference]: Without dead ends: 27526 [2018-11-23 14:27:11,721 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-23 14:27:11,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27526 states. [2018-11-23 14:27:11,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27526 to 24870. [2018-11-23 14:27:11,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24870 states. [2018-11-23 14:27:11,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24870 states to 24870 states and 57768 transitions. [2018-11-23 14:27:11,936 INFO L78 Accepts]: Start accepts. Automaton has 24870 states and 57768 transitions. Word has length 127 [2018-11-23 14:27:11,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:11,936 INFO L480 AbstractCegarLoop]: Abstraction has 24870 states and 57768 transitions. [2018-11-23 14:27:11,936 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 14:27:11,936 INFO L276 IsEmpty]: Start isEmpty. Operand 24870 states and 57768 transitions. [2018-11-23 14:27:11,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-23 14:27:11,954 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:11,954 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:11,954 INFO L423 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:11,954 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:11,954 INFO L82 PathProgramCache]: Analyzing trace with hash 893789617, now seen corresponding path program 2 times [2018-11-23 14:27:11,954 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:11,955 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:11,955 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:27:11,955 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:11,955 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:11,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:12,040 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:12,040 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:12,040 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 14:27:12,040 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:12,040 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 14:27:12,041 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 14:27:12,041 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-23 14:27:12,041 INFO L87 Difference]: Start difference. First operand 24870 states and 57768 transitions. Second operand 7 states. [2018-11-23 14:27:12,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:12,527 INFO L93 Difference]: Finished difference Result 39862 states and 92923 transitions. [2018-11-23 14:27:12,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 14:27:12,528 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 127 [2018-11-23 14:27:12,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:12,537 INFO L225 Difference]: With dead ends: 39862 [2018-11-23 14:27:12,537 INFO L226 Difference]: Without dead ends: 12503 [2018-11-23 14:27:12,537 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-11-23 14:27:12,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12503 states. [2018-11-23 14:27:12,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12503 to 12503. [2018-11-23 14:27:12,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12503 states. [2018-11-23 14:27:12,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12503 states to 12503 states and 29534 transitions. [2018-11-23 14:27:12,629 INFO L78 Accepts]: Start accepts. Automaton has 12503 states and 29534 transitions. Word has length 127 [2018-11-23 14:27:12,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:12,630 INFO L480 AbstractCegarLoop]: Abstraction has 12503 states and 29534 transitions. [2018-11-23 14:27:12,630 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 14:27:12,630 INFO L276 IsEmpty]: Start isEmpty. Operand 12503 states and 29534 transitions. [2018-11-23 14:27:12,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-23 14:27:12,638 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:12,638 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:12,638 INFO L423 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:12,638 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:12,638 INFO L82 PathProgramCache]: Analyzing trace with hash 528390363, now seen corresponding path program 3 times [2018-11-23 14:27:12,638 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:12,639 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:12,639 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:27:12,639 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:12,639 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:12,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:12,798 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:12,798 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:12,798 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-11-23 14:27:12,798 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:12,798 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-23 14:27:12,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-23 14:27:12,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-11-23 14:27:12,798 INFO L87 Difference]: Start difference. First operand 12503 states and 29534 transitions. Second operand 15 states. [2018-11-23 14:27:13,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:13,299 INFO L93 Difference]: Finished difference Result 27006 states and 64211 transitions. [2018-11-23 14:27:13,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-23 14:27:13,299 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 127 [2018-11-23 14:27:13,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:13,319 INFO L225 Difference]: With dead ends: 27006 [2018-11-23 14:27:13,320 INFO L226 Difference]: Without dead ends: 25346 [2018-11-23 14:27:13,320 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=122, Invalid=808, Unknown=0, NotChecked=0, Total=930 [2018-11-23 14:27:13,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25346 states. [2018-11-23 14:27:13,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25346 to 20915. [2018-11-23 14:27:13,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20915 states. [2018-11-23 14:27:13,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20915 states to 20915 states and 49002 transitions. [2018-11-23 14:27:13,524 INFO L78 Accepts]: Start accepts. Automaton has 20915 states and 49002 transitions. Word has length 127 [2018-11-23 14:27:13,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:13,524 INFO L480 AbstractCegarLoop]: Abstraction has 20915 states and 49002 transitions. [2018-11-23 14:27:13,524 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-23 14:27:13,524 INFO L276 IsEmpty]: Start isEmpty. Operand 20915 states and 49002 transitions. [2018-11-23 14:27:13,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-23 14:27:13,537 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:13,537 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:13,537 INFO L423 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:13,537 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:13,537 INFO L82 PathProgramCache]: Analyzing trace with hash 520631004, now seen corresponding path program 1 times [2018-11-23 14:27:13,537 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:13,538 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:13,538 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:27:13,538 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:13,538 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:13,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:13,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:13,616 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:13,616 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 14:27:13,617 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:13,617 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 14:27:13,617 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 14:27:13,617 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:27:13,617 INFO L87 Difference]: Start difference. First operand 20915 states and 49002 transitions. Second operand 5 states. [2018-11-23 14:27:13,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:13,701 INFO L93 Difference]: Finished difference Result 17074 states and 39845 transitions. [2018-11-23 14:27:13,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 14:27:13,701 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 127 [2018-11-23 14:27:13,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:13,713 INFO L225 Difference]: With dead ends: 17074 [2018-11-23 14:27:13,713 INFO L226 Difference]: Without dead ends: 17074 [2018-11-23 14:27:13,713 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:27:13,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17074 states. [2018-11-23 14:27:13,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17074 to 16940. [2018-11-23 14:27:13,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16940 states. [2018-11-23 14:27:13,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16940 states to 16940 states and 39561 transitions. [2018-11-23 14:27:13,842 INFO L78 Accepts]: Start accepts. Automaton has 16940 states and 39561 transitions. Word has length 127 [2018-11-23 14:27:13,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:13,842 INFO L480 AbstractCegarLoop]: Abstraction has 16940 states and 39561 transitions. [2018-11-23 14:27:13,842 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 14:27:13,843 INFO L276 IsEmpty]: Start isEmpty. Operand 16940 states and 39561 transitions. [2018-11-23 14:27:13,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-23 14:27:13,853 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:13,853 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:13,853 INFO L423 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:13,854 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:13,854 INFO L82 PathProgramCache]: Analyzing trace with hash 220817658, now seen corresponding path program 2 times [2018-11-23 14:27:13,854 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:13,854 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:13,854 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:27:13,854 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:13,855 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:13,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:27:13,923 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:27:13,923 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:27:13,924 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 14:27:13,924 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 14:27:13,924 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 14:27:13,924 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 14:27:13,924 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-23 14:27:13,924 INFO L87 Difference]: Start difference. First operand 16940 states and 39561 transitions. Second operand 8 states. [2018-11-23 14:27:14,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:27:14,345 INFO L93 Difference]: Finished difference Result 19482 states and 45243 transitions. [2018-11-23 14:27:14,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 14:27:14,345 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 127 [2018-11-23 14:27:14,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:27:14,359 INFO L225 Difference]: With dead ends: 19482 [2018-11-23 14:27:14,360 INFO L226 Difference]: Without dead ends: 19482 [2018-11-23 14:27:14,360 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2018-11-23 14:27:14,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19482 states. [2018-11-23 14:27:14,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19482 to 18409. [2018-11-23 14:27:14,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18409 states. [2018-11-23 14:27:14,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18409 states to 18409 states and 42940 transitions. [2018-11-23 14:27:14,504 INFO L78 Accepts]: Start accepts. Automaton has 18409 states and 42940 transitions. Word has length 127 [2018-11-23 14:27:14,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:27:14,504 INFO L480 AbstractCegarLoop]: Abstraction has 18409 states and 42940 transitions. [2018-11-23 14:27:14,504 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 14:27:14,504 INFO L276 IsEmpty]: Start isEmpty. Operand 18409 states and 42940 transitions. [2018-11-23 14:27:14,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-23 14:27:14,517 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:27:14,517 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:27:14,517 INFO L423 AbstractCegarLoop]: === Iteration 39 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 14:27:14,517 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:27:14,518 INFO L82 PathProgramCache]: Analyzing trace with hash 45331485, now seen corresponding path program 4 times [2018-11-23 14:27:14,518 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 14:27:14,518 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:14,519 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:27:14,519 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:27:14,519 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 14:27:14,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 14:27:14,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 14:27:14,584 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [750] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [655] L-1-->L671: Formula: (= |v_#valid_5| (store |v_#valid_6| 0 0)) InVars {#valid=|v_#valid_6|} OutVars{#valid=|v_#valid_5|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [792] L671-->L673: Formula: (= v_~__unbuffered_cnt~0_5 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [827] L673-->L675: Formula: (= v_~__unbuffered_p1_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 [707] L675-->L676: Formula: (= v_~__unbuffered_p1_EBX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 [644] L676-->L677: Formula: (= v_~main$tmp_guard0~0_1 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 [757] L677-->L679: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [946] L679-->L681: Formula: (= v_~x~0_4 0) InVars {} OutVars{~x~0=v_~x~0_4} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [670] L681-->L682: Formula: (= v_~y~0_19 0) InVars {} OutVars{~y~0=v_~y~0_19} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [787] L682-->L683: Formula: (= v_~y$flush_delayed~0_12 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_12} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 [726] L683-->L684: Formula: (= v_~y$mem_tmp~0_6 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_6} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 [824] L684-->L685: Formula: (= v_~y$r_buff0_thd0~0_24 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_24} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 [918] L685-->L686: Formula: (= v_~y$r_buff0_thd1~0_14 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_14} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 [702] L686-->L687: Formula: (= v_~y$r_buff0_thd2~0_73 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_73} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 [664] L687-->L688: Formula: (= v_~y$r_buff1_thd0~0_14 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_14} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 [756] L688-->L689: Formula: (= v_~y$r_buff1_thd1~0_9 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 [854] L689-->L690: Formula: (= v_~y$r_buff1_thd2~0_41 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_41} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 [944] L690-->L691: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [887] L691-->L692: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [668] L692-->L693: Formula: (= v_~y$w_buff0~0_17 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_17} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [785] L693-->L694: Formula: (= v_~y$w_buff0_used~0_107 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_107} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [725] L694-->L695: Formula: (= v_~y$w_buff1~0_21 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_21} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [823] L695-->L696: Formula: (= v_~y$w_buff1_used~0_60 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_60} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [917] L696-->L697: Formula: (= v_~weak$$choice0~0_3 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_3} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [701] L697-->L-1-1: Formula: (= v_~weak$$choice2~0_37 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_37} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [786] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [784] L-1-2-->L789: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_1|, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_1|, ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_1|, ULTIMATE.start_main_#t~ite89=|v_ULTIMATE.start_main_#t~ite89_5|, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_1|, ULTIMATE.start_main_#t~ite88=|v_ULTIMATE.start_main_#t~ite88_5|, ULTIMATE.start_main_#t~ite87=|v_ULTIMATE.start_main_#t~ite87_5|, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_1|, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_5|, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_1|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_1|, ULTIMATE.start_main_#t~ite93=|v_ULTIMATE.start_main_#t~ite93_5|, ULTIMATE.start_main_#t~ite92=|v_ULTIMATE.start_main_#t~ite92_5|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_1|, ULTIMATE.start_main_#t~ite91=|v_ULTIMATE.start_main_#t~ite91_5|, ULTIMATE.start_main_#t~ite90=|v_ULTIMATE.start_main_#t~ite90_5|, ULTIMATE.start_main_~#t1596~0.offset=|v_ULTIMATE.start_main_~#t1596~0.offset_3|, ULTIMATE.start_main_#t~nondet64=|v_ULTIMATE.start_main_#t~nondet64_1|, ULTIMATE.start_main_~#t1595~0.offset=|v_ULTIMATE.start_main_~#t1595~0.offset_3|, ULTIMATE.start_main_#t~nondet63=|v_ULTIMATE.start_main_#t~nondet63_1|, ULTIMATE.start_main_#t~ite79=|v_ULTIMATE.start_main_#t~ite79_5|, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_1|, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_5|, ULTIMATE.start_main_~#t1595~0.base=|v_ULTIMATE.start_main_~#t1595~0.base_3|, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_1|, ULTIMATE.start_main_#t~nondet72.offset=|v_ULTIMATE.start_main_#t~nondet72.offset_1|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_1|, ULTIMATE.start_main_#t~nondet71.base=|v_ULTIMATE.start_main_#t~nondet71.base_1|, ULTIMATE.start_main_#t~ite85=|v_ULTIMATE.start_main_#t~ite85_5|, ULTIMATE.start_main_#t~ite84=|v_ULTIMATE.start_main_#t~ite84_5|, ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_5|, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_5|, ULTIMATE.start_main_#t~nondet71.offset=|v_ULTIMATE.start_main_#t~nondet71.offset_1|, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_5|, ULTIMATE.start_main_#t~ite80=|v_ULTIMATE.start_main_#t~ite80_5|, ULTIMATE.start_main_~#t1596~0.base=|v_ULTIMATE.start_main_~#t1596~0.base_3|, ULTIMATE.start_main_#t~nondet72.base=|v_ULTIMATE.start_main_#t~nondet72.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite68, ULTIMATE.start_main_#t~ite69, ULTIMATE.start_main_#t~ite66, ULTIMATE.start_main_#t~ite89, ULTIMATE.start_main_#t~ite67, ULTIMATE.start_main_#t~ite88, ULTIMATE.start_main_#t~ite87, ULTIMATE.start_main_#t~ite65, ULTIMATE.start_main_#t~ite86, ULTIMATE.start_main_#t~ite73, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite93, ULTIMATE.start_main_#t~ite92, ULTIMATE.start_main_#t~ite70, ULTIMATE.start_main_#t~ite91, ULTIMATE.start_main_#t~ite90, ULTIMATE.start_main_~#t1596~0.offset, ULTIMATE.start_main_#t~nondet64, ULTIMATE.start_main_~#t1595~0.offset, ULTIMATE.start_main_#t~nondet63, ULTIMATE.start_main_#t~ite79, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_#t~ite78, ULTIMATE.start_main_~#t1595~0.base, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~nondet72.offset, ULTIMATE.start_main_#t~ite76, ULTIMATE.start_main_#t~nondet71.base, ULTIMATE.start_main_#t~ite85, ULTIMATE.start_main_#t~ite84, ULTIMATE.start_main_#t~ite83, ULTIMATE.start_main_#t~ite82, ULTIMATE.start_main_#t~nondet71.offset, ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#t~ite80, ULTIMATE.start_main_~#t1596~0.base, ULTIMATE.start_main_#t~nondet72.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [811] L789-->L789-1: Formula: (and (= |v_#length_1| (store |v_#length_2| |v_ULTIMATE.start_main_~#t1595~0.base_4| 4)) (= |v_ULTIMATE.start_main_~#t1595~0.offset_4| 0) (= 0 (select |v_#valid_8| |v_ULTIMATE.start_main_~#t1595~0.base_4|)) (not (= |v_ULTIMATE.start_main_~#t1595~0.base_4| 0)) (= |v_#valid_7| (store |v_#valid_8| |v_ULTIMATE.start_main_~#t1595~0.base_4| 1))) InVars {#length=|v_#length_2|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~#t1595~0.offset=|v_ULTIMATE.start_main_~#t1595~0.offset_4|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1595~0.base=|v_ULTIMATE.start_main_~#t1595~0.base_4|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1595~0.offset, #valid, #length, ULTIMATE.start_main_~#t1595~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [939] L789-1-->L790: Formula: (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1595~0.base_5| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1595~0.base_5|) |v_ULTIMATE.start_main_~#t1595~0.offset_5| 0)) |v_#memory_int_1|) InVars {#memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t1595~0.offset=|v_ULTIMATE.start_main_~#t1595~0.offset_5|, ULTIMATE.start_main_~#t1595~0.base=|v_ULTIMATE.start_main_~#t1595~0.base_5|} OutVars{#memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t1595~0.offset=|v_ULTIMATE.start_main_~#t1595~0.offset_5|, ULTIMATE.start_main_~#t1595~0.base=|v_ULTIMATE.start_main_~#t1595~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 [1125] L790-->P0ENTRY: Formula: (and (= 0 |v_Thread0_P0_#in~arg.offset_3|) (= 0 v_Thread0_P0_thidvar0_2) (= 0 |v_Thread0_P0_#in~arg.base_3|)) InVars {} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_3|, Thread0_P0_thidvar0=v_Thread0_P0_thidvar0_2, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P0_#in~arg.base, Thread0_P0_thidvar0, Thread0_P0_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [950] P0ENTRY-->L4: Formula: (and (= v_Thread0_P0_~arg.base_1 |v_Thread0_P0_#in~arg.base_1|) (= v_Thread0_P0_~arg.offset_1 |v_Thread0_P0_#in~arg.offset_1|) (= v_~y$w_buff0~0_1 2) (= v_~y$w_buff1_used~0_1 v_~y$w_buff0_used~0_2) (= v_Thread0_P0___VERIFIER_assert_~expression_1 |v_Thread0_P0___VERIFIER_assert_#in~expression_1|) (= v_~y$w_buff1~0_1 v_~y$w_buff0~0_2) (= |v_Thread0_P0___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= (mod v_~y$w_buff1_used~0_1 256) 0)) (not (= (mod v_~y$w_buff0_used~0_1 256) 0)))) 1 0)) (= v_~y$w_buff0_used~0_1 1)) InVars {Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} OutVars{Thread0_P0___VERIFIER_assert_~expression=v_Thread0_P0___VERIFIER_assert_~expression_1, Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_~arg.offset=v_Thread0_P0_~arg.offset_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_1, ~y$w_buff1~0=v_~y$w_buff1~0_1, ~y$w_buff0~0=v_~y$w_buff0~0_1, Thread0_P0_~arg.base=v_Thread0_P0_~arg.base_1, Thread0_P0___VERIFIER_assert_#in~expression=|v_Thread0_P0___VERIFIER_assert_#in~expression_1|, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_1} AuxVars[] AssignedVars[Thread0_P0___VERIFIER_assert_~expression, Thread0_P0_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, Thread0_P0_~arg.base, Thread0_P0___VERIFIER_assert_#in~expression, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [952] L4-->L4-3: Formula: (not (= 0 v_Thread0_P0___VERIFIER_assert_~expression_3)) InVars {Thread0_P0___VERIFIER_assert_~expression=v_Thread0_P0___VERIFIER_assert_~expression_3} OutVars{Thread0_P0___VERIFIER_assert_~expression=v_Thread0_P0___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [905] L790-1-->L791: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet63=|v_ULTIMATE.start_main_#t~nondet63_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet63] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [692] L791-->L791-1: Formula: (and (= 0 (select |v_#valid_10| |v_ULTIMATE.start_main_~#t1596~0.base_4|)) (= |v_ULTIMATE.start_main_~#t1596~0.offset_4| 0) (not (= |v_ULTIMATE.start_main_~#t1596~0.base_4| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t1596~0.base_4| 4)) (= |v_#valid_9| (store |v_#valid_10| |v_ULTIMATE.start_main_~#t1596~0.base_4| 1))) InVars {#length=|v_#length_4|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_3|, ULTIMATE.start_main_~#t1596~0.base=|v_ULTIMATE.start_main_~#t1596~0.base_4|, ULTIMATE.start_main_~#t1596~0.offset=|v_ULTIMATE.start_main_~#t1596~0.offset_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1596~0.base, #valid, #length, ULTIMATE.start_main_~#t1596~0.offset] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [695] L791-1-->L792: Formula: (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1596~0.base_5| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1596~0.base_5|) |v_ULTIMATE.start_main_~#t1596~0.offset_5| 1))) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t1596~0.base=|v_ULTIMATE.start_main_~#t1596~0.base_5|, ULTIMATE.start_main_~#t1596~0.offset=|v_ULTIMATE.start_main_~#t1596~0.offset_5|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t1596~0.base=|v_ULTIMATE.start_main_~#t1596~0.base_5|, ULTIMATE.start_main_~#t1596~0.offset=|v_ULTIMATE.start_main_~#t1596~0.offset_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 [1126] L792-->P1ENTRY: Formula: (and (= 0 |v_Thread1_P1_#in~arg.base_3|) (= 0 |v_Thread1_P1_#in~arg.offset_3|) (= 1 v_Thread1_P1_thidvar0_2)) InVars {} OutVars{Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_3|, Thread1_P1_thidvar0=v_Thread1_P1_thidvar0_2, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread1_P1_#in~arg.base, Thread1_P1_thidvar0, Thread1_P1_#in~arg.offset] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [955] L4-3-->L715: Formula: (and (= v_~y$r_buff0_thd1~0_1 1) (= v_~y$r_buff1_thd2~0_1 v_~y$r_buff0_thd2~0_1) (= v_~y$r_buff1_thd1~0_1 v_~y$r_buff0_thd1~0_2) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1) (= v_~x~0_1 1)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_1, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_1, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_1, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_1, ~x~0=v_~x~0_1, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff0_thd1~0, ~x~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [977] P1ENTRY-->L739: Formula: (and (= v_Thread1_P1_~arg.offset_1 |v_Thread1_P1_#in~arg.offset_1|) (= v_~y~0_3 1) (= v_Thread1_P1_~arg.base_1 |v_Thread1_P1_#in~arg.base_1|) (= v_~y$mem_tmp~0_1 v_~y~0_3) (= v_~x~0_2 2) (= v_~weak$$choice0~0_1 (ite (= 0 (+ |v_Thread1_P1_#t~nondet10.base_1| |v_Thread1_P1_#t~nondet10.offset_1|)) 0 1)) (= v_~y$flush_delayed~0_1 v_~weak$$choice2~0_7) (= v_~weak$$choice2~0_7 (ite (= (+ |v_Thread1_P1_#t~nondet11.offset_1| |v_Thread1_P1_#t~nondet11.base_1|) 0) 0 1))) InVars {Thread1_P1_#t~nondet10.offset=|v_Thread1_P1_#t~nondet10.offset_1|, Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_#t~nondet10.base=|v_Thread1_P1_#t~nondet10.base_1|, Thread1_P1_#t~nondet11.base=|v_Thread1_P1_#t~nondet11.base_1|, Thread1_P1_#t~nondet11.offset=|v_Thread1_P1_#t~nondet11.offset_1|, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|} OutVars{Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_~arg.offset=v_Thread1_P1_~arg.offset_1, Thread1_P1_#t~nondet10.base=|v_Thread1_P1_#t~nondet10.base_2|, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|, Thread1_P1_#t~nondet10.offset=|v_Thread1_P1_#t~nondet10.offset_2|, ~weak$$choice0~0=v_~weak$$choice0~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, Thread1_P1_~arg.base=v_Thread1_P1_~arg.base_1, ~y$flush_delayed~0=v_~y$flush_delayed~0_1, Thread1_P1_#t~nondet11.base=|v_Thread1_P1_#t~nondet11.base_2|, ~y~0=v_~y~0_3, ~weak$$choice2~0=v_~weak$$choice2~0_7, Thread1_P1_#t~nondet11.offset=|v_Thread1_P1_#t~nondet11.offset_2|, ~x~0=v_~x~0_2} AuxVars[] AssignedVars[Thread1_P1_#t~nondet10.offset, ~weak$$choice0~0, ~y$mem_tmp~0, Thread1_P1_~arg.offset, Thread1_P1_#t~nondet10.base, Thread1_P1_~arg.base, ~y$flush_delayed~0, Thread1_P1_#t~nondet11.base, ~y~0, ~weak$$choice2~0, Thread1_P1_#t~nondet11.offset, ~x~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [978] L739-->L739-5: Formula: (and (= |v_Thread1_P1_#t~ite13_1| v_~y~0_4) (let ((.cse0 (= (mod v_~y$r_buff0_thd2~0_14 256) 0))) (or (= (mod v_~y$w_buff0_used~0_27 256) 0) (and (= 0 (mod v_~y$w_buff1_used~0_17 256)) .cse0) (and (= 0 (mod v_~y$r_buff1_thd2~0_8 256)) .cse0)))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_27, ~y~0=v_~y~0_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_14, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_27, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_14, Thread1_P1_#t~ite13=|v_Thread1_P1_#t~ite13_1|, ~y~0=v_~y~0_4, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} AuxVars[] AssignedVars[Thread1_P1_#t~ite13] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite13|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [980] L739-5-->L740: Formula: (= v_~y~0_5 |v_Thread1_P1_#t~ite13_2|) InVars {Thread1_P1_#t~ite13=|v_Thread1_P1_#t~ite13_2|} OutVars{Thread1_P1_#t~ite12=|v_Thread1_P1_#t~ite12_1|, Thread1_P1_#t~ite13=|v_Thread1_P1_#t~ite13_3|, ~y~0=v_~y~0_5} AuxVars[] AssignedVars[Thread1_P1_#t~ite12, Thread1_P1_#t~ite13, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [983] L740-->L740-8: Formula: (and (= |v_Thread1_P1_#t~ite16_1| v_~y$w_buff0~0_5) (not (= (mod v_~weak$$choice2~0_10 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_10, ~y$w_buff0~0=v_~y$w_buff0~0_5} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_10, Thread1_P1_#t~ite16=|v_Thread1_P1_#t~ite16_1|, ~y$w_buff0~0=v_~y$w_buff0~0_5} AuxVars[] AssignedVars[Thread1_P1_#t~ite16] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite16|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [986] L740-8-->L741: Formula: (= v_~y$w_buff0~0_9 |v_Thread1_P1_#t~ite16_2|) InVars {Thread1_P1_#t~ite16=|v_Thread1_P1_#t~ite16_2|} OutVars{Thread1_P1_#t~ite14=|v_Thread1_P1_#t~ite14_1|, Thread1_P1_#t~ite16=|v_Thread1_P1_#t~ite16_3|, Thread1_P1_#t~ite15=|v_Thread1_P1_#t~ite15_1|, ~y$w_buff0~0=v_~y$w_buff0~0_9} AuxVars[] AssignedVars[~y$w_buff0~0, Thread1_P1_#t~ite14, Thread1_P1_#t~ite16, Thread1_P1_#t~ite15] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [956] L715-->L715-5: Formula: (and (not (= (mod v_~y$w_buff0_used~0_3 256) 0)) (= |v_Thread0_P0_#t~ite4_1| v_~y$w_buff0~0_3) (not (= 0 (mod v_~y$r_buff0_thd1~0_3 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_3, ~y$w_buff0~0=v_~y$w_buff0~0_3, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_3} OutVars{Thread0_P0_#t~ite4=|v_Thread0_P0_#t~ite4_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_3, ~y$w_buff0~0=v_~y$w_buff0~0_3, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_3} AuxVars[] AssignedVars[Thread0_P0_#t~ite4] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [989] L741-->L741-8: Formula: (and (not (= (mod v_~weak$$choice2~0_12 256) 0)) (= |v_Thread1_P1_#t~ite19_1| v_~y$w_buff1~0_5)) InVars {~y$w_buff1~0=v_~y$w_buff1~0_5, ~weak$$choice2~0=v_~weak$$choice2~0_12} OutVars{Thread1_P1_#t~ite19=|v_Thread1_P1_#t~ite19_1|, ~y$w_buff1~0=v_~y$w_buff1~0_5, ~weak$$choice2~0=v_~weak$$choice2~0_12} AuxVars[] AssignedVars[Thread1_P1_#t~ite19] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite19|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [994] L741-8-->L742: Formula: (= v_~y$w_buff1~0_10 |v_Thread1_P1_#t~ite19_2|) InVars {Thread1_P1_#t~ite19=|v_Thread1_P1_#t~ite19_2|} OutVars{Thread1_P1_#t~ite19=|v_Thread1_P1_#t~ite19_3|, ~y$w_buff1~0=v_~y$w_buff1~0_10, Thread1_P1_#t~ite18=|v_Thread1_P1_#t~ite18_1|, Thread1_P1_#t~ite17=|v_Thread1_P1_#t~ite17_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite19, ~y$w_buff1~0, Thread1_P1_#t~ite18, Thread1_P1_#t~ite17] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [998] L742-->L742-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_14 256))) (= |v_Thread1_P1_#t~ite22_1| v_~y$w_buff0_used~0_48)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, ~weak$$choice2~0=v_~weak$$choice2~0_14} OutVars{Thread1_P1_#t~ite22=|v_Thread1_P1_#t~ite22_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, ~weak$$choice2~0=v_~weak$$choice2~0_14} AuxVars[] AssignedVars[Thread1_P1_#t~ite22] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite22|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1003] L742-8-->L743: Formula: (= v_~y$w_buff0_used~0_59 |v_Thread1_P1_#t~ite22_2|) InVars {Thread1_P1_#t~ite22=|v_Thread1_P1_#t~ite22_2|} OutVars{Thread1_P1_#t~ite22=|v_Thread1_P1_#t~ite22_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_59, Thread1_P1_#t~ite21=|v_Thread1_P1_#t~ite21_1|, Thread1_P1_#t~ite20=|v_Thread1_P1_#t~ite20_1|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite21, Thread1_P1_#t~ite20, Thread1_P1_#t~ite22] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1007] L743-->L743-8: Formula: (and (= |v_Thread1_P1_#t~ite25_1| v_~y$w_buff1_used~0_34) (not (= 0 (mod v_~weak$$choice2~0_16 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_16, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_34} OutVars{Thread1_P1_#t~ite25=|v_Thread1_P1_#t~ite25_1|, ~weak$$choice2~0=v_~weak$$choice2~0_16, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_34} AuxVars[] AssignedVars[Thread1_P1_#t~ite25] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1012] L743-8-->L744: Formula: (= v_~y$w_buff1_used~0_37 |v_Thread1_P1_#t~ite25_2|) InVars {Thread1_P1_#t~ite25=|v_Thread1_P1_#t~ite25_2|} OutVars{Thread1_P1_#t~ite23=|v_Thread1_P1_#t~ite23_1|, Thread1_P1_#t~ite25=|v_Thread1_P1_#t~ite25_3|, Thread1_P1_#t~ite24=|v_Thread1_P1_#t~ite24_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_37} AuxVars[] AssignedVars[Thread1_P1_#t~ite23, Thread1_P1_#t~ite25, Thread1_P1_#t~ite24, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1016] L744-->L744-8: Formula: (and (not (= (mod v_~weak$$choice2~0_18 256) 0)) (= |v_Thread1_P1_#t~ite28_1| v_~y$r_buff0_thd2~0_51)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_18, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_51} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_18, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_51, Thread1_P1_#t~ite28=|v_Thread1_P1_#t~ite28_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite28] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite28|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1021] L744-8-->L745: Formula: (= v_~y$r_buff0_thd2~0_56 |v_Thread1_P1_#t~ite28_2|) InVars {Thread1_P1_#t~ite28=|v_Thread1_P1_#t~ite28_2|} OutVars{Thread1_P1_#t~ite27=|v_Thread1_P1_#t~ite27_1|, Thread1_P1_#t~ite26=|v_Thread1_P1_#t~ite26_1|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_56, Thread1_P1_#t~ite28=|v_Thread1_P1_#t~ite28_3|} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, Thread1_P1_#t~ite27, Thread1_P1_#t~ite26, Thread1_P1_#t~ite28] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1025] L745-->L745-8: Formula: (and (= |v_Thread1_P1_#t~ite31_1| v_~y$r_buff1_thd2~0_31) (not (= 0 (mod v_~weak$$choice2~0_20 256)))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_31, ~weak$$choice2~0=v_~weak$$choice2~0_20} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_31, Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_1|, ~weak$$choice2~0=v_~weak$$choice2~0_20} AuxVars[] AssignedVars[Thread1_P1_#t~ite31] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite31|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1030] L745-8-->L747: Formula: (and (= v_~__unbuffered_p1_EAX~0_1 v_~y~0_11) (= v_~y$r_buff1_thd2~0_34 |v_Thread1_P1_#t~ite31_2|)) InVars {Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_2|, ~y~0=v_~y~0_11} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_34, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_1, Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_3|, Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_1|, ~y~0=v_~y~0_11, Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_1|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_p1_EAX~0, Thread1_P1_#t~ite31, Thread1_P1_#t~ite30, Thread1_P1_#t~ite29] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1034] L747-->L747-2: Formula: (and (not (= (mod v_~y$flush_delayed~0_5 256) 0)) (= |v_Thread1_P1_#t~ite32_1| v_~y$mem_tmp~0_3)) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_5, ~y$mem_tmp~0=v_~y$mem_tmp~0_3} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_5, ~y$mem_tmp~0=v_~y$mem_tmp~0_3, Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite32] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite32|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1039] L747-2-->L755: Formula: (and (= v_~y$flush_delayed~0_7 v_~weak$$choice2~0_22) (= v_~weak$$choice0~0_2 (ite (= (+ |v_Thread1_P1_#t~nondet33.offset_1| |v_Thread1_P1_#t~nondet33.base_1|) 0) 0 1)) (= v_~y~0_13 |v_Thread1_P1_#t~ite32_3|) (= v_~weak$$choice2~0_22 (ite (= 0 (+ |v_Thread1_P1_#t~nondet34.base_1| |v_Thread1_P1_#t~nondet34.offset_1|)) 0 1)) (= v_~y$mem_tmp~0_4 v_~y~0_13)) InVars {Thread1_P1_#t~nondet33.offset=|v_Thread1_P1_#t~nondet33.offset_1|, Thread1_P1_#t~nondet34.offset=|v_Thread1_P1_#t~nondet34.offset_1|, Thread1_P1_#t~nondet34.base=|v_Thread1_P1_#t~nondet34.base_1|, Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_3|, Thread1_P1_#t~nondet33.base=|v_Thread1_P1_#t~nondet33.base_1|} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_4, Thread1_P1_#t~nondet34.offset=|v_Thread1_P1_#t~nondet34.offset_2|, Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_4|, ~y$flush_delayed~0=v_~y$flush_delayed~0_7, Thread1_P1_#t~nondet33.offset=|v_Thread1_P1_#t~nondet33.offset_2|, Thread1_P1_#t~nondet34.base=|v_Thread1_P1_#t~nondet34.base_2|, ~y~0=v_~y~0_13, ~weak$$choice2~0=v_~weak$$choice2~0_22, Thread1_P1_#t~nondet33.base=|v_Thread1_P1_#t~nondet33.base_2|} AuxVars[] AssignedVars[~weak$$choice0~0, ~y$mem_tmp~0, Thread1_P1_#t~nondet34.offset, Thread1_P1_#t~ite32, ~y$flush_delayed~0, Thread1_P1_#t~nondet33.offset, Thread1_P1_#t~nondet34.base, ~y~0, ~weak$$choice2~0, Thread1_P1_#t~nondet33.base] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1041] L755-->L755-5: Formula: (and (= |v_Thread1_P1_#t~ite36_1| v_~y~0_14) (let ((.cse0 (= (mod v_~y$r_buff0_thd2~0_61 256) 0))) (or (and (= (mod v_~y$w_buff1_used~0_42 256) 0) .cse0) (= (mod v_~y$w_buff0_used~0_73 256) 0) (and .cse0 (= (mod v_~y$r_buff1_thd2~0_35 256) 0))))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_35, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_73, ~y~0=v_~y~0_14, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_61, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_42} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_35, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_73, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_61, Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_1|, ~y~0=v_~y~0_14, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_42} AuxVars[] AssignedVars[Thread1_P1_#t~ite36] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite36|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1043] L755-5-->L756: Formula: (= v_~y~0_15 |v_Thread1_P1_#t~ite36_2|) InVars {Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_2|} OutVars{Thread1_P1_#t~ite35=|v_Thread1_P1_#t~ite35_1|, Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_3|, ~y~0=v_~y~0_15} AuxVars[] AssignedVars[Thread1_P1_#t~ite35, Thread1_P1_#t~ite36, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1046] L756-->L756-8: Formula: (and (not (= (mod v_~weak$$choice2~0_23 256) 0)) (= |v_Thread1_P1_#t~ite39_1| v_~y$w_buff0~0_12)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_23, ~y$w_buff0~0=v_~y$w_buff0~0_12} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_23, Thread1_P1_#t~ite39=|v_Thread1_P1_#t~ite39_1|, ~y$w_buff0~0=v_~y$w_buff0~0_12} AuxVars[] AssignedVars[Thread1_P1_#t~ite39] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite39|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1049] L756-8-->L757: Formula: (= v_~y$w_buff0~0_16 |v_Thread1_P1_#t~ite39_2|) InVars {Thread1_P1_#t~ite39=|v_Thread1_P1_#t~ite39_2|} OutVars{Thread1_P1_#t~ite39=|v_Thread1_P1_#t~ite39_3|, ~y$w_buff0~0=v_~y$w_buff0~0_16, Thread1_P1_#t~ite37=|v_Thread1_P1_#t~ite37_1|, Thread1_P1_#t~ite38=|v_Thread1_P1_#t~ite38_1|} AuxVars[] AssignedVars[~y$w_buff0~0, Thread1_P1_#t~ite39, Thread1_P1_#t~ite37, Thread1_P1_#t~ite38] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1052] L757-->L757-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_25 256))) (= |v_Thread1_P1_#t~ite42_1| v_~y$w_buff1~0_12)) InVars {~y$w_buff1~0=v_~y$w_buff1~0_12, ~weak$$choice2~0=v_~weak$$choice2~0_25} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_12, Thread1_P1_#t~ite42=|v_Thread1_P1_#t~ite42_1|, ~weak$$choice2~0=v_~weak$$choice2~0_25} AuxVars[] AssignedVars[Thread1_P1_#t~ite42] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite42|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1057] L757-8-->L758: Formula: (= v_~y$w_buff1~0_3 |v_Thread1_P1_#t~ite42_2|) InVars {Thread1_P1_#t~ite42=|v_Thread1_P1_#t~ite42_2|} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_3, Thread1_P1_#t~ite42=|v_Thread1_P1_#t~ite42_3|, Thread1_P1_#t~ite40=|v_Thread1_P1_#t~ite40_1|, Thread1_P1_#t~ite41=|v_Thread1_P1_#t~ite41_1|} AuxVars[] AssignedVars[~y$w_buff1~0, Thread1_P1_#t~ite42, Thread1_P1_#t~ite40, Thread1_P1_#t~ite41] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1061] L758-->L758-8: Formula: (and (= |v_Thread1_P1_#t~ite45_1| v_~y$w_buff0_used~0_14) (not (= (mod v_~weak$$choice2~0_1 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_14, ~weak$$choice2~0=v_~weak$$choice2~0_1} OutVars{Thread1_P1_#t~ite45=|v_Thread1_P1_#t~ite45_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_14, ~weak$$choice2~0=v_~weak$$choice2~0_1} AuxVars[] AssignedVars[Thread1_P1_#t~ite45] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite45|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1066] L758-8-->L759: Formula: (= v_~y$w_buff0_used~0_19 |v_Thread1_P1_#t~ite45_2|) InVars {Thread1_P1_#t~ite45=|v_Thread1_P1_#t~ite45_2|} OutVars{Thread1_P1_#t~ite44=|v_Thread1_P1_#t~ite44_1|, Thread1_P1_#t~ite45=|v_Thread1_P1_#t~ite45_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_19, Thread1_P1_#t~ite43=|v_Thread1_P1_#t~ite43_1|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite43, Thread1_P1_#t~ite44, Thread1_P1_#t~ite45] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1070] L759-->L759-8: Formula: (and (= |v_Thread1_P1_#t~ite48_1| v_~y$w_buff1_used~0_11) (not (= 0 (mod v_~weak$$choice2~0_3 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_11} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_3, Thread1_P1_#t~ite48=|v_Thread1_P1_#t~ite48_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_11} AuxVars[] AssignedVars[Thread1_P1_#t~ite48] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite48|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1075] L759-8-->L760: Formula: (= v_~y$w_buff1_used~0_14 |v_Thread1_P1_#t~ite48_2|) InVars {Thread1_P1_#t~ite48=|v_Thread1_P1_#t~ite48_2|} OutVars{Thread1_P1_#t~ite46=|v_Thread1_P1_#t~ite46_1|, Thread1_P1_#t~ite47=|v_Thread1_P1_#t~ite47_1|, Thread1_P1_#t~ite48=|v_Thread1_P1_#t~ite48_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_14} AuxVars[] AssignedVars[Thread1_P1_#t~ite46, Thread1_P1_#t~ite47, Thread1_P1_#t~ite48, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1079] L760-->L760-8: Formula: (and (= |v_Thread1_P1_#t~ite51_1| v_~y$r_buff0_thd2~0_10) (not (= 0 (mod v_~weak$$choice2~0_5 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_5, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_10} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_5, Thread1_P1_#t~ite51=|v_Thread1_P1_#t~ite51_1|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_10} AuxVars[] AssignedVars[Thread1_P1_#t~ite51] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite51|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1084] L760-8-->L761: Formula: (= v_~y$r_buff0_thd2~0_19 |v_Thread1_P1_#t~ite51_2|) InVars {Thread1_P1_#t~ite51=|v_Thread1_P1_#t~ite51_2|} OutVars{Thread1_P1_#t~ite50=|v_Thread1_P1_#t~ite50_1|, Thread1_P1_#t~ite51=|v_Thread1_P1_#t~ite51_3|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_19, Thread1_P1_#t~ite49=|v_Thread1_P1_#t~ite49_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite50, Thread1_P1_#t~ite51, ~y$r_buff0_thd2~0, Thread1_P1_#t~ite49] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1088] L761-->L761-8: Formula: (and (not (= (mod v_~weak$$choice2~0_8 256) 0)) (= |v_Thread1_P1_#t~ite54_1| v_~y$r_buff1_thd2~0_10)) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_10, ~weak$$choice2~0=v_~weak$$choice2~0_8} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_10, Thread1_P1_#t~ite54=|v_Thread1_P1_#t~ite54_1|, ~weak$$choice2~0=v_~weak$$choice2~0_8} AuxVars[] AssignedVars[Thread1_P1_#t~ite54] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite54|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1093] L761-8-->L763: Formula: (and (= v_~y$r_buff1_thd2~0_15 |v_Thread1_P1_#t~ite54_2|) (= v_~__unbuffered_p1_EBX~0_1 v_~y~0_6)) InVars {Thread1_P1_#t~ite54=|v_Thread1_P1_#t~ite54_2|, ~y~0=v_~y~0_6} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_15, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_1, Thread1_P1_#t~ite54=|v_Thread1_P1_#t~ite54_3|, Thread1_P1_#t~ite53=|v_Thread1_P1_#t~ite53_1|, Thread1_P1_#t~ite52=|v_Thread1_P1_#t~ite52_1|, ~y~0=v_~y~0_6} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_p1_EBX~0, Thread1_P1_#t~ite54, Thread1_P1_#t~ite53, Thread1_P1_#t~ite52] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1097] L763-->L763-2: Formula: (and (= |v_Thread1_P1_#t~ite55_1| v_~y$mem_tmp~0_2) (not (= 0 (mod v_~y$flush_delayed~0_2 256)))) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2, Thread1_P1_#t~ite55=|v_Thread1_P1_#t~ite55_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite55] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite55|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1102] L763-2-->L767: Formula: (and (= v_~y$flush_delayed~0_4 0) (= v_~y~0_8 |v_Thread1_P1_#t~ite55_3|)) InVars {Thread1_P1_#t~ite55=|v_Thread1_P1_#t~ite55_3|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_4, Thread1_P1_#t~ite55=|v_Thread1_P1_#t~ite55_4|, ~y~0=v_~y~0_8} AuxVars[] AssignedVars[~y$flush_delayed~0, Thread1_P1_#t~ite55, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1105] L767-->L767-2: Formula: (or (= 0 (mod v_~y$w_buff0_used~0_42 256)) (= 0 (mod v_~y$r_buff0_thd2~0_30 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_42, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_30} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_42, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_30} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1108] L767-2-->L767-4: Formula: (and (= |v_Thread1_P1_#t~ite56_3| v_~y~0_9) (or (= 0 (mod v_~y$w_buff1_used~0_26 256)) (= 0 (mod v_~y$r_buff1_thd2~0_19 256)))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_19, ~y~0=v_~y~0_9, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_26} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_19, Thread1_P1_#t~ite56=|v_Thread1_P1_#t~ite56_3|, ~y~0=v_~y~0_9, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_26} AuxVars[] AssignedVars[Thread1_P1_#t~ite56] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite56|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1111] L767-4-->L767-5: Formula: (= |v_Thread1_P1_#t~ite57_4| |v_Thread1_P1_#t~ite56_4|) InVars {Thread1_P1_#t~ite56=|v_Thread1_P1_#t~ite56_4|} OutVars{Thread1_P1_#t~ite57=|v_Thread1_P1_#t~ite57_4|, Thread1_P1_#t~ite56=|v_Thread1_P1_#t~ite56_4|} AuxVars[] AssignedVars[Thread1_P1_#t~ite57] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite56|=1, |Thread1_P1_#t~ite57|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1106] L767-5-->L768: Formula: (= v_~y~0_10 |v_Thread1_P1_#t~ite57_2|) InVars {Thread1_P1_#t~ite57=|v_Thread1_P1_#t~ite57_2|} OutVars{Thread1_P1_#t~ite57=|v_Thread1_P1_#t~ite57_3|, Thread1_P1_#t~ite56=|v_Thread1_P1_#t~ite56_1|, ~y~0=v_~y~0_10} AuxVars[] AssignedVars[Thread1_P1_#t~ite57, Thread1_P1_#t~ite56, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1110] L768-->L768-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_47 256)) (= (mod v_~y$r_buff0_thd2~0_35 256) 0)) (= |v_Thread1_P1_#t~ite58_2| v_~y$w_buff0_used~0_47)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_47, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_35} OutVars{Thread1_P1_#t~ite58=|v_Thread1_P1_#t~ite58_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_47, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_35} AuxVars[] AssignedVars[Thread1_P1_#t~ite58] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite58|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1112] L768-2-->L769: Formula: (= v_~y$w_buff0_used~0_49 |v_Thread1_P1_#t~ite58_3|) InVars {Thread1_P1_#t~ite58=|v_Thread1_P1_#t~ite58_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_49, Thread1_P1_#t~ite58=|v_Thread1_P1_#t~ite58_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite58] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1114] L769-->L769-2: Formula: (and (= |v_Thread1_P1_#t~ite59_2| v_~y$w_buff1_used~0_29) (or (= 0 (mod v_~y$w_buff1_used~0_29 256)) (= 0 (mod v_~y$r_buff1_thd2~0_22 256))) (or (= (mod v_~y$r_buff0_thd2~0_38 256) 0) (= (mod v_~y$w_buff0_used~0_52 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_22, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_52, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_38, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_29} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_22, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_52, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_38, Thread1_P1_#t~ite59=|v_Thread1_P1_#t~ite59_2|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_29} AuxVars[] AssignedVars[Thread1_P1_#t~ite59] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite59|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1115] L769-2-->L770: Formula: (= v_~y$w_buff1_used~0_31 |v_Thread1_P1_#t~ite59_3|) InVars {Thread1_P1_#t~ite59=|v_Thread1_P1_#t~ite59_3|} OutVars{Thread1_P1_#t~ite59=|v_Thread1_P1_#t~ite59_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_31} AuxVars[] AssignedVars[Thread1_P1_#t~ite59, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1117] L770-->L770-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_43 256)) (= (mod v_~y$w_buff0_used~0_57 256) 0)) (= |v_Thread1_P1_#t~ite60_2| v_~y$r_buff0_thd2~0_43)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_57, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_43} OutVars{Thread1_P1_#t~ite60=|v_Thread1_P1_#t~ite60_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_57, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_43} AuxVars[] AssignedVars[Thread1_P1_#t~ite60] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite60|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1118] L770-2-->L771: Formula: (= v_~y$r_buff0_thd2~0_44 |v_Thread1_P1_#t~ite60_3|) InVars {Thread1_P1_#t~ite60=|v_Thread1_P1_#t~ite60_3|} OutVars{Thread1_P1_#t~ite60=|v_Thread1_P1_#t~ite60_4|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_44} AuxVars[] AssignedVars[Thread1_P1_#t~ite60, ~y$r_buff0_thd2~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1120] L771-->L771-2: Formula: (and (or (= (mod v_~y$r_buff1_thd2~0_25 256) 0) (= (mod v_~y$w_buff1_used~0_33 256) 0)) (or (= 0 (mod v_~y$w_buff0_used~0_60 256)) (= 0 (mod v_~y$r_buff0_thd2~0_46 256))) (= |v_Thread1_P1_#t~ite61_2| v_~y$r_buff1_thd2~0_25)) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_25, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_60, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_46, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_25, Thread1_P1_#t~ite61=|v_Thread1_P1_#t~ite61_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_60, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_46, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} AuxVars[] AssignedVars[Thread1_P1_#t~ite61] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite61|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [1121] L771-2-->L776: Formula: (and (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1)) (= v_~y$r_buff1_thd2~0_26 |v_Thread1_P1_#t~ite61_3|)) InVars {Thread1_P1_#t~ite61=|v_Thread1_P1_#t~ite61_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_26, Thread1_P1_#t~ite61=|v_Thread1_P1_#t~ite61_4|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, Thread1_P1_#t~ite61, ~__unbuffered_cnt~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=2, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [958] L715-5-->L716: Formula: (= v_~y~0_2 |v_Thread0_P0_#t~ite4_2|) InVars {Thread0_P0_#t~ite4=|v_Thread0_P0_#t~ite4_2|} OutVars{Thread0_P0_#t~ite4=|v_Thread0_P0_#t~ite4_3|, Thread0_P0_#t~ite3=|v_Thread0_P0_#t~ite3_1|, ~y~0=v_~y~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite4, Thread0_P0_#t~ite3, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 [961] L716-->L716-2: Formula: (and (= |v_Thread0_P0_#t~ite5_1| 0) (not (= (mod v_~y$w_buff0_used~0_5 256) 0)) (not (= (mod v_~y$r_buff0_thd1~0_5 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_5, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_5} OutVars{Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_5, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_5} AuxVars[] AssignedVars[Thread0_P0_#t~ite5] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 [964] L716-2-->L717: Formula: (= v_~y$w_buff0_used~0_7 |v_Thread0_P0_#t~ite5_3|) InVars {Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_7, Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread0_P0_#t~ite5] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 [966] L717-->L717-2: Formula: (and (or (= (mod v_~y$w_buff1_used~0_5 256) 0) (= (mod v_~y$r_buff1_thd1~0_5 256) 0)) (or (= (mod v_~y$w_buff0_used~0_9 256) 0) (= (mod v_~y$r_buff0_thd1~0_8 256) 0)) (= |v_Thread0_P0_#t~ite6_2| v_~y$w_buff1_used~0_5)) InVars {~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_9, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_9, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_8, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_2|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} AuxVars[] AssignedVars[Thread0_P0_#t~ite6] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 [967] L717-2-->L718: Formula: (= v_~y$w_buff1_used~0_6 |v_Thread0_P0_#t~ite6_3|) InVars {Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_3|} OutVars{Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_6} AuxVars[] AssignedVars[Thread0_P0_#t~ite6, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 [969] L718-->L718-2: Formula: (and (= |v_Thread0_P0_#t~ite7_2| v_~y$r_buff0_thd1~0_10) (or (= 0 (mod v_~y$r_buff0_thd1~0_10 256)) (= 0 (mod v_~y$w_buff0_used~0_11 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_10} OutVars{Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_10} AuxVars[] AssignedVars[Thread0_P0_#t~ite7] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite7|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 [970] L718-2-->L719: Formula: (= v_~y$r_buff0_thd1~0_11 |v_Thread0_P0_#t~ite7_3|) InVars {Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_3|} OutVars{Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_4|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_11} AuxVars[] AssignedVars[~y$r_buff0_thd1~0, Thread0_P0_#t~ite7] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 [972] L719-->L719-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd1~0_7 256)) (= 0 (mod v_~y$w_buff1_used~0_8 256))) (= |v_Thread0_P0_#t~ite8_2| v_~y$r_buff1_thd1~0_7) (or (= 0 (mod v_~y$w_buff0_used~0_13 256)) (= (mod v_~y$r_buff0_thd1~0_13 256) 0))) InVars {~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_13, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_8} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_7, Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_13, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_8} AuxVars[] AssignedVars[Thread0_P0_#t~ite8] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite8|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 [973] L719-2-->L724: Formula: (and (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~y$r_buff1_thd1~0_8 |v_Thread0_P0_#t~ite8_3|)) InVars {Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_4|} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, ~__unbuffered_cnt~0, Thread0_P0_#t~ite8] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [781] L792-1-->L796: Formula: (= v_~main$tmp_guard0~0_2 (ite (= (ite (= v_~__unbuffered_cnt~0_6 2) 1 0) 0) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6} OutVars{ULTIMATE.start_main_#t~nondet64=|v_ULTIMATE.start_main_#t~nondet64_2|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet64, ~main$tmp_guard0~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [720] L796-->L798: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_3 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [749] L798-->L798-2: Formula: (or (= (mod v_~y$r_buff0_thd0~0_26 256) 0) (= 0 (mod v_~y$w_buff0_used~0_109 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_109, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_26} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_109, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_26} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [755] L798-2-->L798-4: Formula: (and (= |v_ULTIMATE.start_main_#t~ite65_3| v_~y~0_20) (or (= 0 (mod v_~y$r_buff1_thd0~0_16 256)) (= 0 (mod v_~y$w_buff1_used~0_62 256)))) InVars {~y~0=v_~y~0_20, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_16, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_62} OutVars{~y~0=v_~y~0_20, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_16, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_62} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite65] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite65|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [761] L798-4-->L798-5: Formula: (= |v_ULTIMATE.start_main_#t~ite66_3| |v_ULTIMATE.start_main_#t~ite65_4|) InVars {ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_4|} OutVars{ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_3|, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite66] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite65|=2, |ULTIMATE.start_main_#t~ite66|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [741] L798-5-->L799: Formula: (= v_~y~0_21 |v_ULTIMATE.start_main_#t~ite66_5|) InVars {ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_5|} OutVars{ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_4|, ~y~0=v_~y~0_21, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite66, ~y~0, ULTIMATE.start_main_#t~ite65] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [870] L799-->L799-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite67_3| v_~y$w_buff0_used~0_111) (or (= (mod v_~y$r_buff0_thd0~0_28 256) 0) (= (mod v_~y$w_buff0_used~0_111 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_111, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_28} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_111, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_3|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_28} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite67] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite67|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [850] L799-2-->L800: Formula: (= v_~y$w_buff0_used~0_112 |v_ULTIMATE.start_main_#t~ite67_5|) InVars {ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_5|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_112, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite67] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [810] L800-->L800-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite68_3| v_~y$w_buff1_used~0_64) (or (= (mod v_~y$r_buff0_thd0~0_30 256) 0) (= (mod v_~y$w_buff0_used~0_114 256) 0)) (or (= 0 (mod v_~y$w_buff1_used~0_64 256)) (= 0 (mod v_~y$r_buff1_thd0~0_18 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_114, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_18, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_30, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_64} OutVars{ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_114, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_18, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_30, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_64} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite68] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite68|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [942] L800-2-->L801: Formula: (= v_~y$w_buff1_used~0_65 |v_ULTIMATE.start_main_#t~ite68_5|) InVars {ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_5|} OutVars{ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_65} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite68, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [902] L801-->L801-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd0~0_32 256)) (= 0 (mod v_~y$w_buff0_used~0_116 256))) (= |v_ULTIMATE.start_main_#t~ite69_3| v_~y$r_buff0_thd0~0_32)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_116, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_32} OutVars{ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_116, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_32} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite69] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite69|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [911] L801-2-->L802: Formula: (= v_~y$r_buff0_thd0~0_33 |v_ULTIMATE.start_main_#t~ite69_5|) InVars {ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_5|} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_33, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_4|} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite69] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [691] L802-->L802-2: Formula: (and (or (= (mod v_~y$w_buff1_used~0_67 256) 0) (= 0 (mod v_~y$r_buff1_thd0~0_20 256))) (or (= (mod v_~y$r_buff0_thd0~0_35 256) 0) (= 0 (mod v_~y$w_buff0_used~0_118 256))) (= |v_ULTIMATE.start_main_#t~ite70_3| v_~y$r_buff1_thd0~0_20)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_118, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_20, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_35, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_67} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_118, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_3|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_20, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_35, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_67} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite70] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite70|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [698] L802-2-->L809: Formula: (and (= v_~weak$$choice2~0_38 (ite (= (+ |v_ULTIMATE.start_main_#t~nondet72.base_3| |v_ULTIMATE.start_main_#t~nondet72.offset_3|) 0) 0 1)) (= v_~y$mem_tmp~0_7 v_~y~0_22) (= v_~y$r_buff1_thd0~0_21 |v_ULTIMATE.start_main_#t~ite70_5|) (= v_~y$flush_delayed~0_13 v_~weak$$choice2~0_38) (= v_~weak$$choice0~0_4 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet71.base_3| |v_ULTIMATE.start_main_#t~nondet71.offset_3|)) 0 1))) InVars {ULTIMATE.start_main_#t~nondet71.base=|v_ULTIMATE.start_main_#t~nondet71.base_3|, ULTIMATE.start_main_#t~nondet71.offset=|v_ULTIMATE.start_main_#t~nondet71.offset_3|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_5|, ~y~0=v_~y~0_22, ULTIMATE.start_main_#t~nondet72.base=|v_ULTIMATE.start_main_#t~nondet72.base_3|, ULTIMATE.start_main_#t~nondet72.offset=|v_ULTIMATE.start_main_#t~nondet72.offset_3|} OutVars{ULTIMATE.start_main_#t~nondet71.base=|v_ULTIMATE.start_main_#t~nondet71.base_2|, ~weak$$choice0~0=v_~weak$$choice0~0_4, ~y$mem_tmp~0=v_~y$mem_tmp~0_7, ULTIMATE.start_main_#t~nondet71.offset=|v_ULTIMATE.start_main_#t~nondet71.offset_2|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_4|, ~y$flush_delayed~0=v_~y$flush_delayed~0_13, ~y~0=v_~y~0_22, ~weak$$choice2~0=v_~weak$$choice2~0_38, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_21, ULTIMATE.start_main_#t~nondet72.base=|v_ULTIMATE.start_main_#t~nondet72.base_2|, ULTIMATE.start_main_#t~nondet72.offset=|v_ULTIMATE.start_main_#t~nondet72.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet71.base, ~weak$$choice0~0, ~y$mem_tmp~0, ULTIMATE.start_main_#t~nondet71.offset, ULTIMATE.start_main_#t~ite70, ~y$flush_delayed~0, ~weak$$choice2~0, ~y$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet72.base, ULTIMATE.start_main_#t~nondet72.offset] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [746] L809-->L809-5: Formula: (and (let ((.cse0 (= (mod v_~y$r_buff0_thd0~0_36 256) 0))) (or (and .cse0 (= 0 (mod v_~y$w_buff1_used~0_68 256))) (and .cse0 (= 0 (mod v_~y$r_buff1_thd0~0_22 256))) (= (mod v_~y$w_buff0_used~0_119 256) 0))) (= |v_ULTIMATE.start_main_#t~ite74_2| v_~y~0_23)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_119, ~y~0=v_~y~0_23, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_22, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_36, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_68} OutVars{ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_119, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_36, ~y~0=v_~y~0_23, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_22, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_68} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite74] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite74|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [740] L809-5-->L810: Formula: (= v_~y~0_24 |v_ULTIMATE.start_main_#t~ite74_5|) InVars {ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_5|} OutVars{ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_5|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_4|, ~y~0=v_~y~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite73, ULTIMATE.start_main_#t~ite74, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [867] L810-->L810-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite77_2| v_~y$w_buff0~0_20) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_39, ~y$w_buff0~0=v_~y$w_buff0~0_20} OutVars{ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_2|, ~weak$$choice2~0=v_~weak$$choice2~0_39, ~y$w_buff0~0=v_~y$w_buff0~0_20} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite77] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite77|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [835] L810-8-->L811: Formula: (= v_~y$w_buff0~0_24 |v_ULTIMATE.start_main_#t~ite77_5|) InVars {ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_5|} OutVars{ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_4|, ~y$w_buff0~0=v_~y$w_buff0~0_24, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_5|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_5|} AuxVars[] AssignedVars[~y$w_buff0~0, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [807] L811-->L811-8: Formula: (and (not (= (mod v_~weak$$choice2~0_27 256) 0)) (= |v_ULTIMATE.start_main_#t~ite80_1| v_~y$w_buff1~0_16)) InVars {~y$w_buff1~0=v_~y$w_buff1~0_16, ~weak$$choice2~0=v_~weak$$choice2~0_27} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_16, ~weak$$choice2~0=v_~weak$$choice2~0_27, ULTIMATE.start_main_#t~ite80=|v_ULTIMATE.start_main_#t~ite80_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite80] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite80|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [933] L811-8-->L812: Formula: (= v_~y$w_buff1~0_20 |v_ULTIMATE.start_main_#t~ite80_4|) InVars {ULTIMATE.start_main_#t~ite80=|v_ULTIMATE.start_main_#t~ite80_4|} OutVars{ULTIMATE.start_main_#t~ite79=|v_ULTIMATE.start_main_#t~ite79_4|, ~y$w_buff1~0=v_~y$w_buff1~0_20, ULTIMATE.start_main_#t~ite80=|v_ULTIMATE.start_main_#t~ite80_3|, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_4|} AuxVars[] AssignedVars[~y$w_buff1~0, ULTIMATE.start_main_#t~ite80, ULTIMATE.start_main_#t~ite79, ULTIMATE.start_main_#t~ite78] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [897] L812-->L812-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite83_1| v_~y$w_buff0_used~0_89) (not (= 0 (mod v_~weak$$choice2~0_29 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_89, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_89, ~weak$$choice2~0=v_~weak$$choice2~0_29} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite83] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite83|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [879] L812-8-->L813: Formula: (= v_~y$w_buff0_used~0_94 |v_ULTIMATE.start_main_#t~ite83_4|) InVars {ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_4|} OutVars{ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_3|, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_4|, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_4|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_94} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite83, ULTIMATE.start_main_#t~ite82, ULTIMATE.start_main_#t~ite81, ~y$w_buff0_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [688] L813-->L813-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite86_1| v_~y$w_buff1_used~0_52) (not (= 0 (mod v_~weak$$choice2~0_31 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_31, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_52} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_31, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_52} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite86] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite86|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [684] L813-8-->L814: Formula: (= v_~y$w_buff1_used~0_55 |v_ULTIMATE.start_main_#t~ite86_4|) InVars {ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_4|} OutVars{ULTIMATE.start_main_#t~ite85=|v_ULTIMATE.start_main_#t~ite85_4|, ULTIMATE.start_main_#t~ite84=|v_ULTIMATE.start_main_#t~ite84_4|, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_55} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite85, ULTIMATE.start_main_#t~ite84, ULTIMATE.start_main_#t~ite86, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [778] L814-->L814-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite89_1| v_~y$r_buff0_thd0~0_14) (not (= 0 (mod v_~weak$$choice2~0_33 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_33, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_14} OutVars{ULTIMATE.start_main_#t~ite89=|v_ULTIMATE.start_main_#t~ite89_1|, ~weak$$choice2~0=v_~weak$$choice2~0_33, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_14} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite89] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite89|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [777] L814-8-->L815: Formula: (= v_~y$r_buff0_thd0~0_19 |v_ULTIMATE.start_main_#t~ite89_4|) InVars {ULTIMATE.start_main_#t~ite89=|v_ULTIMATE.start_main_#t~ite89_4|} OutVars{ULTIMATE.start_main_#t~ite89=|v_ULTIMATE.start_main_#t~ite89_3|, ULTIMATE.start_main_#t~ite88=|v_ULTIMATE.start_main_#t~ite88_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_19, ULTIMATE.start_main_#t~ite87=|v_ULTIMATE.start_main_#t~ite87_4|} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite89, ULTIMATE.start_main_#t~ite88, ULTIMATE.start_main_#t~ite87] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [738] L815-->L815-8: Formula: (and (not (= (mod v_~weak$$choice2~0_35 256) 0)) (= |v_ULTIMATE.start_main_#t~ite92_1| v_~y$r_buff1_thd0~0_10)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_35, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_10} OutVars{ULTIMATE.start_main_#t~ite92=|v_ULTIMATE.start_main_#t~ite92_1|, ~weak$$choice2~0=v_~weak$$choice2~0_35, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite92] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite92|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [873] L815-8-->L817: Formula: (and (= v_~main$tmp_guard1~0_1 (ite (= 0 (ite (not (and (= 2 v_~x~0_3) (= v_~y~0_16 2) (= 1 v_~__unbuffered_p1_EBX~0_2) (= 1 v_~__unbuffered_p1_EAX~0_2))) 1 0)) 0 1)) (= v_~y$r_buff1_thd0~0_13 |v_ULTIMATE.start_main_#t~ite92_4|)) InVars {~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ULTIMATE.start_main_#t~ite92=|v_ULTIMATE.start_main_#t~ite92_4|, ~y~0=v_~y~0_16, ~x~0=v_~x~0_3} OutVars{~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ULTIMATE.start_main_#t~ite92=|v_ULTIMATE.start_main_#t~ite92_3|, ULTIMATE.start_main_#t~ite91=|v_ULTIMATE.start_main_#t~ite91_4|, ULTIMATE.start_main_#t~ite90=|v_ULTIMATE.start_main_#t~ite90_4|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~y~0=v_~y~0_16, ~x~0=v_~x~0_3, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_13} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite92, ULTIMATE.start_main_#t~ite91, ULTIMATE.start_main_#t~ite90, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [925] L817-->L817-2: Formula: (and (not (= 0 (mod v_~y$flush_delayed~0_9 256))) (= |v_ULTIMATE.start_main_#t~ite93_1| v_~y$mem_tmp~0_5)) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_9, ~y$mem_tmp~0=v_~y$mem_tmp~0_5} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_9, ~y$mem_tmp~0=v_~y$mem_tmp~0_5, ULTIMATE.start_main_#t~ite93=|v_ULTIMATE.start_main_#t~ite93_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite93] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite93|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [931] L817-2-->L820: Formula: (and (= v_~y$flush_delayed~0_11 0) (= v_~y~0_18 |v_ULTIMATE.start_main_#t~ite93_4|)) InVars {ULTIMATE.start_main_#t~ite93=|v_ULTIMATE.start_main_#t~ite93_4|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_11, ULTIMATE.start_main_#t~ite93=|v_ULTIMATE.start_main_#t~ite93_3|, ~y~0=v_~y~0_18} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite93, ~y$flush_delayed~0, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [745] L820-->L820-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [751] L820-1-->L4: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [685] L4-->L4-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [680] L4-1-->L4-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [677] L4-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet63, main_#t~nondet64, main_#t~ite66, main_#t~ite65, main_#t~ite67, main_#t~ite68, main_#t~ite69, main_#t~ite70, main_#t~nondet71.base, main_#t~nondet71.offset, main_#t~nondet72.base, main_#t~nondet72.offset, main_#t~ite74, main_#t~ite73, main_#t~ite77, main_#t~ite76, main_#t~ite75, main_#t~ite80, main_#t~ite79, main_#t~ite78, main_#t~ite83, main_#t~ite82, main_#t~ite81, main_#t~ite86, main_#t~ite85, main_#t~ite84, main_#t~ite89, main_#t~ite88, main_#t~ite87, main_#t~ite92, main_#t~ite91, main_#t~ite90, main_#t~ite93, main_~#t1595~0.base, main_~#t1595~0.offset, main_~#t1596~0.base, main_~#t1596~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1595~0.base, main_~#t1595~0.offset := #Ultimate.alloc(4); srcloc: L789 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1595~0.base, main_~#t1595~0.offset, 4); srcloc: L789-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 2;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet63; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1596~0.base, main_~#t1596~0.offset := #Ultimate.alloc(4); srcloc: L791 VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1596~0.base, main_~#t1596~0.offset, 4); srcloc: L791-1 VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd1~0 := 1;~x~0 := 1; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~y~0 := 1;~weak$$choice0~0 := (if 0 == #t~nondet10.base + #t~nondet10.offset then 0 else 1);havoc #t~nondet10.base, #t~nondet10.offset;~weak$$choice2~0 := (if 0 == #t~nondet11.base + #t~nondet11.offset then 0 else 1);havoc #t~nondet11.base, #t~nondet11.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256);#t~ite13 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite13;havoc #t~ite12;havoc #t~ite13; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite16 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite16|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0~0 := #t~ite16;havoc #t~ite15;havoc #t~ite16;havoc #t~ite14; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256;#t~ite4 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite19 := ~y$w_buff1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite19|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1~0 := #t~ite19;havoc #t~ite17;havoc #t~ite19;havoc #t~ite18; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite22 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite22|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0_used~0 := #t~ite22;havoc #t~ite22;havoc #t~ite21;havoc #t~ite20; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite25 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1_used~0 := #t~ite25;havoc #t~ite23;havoc #t~ite25;havoc #t~ite24; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite28 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff0_thd2~0 := #t~ite28;havoc #t~ite27;havoc #t~ite28;havoc #t~ite26; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite31 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite31|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff1_thd2~0 := #t~ite31;havoc #t~ite30;havoc #t~ite29;havoc #t~ite31;~__unbuffered_p1_EAX~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite32 := ~y$mem_tmp~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite32|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite32;havoc #t~ite32;~y$flush_delayed~0 := 0;~weak$$choice0~0 := (if 0 == #t~nondet33.base + #t~nondet33.offset then 0 else 1);havoc #t~nondet33.base, #t~nondet33.offset;~weak$$choice2~0 := (if 0 == #t~nondet34.base + #t~nondet34.offset then 0 else 1);havoc #t~nondet34.base, #t~nondet34.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256);#t~ite36 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite36|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite36;havoc #t~ite36;havoc #t~ite35; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite39 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite39|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0~0 := #t~ite39;havoc #t~ite39;havoc #t~ite38;havoc #t~ite37; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite42 := ~y$w_buff1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite42|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1~0 := #t~ite42;havoc #t~ite41;havoc #t~ite42;havoc #t~ite40; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite45 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite45|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0_used~0 := #t~ite45;havoc #t~ite43;havoc #t~ite44;havoc #t~ite45; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite48 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite48|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1_used~0 := #t~ite48;havoc #t~ite46;havoc #t~ite47;havoc #t~ite48; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite51 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff0_thd2~0 := #t~ite51;havoc #t~ite50;havoc #t~ite49;havoc #t~ite51; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite54 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite54|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff1_thd2~0 := #t~ite54;havoc #t~ite54;havoc #t~ite53;havoc #t~ite52;~__unbuffered_p1_EBX~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite55 := ~y$mem_tmp~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite55|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite55;havoc #t~ite55;~y$flush_delayed~0 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite56 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite56|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 #t~ite57 := #t~ite56; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite56|=1, |P1_#t~ite57|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite57;havoc #t~ite56;havoc #t~ite57; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite58 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite58|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0_used~0 := #t~ite58;havoc #t~ite58; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite59 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite59|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1_used~0 := #t~ite59;havoc #t~ite59; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite60 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite60|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff0_thd2~0 := #t~ite60;havoc #t~ite60; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite61 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite61|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff1_thd2~0 := #t~ite61;havoc #t~ite61;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y~0 := #t~ite4;havoc #t~ite4;havoc #t~ite3; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256;#t~ite5 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 ~y$w_buff0_used~0 := #t~ite5;havoc #t~ite5; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256));#t~ite6 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 ~y$w_buff1_used~0 := #t~ite6;havoc #t~ite6; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256);#t~ite7 := ~y$r_buff0_thd1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite7|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 ~y$r_buff0_thd1~0 := #t~ite7;havoc #t~ite7; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256));#t~ite8 := ~y$r_buff1_thd1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 ~y$r_buff1_thd1~0 := #t~ite8;havoc #t~ite8;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 havoc main_#t~nondet64;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite65 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite65|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 main_#t~ite66 := main_#t~ite65; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite65|=2, |ULTIMATE.start_main_#t~ite66|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y~0 := main_#t~ite66;havoc main_#t~ite65;havoc main_#t~ite66; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite67 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite67|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff0_used~0 := main_#t~ite67;havoc main_#t~ite67; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite68 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite68|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff1_used~0 := main_#t~ite68;havoc main_#t~ite68; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite69 := ~y$r_buff0_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite69|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite69;havoc main_#t~ite69; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite70 := ~y$r_buff1_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite70|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite70;havoc main_#t~ite70;~weak$$choice0~0 := (if 0 == main_#t~nondet71.base + main_#t~nondet71.offset then 0 else 1);havoc main_#t~nondet71.base, main_#t~nondet71.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet72.base + main_#t~nondet72.offset then 0 else 1);havoc main_#t~nondet72.base, main_#t~nondet72.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256);main_#t~ite74 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite74|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y~0 := main_#t~ite74;havoc main_#t~ite74;havoc main_#t~ite73; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite77 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite77|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff0~0 := main_#t~ite77;havoc main_#t~ite77;havoc main_#t~ite76;havoc main_#t~ite75; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite80 := ~y$w_buff1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite80|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff1~0 := main_#t~ite80;havoc main_#t~ite80;havoc main_#t~ite78;havoc main_#t~ite79; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite83 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite83|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff0_used~0 := main_#t~ite83;havoc main_#t~ite81;havoc main_#t~ite83;havoc main_#t~ite82; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite86 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite86|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff1_used~0 := main_#t~ite86;havoc main_#t~ite85;havoc main_#t~ite84;havoc main_#t~ite86; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite89 := ~y$r_buff0_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite89|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite89;havoc main_#t~ite87;havoc main_#t~ite88;havoc main_#t~ite89; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite92 := ~y$r_buff1_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite92|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite92;havoc main_#t~ite91;havoc main_#t~ite90;havoc main_#t~ite92;~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~y$flush_delayed~0 % 256;main_#t~ite93 := ~y$mem_tmp~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite93|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y~0 := main_#t~ite93;havoc main_#t~ite93;~y$flush_delayed~0 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !false; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet63, main_#t~nondet64, main_#t~ite66, main_#t~ite65, main_#t~ite67, main_#t~ite68, main_#t~ite69, main_#t~ite70, main_#t~nondet71.base, main_#t~nondet71.offset, main_#t~nondet72.base, main_#t~nondet72.offset, main_#t~ite74, main_#t~ite73, main_#t~ite77, main_#t~ite76, main_#t~ite75, main_#t~ite80, main_#t~ite79, main_#t~ite78, main_#t~ite83, main_#t~ite82, main_#t~ite81, main_#t~ite86, main_#t~ite85, main_#t~ite84, main_#t~ite89, main_#t~ite88, main_#t~ite87, main_#t~ite92, main_#t~ite91, main_#t~ite90, main_#t~ite93, main_~#t1595~0.base, main_~#t1595~0.offset, main_~#t1596~0.base, main_~#t1596~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1595~0.base, main_~#t1595~0.offset := #Ultimate.alloc(4); srcloc: L789 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1595~0.base, main_~#t1595~0.offset, 4); srcloc: L789-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 2;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet63; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1596~0.base, main_~#t1596~0.offset := #Ultimate.alloc(4); srcloc: L791 VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1596~0.base, main_~#t1596~0.offset, 4); srcloc: L791-1 VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd1~0 := 1;~x~0 := 1; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~y~0 := 1;~weak$$choice0~0 := (if 0 == #t~nondet10.base + #t~nondet10.offset then 0 else 1);havoc #t~nondet10.base, #t~nondet10.offset;~weak$$choice2~0 := (if 0 == #t~nondet11.base + #t~nondet11.offset then 0 else 1);havoc #t~nondet11.base, #t~nondet11.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256);#t~ite13 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite13;havoc #t~ite12;havoc #t~ite13; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite16 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite16|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0~0 := #t~ite16;havoc #t~ite15;havoc #t~ite16;havoc #t~ite14; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256;#t~ite4 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite19 := ~y$w_buff1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite19|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1~0 := #t~ite19;havoc #t~ite17;havoc #t~ite19;havoc #t~ite18; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite22 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite22|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0_used~0 := #t~ite22;havoc #t~ite22;havoc #t~ite21;havoc #t~ite20; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite25 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1_used~0 := #t~ite25;havoc #t~ite23;havoc #t~ite25;havoc #t~ite24; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite28 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff0_thd2~0 := #t~ite28;havoc #t~ite27;havoc #t~ite28;havoc #t~ite26; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite31 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite31|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff1_thd2~0 := #t~ite31;havoc #t~ite30;havoc #t~ite29;havoc #t~ite31;~__unbuffered_p1_EAX~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite32 := ~y$mem_tmp~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite32|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite32;havoc #t~ite32;~y$flush_delayed~0 := 0;~weak$$choice0~0 := (if 0 == #t~nondet33.base + #t~nondet33.offset then 0 else 1);havoc #t~nondet33.base, #t~nondet33.offset;~weak$$choice2~0 := (if 0 == #t~nondet34.base + #t~nondet34.offset then 0 else 1);havoc #t~nondet34.base, #t~nondet34.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256);#t~ite36 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite36|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite36;havoc #t~ite36;havoc #t~ite35; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite39 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite39|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0~0 := #t~ite39;havoc #t~ite39;havoc #t~ite38;havoc #t~ite37; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite42 := ~y$w_buff1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite42|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1~0 := #t~ite42;havoc #t~ite41;havoc #t~ite42;havoc #t~ite40; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite45 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite45|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0_used~0 := #t~ite45;havoc #t~ite43;havoc #t~ite44;havoc #t~ite45; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite48 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite48|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1_used~0 := #t~ite48;havoc #t~ite46;havoc #t~ite47;havoc #t~ite48; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite51 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff0_thd2~0 := #t~ite51;havoc #t~ite50;havoc #t~ite49;havoc #t~ite51; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite54 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite54|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff1_thd2~0 := #t~ite54;havoc #t~ite54;havoc #t~ite53;havoc #t~ite52;~__unbuffered_p1_EBX~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite55 := ~y$mem_tmp~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite55|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite55;havoc #t~ite55;~y$flush_delayed~0 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite56 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite56|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 #t~ite57 := #t~ite56; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite56|=1, |P1_#t~ite57|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite57;havoc #t~ite56;havoc #t~ite57; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite58 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite58|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0_used~0 := #t~ite58;havoc #t~ite58; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite59 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite59|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1_used~0 := #t~ite59;havoc #t~ite59; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite60 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite60|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff0_thd2~0 := #t~ite60;havoc #t~ite60; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite61 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite61|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff1_thd2~0 := #t~ite61;havoc #t~ite61;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y~0 := #t~ite4;havoc #t~ite4;havoc #t~ite3; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256;#t~ite5 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 ~y$w_buff0_used~0 := #t~ite5;havoc #t~ite5; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256));#t~ite6 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 ~y$w_buff1_used~0 := #t~ite6;havoc #t~ite6; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256);#t~ite7 := ~y$r_buff0_thd1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite7|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 ~y$r_buff0_thd1~0 := #t~ite7;havoc #t~ite7; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256));#t~ite8 := ~y$r_buff1_thd1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 ~y$r_buff1_thd1~0 := #t~ite8;havoc #t~ite8;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 havoc main_#t~nondet64;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite65 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite65|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 main_#t~ite66 := main_#t~ite65; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite65|=2, |ULTIMATE.start_main_#t~ite66|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y~0 := main_#t~ite66;havoc main_#t~ite65;havoc main_#t~ite66; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite67 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite67|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff0_used~0 := main_#t~ite67;havoc main_#t~ite67; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite68 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite68|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff1_used~0 := main_#t~ite68;havoc main_#t~ite68; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite69 := ~y$r_buff0_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite69|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite69;havoc main_#t~ite69; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite70 := ~y$r_buff1_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite70|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite70;havoc main_#t~ite70;~weak$$choice0~0 := (if 0 == main_#t~nondet71.base + main_#t~nondet71.offset then 0 else 1);havoc main_#t~nondet71.base, main_#t~nondet71.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet72.base + main_#t~nondet72.offset then 0 else 1);havoc main_#t~nondet72.base, main_#t~nondet72.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256);main_#t~ite74 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite74|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y~0 := main_#t~ite74;havoc main_#t~ite74;havoc main_#t~ite73; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite77 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite77|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff0~0 := main_#t~ite77;havoc main_#t~ite77;havoc main_#t~ite76;havoc main_#t~ite75; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite80 := ~y$w_buff1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite80|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff1~0 := main_#t~ite80;havoc main_#t~ite80;havoc main_#t~ite78;havoc main_#t~ite79; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite83 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite83|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff0_used~0 := main_#t~ite83;havoc main_#t~ite81;havoc main_#t~ite83;havoc main_#t~ite82; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite86 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite86|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff1_used~0 := main_#t~ite86;havoc main_#t~ite85;havoc main_#t~ite84;havoc main_#t~ite86; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite89 := ~y$r_buff0_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite89|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite89;havoc main_#t~ite87;havoc main_#t~ite88;havoc main_#t~ite89; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite92 := ~y$r_buff1_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite92|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite92;havoc main_#t~ite91;havoc main_#t~ite90;havoc main_#t~ite92;~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~y$flush_delayed~0 % 256;main_#t~ite93 := ~y$mem_tmp~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite93|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y~0 := main_#t~ite93;havoc main_#t~ite93;~y$flush_delayed~0 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !false; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L681] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L682] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L683] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet63, main_#t~nondet64, main_#t~ite66, main_#t~ite65, main_#t~ite67, main_#t~ite68, main_#t~ite69, main_#t~ite70, main_#t~nondet71.base, main_#t~nondet71.offset, main_#t~nondet72.base, main_#t~nondet72.offset, main_#t~ite74, main_#t~ite73, main_#t~ite77, main_#t~ite76, main_#t~ite75, main_#t~ite80, main_#t~ite79, main_#t~ite78, main_#t~ite83, main_#t~ite82, main_#t~ite81, main_#t~ite86, main_#t~ite85, main_#t~ite84, main_#t~ite89, main_#t~ite88, main_#t~ite87, main_#t~ite92, main_#t~ite91, main_#t~ite90, main_#t~ite93, main_~#t1595~0.base, main_~#t1595~0.offset, main_~#t1596~0.base, main_~#t1596~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 call main_~#t1595~0.base, main_~#t1595~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 call write~int(0, main_~#t1595~0.base, main_~#t1595~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698-L725] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L701] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L702] 0 ~y$w_buff0~0 := 2; [L703] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L704] 0 ~y$w_buff0_used~0 := 1; [L705] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L705] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc main_#t~nondet63; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] -1 call main_~#t1596~0.base, main_~#t1596~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 call write~int(1, main_~#t1596~0.base, main_~#t1596~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L706] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L707] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L708] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L709] 0 ~y$r_buff0_thd1~0 := 1; [L712] 0 ~x~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L726-L777] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L729] 1 ~x~0 := 2; [L732] 1 ~y~0 := 1; [L735] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10.base + #t~nondet10.offset then 0 else 1); [L735] 1 havoc #t~nondet10.base, #t~nondet10.offset; [L736] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11.base + #t~nondet11.offset then 0 else 1); [L736] 1 havoc #t~nondet11.base, #t~nondet11.offset; [L737] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L738] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256); [L739] 1 #t~ite13 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] 1 ~y~0 := #t~ite13; [L739] 1 havoc #t~ite12; [L739] 1 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] 1 assume 0 != ~weak$$choice2~0 % 256; [L740] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] 1 ~y$w_buff0~0 := #t~ite16; [L740] 1 havoc #t~ite15; [L740] 1 havoc #t~ite16; [L740] 1 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256; [L715] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] 1 assume 0 != ~weak$$choice2~0 % 256; [L741] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite19=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] 1 ~y$w_buff1~0 := #t~ite19; [L741] 1 havoc #t~ite17; [L741] 1 havoc #t~ite19; [L741] 1 havoc #t~ite18; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] 1 assume 0 != ~weak$$choice2~0 % 256; [L742] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite22=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] 1 ~y$w_buff0_used~0 := #t~ite22; [L742] 1 havoc #t~ite22; [L742] 1 havoc #t~ite21; [L742] 1 havoc #t~ite20; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] 1 assume 0 != ~weak$$choice2~0 % 256; [L743] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] 1 ~y$w_buff1_used~0 := #t~ite25; [L743] 1 havoc #t~ite23; [L743] 1 havoc #t~ite25; [L743] 1 havoc #t~ite24; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] 1 assume 0 != ~weak$$choice2~0 % 256; [L744] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L744] 1 havoc #t~ite27; [L744] 1 havoc #t~ite28; [L744] 1 havoc #t~ite26; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] 1 assume 0 != ~weak$$choice2~0 % 256; [L745] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite31=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L745] 1 havoc #t~ite30; [L745] 1 havoc #t~ite29; [L745] 1 havoc #t~ite31; [L746] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] 1 assume 0 != ~y$flush_delayed~0 % 256; [L747] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite32=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] 1 ~y~0 := #t~ite32; [L747] 1 havoc #t~ite32; [L748] 1 ~y$flush_delayed~0 := 0; [L751] 1 ~weak$$choice0~0 := (if 0 == #t~nondet33.base + #t~nondet33.offset then 0 else 1); [L751] 1 havoc #t~nondet33.base, #t~nondet33.offset; [L752] 1 ~weak$$choice2~0 := (if 0 == #t~nondet34.base + #t~nondet34.offset then 0 else 1); [L752] 1 havoc #t~nondet34.base, #t~nondet34.offset; [L753] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L754] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256); [L755] 1 #t~ite36 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 1 ~y~0 := #t~ite36; [L755] 1 havoc #t~ite36; [L755] 1 havoc #t~ite35; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 1 assume 0 != ~weak$$choice2~0 % 256; [L756] 1 #t~ite39 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite39=2, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 1 ~y$w_buff0~0 := #t~ite39; [L756] 1 havoc #t~ite39; [L756] 1 havoc #t~ite38; [L756] 1 havoc #t~ite37; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 1 assume 0 != ~weak$$choice2~0 % 256; [L757] 1 #t~ite42 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 1 ~y$w_buff1~0 := #t~ite42; [L757] 1 havoc #t~ite41; [L757] 1 havoc #t~ite42; [L757] 1 havoc #t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 1 assume 0 != ~weak$$choice2~0 % 256; [L758] 1 #t~ite45 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 1 ~y$w_buff0_used~0 := #t~ite45; [L758] 1 havoc #t~ite43; [L758] 1 havoc #t~ite44; [L758] 1 havoc #t~ite45; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] 1 assume 0 != ~weak$$choice2~0 % 256; [L759] 1 #t~ite48 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] 1 ~y$w_buff1_used~0 := #t~ite48; [L759] 1 havoc #t~ite46; [L759] 1 havoc #t~ite47; [L759] 1 havoc #t~ite48; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 1 assume 0 != ~weak$$choice2~0 % 256; [L760] 1 #t~ite51 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite51=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 1 ~y$r_buff0_thd2~0 := #t~ite51; [L760] 1 havoc #t~ite50; [L760] 1 havoc #t~ite49; [L760] 1 havoc #t~ite51; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] 1 assume 0 != ~weak$$choice2~0 % 256; [L761] 1 #t~ite54 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite54=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] 1 ~y$r_buff1_thd2~0 := #t~ite54; [L761] 1 havoc #t~ite54; [L761] 1 havoc #t~ite53; [L761] 1 havoc #t~ite52; [L762] 1 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] 1 assume 0 != ~y$flush_delayed~0 % 256; [L763] 1 #t~ite55 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite55=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] 1 ~y~0 := #t~ite55; [L763] 1 havoc #t~ite55; [L764] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L767] 1 #t~ite56 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite56=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 #t~ite57 := #t~ite56; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite56=1, #t~ite57=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 ~y~0 := #t~ite57; [L767] 1 havoc #t~ite56; [L767] 1 havoc #t~ite57; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L768] 1 #t~ite58 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite58=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 1 ~y$w_buff0_used~0 := #t~ite58; [L768] 1 havoc #t~ite58; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L769] 1 #t~ite59 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite59=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 1 ~y$w_buff1_used~0 := #t~ite59; [L769] 1 havoc #t~ite59; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L770] 1 #t~ite60 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite60=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] 1 ~y$r_buff0_thd2~0 := #t~ite60; [L770] 1 havoc #t~ite60; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L771] 1 #t~ite61 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] 1 ~y$r_buff1_thd2~0 := #t~ite61; [L771] 1 havoc #t~ite61; [L774] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] 0 ~y~0 := #t~ite4; [L715] 0 havoc #t~ite4; [L715] 0 havoc #t~ite3; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256; [L716] 0 #t~ite5 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] 0 ~y$w_buff0_used~0 := #t~ite5; [L716] 0 havoc #t~ite5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)); [L717] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] 0 ~y$w_buff1_used~0 := #t~ite6; [L717] 0 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256); [L718] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L718] 0 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)); [L719] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L719] 0 havoc #t~ite8; [L722] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L792] -1 havoc main_#t~nondet64; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L798] -1 main_#t~ite65 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite65=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 main_#t~ite66 := main_#t~ite65; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite65=2, main_#t~ite66=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 ~y~0 := main_#t~ite66; [L798] -1 havoc main_#t~ite65; [L798] -1 havoc main_#t~ite66; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L799] -1 main_#t~ite67 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite67=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite67; [L799] -1 havoc main_#t~ite67; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L800] -1 main_#t~ite68 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite68=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite68; [L800] -1 havoc main_#t~ite68; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L801] -1 main_#t~ite69 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite69=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite69; [L801] -1 havoc main_#t~ite69; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L802] -1 main_#t~ite70 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite70=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite70; [L802] -1 havoc main_#t~ite70; [L805] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet71.base + main_#t~nondet71.offset then 0 else 1); [L805] -1 havoc main_#t~nondet71.base, main_#t~nondet71.offset; [L806] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet72.base + main_#t~nondet72.offset then 0 else 1); [L806] -1 havoc main_#t~nondet72.base, main_#t~nondet72.offset; [L807] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L808] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256); [L809] -1 main_#t~ite74 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite74=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] -1 ~y~0 := main_#t~ite74; [L809] -1 havoc main_#t~ite74; [L809] -1 havoc main_#t~ite73; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] -1 assume 0 != ~weak$$choice2~0 % 256; [L810] -1 main_#t~ite77 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite77=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] -1 ~y$w_buff0~0 := main_#t~ite77; [L810] -1 havoc main_#t~ite77; [L810] -1 havoc main_#t~ite76; [L810] -1 havoc main_#t~ite75; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] -1 assume 0 != ~weak$$choice2~0 % 256; [L811] -1 main_#t~ite80 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite80=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] -1 ~y$w_buff1~0 := main_#t~ite80; [L811] -1 havoc main_#t~ite80; [L811] -1 havoc main_#t~ite78; [L811] -1 havoc main_#t~ite79; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] -1 assume 0 != ~weak$$choice2~0 % 256; [L812] -1 main_#t~ite83 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite83=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] -1 ~y$w_buff0_used~0 := main_#t~ite83; [L812] -1 havoc main_#t~ite81; [L812] -1 havoc main_#t~ite83; [L812] -1 havoc main_#t~ite82; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] -1 assume 0 != ~weak$$choice2~0 % 256; [L813] -1 main_#t~ite86 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite86=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] -1 ~y$w_buff1_used~0 := main_#t~ite86; [L813] -1 havoc main_#t~ite85; [L813] -1 havoc main_#t~ite84; [L813] -1 havoc main_#t~ite86; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] -1 assume 0 != ~weak$$choice2~0 % 256; [L814] -1 main_#t~ite89 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite89=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] -1 ~y$r_buff0_thd0~0 := main_#t~ite89; [L814] -1 havoc main_#t~ite87; [L814] -1 havoc main_#t~ite88; [L814] -1 havoc main_#t~ite89; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] -1 assume 0 != ~weak$$choice2~0 % 256; [L815] -1 main_#t~ite92 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite92=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] -1 ~y$r_buff1_thd0~0 := main_#t~ite92; [L815] -1 havoc main_#t~ite91; [L815] -1 havoc main_#t~ite90; [L815] -1 havoc main_#t~ite92; [L816] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] -1 assume 0 != ~y$flush_delayed~0 % 256; [L817] -1 main_#t~ite93 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite93=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] -1 ~y~0 := main_#t~ite93; [L817] -1 havoc main_#t~ite93; [L818] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L820] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L820] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L681] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L682] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L683] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet63, main_#t~nondet64, main_#t~ite66, main_#t~ite65, main_#t~ite67, main_#t~ite68, main_#t~ite69, main_#t~ite70, main_#t~nondet71.base, main_#t~nondet71.offset, main_#t~nondet72.base, main_#t~nondet72.offset, main_#t~ite74, main_#t~ite73, main_#t~ite77, main_#t~ite76, main_#t~ite75, main_#t~ite80, main_#t~ite79, main_#t~ite78, main_#t~ite83, main_#t~ite82, main_#t~ite81, main_#t~ite86, main_#t~ite85, main_#t~ite84, main_#t~ite89, main_#t~ite88, main_#t~ite87, main_#t~ite92, main_#t~ite91, main_#t~ite90, main_#t~ite93, main_~#t1595~0.base, main_~#t1595~0.offset, main_~#t1596~0.base, main_~#t1596~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 call main_~#t1595~0.base, main_~#t1595~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 call write~int(0, main_~#t1595~0.base, main_~#t1595~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698-L725] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L701] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L702] 0 ~y$w_buff0~0 := 2; [L703] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L704] 0 ~y$w_buff0_used~0 := 1; [L705] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L705] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc main_#t~nondet63; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] -1 call main_~#t1596~0.base, main_~#t1596~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 call write~int(1, main_~#t1596~0.base, main_~#t1596~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L706] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L707] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L708] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L709] 0 ~y$r_buff0_thd1~0 := 1; [L712] 0 ~x~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L726-L777] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L729] 1 ~x~0 := 2; [L732] 1 ~y~0 := 1; [L735] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10.base + #t~nondet10.offset then 0 else 1); [L735] 1 havoc #t~nondet10.base, #t~nondet10.offset; [L736] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11.base + #t~nondet11.offset then 0 else 1); [L736] 1 havoc #t~nondet11.base, #t~nondet11.offset; [L737] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L738] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256); [L739] 1 #t~ite13 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] 1 ~y~0 := #t~ite13; [L739] 1 havoc #t~ite12; [L739] 1 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] 1 assume 0 != ~weak$$choice2~0 % 256; [L740] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] 1 ~y$w_buff0~0 := #t~ite16; [L740] 1 havoc #t~ite15; [L740] 1 havoc #t~ite16; [L740] 1 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256; [L715] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] 1 assume 0 != ~weak$$choice2~0 % 256; [L741] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite19=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] 1 ~y$w_buff1~0 := #t~ite19; [L741] 1 havoc #t~ite17; [L741] 1 havoc #t~ite19; [L741] 1 havoc #t~ite18; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] 1 assume 0 != ~weak$$choice2~0 % 256; [L742] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite22=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] 1 ~y$w_buff0_used~0 := #t~ite22; [L742] 1 havoc #t~ite22; [L742] 1 havoc #t~ite21; [L742] 1 havoc #t~ite20; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] 1 assume 0 != ~weak$$choice2~0 % 256; [L743] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] 1 ~y$w_buff1_used~0 := #t~ite25; [L743] 1 havoc #t~ite23; [L743] 1 havoc #t~ite25; [L743] 1 havoc #t~ite24; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] 1 assume 0 != ~weak$$choice2~0 % 256; [L744] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L744] 1 havoc #t~ite27; [L744] 1 havoc #t~ite28; [L744] 1 havoc #t~ite26; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] 1 assume 0 != ~weak$$choice2~0 % 256; [L745] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite31=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L745] 1 havoc #t~ite30; [L745] 1 havoc #t~ite29; [L745] 1 havoc #t~ite31; [L746] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] 1 assume 0 != ~y$flush_delayed~0 % 256; [L747] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite32=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] 1 ~y~0 := #t~ite32; [L747] 1 havoc #t~ite32; [L748] 1 ~y$flush_delayed~0 := 0; [L751] 1 ~weak$$choice0~0 := (if 0 == #t~nondet33.base + #t~nondet33.offset then 0 else 1); [L751] 1 havoc #t~nondet33.base, #t~nondet33.offset; [L752] 1 ~weak$$choice2~0 := (if 0 == #t~nondet34.base + #t~nondet34.offset then 0 else 1); [L752] 1 havoc #t~nondet34.base, #t~nondet34.offset; [L753] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L754] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256); [L755] 1 #t~ite36 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 1 ~y~0 := #t~ite36; [L755] 1 havoc #t~ite36; [L755] 1 havoc #t~ite35; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 1 assume 0 != ~weak$$choice2~0 % 256; [L756] 1 #t~ite39 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite39=2, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 1 ~y$w_buff0~0 := #t~ite39; [L756] 1 havoc #t~ite39; [L756] 1 havoc #t~ite38; [L756] 1 havoc #t~ite37; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 1 assume 0 != ~weak$$choice2~0 % 256; [L757] 1 #t~ite42 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 1 ~y$w_buff1~0 := #t~ite42; [L757] 1 havoc #t~ite41; [L757] 1 havoc #t~ite42; [L757] 1 havoc #t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 1 assume 0 != ~weak$$choice2~0 % 256; [L758] 1 #t~ite45 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 1 ~y$w_buff0_used~0 := #t~ite45; [L758] 1 havoc #t~ite43; [L758] 1 havoc #t~ite44; [L758] 1 havoc #t~ite45; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] 1 assume 0 != ~weak$$choice2~0 % 256; [L759] 1 #t~ite48 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] 1 ~y$w_buff1_used~0 := #t~ite48; [L759] 1 havoc #t~ite46; [L759] 1 havoc #t~ite47; [L759] 1 havoc #t~ite48; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 1 assume 0 != ~weak$$choice2~0 % 256; [L760] 1 #t~ite51 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite51=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 1 ~y$r_buff0_thd2~0 := #t~ite51; [L760] 1 havoc #t~ite50; [L760] 1 havoc #t~ite49; [L760] 1 havoc #t~ite51; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] 1 assume 0 != ~weak$$choice2~0 % 256; [L761] 1 #t~ite54 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite54=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] 1 ~y$r_buff1_thd2~0 := #t~ite54; [L761] 1 havoc #t~ite54; [L761] 1 havoc #t~ite53; [L761] 1 havoc #t~ite52; [L762] 1 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] 1 assume 0 != ~y$flush_delayed~0 % 256; [L763] 1 #t~ite55 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite55=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] 1 ~y~0 := #t~ite55; [L763] 1 havoc #t~ite55; [L764] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L767] 1 #t~ite56 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite56=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 #t~ite57 := #t~ite56; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite56=1, #t~ite57=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 ~y~0 := #t~ite57; [L767] 1 havoc #t~ite56; [L767] 1 havoc #t~ite57; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L768] 1 #t~ite58 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite58=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 1 ~y$w_buff0_used~0 := #t~ite58; [L768] 1 havoc #t~ite58; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L769] 1 #t~ite59 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite59=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 1 ~y$w_buff1_used~0 := #t~ite59; [L769] 1 havoc #t~ite59; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L770] 1 #t~ite60 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite60=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] 1 ~y$r_buff0_thd2~0 := #t~ite60; [L770] 1 havoc #t~ite60; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L771] 1 #t~ite61 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] 1 ~y$r_buff1_thd2~0 := #t~ite61; [L771] 1 havoc #t~ite61; [L774] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] 0 ~y~0 := #t~ite4; [L715] 0 havoc #t~ite4; [L715] 0 havoc #t~ite3; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256; [L716] 0 #t~ite5 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] 0 ~y$w_buff0_used~0 := #t~ite5; [L716] 0 havoc #t~ite5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)); [L717] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] 0 ~y$w_buff1_used~0 := #t~ite6; [L717] 0 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256); [L718] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L718] 0 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)); [L719] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L719] 0 havoc #t~ite8; [L722] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L792] -1 havoc main_#t~nondet64; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L798] -1 main_#t~ite65 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite65=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 main_#t~ite66 := main_#t~ite65; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite65=2, main_#t~ite66=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 ~y~0 := main_#t~ite66; [L798] -1 havoc main_#t~ite65; [L798] -1 havoc main_#t~ite66; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L799] -1 main_#t~ite67 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite67=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite67; [L799] -1 havoc main_#t~ite67; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L800] -1 main_#t~ite68 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite68=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite68; [L800] -1 havoc main_#t~ite68; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L801] -1 main_#t~ite69 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite69=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite69; [L801] -1 havoc main_#t~ite69; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L802] -1 main_#t~ite70 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite70=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite70; [L802] -1 havoc main_#t~ite70; [L805] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet71.base + main_#t~nondet71.offset then 0 else 1); [L805] -1 havoc main_#t~nondet71.base, main_#t~nondet71.offset; [L806] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet72.base + main_#t~nondet72.offset then 0 else 1); [L806] -1 havoc main_#t~nondet72.base, main_#t~nondet72.offset; [L807] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L808] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256); [L809] -1 main_#t~ite74 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite74=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] -1 ~y~0 := main_#t~ite74; [L809] -1 havoc main_#t~ite74; [L809] -1 havoc main_#t~ite73; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] -1 assume 0 != ~weak$$choice2~0 % 256; [L810] -1 main_#t~ite77 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite77=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] -1 ~y$w_buff0~0 := main_#t~ite77; [L810] -1 havoc main_#t~ite77; [L810] -1 havoc main_#t~ite76; [L810] -1 havoc main_#t~ite75; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] -1 assume 0 != ~weak$$choice2~0 % 256; [L811] -1 main_#t~ite80 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite80=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] -1 ~y$w_buff1~0 := main_#t~ite80; [L811] -1 havoc main_#t~ite80; [L811] -1 havoc main_#t~ite78; [L811] -1 havoc main_#t~ite79; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] -1 assume 0 != ~weak$$choice2~0 % 256; [L812] -1 main_#t~ite83 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite83=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] -1 ~y$w_buff0_used~0 := main_#t~ite83; [L812] -1 havoc main_#t~ite81; [L812] -1 havoc main_#t~ite83; [L812] -1 havoc main_#t~ite82; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] -1 assume 0 != ~weak$$choice2~0 % 256; [L813] -1 main_#t~ite86 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite86=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] -1 ~y$w_buff1_used~0 := main_#t~ite86; [L813] -1 havoc main_#t~ite85; [L813] -1 havoc main_#t~ite84; [L813] -1 havoc main_#t~ite86; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] -1 assume 0 != ~weak$$choice2~0 % 256; [L814] -1 main_#t~ite89 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite89=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] -1 ~y$r_buff0_thd0~0 := main_#t~ite89; [L814] -1 havoc main_#t~ite87; [L814] -1 havoc main_#t~ite88; [L814] -1 havoc main_#t~ite89; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] -1 assume 0 != ~weak$$choice2~0 % 256; [L815] -1 main_#t~ite92 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite92=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] -1 ~y$r_buff1_thd0~0 := main_#t~ite92; [L815] -1 havoc main_#t~ite91; [L815] -1 havoc main_#t~ite90; [L815] -1 havoc main_#t~ite92; [L816] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] -1 assume 0 != ~y$flush_delayed~0 % 256; [L817] -1 main_#t~ite93 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite93=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] -1 ~y~0 := main_#t~ite93; [L817] -1 havoc main_#t~ite93; [L818] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L820] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L820] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L681] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L682] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L683] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet63, main_#t~nondet64, main_#t~ite66, main_#t~ite65, main_#t~ite67, main_#t~ite68, main_#t~ite69, main_#t~ite70, main_#t~nondet71, main_#t~nondet72, main_#t~ite74, main_#t~ite73, main_#t~ite77, main_#t~ite76, main_#t~ite75, main_#t~ite80, main_#t~ite79, main_#t~ite78, main_#t~ite83, main_#t~ite82, main_#t~ite81, main_#t~ite86, main_#t~ite85, main_#t~ite84, main_#t~ite89, main_#t~ite88, main_#t~ite87, main_#t~ite92, main_#t~ite91, main_#t~ite90, main_#t~ite93, main_~#t1595~0, main_~#t1596~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call main_~#t1595~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FCALL -1 call write~int(0, main_~#t1595~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698-L725] 0 ~arg := #in~arg; [L701] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L702] 0 ~y$w_buff0~0 := 2; [L703] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L704] 0 ~y$w_buff0_used~0 := 1; [L705] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L705] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc main_#t~nondet63; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] FCALL -1 call main_~#t1596~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FCALL -1 call write~int(1, main_~#t1596~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L706] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L707] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L708] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L709] 0 ~y$r_buff0_thd1~0 := 1; [L712] 0 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L726-L777] 1 ~arg := #in~arg; [L729] 1 ~x~0 := 2; [L732] 1 ~y~0 := 1; [L735] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10!base + #t~nondet10!offset then 0 else 1); [L735] 1 havoc #t~nondet10; [L736] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11!base + #t~nondet11!offset then 0 else 1); [L736] 1 havoc #t~nondet11; [L737] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L738] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L739] 1 #t~ite13 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] 1 ~y~0 := #t~ite13; [L739] 1 havoc #t~ite12; [L739] 1 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L740] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] 1 ~y$w_buff0~0 := #t~ite16; [L740] 1 havoc #t~ite15; [L740] 1 havoc #t~ite16; [L740] 1 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L715] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L741] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite19=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] 1 ~y$w_buff1~0 := #t~ite19; [L741] 1 havoc #t~ite17; [L741] 1 havoc #t~ite19; [L741] 1 havoc #t~ite18; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L742] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite22=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] 1 ~y$w_buff0_used~0 := #t~ite22; [L742] 1 havoc #t~ite22; [L742] 1 havoc #t~ite21; [L742] 1 havoc #t~ite20; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L743] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] 1 ~y$w_buff1_used~0 := #t~ite25; [L743] 1 havoc #t~ite23; [L743] 1 havoc #t~ite25; [L743] 1 havoc #t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L744] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L744] 1 havoc #t~ite27; [L744] 1 havoc #t~ite28; [L744] 1 havoc #t~ite26; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L745] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L745] 1 havoc #t~ite30; [L745] 1 havoc #t~ite29; [L745] 1 havoc #t~ite31; [L746] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L747] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] 1 ~y~0 := #t~ite32; [L747] 1 havoc #t~ite32; [L748] 1 ~y$flush_delayed~0 := 0; [L751] 1 ~weak$$choice0~0 := (if 0 == #t~nondet33!base + #t~nondet33!offset then 0 else 1); [L751] 1 havoc #t~nondet33; [L752] 1 ~weak$$choice2~0 := (if 0 == #t~nondet34!base + #t~nondet34!offset then 0 else 1); [L752] 1 havoc #t~nondet34; [L753] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L754] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L755] 1 #t~ite36 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 1 ~y~0 := #t~ite36; [L755] 1 havoc #t~ite36; [L755] 1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L756] 1 #t~ite39 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite39=2, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 1 ~y$w_buff0~0 := #t~ite39; [L756] 1 havoc #t~ite39; [L756] 1 havoc #t~ite38; [L756] 1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L757] 1 #t~ite42 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 1 ~y$w_buff1~0 := #t~ite42; [L757] 1 havoc #t~ite41; [L757] 1 havoc #t~ite42; [L757] 1 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L758] 1 #t~ite45 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 1 ~y$w_buff0_used~0 := #t~ite45; [L758] 1 havoc #t~ite43; [L758] 1 havoc #t~ite44; [L758] 1 havoc #t~ite45; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L759] 1 #t~ite48 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] 1 ~y$w_buff1_used~0 := #t~ite48; [L759] 1 havoc #t~ite46; [L759] 1 havoc #t~ite47; [L759] 1 havoc #t~ite48; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L760] 1 #t~ite51 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite51=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 1 ~y$r_buff0_thd2~0 := #t~ite51; [L760] 1 havoc #t~ite50; [L760] 1 havoc #t~ite49; [L760] 1 havoc #t~ite51; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L761] 1 #t~ite54 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite54=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] 1 ~y$r_buff1_thd2~0 := #t~ite54; [L761] 1 havoc #t~ite54; [L761] 1 havoc #t~ite53; [L761] 1 havoc #t~ite52; [L762] 1 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L763] 1 #t~ite55 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite55=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] 1 ~y~0 := #t~ite55; [L763] 1 havoc #t~ite55; [L764] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] COND FALSE 1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L767] 1 #t~ite56 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite56=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 #t~ite57 := #t~ite56; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite56=1, #t~ite57=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 ~y~0 := #t~ite57; [L767] 1 havoc #t~ite56; [L767] 1 havoc #t~ite57; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L768] 1 #t~ite58 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite58=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 1 ~y$w_buff0_used~0 := #t~ite58; [L768] 1 havoc #t~ite58; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L769] 1 #t~ite59 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite59=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 1 ~y$w_buff1_used~0 := #t~ite59; [L769] 1 havoc #t~ite59; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L770] 1 #t~ite60 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite60=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] 1 ~y$r_buff0_thd2~0 := #t~ite60; [L770] 1 havoc #t~ite60; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L771] 1 #t~ite61 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] 1 ~y$r_buff1_thd2~0 := #t~ite61; [L771] 1 havoc #t~ite61; [L774] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] 0 ~y~0 := #t~ite4; [L715] 0 havoc #t~ite4; [L715] 0 havoc #t~ite3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L716] 0 #t~ite5 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] 0 ~y$w_buff0_used~0 := #t~ite5; [L716] 0 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L717] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] 0 ~y$w_buff1_used~0 := #t~ite6; [L717] 0 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) [L718] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L718] 0 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L719] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L719] 0 havoc #t~ite8; [L722] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L792] -1 havoc main_#t~nondet64; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L798] -1 main_#t~ite65 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite65=2, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 main_#t~ite66 := main_#t~ite65; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite65=2, main_#t~ite66=2, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 ~y~0 := main_#t~ite66; [L798] -1 havoc main_#t~ite65; [L798] -1 havoc main_#t~ite66; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L799] -1 main_#t~ite67 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite67=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite67; [L799] -1 havoc main_#t~ite67; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L800] -1 main_#t~ite68 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite68=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite68; [L800] -1 havoc main_#t~ite68; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L801] -1 main_#t~ite69 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite69=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite69; [L801] -1 havoc main_#t~ite69; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L802] -1 main_#t~ite70 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite70=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite70; [L802] -1 havoc main_#t~ite70; [L805] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet71!base + main_#t~nondet71!offset then 0 else 1); [L805] -1 havoc main_#t~nondet71; [L806] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet72!base + main_#t~nondet72!offset then 0 else 1); [L806] -1 havoc main_#t~nondet72; [L807] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L808] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L809] -1 main_#t~ite74 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite74=2, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] -1 ~y~0 := main_#t~ite74; [L809] -1 havoc main_#t~ite74; [L809] -1 havoc main_#t~ite73; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L810] -1 main_#t~ite77 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite77=2, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] -1 ~y$w_buff0~0 := main_#t~ite77; [L810] -1 havoc main_#t~ite77; [L810] -1 havoc main_#t~ite76; [L810] -1 havoc main_#t~ite75; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L811] -1 main_#t~ite80 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite80=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] -1 ~y$w_buff1~0 := main_#t~ite80; [L811] -1 havoc main_#t~ite80; [L811] -1 havoc main_#t~ite78; [L811] -1 havoc main_#t~ite79; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L812] -1 main_#t~ite83 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite83=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] -1 ~y$w_buff0_used~0 := main_#t~ite83; [L812] -1 havoc main_#t~ite81; [L812] -1 havoc main_#t~ite83; [L812] -1 havoc main_#t~ite82; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L813] -1 main_#t~ite86 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite86=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] -1 ~y$w_buff1_used~0 := main_#t~ite86; [L813] -1 havoc main_#t~ite85; [L813] -1 havoc main_#t~ite84; [L813] -1 havoc main_#t~ite86; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L814] -1 main_#t~ite89 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite89=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] -1 ~y$r_buff0_thd0~0 := main_#t~ite89; [L814] -1 havoc main_#t~ite87; [L814] -1 havoc main_#t~ite88; [L814] -1 havoc main_#t~ite89; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L815] -1 main_#t~ite92 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite92=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] -1 ~y$r_buff1_thd0~0 := main_#t~ite92; [L815] -1 havoc main_#t~ite91; [L815] -1 havoc main_#t~ite90; [L815] -1 havoc main_#t~ite92; [L816] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L817] -1 main_#t~ite93 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite93=2, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] WARNING: YOUR LOGFILE WAS TOO LONG, SOME LINES IN THE MIDDLE WERE REMOVED. VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [810] L800-->L800-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite68_3| v_~y$w_buff1_used~0_64) (or (= (mod v_~y$r_buff0_thd0~0_30 256) 0) (= (mod v_~y$w_buff0_used~0_114 256) 0)) (or (= 0 (mod v_~y$w_buff1_used~0_64 256)) (= 0 (mod v_~y$r_buff1_thd0~0_18 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_114, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_18, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_30, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_64} OutVars{ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_114, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_18, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_30, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_64} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite68] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite68|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [942] L800-2-->L801: Formula: (= v_~y$w_buff1_used~0_65 |v_ULTIMATE.start_main_#t~ite68_5|) InVars {ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_5|} OutVars{ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_65} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite68, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [902] L801-->L801-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd0~0_32 256)) (= 0 (mod v_~y$w_buff0_used~0_116 256))) (= |v_ULTIMATE.start_main_#t~ite69_3| v_~y$r_buff0_thd0~0_32)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_116, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_32} OutVars{ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_116, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_32} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite69] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite69|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [911] L801-2-->L802: Formula: (= v_~y$r_buff0_thd0~0_33 |v_ULTIMATE.start_main_#t~ite69_5|) InVars {ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_5|} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_33, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_4|} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite69] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [691] L802-->L802-2: Formula: (and (or (= (mod v_~y$w_buff1_used~0_67 256) 0) (= 0 (mod v_~y$r_buff1_thd0~0_20 256))) (or (= (mod v_~y$r_buff0_thd0~0_35 256) 0) (= 0 (mod v_~y$w_buff0_used~0_118 256))) (= |v_ULTIMATE.start_main_#t~ite70_3| v_~y$r_buff1_thd0~0_20)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_118, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_20, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_35, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_67} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_118, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_3|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_20, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_35, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_67} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite70] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite70|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [698] L802-2-->L809: Formula: (and (= v_~weak$$choice2~0_38 (ite (= (+ |v_ULTIMATE.start_main_#t~nondet72.base_3| |v_ULTIMATE.start_main_#t~nondet72.offset_3|) 0) 0 1)) (= v_~y$mem_tmp~0_7 v_~y~0_22) (= v_~y$r_buff1_thd0~0_21 |v_ULTIMATE.start_main_#t~ite70_5|) (= v_~y$flush_delayed~0_13 v_~weak$$choice2~0_38) (= v_~weak$$choice0~0_4 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet71.base_3| |v_ULTIMATE.start_main_#t~nondet71.offset_3|)) 0 1))) InVars {ULTIMATE.start_main_#t~nondet71.base=|v_ULTIMATE.start_main_#t~nondet71.base_3|, ULTIMATE.start_main_#t~nondet71.offset=|v_ULTIMATE.start_main_#t~nondet71.offset_3|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_5|, ~y~0=v_~y~0_22, ULTIMATE.start_main_#t~nondet72.base=|v_ULTIMATE.start_main_#t~nondet72.base_3|, ULTIMATE.start_main_#t~nondet72.offset=|v_ULTIMATE.start_main_#t~nondet72.offset_3|} OutVars{ULTIMATE.start_main_#t~nondet71.base=|v_ULTIMATE.start_main_#t~nondet71.base_2|, ~weak$$choice0~0=v_~weak$$choice0~0_4, ~y$mem_tmp~0=v_~y$mem_tmp~0_7, ULTIMATE.start_main_#t~nondet71.offset=|v_ULTIMATE.start_main_#t~nondet71.offset_2|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_4|, ~y$flush_delayed~0=v_~y$flush_delayed~0_13, ~y~0=v_~y~0_22, ~weak$$choice2~0=v_~weak$$choice2~0_38, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_21, ULTIMATE.start_main_#t~nondet72.base=|v_ULTIMATE.start_main_#t~nondet72.base_2|, ULTIMATE.start_main_#t~nondet72.offset=|v_ULTIMATE.start_main_#t~nondet72.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet71.base, ~weak$$choice0~0, ~y$mem_tmp~0, ULTIMATE.start_main_#t~nondet71.offset, ULTIMATE.start_main_#t~ite70, ~y$flush_delayed~0, ~weak$$choice2~0, ~y$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet72.base, ULTIMATE.start_main_#t~nondet72.offset] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [746] L809-->L809-5: Formula: (and (let ((.cse0 (= (mod v_~y$r_buff0_thd0~0_36 256) 0))) (or (and .cse0 (= 0 (mod v_~y$w_buff1_used~0_68 256))) (and .cse0 (= 0 (mod v_~y$r_buff1_thd0~0_22 256))) (= (mod v_~y$w_buff0_used~0_119 256) 0))) (= |v_ULTIMATE.start_main_#t~ite74_2| v_~y~0_23)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_119, ~y~0=v_~y~0_23, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_22, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_36, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_68} OutVars{ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_119, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_36, ~y~0=v_~y~0_23, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_22, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_68} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite74] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite74|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [740] L809-5-->L810: Formula: (= v_~y~0_24 |v_ULTIMATE.start_main_#t~ite74_5|) InVars {ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_5|} OutVars{ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_5|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_4|, ~y~0=v_~y~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite73, ULTIMATE.start_main_#t~ite74, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [867] L810-->L810-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite77_2| v_~y$w_buff0~0_20) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_39, ~y$w_buff0~0=v_~y$w_buff0~0_20} OutVars{ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_2|, ~weak$$choice2~0=v_~weak$$choice2~0_39, ~y$w_buff0~0=v_~y$w_buff0~0_20} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite77] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite77|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [835] L810-8-->L811: Formula: (= v_~y$w_buff0~0_24 |v_ULTIMATE.start_main_#t~ite77_5|) InVars {ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_5|} OutVars{ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_4|, ~y$w_buff0~0=v_~y$w_buff0~0_24, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_5|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_5|} AuxVars[] AssignedVars[~y$w_buff0~0, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [807] L811-->L811-8: Formula: (and (not (= (mod v_~weak$$choice2~0_27 256) 0)) (= |v_ULTIMATE.start_main_#t~ite80_1| v_~y$w_buff1~0_16)) InVars {~y$w_buff1~0=v_~y$w_buff1~0_16, ~weak$$choice2~0=v_~weak$$choice2~0_27} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_16, ~weak$$choice2~0=v_~weak$$choice2~0_27, ULTIMATE.start_main_#t~ite80=|v_ULTIMATE.start_main_#t~ite80_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite80] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite80|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [933] L811-8-->L812: Formula: (= v_~y$w_buff1~0_20 |v_ULTIMATE.start_main_#t~ite80_4|) InVars {ULTIMATE.start_main_#t~ite80=|v_ULTIMATE.start_main_#t~ite80_4|} OutVars{ULTIMATE.start_main_#t~ite79=|v_ULTIMATE.start_main_#t~ite79_4|, ~y$w_buff1~0=v_~y$w_buff1~0_20, ULTIMATE.start_main_#t~ite80=|v_ULTIMATE.start_main_#t~ite80_3|, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_4|} AuxVars[] AssignedVars[~y$w_buff1~0, ULTIMATE.start_main_#t~ite80, ULTIMATE.start_main_#t~ite79, ULTIMATE.start_main_#t~ite78] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [897] L812-->L812-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite83_1| v_~y$w_buff0_used~0_89) (not (= 0 (mod v_~weak$$choice2~0_29 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_89, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_89, ~weak$$choice2~0=v_~weak$$choice2~0_29} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite83] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite83|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [879] L812-8-->L813: Formula: (= v_~y$w_buff0_used~0_94 |v_ULTIMATE.start_main_#t~ite83_4|) InVars {ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_4|} OutVars{ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_3|, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_4|, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_4|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_94} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite83, ULTIMATE.start_main_#t~ite82, ULTIMATE.start_main_#t~ite81, ~y$w_buff0_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [688] L813-->L813-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite86_1| v_~y$w_buff1_used~0_52) (not (= 0 (mod v_~weak$$choice2~0_31 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_31, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_52} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_31, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_52} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite86] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite86|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [684] L813-8-->L814: Formula: (= v_~y$w_buff1_used~0_55 |v_ULTIMATE.start_main_#t~ite86_4|) InVars {ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_4|} OutVars{ULTIMATE.start_main_#t~ite85=|v_ULTIMATE.start_main_#t~ite85_4|, ULTIMATE.start_main_#t~ite84=|v_ULTIMATE.start_main_#t~ite84_4|, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_55} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite85, ULTIMATE.start_main_#t~ite84, ULTIMATE.start_main_#t~ite86, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [778] L814-->L814-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite89_1| v_~y$r_buff0_thd0~0_14) (not (= 0 (mod v_~weak$$choice2~0_33 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_33, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_14} OutVars{ULTIMATE.start_main_#t~ite89=|v_ULTIMATE.start_main_#t~ite89_1|, ~weak$$choice2~0=v_~weak$$choice2~0_33, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_14} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite89] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite89|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [777] L814-8-->L815: Formula: (= v_~y$r_buff0_thd0~0_19 |v_ULTIMATE.start_main_#t~ite89_4|) InVars {ULTIMATE.start_main_#t~ite89=|v_ULTIMATE.start_main_#t~ite89_4|} OutVars{ULTIMATE.start_main_#t~ite89=|v_ULTIMATE.start_main_#t~ite89_3|, ULTIMATE.start_main_#t~ite88=|v_ULTIMATE.start_main_#t~ite88_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_19, ULTIMATE.start_main_#t~ite87=|v_ULTIMATE.start_main_#t~ite87_4|} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite89, ULTIMATE.start_main_#t~ite88, ULTIMATE.start_main_#t~ite87] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [738] L815-->L815-8: Formula: (and (not (= (mod v_~weak$$choice2~0_35 256) 0)) (= |v_ULTIMATE.start_main_#t~ite92_1| v_~y$r_buff1_thd0~0_10)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_35, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_10} OutVars{ULTIMATE.start_main_#t~ite92=|v_ULTIMATE.start_main_#t~ite92_1|, ~weak$$choice2~0=v_~weak$$choice2~0_35, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite92] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite92|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [873] L815-8-->L817: Formula: (and (= v_~main$tmp_guard1~0_1 (ite (= 0 (ite (not (and (= 2 v_~x~0_3) (= v_~y~0_16 2) (= 1 v_~__unbuffered_p1_EBX~0_2) (= 1 v_~__unbuffered_p1_EAX~0_2))) 1 0)) 0 1)) (= v_~y$r_buff1_thd0~0_13 |v_ULTIMATE.start_main_#t~ite92_4|)) InVars {~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ULTIMATE.start_main_#t~ite92=|v_ULTIMATE.start_main_#t~ite92_4|, ~y~0=v_~y~0_16, ~x~0=v_~x~0_3} OutVars{~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ULTIMATE.start_main_#t~ite92=|v_ULTIMATE.start_main_#t~ite92_3|, ULTIMATE.start_main_#t~ite91=|v_ULTIMATE.start_main_#t~ite91_4|, ULTIMATE.start_main_#t~ite90=|v_ULTIMATE.start_main_#t~ite90_4|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~y~0=v_~y~0_16, ~x~0=v_~x~0_3, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_13} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite92, ULTIMATE.start_main_#t~ite91, ULTIMATE.start_main_#t~ite90, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [925] L817-->L817-2: Formula: (and (not (= 0 (mod v_~y$flush_delayed~0_9 256))) (= |v_ULTIMATE.start_main_#t~ite93_1| v_~y$mem_tmp~0_5)) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_9, ~y$mem_tmp~0=v_~y$mem_tmp~0_5} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_9, ~y$mem_tmp~0=v_~y$mem_tmp~0_5, ULTIMATE.start_main_#t~ite93=|v_ULTIMATE.start_main_#t~ite93_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite93] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite93|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [931] L817-2-->L820: Formula: (and (= v_~y$flush_delayed~0_11 0) (= v_~y~0_18 |v_ULTIMATE.start_main_#t~ite93_4|)) InVars {ULTIMATE.start_main_#t~ite93=|v_ULTIMATE.start_main_#t~ite93_4|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_11, ULTIMATE.start_main_#t~ite93=|v_ULTIMATE.start_main_#t~ite93_3|, ~y~0=v_~y~0_18} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite93, ~y$flush_delayed~0, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [745] L820-->L820-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [751] L820-1-->L4: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [685] L4-->L4-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [680] L4-1-->L4-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 [677] L4-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet63, main_#t~nondet64, main_#t~ite66, main_#t~ite65, main_#t~ite67, main_#t~ite68, main_#t~ite69, main_#t~ite70, main_#t~nondet71.base, main_#t~nondet71.offset, main_#t~nondet72.base, main_#t~nondet72.offset, main_#t~ite74, main_#t~ite73, main_#t~ite77, main_#t~ite76, main_#t~ite75, main_#t~ite80, main_#t~ite79, main_#t~ite78, main_#t~ite83, main_#t~ite82, main_#t~ite81, main_#t~ite86, main_#t~ite85, main_#t~ite84, main_#t~ite89, main_#t~ite88, main_#t~ite87, main_#t~ite92, main_#t~ite91, main_#t~ite90, main_#t~ite93, main_~#t1595~0.base, main_~#t1595~0.offset, main_~#t1596~0.base, main_~#t1596~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1595~0.base, main_~#t1595~0.offset := #Ultimate.alloc(4); srcloc: L789 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1595~0.base, main_~#t1595~0.offset, 4); srcloc: L789-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 2;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet63; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1596~0.base, main_~#t1596~0.offset := #Ultimate.alloc(4); srcloc: L791 VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1596~0.base, main_~#t1596~0.offset, 4); srcloc: L791-1 VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd1~0 := 1;~x~0 := 1; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~y~0 := 1;~weak$$choice0~0 := (if 0 == #t~nondet10.base + #t~nondet10.offset then 0 else 1);havoc #t~nondet10.base, #t~nondet10.offset;~weak$$choice2~0 := (if 0 == #t~nondet11.base + #t~nondet11.offset then 0 else 1);havoc #t~nondet11.base, #t~nondet11.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256);#t~ite13 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite13;havoc #t~ite12;havoc #t~ite13; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite16 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite16|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0~0 := #t~ite16;havoc #t~ite15;havoc #t~ite16;havoc #t~ite14; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256;#t~ite4 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite19 := ~y$w_buff1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite19|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1~0 := #t~ite19;havoc #t~ite17;havoc #t~ite19;havoc #t~ite18; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite22 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite22|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0_used~0 := #t~ite22;havoc #t~ite22;havoc #t~ite21;havoc #t~ite20; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite25 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1_used~0 := #t~ite25;havoc #t~ite23;havoc #t~ite25;havoc #t~ite24; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite28 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff0_thd2~0 := #t~ite28;havoc #t~ite27;havoc #t~ite28;havoc #t~ite26; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite31 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite31|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff1_thd2~0 := #t~ite31;havoc #t~ite30;havoc #t~ite29;havoc #t~ite31;~__unbuffered_p1_EAX~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite32 := ~y$mem_tmp~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite32|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite32;havoc #t~ite32;~y$flush_delayed~0 := 0;~weak$$choice0~0 := (if 0 == #t~nondet33.base + #t~nondet33.offset then 0 else 1);havoc #t~nondet33.base, #t~nondet33.offset;~weak$$choice2~0 := (if 0 == #t~nondet34.base + #t~nondet34.offset then 0 else 1);havoc #t~nondet34.base, #t~nondet34.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256);#t~ite36 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite36|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite36;havoc #t~ite36;havoc #t~ite35; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite39 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite39|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0~0 := #t~ite39;havoc #t~ite39;havoc #t~ite38;havoc #t~ite37; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite42 := ~y$w_buff1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite42|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1~0 := #t~ite42;havoc #t~ite41;havoc #t~ite42;havoc #t~ite40; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite45 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite45|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0_used~0 := #t~ite45;havoc #t~ite43;havoc #t~ite44;havoc #t~ite45; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite48 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite48|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1_used~0 := #t~ite48;havoc #t~ite46;havoc #t~ite47;havoc #t~ite48; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite51 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff0_thd2~0 := #t~ite51;havoc #t~ite50;havoc #t~ite49;havoc #t~ite51; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite54 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite54|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff1_thd2~0 := #t~ite54;havoc #t~ite54;havoc #t~ite53;havoc #t~ite52;~__unbuffered_p1_EBX~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite55 := ~y$mem_tmp~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite55|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite55;havoc #t~ite55;~y$flush_delayed~0 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite56 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite56|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 #t~ite57 := #t~ite56; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite56|=1, |P1_#t~ite57|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite57;havoc #t~ite56;havoc #t~ite57; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite58 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite58|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0_used~0 := #t~ite58;havoc #t~ite58; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite59 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite59|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1_used~0 := #t~ite59;havoc #t~ite59; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite60 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite60|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff0_thd2~0 := #t~ite60;havoc #t~ite60; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite61 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite61|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff1_thd2~0 := #t~ite61;havoc #t~ite61;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y~0 := #t~ite4;havoc #t~ite4;havoc #t~ite3; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256;#t~ite5 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 ~y$w_buff0_used~0 := #t~ite5;havoc #t~ite5; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256));#t~ite6 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 ~y$w_buff1_used~0 := #t~ite6;havoc #t~ite6; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256);#t~ite7 := ~y$r_buff0_thd1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite7|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 ~y$r_buff0_thd1~0 := #t~ite7;havoc #t~ite7; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256));#t~ite8 := ~y$r_buff1_thd1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 ~y$r_buff1_thd1~0 := #t~ite8;havoc #t~ite8;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 havoc main_#t~nondet64;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite65 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite65|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 main_#t~ite66 := main_#t~ite65; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite65|=2, |ULTIMATE.start_main_#t~ite66|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y~0 := main_#t~ite66;havoc main_#t~ite65;havoc main_#t~ite66; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite67 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite67|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff0_used~0 := main_#t~ite67;havoc main_#t~ite67; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite68 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite68|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff1_used~0 := main_#t~ite68;havoc main_#t~ite68; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite69 := ~y$r_buff0_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite69|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite69;havoc main_#t~ite69; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite70 := ~y$r_buff1_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite70|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite70;havoc main_#t~ite70;~weak$$choice0~0 := (if 0 == main_#t~nondet71.base + main_#t~nondet71.offset then 0 else 1);havoc main_#t~nondet71.base, main_#t~nondet71.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet72.base + main_#t~nondet72.offset then 0 else 1);havoc main_#t~nondet72.base, main_#t~nondet72.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256);main_#t~ite74 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite74|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y~0 := main_#t~ite74;havoc main_#t~ite74;havoc main_#t~ite73; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite77 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite77|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff0~0 := main_#t~ite77;havoc main_#t~ite77;havoc main_#t~ite76;havoc main_#t~ite75; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite80 := ~y$w_buff1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite80|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff1~0 := main_#t~ite80;havoc main_#t~ite80;havoc main_#t~ite78;havoc main_#t~ite79; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite83 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite83|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff0_used~0 := main_#t~ite83;havoc main_#t~ite81;havoc main_#t~ite83;havoc main_#t~ite82; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite86 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite86|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff1_used~0 := main_#t~ite86;havoc main_#t~ite85;havoc main_#t~ite84;havoc main_#t~ite86; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite89 := ~y$r_buff0_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite89|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite89;havoc main_#t~ite87;havoc main_#t~ite88;havoc main_#t~ite89; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite92 := ~y$r_buff1_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite92|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite92;havoc main_#t~ite91;havoc main_#t~ite90;havoc main_#t~ite92;~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~y$flush_delayed~0 % 256;main_#t~ite93 := ~y$mem_tmp~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite93|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y~0 := main_#t~ite93;havoc main_#t~ite93;~y$flush_delayed~0 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !false; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet63, main_#t~nondet64, main_#t~ite66, main_#t~ite65, main_#t~ite67, main_#t~ite68, main_#t~ite69, main_#t~ite70, main_#t~nondet71.base, main_#t~nondet71.offset, main_#t~nondet72.base, main_#t~nondet72.offset, main_#t~ite74, main_#t~ite73, main_#t~ite77, main_#t~ite76, main_#t~ite75, main_#t~ite80, main_#t~ite79, main_#t~ite78, main_#t~ite83, main_#t~ite82, main_#t~ite81, main_#t~ite86, main_#t~ite85, main_#t~ite84, main_#t~ite89, main_#t~ite88, main_#t~ite87, main_#t~ite92, main_#t~ite91, main_#t~ite90, main_#t~ite93, main_~#t1595~0.base, main_~#t1595~0.offset, main_~#t1596~0.base, main_~#t1596~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1595~0.base, main_~#t1595~0.offset := #Ultimate.alloc(4); srcloc: L789 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1595~0.base, main_~#t1595~0.offset, 4); srcloc: L789-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 2;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet63; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1596~0.base, main_~#t1596~0.offset := #Ultimate.alloc(4); srcloc: L791 VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1596~0.base, main_~#t1596~0.offset, 4); srcloc: L791-1 VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd1~0 := 1;~x~0 := 1; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~y~0 := 1;~weak$$choice0~0 := (if 0 == #t~nondet10.base + #t~nondet10.offset then 0 else 1);havoc #t~nondet10.base, #t~nondet10.offset;~weak$$choice2~0 := (if 0 == #t~nondet11.base + #t~nondet11.offset then 0 else 1);havoc #t~nondet11.base, #t~nondet11.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256);#t~ite13 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite13;havoc #t~ite12;havoc #t~ite13; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite16 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite16|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0~0 := #t~ite16;havoc #t~ite15;havoc #t~ite16;havoc #t~ite14; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256;#t~ite4 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite19 := ~y$w_buff1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite19|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1~0 := #t~ite19;havoc #t~ite17;havoc #t~ite19;havoc #t~ite18; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite22 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite22|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0_used~0 := #t~ite22;havoc #t~ite22;havoc #t~ite21;havoc #t~ite20; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite25 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1_used~0 := #t~ite25;havoc #t~ite23;havoc #t~ite25;havoc #t~ite24; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite28 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff0_thd2~0 := #t~ite28;havoc #t~ite27;havoc #t~ite28;havoc #t~ite26; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite31 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite31|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff1_thd2~0 := #t~ite31;havoc #t~ite30;havoc #t~ite29;havoc #t~ite31;~__unbuffered_p1_EAX~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite32 := ~y$mem_tmp~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite32|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite32;havoc #t~ite32;~y$flush_delayed~0 := 0;~weak$$choice0~0 := (if 0 == #t~nondet33.base + #t~nondet33.offset then 0 else 1);havoc #t~nondet33.base, #t~nondet33.offset;~weak$$choice2~0 := (if 0 == #t~nondet34.base + #t~nondet34.offset then 0 else 1);havoc #t~nondet34.base, #t~nondet34.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256);#t~ite36 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite36|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite36;havoc #t~ite36;havoc #t~ite35; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite39 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite39|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0~0 := #t~ite39;havoc #t~ite39;havoc #t~ite38;havoc #t~ite37; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite42 := ~y$w_buff1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite42|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1~0 := #t~ite42;havoc #t~ite41;havoc #t~ite42;havoc #t~ite40; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite45 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite45|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0_used~0 := #t~ite45;havoc #t~ite43;havoc #t~ite44;havoc #t~ite45; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite48 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite48|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1_used~0 := #t~ite48;havoc #t~ite46;havoc #t~ite47;havoc #t~ite48; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite51 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff0_thd2~0 := #t~ite51;havoc #t~ite50;havoc #t~ite49;havoc #t~ite51; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite54 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite54|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff1_thd2~0 := #t~ite54;havoc #t~ite54;havoc #t~ite53;havoc #t~ite52;~__unbuffered_p1_EBX~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite55 := ~y$mem_tmp~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite55|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite55;havoc #t~ite55;~y$flush_delayed~0 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite56 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite56|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 #t~ite57 := #t~ite56; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite56|=1, |P1_#t~ite57|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite57;havoc #t~ite56;havoc #t~ite57; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite58 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite58|=1, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff0_used~0 := #t~ite58;havoc #t~ite58; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite59 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite59|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$w_buff1_used~0 := #t~ite59;havoc #t~ite59; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite60 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite60|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff0_thd2~0 := #t~ite60;havoc #t~ite60; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite61 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite61|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y$r_buff1_thd2~0 := #t~ite61;havoc #t~ite61;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=2, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y~0 := #t~ite4;havoc #t~ite4;havoc #t~ite3; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256;#t~ite5 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 ~y$w_buff0_used~0 := #t~ite5;havoc #t~ite5; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256));#t~ite6 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 ~y$w_buff1_used~0 := #t~ite6;havoc #t~ite6; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256);#t~ite7 := ~y$r_buff0_thd1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite7|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 ~y$r_buff0_thd1~0 := #t~ite7;havoc #t~ite7; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256));#t~ite8 := ~y$r_buff1_thd1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] 0 ~y$r_buff1_thd1~0 := #t~ite8;havoc #t~ite8;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 havoc main_#t~nondet64;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite65 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite65|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 main_#t~ite66 := main_#t~ite65; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite65|=2, |ULTIMATE.start_main_#t~ite66|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y~0 := main_#t~ite66;havoc main_#t~ite65;havoc main_#t~ite66; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite67 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite67|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff0_used~0 := main_#t~ite67;havoc main_#t~ite67; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite68 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite68|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff1_used~0 := main_#t~ite68;havoc main_#t~ite68; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite69 := ~y$r_buff0_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite69|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite69;havoc main_#t~ite69; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite70 := ~y$r_buff1_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite70|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite70;havoc main_#t~ite70;~weak$$choice0~0 := (if 0 == main_#t~nondet71.base + main_#t~nondet71.offset then 0 else 1);havoc main_#t~nondet71.base, main_#t~nondet71.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet72.base + main_#t~nondet72.offset then 0 else 1);havoc main_#t~nondet72.base, main_#t~nondet72.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256);main_#t~ite74 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite74|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y~0 := main_#t~ite74;havoc main_#t~ite74;havoc main_#t~ite73; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite77 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite77|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff0~0 := main_#t~ite77;havoc main_#t~ite77;havoc main_#t~ite76;havoc main_#t~ite75; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite80 := ~y$w_buff1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite80|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff1~0 := main_#t~ite80;havoc main_#t~ite80;havoc main_#t~ite78;havoc main_#t~ite79; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite83 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite83|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff0_used~0 := main_#t~ite83;havoc main_#t~ite81;havoc main_#t~ite83;havoc main_#t~ite82; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite86 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite86|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$w_buff1_used~0 := main_#t~ite86;havoc main_#t~ite85;havoc main_#t~ite84;havoc main_#t~ite86; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite89 := ~y$r_buff0_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite89|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite89;havoc main_#t~ite87;havoc main_#t~ite88;havoc main_#t~ite89; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite92 := ~y$r_buff1_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite92|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite92;havoc main_#t~ite91;havoc main_#t~ite90;havoc main_#t~ite92;~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 != ~y$flush_delayed~0 % 256;main_#t~ite93 := ~y$mem_tmp~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite93|=2, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 ~y~0 := main_#t~ite93;havoc main_#t~ite93;~y$flush_delayed~0 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 assume !false; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1595~0.base|=6, |ULTIMATE.start_main_~#t1595~0.offset|=0, |ULTIMATE.start_main_~#t1596~0.base|=5, |ULTIMATE.start_main_~#t1596~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L681] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L682] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L683] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet63, main_#t~nondet64, main_#t~ite66, main_#t~ite65, main_#t~ite67, main_#t~ite68, main_#t~ite69, main_#t~ite70, main_#t~nondet71.base, main_#t~nondet71.offset, main_#t~nondet72.base, main_#t~nondet72.offset, main_#t~ite74, main_#t~ite73, main_#t~ite77, main_#t~ite76, main_#t~ite75, main_#t~ite80, main_#t~ite79, main_#t~ite78, main_#t~ite83, main_#t~ite82, main_#t~ite81, main_#t~ite86, main_#t~ite85, main_#t~ite84, main_#t~ite89, main_#t~ite88, main_#t~ite87, main_#t~ite92, main_#t~ite91, main_#t~ite90, main_#t~ite93, main_~#t1595~0.base, main_~#t1595~0.offset, main_~#t1596~0.base, main_~#t1596~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 call main_~#t1595~0.base, main_~#t1595~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 call write~int(0, main_~#t1595~0.base, main_~#t1595~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698-L725] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L701] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L702] 0 ~y$w_buff0~0 := 2; [L703] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L704] 0 ~y$w_buff0_used~0 := 1; [L705] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L705] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc main_#t~nondet63; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] -1 call main_~#t1596~0.base, main_~#t1596~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 call write~int(1, main_~#t1596~0.base, main_~#t1596~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L706] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L707] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L708] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L709] 0 ~y$r_buff0_thd1~0 := 1; [L712] 0 ~x~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L726-L777] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L729] 1 ~x~0 := 2; [L732] 1 ~y~0 := 1; [L735] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10.base + #t~nondet10.offset then 0 else 1); [L735] 1 havoc #t~nondet10.base, #t~nondet10.offset; [L736] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11.base + #t~nondet11.offset then 0 else 1); [L736] 1 havoc #t~nondet11.base, #t~nondet11.offset; [L737] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L738] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256); [L739] 1 #t~ite13 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] 1 ~y~0 := #t~ite13; [L739] 1 havoc #t~ite12; [L739] 1 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] 1 assume 0 != ~weak$$choice2~0 % 256; [L740] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] 1 ~y$w_buff0~0 := #t~ite16; [L740] 1 havoc #t~ite15; [L740] 1 havoc #t~ite16; [L740] 1 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256; [L715] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] 1 assume 0 != ~weak$$choice2~0 % 256; [L741] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite19=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] 1 ~y$w_buff1~0 := #t~ite19; [L741] 1 havoc #t~ite17; [L741] 1 havoc #t~ite19; [L741] 1 havoc #t~ite18; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] 1 assume 0 != ~weak$$choice2~0 % 256; [L742] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite22=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] 1 ~y$w_buff0_used~0 := #t~ite22; [L742] 1 havoc #t~ite22; [L742] 1 havoc #t~ite21; [L742] 1 havoc #t~ite20; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] 1 assume 0 != ~weak$$choice2~0 % 256; [L743] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] 1 ~y$w_buff1_used~0 := #t~ite25; [L743] 1 havoc #t~ite23; [L743] 1 havoc #t~ite25; [L743] 1 havoc #t~ite24; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] 1 assume 0 != ~weak$$choice2~0 % 256; [L744] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L744] 1 havoc #t~ite27; [L744] 1 havoc #t~ite28; [L744] 1 havoc #t~ite26; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] 1 assume 0 != ~weak$$choice2~0 % 256; [L745] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite31=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L745] 1 havoc #t~ite30; [L745] 1 havoc #t~ite29; [L745] 1 havoc #t~ite31; [L746] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] 1 assume 0 != ~y$flush_delayed~0 % 256; [L747] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite32=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] 1 ~y~0 := #t~ite32; [L747] 1 havoc #t~ite32; [L748] 1 ~y$flush_delayed~0 := 0; [L751] 1 ~weak$$choice0~0 := (if 0 == #t~nondet33.base + #t~nondet33.offset then 0 else 1); [L751] 1 havoc #t~nondet33.base, #t~nondet33.offset; [L752] 1 ~weak$$choice2~0 := (if 0 == #t~nondet34.base + #t~nondet34.offset then 0 else 1); [L752] 1 havoc #t~nondet34.base, #t~nondet34.offset; [L753] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L754] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256); [L755] 1 #t~ite36 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 1 ~y~0 := #t~ite36; [L755] 1 havoc #t~ite36; [L755] 1 havoc #t~ite35; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 1 assume 0 != ~weak$$choice2~0 % 256; [L756] 1 #t~ite39 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite39=2, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 1 ~y$w_buff0~0 := #t~ite39; [L756] 1 havoc #t~ite39; [L756] 1 havoc #t~ite38; [L756] 1 havoc #t~ite37; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 1 assume 0 != ~weak$$choice2~0 % 256; [L757] 1 #t~ite42 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 1 ~y$w_buff1~0 := #t~ite42; [L757] 1 havoc #t~ite41; [L757] 1 havoc #t~ite42; [L757] 1 havoc #t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 1 assume 0 != ~weak$$choice2~0 % 256; [L758] 1 #t~ite45 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 1 ~y$w_buff0_used~0 := #t~ite45; [L758] 1 havoc #t~ite43; [L758] 1 havoc #t~ite44; [L758] 1 havoc #t~ite45; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] 1 assume 0 != ~weak$$choice2~0 % 256; [L759] 1 #t~ite48 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] 1 ~y$w_buff1_used~0 := #t~ite48; [L759] 1 havoc #t~ite46; [L759] 1 havoc #t~ite47; [L759] 1 havoc #t~ite48; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 1 assume 0 != ~weak$$choice2~0 % 256; [L760] 1 #t~ite51 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite51=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 1 ~y$r_buff0_thd2~0 := #t~ite51; [L760] 1 havoc #t~ite50; [L760] 1 havoc #t~ite49; [L760] 1 havoc #t~ite51; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] 1 assume 0 != ~weak$$choice2~0 % 256; [L761] 1 #t~ite54 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite54=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] 1 ~y$r_buff1_thd2~0 := #t~ite54; [L761] 1 havoc #t~ite54; [L761] 1 havoc #t~ite53; [L761] 1 havoc #t~ite52; [L762] 1 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] 1 assume 0 != ~y$flush_delayed~0 % 256; [L763] 1 #t~ite55 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite55=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] 1 ~y~0 := #t~ite55; [L763] 1 havoc #t~ite55; [L764] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L767] 1 #t~ite56 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite56=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 #t~ite57 := #t~ite56; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite56=1, #t~ite57=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 ~y~0 := #t~ite57; [L767] 1 havoc #t~ite56; [L767] 1 havoc #t~ite57; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L768] 1 #t~ite58 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite58=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 1 ~y$w_buff0_used~0 := #t~ite58; [L768] 1 havoc #t~ite58; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L769] 1 #t~ite59 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite59=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 1 ~y$w_buff1_used~0 := #t~ite59; [L769] 1 havoc #t~ite59; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L770] 1 #t~ite60 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite60=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] 1 ~y$r_buff0_thd2~0 := #t~ite60; [L770] 1 havoc #t~ite60; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L771] 1 #t~ite61 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] 1 ~y$r_buff1_thd2~0 := #t~ite61; [L771] 1 havoc #t~ite61; [L774] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] 0 ~y~0 := #t~ite4; [L715] 0 havoc #t~ite4; [L715] 0 havoc #t~ite3; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256; [L716] 0 #t~ite5 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] 0 ~y$w_buff0_used~0 := #t~ite5; [L716] 0 havoc #t~ite5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)); [L717] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] 0 ~y$w_buff1_used~0 := #t~ite6; [L717] 0 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256); [L718] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L718] 0 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)); [L719] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L719] 0 havoc #t~ite8; [L722] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L792] -1 havoc main_#t~nondet64; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L798] -1 main_#t~ite65 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite65=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 main_#t~ite66 := main_#t~ite65; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite65=2, main_#t~ite66=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 ~y~0 := main_#t~ite66; [L798] -1 havoc main_#t~ite65; [L798] -1 havoc main_#t~ite66; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L799] -1 main_#t~ite67 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite67=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite67; [L799] -1 havoc main_#t~ite67; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L800] -1 main_#t~ite68 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite68=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite68; [L800] -1 havoc main_#t~ite68; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L801] -1 main_#t~ite69 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite69=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite69; [L801] -1 havoc main_#t~ite69; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L802] -1 main_#t~ite70 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite70=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite70; [L802] -1 havoc main_#t~ite70; [L805] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet71.base + main_#t~nondet71.offset then 0 else 1); [L805] -1 havoc main_#t~nondet71.base, main_#t~nondet71.offset; [L806] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet72.base + main_#t~nondet72.offset then 0 else 1); [L806] -1 havoc main_#t~nondet72.base, main_#t~nondet72.offset; [L807] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L808] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256); [L809] -1 main_#t~ite74 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite74=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] -1 ~y~0 := main_#t~ite74; [L809] -1 havoc main_#t~ite74; [L809] -1 havoc main_#t~ite73; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] -1 assume 0 != ~weak$$choice2~0 % 256; [L810] -1 main_#t~ite77 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite77=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] -1 ~y$w_buff0~0 := main_#t~ite77; [L810] -1 havoc main_#t~ite77; [L810] -1 havoc main_#t~ite76; [L810] -1 havoc main_#t~ite75; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] -1 assume 0 != ~weak$$choice2~0 % 256; [L811] -1 main_#t~ite80 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite80=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] -1 ~y$w_buff1~0 := main_#t~ite80; [L811] -1 havoc main_#t~ite80; [L811] -1 havoc main_#t~ite78; [L811] -1 havoc main_#t~ite79; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] -1 assume 0 != ~weak$$choice2~0 % 256; [L812] -1 main_#t~ite83 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite83=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] -1 ~y$w_buff0_used~0 := main_#t~ite83; [L812] -1 havoc main_#t~ite81; [L812] -1 havoc main_#t~ite83; [L812] -1 havoc main_#t~ite82; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] -1 assume 0 != ~weak$$choice2~0 % 256; [L813] -1 main_#t~ite86 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite86=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] -1 ~y$w_buff1_used~0 := main_#t~ite86; [L813] -1 havoc main_#t~ite85; [L813] -1 havoc main_#t~ite84; [L813] -1 havoc main_#t~ite86; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] -1 assume 0 != ~weak$$choice2~0 % 256; [L814] -1 main_#t~ite89 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite89=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] -1 ~y$r_buff0_thd0~0 := main_#t~ite89; [L814] -1 havoc main_#t~ite87; [L814] -1 havoc main_#t~ite88; [L814] -1 havoc main_#t~ite89; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] -1 assume 0 != ~weak$$choice2~0 % 256; [L815] -1 main_#t~ite92 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite92=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] -1 ~y$r_buff1_thd0~0 := main_#t~ite92; [L815] -1 havoc main_#t~ite91; [L815] -1 havoc main_#t~ite90; [L815] -1 havoc main_#t~ite92; [L816] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] -1 assume 0 != ~y$flush_delayed~0 % 256; [L817] -1 main_#t~ite93 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite93=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] -1 ~y~0 := main_#t~ite93; [L817] -1 havoc main_#t~ite93; [L818] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L820] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L820] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L681] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L682] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L683] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet63, main_#t~nondet64, main_#t~ite66, main_#t~ite65, main_#t~ite67, main_#t~ite68, main_#t~ite69, main_#t~ite70, main_#t~nondet71.base, main_#t~nondet71.offset, main_#t~nondet72.base, main_#t~nondet72.offset, main_#t~ite74, main_#t~ite73, main_#t~ite77, main_#t~ite76, main_#t~ite75, main_#t~ite80, main_#t~ite79, main_#t~ite78, main_#t~ite83, main_#t~ite82, main_#t~ite81, main_#t~ite86, main_#t~ite85, main_#t~ite84, main_#t~ite89, main_#t~ite88, main_#t~ite87, main_#t~ite92, main_#t~ite91, main_#t~ite90, main_#t~ite93, main_~#t1595~0.base, main_~#t1595~0.offset, main_~#t1596~0.base, main_~#t1596~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 call main_~#t1595~0.base, main_~#t1595~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 call write~int(0, main_~#t1595~0.base, main_~#t1595~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698-L725] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L701] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L702] 0 ~y$w_buff0~0 := 2; [L703] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L704] 0 ~y$w_buff0_used~0 := 1; [L705] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L705] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc main_#t~nondet63; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] -1 call main_~#t1596~0.base, main_~#t1596~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 call write~int(1, main_~#t1596~0.base, main_~#t1596~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L706] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L707] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L708] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L709] 0 ~y$r_buff0_thd1~0 := 1; [L712] 0 ~x~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L726-L777] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L729] 1 ~x~0 := 2; [L732] 1 ~y~0 := 1; [L735] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10.base + #t~nondet10.offset then 0 else 1); [L735] 1 havoc #t~nondet10.base, #t~nondet10.offset; [L736] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11.base + #t~nondet11.offset then 0 else 1); [L736] 1 havoc #t~nondet11.base, #t~nondet11.offset; [L737] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L738] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256); [L739] 1 #t~ite13 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] 1 ~y~0 := #t~ite13; [L739] 1 havoc #t~ite12; [L739] 1 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] 1 assume 0 != ~weak$$choice2~0 % 256; [L740] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] 1 ~y$w_buff0~0 := #t~ite16; [L740] 1 havoc #t~ite15; [L740] 1 havoc #t~ite16; [L740] 1 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256; [L715] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] 1 assume 0 != ~weak$$choice2~0 % 256; [L741] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite19=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] 1 ~y$w_buff1~0 := #t~ite19; [L741] 1 havoc #t~ite17; [L741] 1 havoc #t~ite19; [L741] 1 havoc #t~ite18; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] 1 assume 0 != ~weak$$choice2~0 % 256; [L742] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite22=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] 1 ~y$w_buff0_used~0 := #t~ite22; [L742] 1 havoc #t~ite22; [L742] 1 havoc #t~ite21; [L742] 1 havoc #t~ite20; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] 1 assume 0 != ~weak$$choice2~0 % 256; [L743] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] 1 ~y$w_buff1_used~0 := #t~ite25; [L743] 1 havoc #t~ite23; [L743] 1 havoc #t~ite25; [L743] 1 havoc #t~ite24; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] 1 assume 0 != ~weak$$choice2~0 % 256; [L744] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L744] 1 havoc #t~ite27; [L744] 1 havoc #t~ite28; [L744] 1 havoc #t~ite26; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] 1 assume 0 != ~weak$$choice2~0 % 256; [L745] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite31=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L745] 1 havoc #t~ite30; [L745] 1 havoc #t~ite29; [L745] 1 havoc #t~ite31; [L746] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] 1 assume 0 != ~y$flush_delayed~0 % 256; [L747] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite32=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] 1 ~y~0 := #t~ite32; [L747] 1 havoc #t~ite32; [L748] 1 ~y$flush_delayed~0 := 0; [L751] 1 ~weak$$choice0~0 := (if 0 == #t~nondet33.base + #t~nondet33.offset then 0 else 1); [L751] 1 havoc #t~nondet33.base, #t~nondet33.offset; [L752] 1 ~weak$$choice2~0 := (if 0 == #t~nondet34.base + #t~nondet34.offset then 0 else 1); [L752] 1 havoc #t~nondet34.base, #t~nondet34.offset; [L753] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L754] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256); [L755] 1 #t~ite36 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 1 ~y~0 := #t~ite36; [L755] 1 havoc #t~ite36; [L755] 1 havoc #t~ite35; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 1 assume 0 != ~weak$$choice2~0 % 256; [L756] 1 #t~ite39 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite39=2, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 1 ~y$w_buff0~0 := #t~ite39; [L756] 1 havoc #t~ite39; [L756] 1 havoc #t~ite38; [L756] 1 havoc #t~ite37; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 1 assume 0 != ~weak$$choice2~0 % 256; [L757] 1 #t~ite42 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 1 ~y$w_buff1~0 := #t~ite42; [L757] 1 havoc #t~ite41; [L757] 1 havoc #t~ite42; [L757] 1 havoc #t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 1 assume 0 != ~weak$$choice2~0 % 256; [L758] 1 #t~ite45 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 1 ~y$w_buff0_used~0 := #t~ite45; [L758] 1 havoc #t~ite43; [L758] 1 havoc #t~ite44; [L758] 1 havoc #t~ite45; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] 1 assume 0 != ~weak$$choice2~0 % 256; [L759] 1 #t~ite48 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] 1 ~y$w_buff1_used~0 := #t~ite48; [L759] 1 havoc #t~ite46; [L759] 1 havoc #t~ite47; [L759] 1 havoc #t~ite48; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 1 assume 0 != ~weak$$choice2~0 % 256; [L760] 1 #t~ite51 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite51=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 1 ~y$r_buff0_thd2~0 := #t~ite51; [L760] 1 havoc #t~ite50; [L760] 1 havoc #t~ite49; [L760] 1 havoc #t~ite51; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] 1 assume 0 != ~weak$$choice2~0 % 256; [L761] 1 #t~ite54 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite54=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] 1 ~y$r_buff1_thd2~0 := #t~ite54; [L761] 1 havoc #t~ite54; [L761] 1 havoc #t~ite53; [L761] 1 havoc #t~ite52; [L762] 1 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] 1 assume 0 != ~y$flush_delayed~0 % 256; [L763] 1 #t~ite55 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite55=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] 1 ~y~0 := #t~ite55; [L763] 1 havoc #t~ite55; [L764] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L767] 1 #t~ite56 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite56=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 #t~ite57 := #t~ite56; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite56=1, #t~ite57=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 ~y~0 := #t~ite57; [L767] 1 havoc #t~ite56; [L767] 1 havoc #t~ite57; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L768] 1 #t~ite58 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite58=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 1 ~y$w_buff0_used~0 := #t~ite58; [L768] 1 havoc #t~ite58; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L769] 1 #t~ite59 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite59=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 1 ~y$w_buff1_used~0 := #t~ite59; [L769] 1 havoc #t~ite59; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L770] 1 #t~ite60 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite60=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] 1 ~y$r_buff0_thd2~0 := #t~ite60; [L770] 1 havoc #t~ite60; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L771] 1 #t~ite61 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] 1 ~y$r_buff1_thd2~0 := #t~ite61; [L771] 1 havoc #t~ite61; [L774] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] 0 ~y~0 := #t~ite4; [L715] 0 havoc #t~ite4; [L715] 0 havoc #t~ite3; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256; [L716] 0 #t~ite5 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] 0 ~y$w_buff0_used~0 := #t~ite5; [L716] 0 havoc #t~ite5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)); [L717] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] 0 ~y$w_buff1_used~0 := #t~ite6; [L717] 0 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256); [L718] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L718] 0 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)); [L719] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L719] 0 havoc #t~ite8; [L722] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L792] -1 havoc main_#t~nondet64; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L798] -1 main_#t~ite65 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite65=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 main_#t~ite66 := main_#t~ite65; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite65=2, main_#t~ite66=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 ~y~0 := main_#t~ite66; [L798] -1 havoc main_#t~ite65; [L798] -1 havoc main_#t~ite66; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L799] -1 main_#t~ite67 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite67=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite67; [L799] -1 havoc main_#t~ite67; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L800] -1 main_#t~ite68 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite68=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite68; [L800] -1 havoc main_#t~ite68; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L801] -1 main_#t~ite69 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite69=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite69; [L801] -1 havoc main_#t~ite69; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L802] -1 main_#t~ite70 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite70=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite70; [L802] -1 havoc main_#t~ite70; [L805] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet71.base + main_#t~nondet71.offset then 0 else 1); [L805] -1 havoc main_#t~nondet71.base, main_#t~nondet71.offset; [L806] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet72.base + main_#t~nondet72.offset then 0 else 1); [L806] -1 havoc main_#t~nondet72.base, main_#t~nondet72.offset; [L807] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L808] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256); [L809] -1 main_#t~ite74 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite74=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] -1 ~y~0 := main_#t~ite74; [L809] -1 havoc main_#t~ite74; [L809] -1 havoc main_#t~ite73; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] -1 assume 0 != ~weak$$choice2~0 % 256; [L810] -1 main_#t~ite77 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite77=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] -1 ~y$w_buff0~0 := main_#t~ite77; [L810] -1 havoc main_#t~ite77; [L810] -1 havoc main_#t~ite76; [L810] -1 havoc main_#t~ite75; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] -1 assume 0 != ~weak$$choice2~0 % 256; [L811] -1 main_#t~ite80 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite80=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] -1 ~y$w_buff1~0 := main_#t~ite80; [L811] -1 havoc main_#t~ite80; [L811] -1 havoc main_#t~ite78; [L811] -1 havoc main_#t~ite79; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] -1 assume 0 != ~weak$$choice2~0 % 256; [L812] -1 main_#t~ite83 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite83=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] -1 ~y$w_buff0_used~0 := main_#t~ite83; [L812] -1 havoc main_#t~ite81; [L812] -1 havoc main_#t~ite83; [L812] -1 havoc main_#t~ite82; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] -1 assume 0 != ~weak$$choice2~0 % 256; [L813] -1 main_#t~ite86 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite86=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] -1 ~y$w_buff1_used~0 := main_#t~ite86; [L813] -1 havoc main_#t~ite85; [L813] -1 havoc main_#t~ite84; [L813] -1 havoc main_#t~ite86; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] -1 assume 0 != ~weak$$choice2~0 % 256; [L814] -1 main_#t~ite89 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite89=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] -1 ~y$r_buff0_thd0~0 := main_#t~ite89; [L814] -1 havoc main_#t~ite87; [L814] -1 havoc main_#t~ite88; [L814] -1 havoc main_#t~ite89; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] -1 assume 0 != ~weak$$choice2~0 % 256; [L815] -1 main_#t~ite92 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite92=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] -1 ~y$r_buff1_thd0~0 := main_#t~ite92; [L815] -1 havoc main_#t~ite91; [L815] -1 havoc main_#t~ite90; [L815] -1 havoc main_#t~ite92; [L816] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] -1 assume 0 != ~y$flush_delayed~0 % 256; [L817] -1 main_#t~ite93 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite93=2, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] -1 ~y~0 := main_#t~ite93; [L817] -1 havoc main_#t~ite93; [L818] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L820] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L820] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0.base=6, main_~#t1595~0.offset=0, main_~#t1596~0.base=5, main_~#t1596~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L681] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L682] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L683] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet63, main_#t~nondet64, main_#t~ite66, main_#t~ite65, main_#t~ite67, main_#t~ite68, main_#t~ite69, main_#t~ite70, main_#t~nondet71, main_#t~nondet72, main_#t~ite74, main_#t~ite73, main_#t~ite77, main_#t~ite76, main_#t~ite75, main_#t~ite80, main_#t~ite79, main_#t~ite78, main_#t~ite83, main_#t~ite82, main_#t~ite81, main_#t~ite86, main_#t~ite85, main_#t~ite84, main_#t~ite89, main_#t~ite88, main_#t~ite87, main_#t~ite92, main_#t~ite91, main_#t~ite90, main_#t~ite93, main_~#t1595~0, main_~#t1596~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call main_~#t1595~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FCALL -1 call write~int(0, main_~#t1595~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698-L725] 0 ~arg := #in~arg; [L701] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L702] 0 ~y$w_buff0~0 := 2; [L703] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L704] 0 ~y$w_buff0_used~0 := 1; [L705] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L705] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc main_#t~nondet63; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] FCALL -1 call main_~#t1596~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FCALL -1 call write~int(1, main_~#t1596~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L706] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L707] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L708] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L709] 0 ~y$r_buff0_thd1~0 := 1; [L712] 0 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L726-L777] 1 ~arg := #in~arg; [L729] 1 ~x~0 := 2; [L732] 1 ~y~0 := 1; [L735] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10!base + #t~nondet10!offset then 0 else 1); [L735] 1 havoc #t~nondet10; [L736] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11!base + #t~nondet11!offset then 0 else 1); [L736] 1 havoc #t~nondet11; [L737] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L738] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L739] 1 #t~ite13 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] 1 ~y~0 := #t~ite13; [L739] 1 havoc #t~ite12; [L739] 1 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L740] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] 1 ~y$w_buff0~0 := #t~ite16; [L740] 1 havoc #t~ite15; [L740] 1 havoc #t~ite16; [L740] 1 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L715] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L741] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite19=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] 1 ~y$w_buff1~0 := #t~ite19; [L741] 1 havoc #t~ite17; [L741] 1 havoc #t~ite19; [L741] 1 havoc #t~ite18; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L742] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite22=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] 1 ~y$w_buff0_used~0 := #t~ite22; [L742] 1 havoc #t~ite22; [L742] 1 havoc #t~ite21; [L742] 1 havoc #t~ite20; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L743] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] 1 ~y$w_buff1_used~0 := #t~ite25; [L743] 1 havoc #t~ite23; [L743] 1 havoc #t~ite25; [L743] 1 havoc #t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L744] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L744] 1 havoc #t~ite27; [L744] 1 havoc #t~ite28; [L744] 1 havoc #t~ite26; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L745] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L745] 1 havoc #t~ite30; [L745] 1 havoc #t~ite29; [L745] 1 havoc #t~ite31; [L746] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L747] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] 1 ~y~0 := #t~ite32; [L747] 1 havoc #t~ite32; [L748] 1 ~y$flush_delayed~0 := 0; [L751] 1 ~weak$$choice0~0 := (if 0 == #t~nondet33!base + #t~nondet33!offset then 0 else 1); [L751] 1 havoc #t~nondet33; [L752] 1 ~weak$$choice2~0 := (if 0 == #t~nondet34!base + #t~nondet34!offset then 0 else 1); [L752] 1 havoc #t~nondet34; [L753] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L754] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L755] 1 #t~ite36 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 1 ~y~0 := #t~ite36; [L755] 1 havoc #t~ite36; [L755] 1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L756] 1 #t~ite39 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite39=2, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 1 ~y$w_buff0~0 := #t~ite39; [L756] 1 havoc #t~ite39; [L756] 1 havoc #t~ite38; [L756] 1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L757] 1 #t~ite42 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 1 ~y$w_buff1~0 := #t~ite42; [L757] 1 havoc #t~ite41; [L757] 1 havoc #t~ite42; [L757] 1 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L758] 1 #t~ite45 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 1 ~y$w_buff0_used~0 := #t~ite45; [L758] 1 havoc #t~ite43; [L758] 1 havoc #t~ite44; [L758] 1 havoc #t~ite45; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L759] 1 #t~ite48 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] 1 ~y$w_buff1_used~0 := #t~ite48; [L759] 1 havoc #t~ite46; [L759] 1 havoc #t~ite47; [L759] 1 havoc #t~ite48; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L760] 1 #t~ite51 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite51=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 1 ~y$r_buff0_thd2~0 := #t~ite51; [L760] 1 havoc #t~ite50; [L760] 1 havoc #t~ite49; [L760] 1 havoc #t~ite51; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L761] 1 #t~ite54 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite54=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] 1 ~y$r_buff1_thd2~0 := #t~ite54; [L761] 1 havoc #t~ite54; [L761] 1 havoc #t~ite53; [L761] 1 havoc #t~ite52; [L762] 1 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L763] 1 #t~ite55 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite55=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] 1 ~y~0 := #t~ite55; [L763] 1 havoc #t~ite55; [L764] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] COND FALSE 1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L767] 1 #t~ite56 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite56=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 #t~ite57 := #t~ite56; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite56=1, #t~ite57=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 ~y~0 := #t~ite57; [L767] 1 havoc #t~ite56; [L767] 1 havoc #t~ite57; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L768] 1 #t~ite58 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite58=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 1 ~y$w_buff0_used~0 := #t~ite58; [L768] 1 havoc #t~ite58; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L769] 1 #t~ite59 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite59=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 1 ~y$w_buff1_used~0 := #t~ite59; [L769] 1 havoc #t~ite59; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L770] 1 #t~ite60 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite60=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] 1 ~y$r_buff0_thd2~0 := #t~ite60; [L770] 1 havoc #t~ite60; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L771] 1 #t~ite61 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] 1 ~y$r_buff1_thd2~0 := #t~ite61; [L771] 1 havoc #t~ite61; [L774] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] 0 ~y~0 := #t~ite4; [L715] 0 havoc #t~ite4; [L715] 0 havoc #t~ite3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L716] 0 #t~ite5 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] 0 ~y$w_buff0_used~0 := #t~ite5; [L716] 0 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L717] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] 0 ~y$w_buff1_used~0 := #t~ite6; [L717] 0 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) [L718] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L718] 0 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L719] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L719] 0 havoc #t~ite8; [L722] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L792] -1 havoc main_#t~nondet64; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L798] -1 main_#t~ite65 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite65=2, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 main_#t~ite66 := main_#t~ite65; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite65=2, main_#t~ite66=2, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 ~y~0 := main_#t~ite66; [L798] -1 havoc main_#t~ite65; [L798] -1 havoc main_#t~ite66; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L799] -1 main_#t~ite67 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite67=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite67; [L799] -1 havoc main_#t~ite67; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L800] -1 main_#t~ite68 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite68=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite68; [L800] -1 havoc main_#t~ite68; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L801] -1 main_#t~ite69 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite69=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite69; [L801] -1 havoc main_#t~ite69; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L802] -1 main_#t~ite70 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite70=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite70; [L802] -1 havoc main_#t~ite70; [L805] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet71!base + main_#t~nondet71!offset then 0 else 1); [L805] -1 havoc main_#t~nondet71; [L806] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet72!base + main_#t~nondet72!offset then 0 else 1); [L806] -1 havoc main_#t~nondet72; [L807] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L808] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L809] -1 main_#t~ite74 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite74=2, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] -1 ~y~0 := main_#t~ite74; [L809] -1 havoc main_#t~ite74; [L809] -1 havoc main_#t~ite73; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L810] -1 main_#t~ite77 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite77=2, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] -1 ~y$w_buff0~0 := main_#t~ite77; [L810] -1 havoc main_#t~ite77; [L810] -1 havoc main_#t~ite76; [L810] -1 havoc main_#t~ite75; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L811] -1 main_#t~ite80 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite80=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] -1 ~y$w_buff1~0 := main_#t~ite80; [L811] -1 havoc main_#t~ite80; [L811] -1 havoc main_#t~ite78; [L811] -1 havoc main_#t~ite79; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L812] -1 main_#t~ite83 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite83=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] -1 ~y$w_buff0_used~0 := main_#t~ite83; [L812] -1 havoc main_#t~ite81; [L812] -1 havoc main_#t~ite83; [L812] -1 havoc main_#t~ite82; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L813] -1 main_#t~ite86 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite86=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] -1 ~y$w_buff1_used~0 := main_#t~ite86; [L813] -1 havoc main_#t~ite85; [L813] -1 havoc main_#t~ite84; [L813] -1 havoc main_#t~ite86; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L814] -1 main_#t~ite89 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite89=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] -1 ~y$r_buff0_thd0~0 := main_#t~ite89; [L814] -1 havoc main_#t~ite87; [L814] -1 havoc main_#t~ite88; [L814] -1 havoc main_#t~ite89; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L815] -1 main_#t~ite92 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite92=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] -1 ~y$r_buff1_thd0~0 := main_#t~ite92; [L815] -1 havoc main_#t~ite91; [L815] -1 havoc main_#t~ite90; [L815] -1 havoc main_#t~ite92; [L816] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L817] -1 main_#t~ite93 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite93=2, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] -1 ~y~0 := main_#t~ite93; [L817] -1 havoc main_#t~ite93; [L818] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L820] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L820] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L681] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L682] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L683] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet63, main_#t~nondet64, main_#t~ite66, main_#t~ite65, main_#t~ite67, main_#t~ite68, main_#t~ite69, main_#t~ite70, main_#t~nondet71, main_#t~nondet72, main_#t~ite74, main_#t~ite73, main_#t~ite77, main_#t~ite76, main_#t~ite75, main_#t~ite80, main_#t~ite79, main_#t~ite78, main_#t~ite83, main_#t~ite82, main_#t~ite81, main_#t~ite86, main_#t~ite85, main_#t~ite84, main_#t~ite89, main_#t~ite88, main_#t~ite87, main_#t~ite92, main_#t~ite91, main_#t~ite90, main_#t~ite93, main_~#t1595~0, main_~#t1596~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call main_~#t1595~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FCALL -1 call write~int(0, main_~#t1595~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698-L725] 0 ~arg := #in~arg; [L701] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L702] 0 ~y$w_buff0~0 := 2; [L703] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L704] 0 ~y$w_buff0_used~0 := 1; [L705] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L705] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc main_#t~nondet63; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] FCALL -1 call main_~#t1596~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FCALL -1 call write~int(1, main_~#t1596~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L706] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L707] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L708] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L709] 0 ~y$r_buff0_thd1~0 := 1; [L712] 0 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L726-L777] 1 ~arg := #in~arg; [L729] 1 ~x~0 := 2; [L732] 1 ~y~0 := 1; [L735] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10!base + #t~nondet10!offset then 0 else 1); [L735] 1 havoc #t~nondet10; [L736] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11!base + #t~nondet11!offset then 0 else 1); [L736] 1 havoc #t~nondet11; [L737] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L738] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L739] 1 #t~ite13 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] 1 ~y~0 := #t~ite13; [L739] 1 havoc #t~ite12; [L739] 1 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L740] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] 1 ~y$w_buff0~0 := #t~ite16; [L740] 1 havoc #t~ite15; [L740] 1 havoc #t~ite16; [L740] 1 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L715] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L741] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite19=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] 1 ~y$w_buff1~0 := #t~ite19; [L741] 1 havoc #t~ite17; [L741] 1 havoc #t~ite19; [L741] 1 havoc #t~ite18; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L742] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite22=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] 1 ~y$w_buff0_used~0 := #t~ite22; [L742] 1 havoc #t~ite22; [L742] 1 havoc #t~ite21; [L742] 1 havoc #t~ite20; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L743] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] 1 ~y$w_buff1_used~0 := #t~ite25; [L743] 1 havoc #t~ite23; [L743] 1 havoc #t~ite25; [L743] 1 havoc #t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L744] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L744] 1 havoc #t~ite27; [L744] 1 havoc #t~ite28; [L744] 1 havoc #t~ite26; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L745] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L745] 1 havoc #t~ite30; [L745] 1 havoc #t~ite29; [L745] 1 havoc #t~ite31; [L746] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L747] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] 1 ~y~0 := #t~ite32; [L747] 1 havoc #t~ite32; [L748] 1 ~y$flush_delayed~0 := 0; [L751] 1 ~weak$$choice0~0 := (if 0 == #t~nondet33!base + #t~nondet33!offset then 0 else 1); [L751] 1 havoc #t~nondet33; [L752] 1 ~weak$$choice2~0 := (if 0 == #t~nondet34!base + #t~nondet34!offset then 0 else 1); [L752] 1 havoc #t~nondet34; [L753] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L754] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L755] 1 #t~ite36 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=1, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 1 ~y~0 := #t~ite36; [L755] 1 havoc #t~ite36; [L755] 1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L756] 1 #t~ite39 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite39=2, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 1 ~y$w_buff0~0 := #t~ite39; [L756] 1 havoc #t~ite39; [L756] 1 havoc #t~ite38; [L756] 1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L757] 1 #t~ite42 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 1 ~y$w_buff1~0 := #t~ite42; [L757] 1 havoc #t~ite41; [L757] 1 havoc #t~ite42; [L757] 1 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L758] 1 #t~ite45 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 1 ~y$w_buff0_used~0 := #t~ite45; [L758] 1 havoc #t~ite43; [L758] 1 havoc #t~ite44; [L758] 1 havoc #t~ite45; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L759] 1 #t~ite48 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] 1 ~y$w_buff1_used~0 := #t~ite48; [L759] 1 havoc #t~ite46; [L759] 1 havoc #t~ite47; [L759] 1 havoc #t~ite48; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L760] 1 #t~ite51 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite51=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 1 ~y$r_buff0_thd2~0 := #t~ite51; [L760] 1 havoc #t~ite50; [L760] 1 havoc #t~ite49; [L760] 1 havoc #t~ite51; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L761] 1 #t~ite54 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite54=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] 1 ~y$r_buff1_thd2~0 := #t~ite54; [L761] 1 havoc #t~ite54; [L761] 1 havoc #t~ite53; [L761] 1 havoc #t~ite52; [L762] 1 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L763] 1 #t~ite55 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite55=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] 1 ~y~0 := #t~ite55; [L763] 1 havoc #t~ite55; [L764] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] COND FALSE 1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L767] 1 #t~ite56 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite56=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 #t~ite57 := #t~ite56; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite56=1, #t~ite57=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 ~y~0 := #t~ite57; [L767] 1 havoc #t~ite56; [L767] 1 havoc #t~ite57; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L768] 1 #t~ite58 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite58=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 1 ~y$w_buff0_used~0 := #t~ite58; [L768] 1 havoc #t~ite58; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L769] 1 #t~ite59 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite59=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 1 ~y$w_buff1_used~0 := #t~ite59; [L769] 1 havoc #t~ite59; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L770] 1 #t~ite60 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite60=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] 1 ~y$r_buff0_thd2~0 := #t~ite60; [L770] 1 havoc #t~ite60; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L771] 1 #t~ite61 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] 1 ~y$r_buff1_thd2~0 := #t~ite61; [L771] 1 havoc #t~ite61; [L774] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] 0 ~y~0 := #t~ite4; [L715] 0 havoc #t~ite4; [L715] 0 havoc #t~ite3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L716] 0 #t~ite5 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] 0 ~y$w_buff0_used~0 := #t~ite5; [L716] 0 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L717] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] 0 ~y$w_buff1_used~0 := #t~ite6; [L717] 0 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) [L718] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L718] 0 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L719] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L719] 0 havoc #t~ite8; [L722] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L792] -1 havoc main_#t~nondet64; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L798] -1 main_#t~ite65 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite65=2, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 main_#t~ite66 := main_#t~ite65; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite65=2, main_#t~ite66=2, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 ~y~0 := main_#t~ite66; [L798] -1 havoc main_#t~ite65; [L798] -1 havoc main_#t~ite66; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L799] -1 main_#t~ite67 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite67=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite67; [L799] -1 havoc main_#t~ite67; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L800] -1 main_#t~ite68 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite68=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite68; [L800] -1 havoc main_#t~ite68; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L801] -1 main_#t~ite69 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite69=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite69; [L801] -1 havoc main_#t~ite69; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L802] -1 main_#t~ite70 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite70=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite70; [L802] -1 havoc main_#t~ite70; [L805] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet71!base + main_#t~nondet71!offset then 0 else 1); [L805] -1 havoc main_#t~nondet71; [L806] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet72!base + main_#t~nondet72!offset then 0 else 1); [L806] -1 havoc main_#t~nondet72; [L807] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L808] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L809] -1 main_#t~ite74 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite74=2, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] -1 ~y~0 := main_#t~ite74; [L809] -1 havoc main_#t~ite74; [L809] -1 havoc main_#t~ite73; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L810] -1 main_#t~ite77 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite77=2, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] -1 ~y$w_buff0~0 := main_#t~ite77; [L810] -1 havoc main_#t~ite77; [L810] -1 havoc main_#t~ite76; [L810] -1 havoc main_#t~ite75; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L811] -1 main_#t~ite80 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite80=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] -1 ~y$w_buff1~0 := main_#t~ite80; [L811] -1 havoc main_#t~ite80; [L811] -1 havoc main_#t~ite78; [L811] -1 havoc main_#t~ite79; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L812] -1 main_#t~ite83 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite83=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] -1 ~y$w_buff0_used~0 := main_#t~ite83; [L812] -1 havoc main_#t~ite81; [L812] -1 havoc main_#t~ite83; [L812] -1 havoc main_#t~ite82; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L813] -1 main_#t~ite86 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite86=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] -1 ~y$w_buff1_used~0 := main_#t~ite86; [L813] -1 havoc main_#t~ite85; [L813] -1 havoc main_#t~ite84; [L813] -1 havoc main_#t~ite86; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L814] -1 main_#t~ite89 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite89=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] -1 ~y$r_buff0_thd0~0 := main_#t~ite89; [L814] -1 havoc main_#t~ite87; [L814] -1 havoc main_#t~ite88; [L814] -1 havoc main_#t~ite89; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L815] -1 main_#t~ite92 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite92=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] -1 ~y$r_buff1_thd0~0 := main_#t~ite92; [L815] -1 havoc main_#t~ite91; [L815] -1 havoc main_#t~ite90; [L815] -1 havoc main_#t~ite92; [L816] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L817] -1 main_#t~ite93 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite93=2, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] -1 ~y~0 := main_#t~ite93; [L817] -1 havoc main_#t~ite93; [L818] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L820] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L820] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1595~0!base=6, main_~#t1595~0!offset=0, main_~#t1596~0!base=5, main_~#t1596~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L681] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L682] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L683] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call ~#t1595~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FCALL -1 call write~int(0, ~#t1595~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698-L725] 0 ~arg := #in~arg; [L701] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L702] 0 ~y$w_buff0~0 := 2; [L703] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L704] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc #t~nondet63; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] FCALL -1 call ~#t1596~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FCALL -1 call write~int(1, ~#t1596~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L706] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L707] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L708] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L709] 0 ~y$r_buff0_thd1~0 := 1; [L712] 0 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L726-L777] 1 ~arg := #in~arg; [L729] 1 ~x~0 := 2; [L732] 1 ~y~0 := 1; [L735] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10!base + #t~nondet10!offset then 0 else 1); [L735] 1 havoc #t~nondet10; [L736] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11!base + #t~nondet11!offset then 0 else 1); [L736] 1 havoc #t~nondet11; [L737] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L738] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L739] 1 #t~ite13 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] 1 ~y~0 := #t~ite13; [L739] 1 havoc #t~ite12; [L739] 1 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L740] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=2, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] 1 ~y$w_buff0~0 := #t~ite16; [L740] 1 havoc #t~ite15; [L740] 1 havoc #t~ite16; [L740] 1 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L715] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L741] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite19=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] 1 ~y$w_buff1~0 := #t~ite19; [L741] 1 havoc #t~ite17; [L741] 1 havoc #t~ite19; [L741] 1 havoc #t~ite18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L742] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite22=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] 1 ~y$w_buff0_used~0 := #t~ite22; [L742] 1 havoc #t~ite22; [L742] 1 havoc #t~ite21; [L742] 1 havoc #t~ite20; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L743] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] 1 ~y$w_buff1_used~0 := #t~ite25; [L743] 1 havoc #t~ite23; [L743] 1 havoc #t~ite25; [L743] 1 havoc #t~ite24; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L744] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L744] 1 havoc #t~ite27; [L744] 1 havoc #t~ite28; [L744] 1 havoc #t~ite26; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L745] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L745] 1 havoc #t~ite30; [L745] 1 havoc #t~ite29; [L745] 1 havoc #t~ite31; [L746] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L747] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] 1 ~y~0 := #t~ite32; [L747] 1 havoc #t~ite32; [L748] 1 ~y$flush_delayed~0 := 0; [L751] 1 ~weak$$choice0~0 := (if 0 == #t~nondet33!base + #t~nondet33!offset then 0 else 1); [L751] 1 havoc #t~nondet33; [L752] 1 ~weak$$choice2~0 := (if 0 == #t~nondet34!base + #t~nondet34!offset then 0 else 1); [L752] 1 havoc #t~nondet34; [L753] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L754] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L755] 1 #t~ite36 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 1 ~y~0 := #t~ite36; [L755] 1 havoc #t~ite36; [L755] 1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L756] 1 #t~ite39 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite39=2, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 1 ~y$w_buff0~0 := #t~ite39; [L756] 1 havoc #t~ite39; [L756] 1 havoc #t~ite38; [L756] 1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L757] 1 #t~ite42 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite42=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 1 ~y$w_buff1~0 := #t~ite42; [L757] 1 havoc #t~ite41; [L757] 1 havoc #t~ite42; [L757] 1 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L758] 1 #t~ite45 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite45=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 1 ~y$w_buff0_used~0 := #t~ite45; [L758] 1 havoc #t~ite43; [L758] 1 havoc #t~ite44; [L758] 1 havoc #t~ite45; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L759] 1 #t~ite48 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite48=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] 1 ~y$w_buff1_used~0 := #t~ite48; [L759] 1 havoc #t~ite46; [L759] 1 havoc #t~ite47; [L759] 1 havoc #t~ite48; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L760] 1 #t~ite51 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 1 ~y$r_buff0_thd2~0 := #t~ite51; [L760] 1 havoc #t~ite50; [L760] 1 havoc #t~ite49; [L760] 1 havoc #t~ite51; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L761] 1 #t~ite54 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite54=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] 1 ~y$r_buff1_thd2~0 := #t~ite54; [L761] 1 havoc #t~ite54; [L761] 1 havoc #t~ite53; [L761] 1 havoc #t~ite52; [L762] 1 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L763] 1 #t~ite55 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite55=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] 1 ~y~0 := #t~ite55; [L763] 1 havoc #t~ite55; [L764] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] COND FALSE 1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L767] 1 #t~ite56 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite56=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 #t~ite57 := #t~ite56; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite56=1, #t~ite57=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 ~y~0 := #t~ite57; [L767] 1 havoc #t~ite56; [L767] 1 havoc #t~ite57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L768] 1 #t~ite58 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite58=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 1 ~y$w_buff0_used~0 := #t~ite58; [L768] 1 havoc #t~ite58; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L769] 1 #t~ite59 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite59=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 1 ~y$w_buff1_used~0 := #t~ite59; [L769] 1 havoc #t~ite59; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L770] 1 #t~ite60 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite60=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] 1 ~y$r_buff0_thd2~0 := #t~ite60; [L770] 1 havoc #t~ite60; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L771] 1 #t~ite61 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite61=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] 1 ~y$r_buff1_thd2~0 := #t~ite61; [L771] 1 havoc #t~ite61; [L774] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] 0 ~y~0 := #t~ite4; [L715] 0 havoc #t~ite4; [L715] 0 havoc #t~ite3; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L716] 0 #t~ite5 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] 0 ~y$w_buff0_used~0 := #t~ite5; [L716] 0 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L717] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] 0 ~y$w_buff1_used~0 := #t~ite6; [L717] 0 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) [L718] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L718] 0 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L719] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L719] 0 havoc #t~ite8; [L722] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L792] -1 havoc #t~nondet64; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L798] -1 #t~ite65 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 #t~ite66 := #t~ite65; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 ~y~0 := #t~ite66; [L798] -1 havoc #t~ite65; [L798] -1 havoc #t~ite66; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L799] -1 #t~ite67 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] -1 ~y$w_buff0_used~0 := #t~ite67; [L799] -1 havoc #t~ite67; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L800] -1 #t~ite68 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] -1 ~y$w_buff1_used~0 := #t~ite68; [L800] -1 havoc #t~ite68; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L801] -1 #t~ite69 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] -1 ~y$r_buff0_thd0~0 := #t~ite69; [L801] -1 havoc #t~ite69; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L802] -1 #t~ite70 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] -1 ~y$r_buff1_thd0~0 := #t~ite70; [L802] -1 havoc #t~ite70; [L805] -1 ~weak$$choice0~0 := (if 0 == #t~nondet71!base + #t~nondet71!offset then 0 else 1); [L805] -1 havoc #t~nondet71; [L806] -1 ~weak$$choice2~0 := (if 0 == #t~nondet72!base + #t~nondet72!offset then 0 else 1); [L806] -1 havoc #t~nondet72; [L807] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L808] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L809] -1 #t~ite74 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] -1 ~y~0 := #t~ite74; [L809] -1 havoc #t~ite74; [L809] -1 havoc #t~ite73; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L810] -1 #t~ite77 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] -1 ~y$w_buff0~0 := #t~ite77; [L810] -1 havoc #t~ite77; [L810] -1 havoc #t~ite76; [L810] -1 havoc #t~ite75; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L811] -1 #t~ite80 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] -1 ~y$w_buff1~0 := #t~ite80; [L811] -1 havoc #t~ite80; [L811] -1 havoc #t~ite78; [L811] -1 havoc #t~ite79; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L812] -1 #t~ite83 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] -1 ~y$w_buff0_used~0 := #t~ite83; [L812] -1 havoc #t~ite81; [L812] -1 havoc #t~ite83; [L812] -1 havoc #t~ite82; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L813] -1 #t~ite86 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] -1 ~y$w_buff1_used~0 := #t~ite86; [L813] -1 havoc #t~ite85; [L813] -1 havoc #t~ite84; [L813] -1 havoc #t~ite86; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L814] -1 #t~ite89 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] -1 ~y$r_buff0_thd0~0 := #t~ite89; [L814] -1 havoc #t~ite87; [L814] -1 havoc #t~ite88; [L814] -1 havoc #t~ite89; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L815] -1 #t~ite92 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] -1 ~y$r_buff1_thd0~0 := #t~ite92; [L815] -1 havoc #t~ite91; [L815] -1 havoc #t~ite90; [L815] -1 havoc #t~ite92; [L816] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L817] -1 #t~ite93 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] -1 ~y~0 := #t~ite93; [L817] -1 havoc #t~ite93; [L818] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L681] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L682] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L683] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call ~#t1595~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FCALL -1 call write~int(0, ~#t1595~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698-L725] 0 ~arg := #in~arg; [L701] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L702] 0 ~y$w_buff0~0 := 2; [L703] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L704] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc #t~nondet63; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] FCALL -1 call ~#t1596~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FCALL -1 call write~int(1, ~#t1596~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L706] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L707] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L708] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L709] 0 ~y$r_buff0_thd1~0 := 1; [L712] 0 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L726-L777] 1 ~arg := #in~arg; [L729] 1 ~x~0 := 2; [L732] 1 ~y~0 := 1; [L735] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10!base + #t~nondet10!offset then 0 else 1); [L735] 1 havoc #t~nondet10; [L736] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11!base + #t~nondet11!offset then 0 else 1); [L736] 1 havoc #t~nondet11; [L737] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L738] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L739] 1 #t~ite13 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L739] 1 ~y~0 := #t~ite13; [L739] 1 havoc #t~ite12; [L739] 1 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L740] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=2, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L740] 1 ~y$w_buff0~0 := #t~ite16; [L740] 1 havoc #t~ite15; [L740] 1 havoc #t~ite16; [L740] 1 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L715] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L741] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite19=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L741] 1 ~y$w_buff1~0 := #t~ite19; [L741] 1 havoc #t~ite17; [L741] 1 havoc #t~ite19; [L741] 1 havoc #t~ite18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L742] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite22=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L742] 1 ~y$w_buff0_used~0 := #t~ite22; [L742] 1 havoc #t~ite22; [L742] 1 havoc #t~ite21; [L742] 1 havoc #t~ite20; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L743] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L743] 1 ~y$w_buff1_used~0 := #t~ite25; [L743] 1 havoc #t~ite23; [L743] 1 havoc #t~ite25; [L743] 1 havoc #t~ite24; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L744] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L744] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L744] 1 havoc #t~ite27; [L744] 1 havoc #t~ite28; [L744] 1 havoc #t~ite26; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L745] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L745] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L745] 1 havoc #t~ite30; [L745] 1 havoc #t~ite29; [L745] 1 havoc #t~ite31; [L746] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L747] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L747] 1 ~y~0 := #t~ite32; [L747] 1 havoc #t~ite32; [L748] 1 ~y$flush_delayed~0 := 0; [L751] 1 ~weak$$choice0~0 := (if 0 == #t~nondet33!base + #t~nondet33!offset then 0 else 1); [L751] 1 havoc #t~nondet33; [L752] 1 ~weak$$choice2~0 := (if 0 == #t~nondet34!base + #t~nondet34!offset then 0 else 1); [L752] 1 havoc #t~nondet34; [L753] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L754] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L755] 1 #t~ite36 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 1 ~y~0 := #t~ite36; [L755] 1 havoc #t~ite36; [L755] 1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L756] 1 #t~ite39 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite39=2, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 1 ~y$w_buff0~0 := #t~ite39; [L756] 1 havoc #t~ite39; [L756] 1 havoc #t~ite38; [L756] 1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L757] 1 #t~ite42 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite42=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 1 ~y$w_buff1~0 := #t~ite42; [L757] 1 havoc #t~ite41; [L757] 1 havoc #t~ite42; [L757] 1 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L758] 1 #t~ite45 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite45=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 1 ~y$w_buff0_used~0 := #t~ite45; [L758] 1 havoc #t~ite43; [L758] 1 havoc #t~ite44; [L758] 1 havoc #t~ite45; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L759] 1 #t~ite48 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite48=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L759] 1 ~y$w_buff1_used~0 := #t~ite48; [L759] 1 havoc #t~ite46; [L759] 1 havoc #t~ite47; [L759] 1 havoc #t~ite48; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L760] 1 #t~ite51 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 1 ~y$r_buff0_thd2~0 := #t~ite51; [L760] 1 havoc #t~ite50; [L760] 1 havoc #t~ite49; [L760] 1 havoc #t~ite51; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L761] 1 #t~ite54 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite54=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L761] 1 ~y$r_buff1_thd2~0 := #t~ite54; [L761] 1 havoc #t~ite54; [L761] 1 havoc #t~ite53; [L761] 1 havoc #t~ite52; [L762] 1 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L763] 1 #t~ite55 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite55=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L763] 1 ~y~0 := #t~ite55; [L763] 1 havoc #t~ite55; [L764] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] COND FALSE 1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L767] 1 #t~ite56 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite56=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 #t~ite57 := #t~ite56; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite56=1, #t~ite57=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L767] 1 ~y~0 := #t~ite57; [L767] 1 havoc #t~ite56; [L767] 1 havoc #t~ite57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L768] 1 #t~ite58 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite58=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 1 ~y$w_buff0_used~0 := #t~ite58; [L768] 1 havoc #t~ite58; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L769] 1 #t~ite59 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite59=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 1 ~y$w_buff1_used~0 := #t~ite59; [L769] 1 havoc #t~ite59; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L770] 1 #t~ite60 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite60=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L770] 1 ~y$r_buff0_thd2~0 := #t~ite60; [L770] 1 havoc #t~ite60; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L771] 1 #t~ite61 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite61=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L771] 1 ~y$r_buff1_thd2~0 := #t~ite61; [L771] 1 havoc #t~ite61; [L774] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L715] 0 ~y~0 := #t~ite4; [L715] 0 havoc #t~ite4; [L715] 0 havoc #t~ite3; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L716] 0 #t~ite5 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L716] 0 ~y$w_buff0_used~0 := #t~ite5; [L716] 0 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L717] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L717] 0 ~y$w_buff1_used~0 := #t~ite6; [L717] 0 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) [L718] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L718] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L718] 0 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L719] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L719] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L719] 0 havoc #t~ite8; [L722] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L792] -1 havoc #t~nondet64; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L798] -1 #t~ite65 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 #t~ite66 := #t~ite65; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L798] -1 ~y~0 := #t~ite66; [L798] -1 havoc #t~ite65; [L798] -1 havoc #t~ite66; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L799] -1 #t~ite67 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L799] -1 ~y$w_buff0_used~0 := #t~ite67; [L799] -1 havoc #t~ite67; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L800] -1 #t~ite68 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L800] -1 ~y$w_buff1_used~0 := #t~ite68; [L800] -1 havoc #t~ite68; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L801] -1 #t~ite69 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L801] -1 ~y$r_buff0_thd0~0 := #t~ite69; [L801] -1 havoc #t~ite69; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L802] -1 #t~ite70 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=1, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L802] -1 ~y$r_buff1_thd0~0 := #t~ite70; [L802] -1 havoc #t~ite70; [L805] -1 ~weak$$choice0~0 := (if 0 == #t~nondet71!base + #t~nondet71!offset then 0 else 1); [L805] -1 havoc #t~nondet71; [L806] -1 ~weak$$choice2~0 := (if 0 == #t~nondet72!base + #t~nondet72!offset then 0 else 1); [L806] -1 havoc #t~nondet72; [L807] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L808] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L809] -1 #t~ite74 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L809] -1 ~y~0 := #t~ite74; [L809] -1 havoc #t~ite74; [L809] -1 havoc #t~ite73; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L810] -1 #t~ite77 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L810] -1 ~y$w_buff0~0 := #t~ite77; [L810] -1 havoc #t~ite77; [L810] -1 havoc #t~ite76; [L810] -1 havoc #t~ite75; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L811] -1 #t~ite80 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L811] -1 ~y$w_buff1~0 := #t~ite80; [L811] -1 havoc #t~ite80; [L811] -1 havoc #t~ite78; [L811] -1 havoc #t~ite79; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L812] -1 #t~ite83 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L812] -1 ~y$w_buff0_used~0 := #t~ite83; [L812] -1 havoc #t~ite81; [L812] -1 havoc #t~ite83; [L812] -1 havoc #t~ite82; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L813] -1 #t~ite86 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L813] -1 ~y$w_buff1_used~0 := #t~ite86; [L813] -1 havoc #t~ite85; [L813] -1 havoc #t~ite84; [L813] -1 havoc #t~ite86; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L814] -1 #t~ite89 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L814] -1 ~y$r_buff0_thd0~0 := #t~ite89; [L814] -1 havoc #t~ite87; [L814] -1 havoc #t~ite88; [L814] -1 havoc #t~ite89; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L815] -1 #t~ite92 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L815] -1 ~y$r_buff1_thd0~0 := #t~ite92; [L815] -1 havoc #t~ite91; [L815] -1 havoc #t~ite90; [L815] -1 havoc #t~ite92; [L816] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L817] -1 #t~ite93 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L817] -1 ~y~0 := #t~ite93; [L817] -1 havoc #t~ite93; [L818] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2] [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L675] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L676] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L677] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L679] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L681] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L682] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L683] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L684] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L685] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L686] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L687] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L688] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L689] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L690] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L691] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L692] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L693] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L694] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L695] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L696] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L697] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] -1 pthread_t t1595; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L790] FCALL, FORK -1 pthread_create(&t1595, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L701] 0 y$w_buff1 = y$w_buff0 [L702] 0 y$w_buff0 = 2 [L703] 0 y$w_buff1_used = y$w_buff0_used [L704] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L791] -1 pthread_t t1596; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L792] FCALL, FORK -1 pthread_create(&t1596, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L706] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L707] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L708] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L709] 0 y$r_buff0_thd1 = (_Bool)1 [L712] 0 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L729] 1 x = 2 [L732] 1 y = 1 [L735] 1 weak$$choice0 = __VERIFIER_nondet_pointer() [L736] 1 weak$$choice2 = __VERIFIER_nondet_pointer() [L737] 1 y$flush_delayed = weak$$choice2 [L738] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L739] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=1, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L739] 1 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L740] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0))=2, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L715] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L741] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1))=0, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L741] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L742] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used))=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L742] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L743] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L743] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L744] EXPR 1 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2))=0, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L744] 1 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L745] EXPR 1 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L745] 1 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L746] 1 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L747] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L747] 1 y = y$flush_delayed ? y$mem_tmp : y [L748] 1 y$flush_delayed = (_Bool)0 [L751] 1 weak$$choice0 = __VERIFIER_nondet_pointer() [L752] 1 weak$$choice2 = __VERIFIER_nondet_pointer() [L753] 1 y$flush_delayed = weak$$choice2 [L754] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L755] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=1, __unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L755] 1 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L756] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0))=2, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L756] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L757] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1))=0, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L758] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used))=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L758] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L759] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L759] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L760] EXPR 1 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2))=0, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L760] 1 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L761] EXPR 1 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L761] 1 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L762] 1 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L763] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L763] 1 y = y$flush_delayed ? y$mem_tmp : y [L764] 1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L767] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L767] EXPR 1 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1] [L767] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1] [L767] 1 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L768] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L768] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L769] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L769] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L770] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L770] 1 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L771] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L771] 1 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L774] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L715] 0 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L716] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L716] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L717] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L718] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] 0 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L719] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L719] 0 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L722] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L794] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L799] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L800] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L800] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L801] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L802] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L805] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L806] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L807] -1 y$flush_delayed = weak$$choice2 [L808] -1 y$mem_tmp = y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L809] EXPR -1 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L809] -1 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L810] EXPR -1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L810] -1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L811] EXPR -1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L811] -1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L812] EXPR -1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L812] -1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L813] EXPR -1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L813] -1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L814] EXPR -1 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L814] -1 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L815] EXPR -1 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L815] -1 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L816] -1 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L817] EXPR -1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L817] -1 y = y$flush_delayed ? y$mem_tmp : y [L818] -1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] ----- [2018-11-23 14:27:27,483 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_e2633187-03a1-4b61-8284-49107f98d7de/bin-2019/utaipan/witness.graphml [2018-11-23 14:27:27,483 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 14:27:27,491 INFO L168 Benchmark]: Toolchain (without parser) took 109081.71 ms. Allocated memory was 1.0 GB in the beginning and 6.1 GB in the end (delta: 5.1 GB). Free memory was 950.0 MB in the beginning and 3.4 GB in the end (delta: -2.4 GB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. [2018-11-23 14:27:27,492 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 980.1 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 14:27:27,493 INFO L168 Benchmark]: CACSL2BoogieTranslator took 456.64 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 173.0 MB). Free memory was 950.0 MB in the beginning and 1.1 GB in the end (delta: -195.9 MB). Peak memory consumption was 41.6 MB. Max. memory is 11.5 GB. [2018-11-23 14:27:27,493 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.15 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 14:27:27,493 INFO L168 Benchmark]: Boogie Preprocessor took 33.25 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2018-11-23 14:27:27,493 INFO L168 Benchmark]: RCFGBuilder took 750.71 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 71.6 MB). Peak memory consumption was 71.6 MB. Max. memory is 11.5 GB. [2018-11-23 14:27:27,493 INFO L168 Benchmark]: TraceAbstraction took 98694.87 ms. Allocated memory was 1.2 GB in the beginning and 6.1 GB in the end (delta: 4.9 GB). Free memory was 1.1 GB in the beginning and 3.6 GB in the end (delta: -2.5 GB). Peak memory consumption was 2.4 GB. Max. memory is 11.5 GB. [2018-11-23 14:27:27,494 INFO L168 Benchmark]: Witness Printer took 9103.82 ms. Allocated memory is still 6.1 GB. Free memory was 3.6 GB in the beginning and 3.4 GB in the end (delta: 201.8 MB). Peak memory consumption was 201.8 MB. Max. memory is 11.5 GB. [2018-11-23 14:27:27,495 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 980.1 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 456.64 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 173.0 MB). Free memory was 950.0 MB in the beginning and 1.1 GB in the end (delta: -195.9 MB). Peak memory consumption was 41.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.15 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 33.25 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 750.71 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 71.6 MB). Peak memory consumption was 71.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 98694.87 ms. Allocated memory was 1.2 GB in the beginning and 6.1 GB in the end (delta: 4.9 GB). Free memory was 1.1 GB in the beginning and 3.6 GB in the end (delta: -2.5 GB). Peak memory consumption was 2.4 GB. Max. memory is 11.5 GB. * Witness Printer took 9103.82 ms. Allocated memory is still 6.1 GB. Free memory was 3.6 GB in the beginning and 3.4 GB in the end (delta: 201.8 MB). Peak memory consumption was 201.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L675] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L676] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L677] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L679] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L681] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L682] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L683] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L684] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L685] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L686] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L687] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L688] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L689] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L690] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L691] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L692] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L693] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L694] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L695] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L696] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L697] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] -1 pthread_t t1595; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L790] FCALL, FORK -1 pthread_create(&t1595, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L701] 0 y$w_buff1 = y$w_buff0 [L702] 0 y$w_buff0 = 2 [L703] 0 y$w_buff1_used = y$w_buff0_used [L704] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L791] -1 pthread_t t1596; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L792] FCALL, FORK -1 pthread_create(&t1596, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L706] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L707] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L708] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L709] 0 y$r_buff0_thd1 = (_Bool)1 [L712] 0 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L729] 1 x = 2 [L732] 1 y = 1 [L735] 1 weak$$choice0 = __VERIFIER_nondet_pointer() [L736] 1 weak$$choice2 = __VERIFIER_nondet_pointer() [L737] 1 y$flush_delayed = weak$$choice2 [L738] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L739] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=1, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L739] 1 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L740] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0))=2, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L715] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L741] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1))=0, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L741] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L742] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used))=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L742] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L743] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L743] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L744] EXPR 1 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2))=0, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L744] 1 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L745] EXPR 1 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L745] 1 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L746] 1 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L747] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L747] 1 y = y$flush_delayed ? y$mem_tmp : y [L748] 1 y$flush_delayed = (_Bool)0 [L751] 1 weak$$choice0 = __VERIFIER_nondet_pointer() [L752] 1 weak$$choice2 = __VERIFIER_nondet_pointer() [L753] 1 y$flush_delayed = weak$$choice2 [L754] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L755] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=1, __unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L755] 1 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L756] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0))=2, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L756] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L757] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1))=0, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L758] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used))=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L758] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L759] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L759] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L760] EXPR 1 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2))=0, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L760] 1 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L761] EXPR 1 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L761] 1 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L762] 1 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L763] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=1, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L763] 1 y = y$flush_delayed ? y$mem_tmp : y [L764] 1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L767] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L767] EXPR 1 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1] [L767] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1] [L767] 1 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L768] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L768] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L769] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L769] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L770] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L770] 1 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L771] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L771] 1 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L774] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L715] 0 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L716] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L716] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L717] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L718] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] 0 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L719] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L719] 0 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L722] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L794] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L799] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L800] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L800] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L801] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L802] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=1, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L805] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L806] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L807] -1 y$flush_delayed = weak$$choice2 [L808] -1 y$mem_tmp = y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L809] EXPR -1 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L809] -1 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L810] EXPR -1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L810] -1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L811] EXPR -1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L811] -1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L812] EXPR -1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L812] -1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L813] EXPR -1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L813] -1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L814] EXPR -1 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L814] -1 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L815] EXPR -1 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L815] -1 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L816] -1 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L817] EXPR -1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L817] -1 y = y$flush_delayed ? y$mem_tmp : y [L818] -1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 348 locations, 3 error locations. UNSAFE Result, 98.5s OverallTime, 39 OverallIterations, 1 TraceHistogramMax, 34.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 22493 SDtfs, 23055 SDslu, 68349 SDs, 0 SdLazy, 28111 SolverSat, 1035 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 12.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 556 GetRequests, 126 SyntacticMatches, 29 SemanticMatches, 401 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1351 ImplicationChecksByTransitivity, 3.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=204343occurred in iteration=18, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 42.2s AutomataMinimizationTime, 38 MinimizatonAttempts, 529726 StatesRemovedByMinimization, 36 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.4s InterpolantComputationTime, 3593 NumberOfCodeBlocks, 3593 NumberOfCodeBlocksAsserted, 39 NumberOfCheckSat, 3428 ConstructedInterpolants, 0 QuantifiedInterpolants, 810820 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 38 InterpolantComputations, 38 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...