./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/rfi010_rmo.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_36442646-b783-40cc-b437-83134e5fc7f7/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_36442646-b783-40cc-b437-83134e5fc7f7/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_36442646-b783-40cc-b437-83134e5fc7f7/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_36442646-b783-40cc-b437-83134e5fc7f7/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/rfi010_rmo.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_36442646-b783-40cc-b437-83134e5fc7f7/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_36442646-b783-40cc-b437-83134e5fc7f7/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 52118bf3184596c6a4ad46bcd92c6308216254cb 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 04:05:42,279 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 04:05:42,280 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 04:05:42,288 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 04:05:42,288 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 04:05:42,289 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 04:05:42,290 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 04:05:42,290 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 04:05:42,291 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 04:05:42,292 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 04:05:42,292 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 04:05:42,292 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 04:05:42,293 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 04:05:42,293 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 04:05:42,294 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 04:05:42,294 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 04:05:42,295 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 04:05:42,295 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 04:05:42,296 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 04:05:42,297 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 04:05:42,298 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 04:05:42,298 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 04:05:42,299 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 04:05:42,300 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 04:05:42,300 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 04:05:42,300 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 04:05:42,301 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 04:05:42,301 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 04:05:42,302 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 04:05:42,302 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 04:05:42,303 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 04:05:42,303 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 04:05:42,303 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 04:05:42,303 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 04:05:42,304 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 04:05:42,304 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 04:05:42,304 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_36442646-b783-40cc-b437-83134e5fc7f7/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-11-23 04:05:42,312 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 04:05:42,312 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 04:05:42,313 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 04:05:42,313 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 04:05:42,313 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-23 04:05:42,313 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-23 04:05:42,313 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-23 04:05:42,313 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-23 04:05:42,314 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-23 04:05:42,314 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-23 04:05:42,314 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-23 04:05:42,314 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-23 04:05:42,314 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-23 04:05:42,315 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 04:05:42,315 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 04:05:42,315 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 04:05:42,315 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 04:05:42,315 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 04:05:42,315 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 04:05:42,316 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 04:05:42,316 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 04:05:42,316 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 04:05:42,316 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 04:05:42,316 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 04:05:42,316 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 04:05:42,317 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 04:05:42,317 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 04:05:42,317 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 04:05:42,317 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 04:05:42,317 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 04:05:42,317 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 04:05:42,317 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 04:05:42,318 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 04:05:42,318 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-23 04:05:42,318 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 04:05:42,318 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 04:05:42,318 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 04:05:42,318 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_36442646-b783-40cc-b437-83134e5fc7f7/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 52118bf3184596c6a4ad46bcd92c6308216254cb [2018-11-23 04:05:42,340 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 04:05:42,349 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 04:05:42,352 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 04:05:42,353 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 04:05:42,353 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 04:05:42,354 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_36442646-b783-40cc-b437-83134e5fc7f7/bin-2019/utaipan/../../sv-benchmarks/c/pthread-wmm/rfi010_rmo.opt_false-unreach-call.i [2018-11-23 04:05:42,399 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_36442646-b783-40cc-b437-83134e5fc7f7/bin-2019/utaipan/data/2bc278e40/7d43a29585424f158381811f241b9478/FLAG18b58b135 [2018-11-23 04:05:42,770 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 04:05:42,771 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_36442646-b783-40cc-b437-83134e5fc7f7/sv-benchmarks/c/pthread-wmm/rfi010_rmo.opt_false-unreach-call.i [2018-11-23 04:05:42,781 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_36442646-b783-40cc-b437-83134e5fc7f7/bin-2019/utaipan/data/2bc278e40/7d43a29585424f158381811f241b9478/FLAG18b58b135 [2018-11-23 04:05:42,791 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_36442646-b783-40cc-b437-83134e5fc7f7/bin-2019/utaipan/data/2bc278e40/7d43a29585424f158381811f241b9478 [2018-11-23 04:05:42,793 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 04:05:42,793 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 04:05:42,794 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 04:05:42,794 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 04:05:42,797 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 04:05:42,798 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 04:05:42" (1/1) ... [2018-11-23 04:05:42,799 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7befe0c1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:05:42, skipping insertion in model container [2018-11-23 04:05:42,800 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 04:05:42" (1/1) ... [2018-11-23 04:05:42,806 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 04:05:42,838 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 04:05:43,080 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 04:05:43,090 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 04:05:43,200 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 04:05:43,246 INFO L195 MainTranslator]: Completed translation [2018-11-23 04:05:43,246 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:05:43 WrapperNode [2018-11-23 04:05:43,246 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 04:05:43,247 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 04:05:43,247 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 04:05:43,247 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 04:05:43,254 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:05:43" (1/1) ... [2018-11-23 04:05:43,268 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:05:43" (1/1) ... [2018-11-23 04:05:43,291 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 04:05:43,291 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 04:05:43,291 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 04:05:43,291 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 04:05:43,299 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:05:43" (1/1) ... [2018-11-23 04:05:43,299 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:05:43" (1/1) ... [2018-11-23 04:05:43,303 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:05:43" (1/1) ... [2018-11-23 04:05:43,303 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:05:43" (1/1) ... [2018-11-23 04:05:43,310 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:05:43" (1/1) ... [2018-11-23 04:05:43,314 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:05:43" (1/1) ... [2018-11-23 04:05:43,316 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:05:43" (1/1) ... [2018-11-23 04:05:43,319 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 04:05:43,320 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 04:05:43,320 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 04:05:43,320 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 04:05:43,321 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:05:43" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36442646-b783-40cc-b437-83134e5fc7f7/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 04:05:43,368 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 04:05:43,368 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-23 04:05:43,368 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-23 04:05:43,368 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 04:05:43,368 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-23 04:05:43,368 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-23 04:05:43,368 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-23 04:05:43,369 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-23 04:05:43,369 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-23 04:05:43,369 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 04:05:43,369 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 04:05:43,370 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-23 04:05:43,838 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 04:05:43,838 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-23 04:05:43,838 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 04:05:43 BoogieIcfgContainer [2018-11-23 04:05:43,839 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 04:05:43,839 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 04:05:43,839 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 04:05:43,841 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 04:05:43,841 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 04:05:42" (1/3) ... [2018-11-23 04:05:43,842 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6bfdeea5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 04:05:43, skipping insertion in model container [2018-11-23 04:05:43,842 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:05:43" (2/3) ... [2018-11-23 04:05:43,842 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6bfdeea5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 04:05:43, skipping insertion in model container [2018-11-23 04:05:43,842 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 04:05:43" (3/3) ... [2018-11-23 04:05:43,843 INFO L112 eAbstractionObserver]: Analyzing ICFG rfi010_rmo.opt_false-unreach-call.i [2018-11-23 04:05:43,873 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,873 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,873 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,873 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,874 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,874 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,874 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,874 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,874 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,875 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,875 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,875 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,875 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,875 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,875 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,875 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,876 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,876 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,876 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,876 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,876 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,876 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,878 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,878 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,878 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,878 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,878 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,879 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,879 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,879 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,879 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,879 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,879 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,879 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,879 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,880 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,880 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,880 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,880 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,880 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,880 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,880 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,881 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,881 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,881 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,881 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,881 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,881 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,881 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,882 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,882 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,882 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,882 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,882 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,882 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,882 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,883 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,883 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,883 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,883 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,883 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,883 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,883 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,883 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,884 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,884 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,884 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,884 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,884 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,884 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,885 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,885 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,885 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,885 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,885 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,886 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,886 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,886 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,886 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,886 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,886 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,886 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,887 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,887 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,887 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,887 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,887 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,887 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,887 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,888 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,888 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,888 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,888 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet26.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,888 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet26.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,888 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,888 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,888 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet26.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,889 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet26.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,889 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,889 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,889 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,890 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,890 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,890 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,890 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,890 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,890 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,890 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,890 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,891 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,891 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,891 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,891 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,891 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,892 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,893 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,893 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,893 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,893 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,893 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,893 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,893 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,893 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,894 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,894 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,894 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,894 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,894 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,894 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,895 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,895 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,895 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,895 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,895 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,895 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,895 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,895 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,896 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,896 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,896 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,896 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,896 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,896 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,896 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,897 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,897 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,897 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,897 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,897 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,897 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,898 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,898 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,898 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,898 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,898 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,898 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,898 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,899 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,899 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,899 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,899 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,899 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,899 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,899 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,900 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,900 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,900 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,900 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,900 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,900 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,900 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,900 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,901 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,901 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,901 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,901 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,901 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,902 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,902 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,902 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,902 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,902 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,902 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,902 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,903 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,903 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,903 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,903 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,903 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,903 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,904 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,904 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,904 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,904 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,905 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,905 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,905 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,905 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,905 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,906 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,906 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,906 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,906 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,906 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,906 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,907 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,907 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,907 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,907 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,907 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,907 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,908 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,908 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,908 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,908 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,908 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,908 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,909 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,909 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet56.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,909 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet56.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,909 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,909 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,909 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet56.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,909 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet56.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 04:05:43,924 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-23 04:05:43,924 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 04:05:43,930 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-23 04:05:43,942 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-23 04:05:43,961 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 04:05:43,961 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 04:05:43,961 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 04:05:43,961 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 04:05:43,961 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 04:05:43,961 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 04:05:43,961 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 04:05:43,961 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 04:05:43,969 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 173places, 226 transitions [2018-11-23 04:05:49,666 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 83127 states. [2018-11-23 04:05:49,667 INFO L276 IsEmpty]: Start isEmpty. Operand 83127 states. [2018-11-23 04:05:49,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-23 04:05:49,673 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:05:49,673 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:05:49,675 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:05:49,678 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:05:49,678 INFO L82 PathProgramCache]: Analyzing trace with hash -1645016021, now seen corresponding path program 1 times [2018-11-23 04:05:49,679 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:05:49,714 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:05:49,714 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:05:49,714 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:05:49,714 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:05:49,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:05:49,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:05:49,842 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:05:49,842 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 04:05:49,842 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:05:49,845 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 04:05:49,853 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 04:05:49,853 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 04:05:49,855 INFO L87 Difference]: Start difference. First operand 83127 states. Second operand 4 states. [2018-11-23 04:05:51,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:05:51,326 INFO L93 Difference]: Finished difference Result 150583 states and 603160 transitions. [2018-11-23 04:05:51,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 04:05:51,327 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2018-11-23 04:05:51,328 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:05:51,803 INFO L225 Difference]: With dead ends: 150583 [2018-11-23 04:05:51,803 INFO L226 Difference]: Without dead ends: 105839 [2018-11-23 04:05:51,804 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 04:05:52,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105839 states. [2018-11-23 04:05:54,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105839 to 61235. [2018-11-23 04:05:54,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61235 states. [2018-11-23 04:05:54,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61235 states to 61235 states and 248290 transitions. [2018-11-23 04:05:54,216 INFO L78 Accepts]: Start accepts. Automaton has 61235 states and 248290 transitions. Word has length 38 [2018-11-23 04:05:54,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:05:54,217 INFO L480 AbstractCegarLoop]: Abstraction has 61235 states and 248290 transitions. [2018-11-23 04:05:54,217 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 04:05:54,217 INFO L276 IsEmpty]: Start isEmpty. Operand 61235 states and 248290 transitions. [2018-11-23 04:05:54,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-23 04:05:54,224 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:05:54,224 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:05:54,224 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:05:54,225 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:05:54,225 INFO L82 PathProgramCache]: Analyzing trace with hash 1043746306, now seen corresponding path program 1 times [2018-11-23 04:05:54,225 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:05:54,227 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:05:54,227 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:05:54,228 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:05:54,228 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:05:54,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:05:54,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:05:54,291 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:05:54,291 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 04:05:54,291 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:05:54,292 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 04:05:54,292 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 04:05:54,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 04:05:54,293 INFO L87 Difference]: Start difference. First operand 61235 states and 248290 transitions. Second operand 5 states. [2018-11-23 04:05:55,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:05:55,541 INFO L93 Difference]: Finished difference Result 146039 states and 554300 transitions. [2018-11-23 04:05:55,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 04:05:55,542 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2018-11-23 04:05:55,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:05:55,867 INFO L225 Difference]: With dead ends: 146039 [2018-11-23 04:05:55,868 INFO L226 Difference]: Without dead ends: 145471 [2018-11-23 04:05:55,868 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-23 04:05:56,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145471 states. [2018-11-23 04:06:00,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145471 to 96613. [2018-11-23 04:06:00,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96613 states. [2018-11-23 04:06:00,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96613 states to 96613 states and 368455 transitions. [2018-11-23 04:06:00,695 INFO L78 Accepts]: Start accepts. Automaton has 96613 states and 368455 transitions. Word has length 46 [2018-11-23 04:06:00,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:00,696 INFO L480 AbstractCegarLoop]: Abstraction has 96613 states and 368455 transitions. [2018-11-23 04:06:00,696 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 04:06:00,696 INFO L276 IsEmpty]: Start isEmpty. Operand 96613 states and 368455 transitions. [2018-11-23 04:06:00,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-23 04:06:00,701 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:00,701 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:00,701 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:00,701 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:00,701 INFO L82 PathProgramCache]: Analyzing trace with hash 136646938, now seen corresponding path program 1 times [2018-11-23 04:06:00,702 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:00,704 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:00,705 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:00,705 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:00,705 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:00,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:00,759 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:00,759 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:00,760 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 04:06:00,760 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:00,760 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 04:06:00,760 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 04:06:00,760 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 04:06:00,762 INFO L87 Difference]: Start difference. First operand 96613 states and 368455 transitions. Second operand 5 states. [2018-11-23 04:06:02,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:02,117 INFO L93 Difference]: Finished difference Result 199269 states and 748089 transitions. [2018-11-23 04:06:02,117 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 04:06:02,117 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 47 [2018-11-23 04:06:02,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:02,508 INFO L225 Difference]: With dead ends: 199269 [2018-11-23 04:06:02,508 INFO L226 Difference]: Without dead ends: 198805 [2018-11-23 04:06:02,508 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-23 04:06:03,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198805 states. [2018-11-23 04:06:05,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198805 to 108296. [2018-11-23 04:06:05,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108296 states. [2018-11-23 04:06:05,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108296 states to 108296 states and 408659 transitions. [2018-11-23 04:06:05,704 INFO L78 Accepts]: Start accepts. Automaton has 108296 states and 408659 transitions. Word has length 47 [2018-11-23 04:06:05,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:05,704 INFO L480 AbstractCegarLoop]: Abstraction has 108296 states and 408659 transitions. [2018-11-23 04:06:05,705 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 04:06:05,705 INFO L276 IsEmpty]: Start isEmpty. Operand 108296 states and 408659 transitions. [2018-11-23 04:06:05,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 04:06:05,713 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:05,713 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:05,714 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:05,714 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:05,714 INFO L82 PathProgramCache]: Analyzing trace with hash -943699264, now seen corresponding path program 1 times [2018-11-23 04:06:05,714 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:05,718 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:05,718 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:05,718 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:05,718 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:05,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:05,763 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:05,763 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:05,763 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 04:06:05,763 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:05,764 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 04:06:05,764 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 04:06:05,764 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 04:06:05,764 INFO L87 Difference]: Start difference. First operand 108296 states and 408659 transitions. Second operand 3 states. [2018-11-23 04:06:06,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:06,422 INFO L93 Difference]: Finished difference Result 179115 states and 655174 transitions. [2018-11-23 04:06:06,422 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 04:06:06,422 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2018-11-23 04:06:06,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:06,773 INFO L225 Difference]: With dead ends: 179115 [2018-11-23 04:06:06,773 INFO L226 Difference]: Without dead ends: 179115 [2018-11-23 04:06:06,773 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 04:06:10,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179115 states. [2018-11-23 04:06:12,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179115 to 163646. [2018-11-23 04:06:12,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163646 states. [2018-11-23 04:06:12,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163646 states to 163646 states and 603625 transitions. [2018-11-23 04:06:12,610 INFO L78 Accepts]: Start accepts. Automaton has 163646 states and 603625 transitions. Word has length 49 [2018-11-23 04:06:12,610 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:12,610 INFO L480 AbstractCegarLoop]: Abstraction has 163646 states and 603625 transitions. [2018-11-23 04:06:12,610 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 04:06:12,610 INFO L276 IsEmpty]: Start isEmpty. Operand 163646 states and 603625 transitions. [2018-11-23 04:06:12,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-23 04:06:12,625 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:12,625 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:12,625 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:12,625 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:12,625 INFO L82 PathProgramCache]: Analyzing trace with hash -721809298, now seen corresponding path program 1 times [2018-11-23 04:06:12,625 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:12,626 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:12,626 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:12,626 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:12,627 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:12,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:12,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:12,722 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:12,722 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 04:06:12,722 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:12,722 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 04:06:12,722 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 04:06:12,722 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-23 04:06:12,723 INFO L87 Difference]: Start difference. First operand 163646 states and 603625 transitions. Second operand 6 states. [2018-11-23 04:06:14,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:14,360 INFO L93 Difference]: Finished difference Result 214598 states and 788311 transitions. [2018-11-23 04:06:14,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 04:06:14,360 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2018-11-23 04:06:14,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:14,814 INFO L225 Difference]: With dead ends: 214598 [2018-11-23 04:06:14,814 INFO L226 Difference]: Without dead ends: 214598 [2018-11-23 04:06:14,814 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-23 04:06:16,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214598 states. [2018-11-23 04:06:18,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214598 to 200128. [2018-11-23 04:06:18,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200128 states. [2018-11-23 04:06:19,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200128 states to 200128 states and 735197 transitions. [2018-11-23 04:06:19,342 INFO L78 Accepts]: Start accepts. Automaton has 200128 states and 735197 transitions. Word has length 53 [2018-11-23 04:06:19,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:19,343 INFO L480 AbstractCegarLoop]: Abstraction has 200128 states and 735197 transitions. [2018-11-23 04:06:19,343 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 04:06:19,343 INFO L276 IsEmpty]: Start isEmpty. Operand 200128 states and 735197 transitions. [2018-11-23 04:06:19,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-23 04:06:19,361 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:19,361 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:19,361 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:19,361 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:19,362 INFO L82 PathProgramCache]: Analyzing trace with hash 1776206639, now seen corresponding path program 1 times [2018-11-23 04:06:19,362 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:19,364 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:19,364 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:19,364 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:19,364 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:19,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:19,440 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:19,441 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:19,441 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 04:06:19,441 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:19,441 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 04:06:19,441 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 04:06:19,441 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-23 04:06:19,442 INFO L87 Difference]: Start difference. First operand 200128 states and 735197 transitions. Second operand 7 states. [2018-11-23 04:06:21,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:21,070 INFO L93 Difference]: Finished difference Result 283834 states and 1009167 transitions. [2018-11-23 04:06:21,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 04:06:21,071 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 53 [2018-11-23 04:06:21,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:21,628 INFO L225 Difference]: With dead ends: 283834 [2018-11-23 04:06:21,628 INFO L226 Difference]: Without dead ends: 283834 [2018-11-23 04:06:21,629 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-11-23 04:06:27,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 283834 states. [2018-11-23 04:06:29,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 283834 to 228356. [2018-11-23 04:06:29,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228356 states. [2018-11-23 04:06:30,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228356 states to 228356 states and 826700 transitions. [2018-11-23 04:06:30,202 INFO L78 Accepts]: Start accepts. Automaton has 228356 states and 826700 transitions. Word has length 53 [2018-11-23 04:06:30,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:30,203 INFO L480 AbstractCegarLoop]: Abstraction has 228356 states and 826700 transitions. [2018-11-23 04:06:30,203 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 04:06:30,203 INFO L276 IsEmpty]: Start isEmpty. Operand 228356 states and 826700 transitions. [2018-11-23 04:06:30,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-23 04:06:30,219 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:30,219 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:30,219 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:30,219 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:30,220 INFO L82 PathProgramCache]: Analyzing trace with hash -1631256976, now seen corresponding path program 1 times [2018-11-23 04:06:30,220 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:30,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:30,221 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:30,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:30,221 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:30,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:30,254 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:30,254 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:30,255 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 04:06:30,255 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:30,255 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 04:06:30,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 04:06:30,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 04:06:30,255 INFO L87 Difference]: Start difference. First operand 228356 states and 826700 transitions. Second operand 4 states. [2018-11-23 04:06:30,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:30,387 INFO L93 Difference]: Finished difference Result 38827 states and 123113 transitions. [2018-11-23 04:06:30,388 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 04:06:30,388 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 53 [2018-11-23 04:06:30,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:30,430 INFO L225 Difference]: With dead ends: 38827 [2018-11-23 04:06:30,431 INFO L226 Difference]: Without dead ends: 32376 [2018-11-23 04:06:30,431 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 04:06:30,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32376 states. [2018-11-23 04:06:30,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32376 to 32135. [2018-11-23 04:06:30,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32135 states. [2018-11-23 04:06:30,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32135 states to 32135 states and 100387 transitions. [2018-11-23 04:06:30,762 INFO L78 Accepts]: Start accepts. Automaton has 32135 states and 100387 transitions. Word has length 53 [2018-11-23 04:06:30,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:30,762 INFO L480 AbstractCegarLoop]: Abstraction has 32135 states and 100387 transitions. [2018-11-23 04:06:30,762 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 04:06:30,762 INFO L276 IsEmpty]: Start isEmpty. Operand 32135 states and 100387 transitions. [2018-11-23 04:06:30,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-23 04:06:30,764 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:30,764 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:30,764 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:30,765 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:30,765 INFO L82 PathProgramCache]: Analyzing trace with hash -1658594805, now seen corresponding path program 1 times [2018-11-23 04:06:30,765 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:30,766 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:30,766 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:30,766 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:30,766 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:30,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:30,821 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:30,821 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:30,821 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 04:06:30,821 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:30,822 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 04:06:30,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 04:06:30,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 04:06:30,822 INFO L87 Difference]: Start difference. First operand 32135 states and 100387 transitions. Second operand 6 states. [2018-11-23 04:06:31,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:31,797 INFO L93 Difference]: Finished difference Result 42537 states and 131570 transitions. [2018-11-23 04:06:31,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-23 04:06:31,797 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2018-11-23 04:06:31,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:31,850 INFO L225 Difference]: With dead ends: 42537 [2018-11-23 04:06:31,850 INFO L226 Difference]: Without dead ends: 42440 [2018-11-23 04:06:31,850 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-11-23 04:06:31,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42440 states. [2018-11-23 04:06:32,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42440 to 31836. [2018-11-23 04:06:32,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31836 states. [2018-11-23 04:06:32,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31836 states to 31836 states and 99515 transitions. [2018-11-23 04:06:32,254 INFO L78 Accepts]: Start accepts. Automaton has 31836 states and 99515 transitions. Word has length 53 [2018-11-23 04:06:32,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:32,254 INFO L480 AbstractCegarLoop]: Abstraction has 31836 states and 99515 transitions. [2018-11-23 04:06:32,254 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 04:06:32,254 INFO L276 IsEmpty]: Start isEmpty. Operand 31836 states and 99515 transitions. [2018-11-23 04:06:32,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-11-23 04:06:32,259 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:32,259 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:32,259 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:32,259 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:32,259 INFO L82 PathProgramCache]: Analyzing trace with hash 228917533, now seen corresponding path program 1 times [2018-11-23 04:06:32,260 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:32,261 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:32,261 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:32,261 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:32,261 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:32,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:32,313 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:32,313 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:32,313 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 04:06:32,313 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:32,314 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 04:06:32,314 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 04:06:32,314 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 04:06:32,314 INFO L87 Difference]: Start difference. First operand 31836 states and 99515 transitions. Second operand 4 states. [2018-11-23 04:06:32,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:32,532 INFO L93 Difference]: Finished difference Result 41208 states and 129949 transitions. [2018-11-23 04:06:32,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 04:06:32,532 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 63 [2018-11-23 04:06:32,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:32,588 INFO L225 Difference]: With dead ends: 41208 [2018-11-23 04:06:32,588 INFO L226 Difference]: Without dead ends: 41208 [2018-11-23 04:06:32,588 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 04:06:32,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41208 states. [2018-11-23 04:06:32,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41208 to 35932. [2018-11-23 04:06:32,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35932 states. [2018-11-23 04:06:32,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35932 states to 35932 states and 112644 transitions. [2018-11-23 04:06:32,998 INFO L78 Accepts]: Start accepts. Automaton has 35932 states and 112644 transitions. Word has length 63 [2018-11-23 04:06:32,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:32,999 INFO L480 AbstractCegarLoop]: Abstraction has 35932 states and 112644 transitions. [2018-11-23 04:06:32,999 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 04:06:32,999 INFO L276 IsEmpty]: Start isEmpty. Operand 35932 states and 112644 transitions. [2018-11-23 04:06:33,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-11-23 04:06:33,004 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:33,004 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:33,004 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:33,004 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:33,004 INFO L82 PathProgramCache]: Analyzing trace with hash 1971727868, now seen corresponding path program 1 times [2018-11-23 04:06:33,004 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:33,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:33,005 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:33,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:33,006 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:33,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:33,073 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:33,073 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:33,073 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 04:06:33,073 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:33,074 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 04:06:33,074 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 04:06:33,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 04:06:33,074 INFO L87 Difference]: Start difference. First operand 35932 states and 112644 transitions. Second operand 6 states. [2018-11-23 04:06:33,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:33,606 INFO L93 Difference]: Finished difference Result 72509 states and 225560 transitions. [2018-11-23 04:06:33,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 04:06:33,606 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 63 [2018-11-23 04:06:33,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:33,709 INFO L225 Difference]: With dead ends: 72509 [2018-11-23 04:06:33,709 INFO L226 Difference]: Without dead ends: 72445 [2018-11-23 04:06:33,710 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2018-11-23 04:06:33,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72445 states. [2018-11-23 04:06:34,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72445 to 40892. [2018-11-23 04:06:34,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40892 states. [2018-11-23 04:06:34,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40892 states to 40892 states and 126622 transitions. [2018-11-23 04:06:34,805 INFO L78 Accepts]: Start accepts. Automaton has 40892 states and 126622 transitions. Word has length 63 [2018-11-23 04:06:34,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:34,805 INFO L480 AbstractCegarLoop]: Abstraction has 40892 states and 126622 transitions. [2018-11-23 04:06:34,806 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 04:06:34,806 INFO L276 IsEmpty]: Start isEmpty. Operand 40892 states and 126622 transitions. [2018-11-23 04:06:34,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-11-23 04:06:34,816 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:34,816 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:34,816 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:34,816 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:34,816 INFO L82 PathProgramCache]: Analyzing trace with hash -203492115, now seen corresponding path program 1 times [2018-11-23 04:06:34,816 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:34,817 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:34,817 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:34,817 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:34,817 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:34,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:34,848 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:34,848 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:34,849 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 04:06:34,849 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:34,849 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 04:06:34,849 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 04:06:34,849 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 04:06:34,849 INFO L87 Difference]: Start difference. First operand 40892 states and 126622 transitions. Second operand 3 states. [2018-11-23 04:06:35,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:35,001 INFO L93 Difference]: Finished difference Result 46897 states and 143099 transitions. [2018-11-23 04:06:35,002 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 04:06:35,002 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2018-11-23 04:06:35,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:35,059 INFO L225 Difference]: With dead ends: 46897 [2018-11-23 04:06:35,059 INFO L226 Difference]: Without dead ends: 46897 [2018-11-23 04:06:35,059 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 04:06:35,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46897 states. [2018-11-23 04:06:35,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46897 to 40580. [2018-11-23 04:06:35,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40580 states. [2018-11-23 04:06:35,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40580 states to 40580 states and 123024 transitions. [2018-11-23 04:06:35,517 INFO L78 Accepts]: Start accepts. Automaton has 40580 states and 123024 transitions. Word has length 69 [2018-11-23 04:06:35,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:35,518 INFO L480 AbstractCegarLoop]: Abstraction has 40580 states and 123024 transitions. [2018-11-23 04:06:35,518 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 04:06:35,518 INFO L276 IsEmpty]: Start isEmpty. Operand 40580 states and 123024 transitions. [2018-11-23 04:06:35,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-23 04:06:35,527 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:35,527 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:35,528 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:35,528 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:35,528 INFO L82 PathProgramCache]: Analyzing trace with hash 756655101, now seen corresponding path program 1 times [2018-11-23 04:06:35,528 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:35,529 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:35,529 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:35,529 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:35,529 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:35,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:35,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:35,607 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:35,607 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 04:06:35,607 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:35,607 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 04:06:35,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 04:06:35,608 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-23 04:06:35,609 INFO L87 Difference]: Start difference. First operand 40580 states and 123024 transitions. Second operand 7 states. [2018-11-23 04:06:36,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:36,331 INFO L93 Difference]: Finished difference Result 56545 states and 170864 transitions. [2018-11-23 04:06:36,331 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-23 04:06:36,331 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 70 [2018-11-23 04:06:36,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:36,397 INFO L225 Difference]: With dead ends: 56545 [2018-11-23 04:06:36,397 INFO L226 Difference]: Without dead ends: 56241 [2018-11-23 04:06:36,397 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2018-11-23 04:06:36,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56241 states. [2018-11-23 04:06:37,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56241 to 47672. [2018-11-23 04:06:37,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47672 states. [2018-11-23 04:06:37,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47672 states to 47672 states and 144131 transitions. [2018-11-23 04:06:37,471 INFO L78 Accepts]: Start accepts. Automaton has 47672 states and 144131 transitions. Word has length 70 [2018-11-23 04:06:37,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:37,471 INFO L480 AbstractCegarLoop]: Abstraction has 47672 states and 144131 transitions. [2018-11-23 04:06:37,471 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 04:06:37,471 INFO L276 IsEmpty]: Start isEmpty. Operand 47672 states and 144131 transitions. [2018-11-23 04:06:37,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-23 04:06:37,484 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:37,484 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:37,484 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:37,484 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:37,484 INFO L82 PathProgramCache]: Analyzing trace with hash -1040296258, now seen corresponding path program 1 times [2018-11-23 04:06:37,484 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:37,485 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:37,485 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:37,485 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:37,485 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:37,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:37,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:37,568 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:37,569 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 04:06:37,569 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:37,569 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 04:06:37,569 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 04:06:37,569 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-23 04:06:37,569 INFO L87 Difference]: Start difference. First operand 47672 states and 144131 transitions. Second operand 8 states. [2018-11-23 04:06:38,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:38,444 INFO L93 Difference]: Finished difference Result 57838 states and 172357 transitions. [2018-11-23 04:06:38,444 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 04:06:38,444 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 70 [2018-11-23 04:06:38,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:38,510 INFO L225 Difference]: With dead ends: 57838 [2018-11-23 04:06:38,510 INFO L226 Difference]: Without dead ends: 57838 [2018-11-23 04:06:38,511 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2018-11-23 04:06:38,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57838 states. [2018-11-23 04:06:39,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57838 to 50532. [2018-11-23 04:06:39,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50532 states. [2018-11-23 04:06:39,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50532 states to 50532 states and 152080 transitions. [2018-11-23 04:06:39,086 INFO L78 Accepts]: Start accepts. Automaton has 50532 states and 152080 transitions. Word has length 70 [2018-11-23 04:06:39,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:39,086 INFO L480 AbstractCegarLoop]: Abstraction has 50532 states and 152080 transitions. [2018-11-23 04:06:39,086 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 04:06:39,086 INFO L276 IsEmpty]: Start isEmpty. Operand 50532 states and 152080 transitions. [2018-11-23 04:06:39,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-23 04:06:39,098 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:39,098 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:39,098 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:39,098 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:39,098 INFO L82 PathProgramCache]: Analyzing trace with hash -152792577, now seen corresponding path program 1 times [2018-11-23 04:06:39,098 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:39,099 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:39,099 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:39,099 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:39,099 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:39,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:39,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:39,165 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:39,165 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 04:06:39,165 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:39,166 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 04:06:39,166 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 04:06:39,166 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-23 04:06:39,166 INFO L87 Difference]: Start difference. First operand 50532 states and 152080 transitions. Second operand 5 states. [2018-11-23 04:06:39,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:39,207 INFO L93 Difference]: Finished difference Result 13236 states and 33132 transitions. [2018-11-23 04:06:39,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 04:06:39,207 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2018-11-23 04:06:39,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:39,215 INFO L225 Difference]: With dead ends: 13236 [2018-11-23 04:06:39,215 INFO L226 Difference]: Without dead ends: 11116 [2018-11-23 04:06:39,216 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-23 04:06:39,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11116 states. [2018-11-23 04:06:39,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11116 to 8545. [2018-11-23 04:06:39,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8545 states. [2018-11-23 04:06:39,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8545 states to 8545 states and 21304 transitions. [2018-11-23 04:06:39,291 INFO L78 Accepts]: Start accepts. Automaton has 8545 states and 21304 transitions. Word has length 70 [2018-11-23 04:06:39,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:39,291 INFO L480 AbstractCegarLoop]: Abstraction has 8545 states and 21304 transitions. [2018-11-23 04:06:39,291 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 04:06:39,291 INFO L276 IsEmpty]: Start isEmpty. Operand 8545 states and 21304 transitions. [2018-11-23 04:06:39,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-23 04:06:39,298 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:39,298 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:39,298 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:39,299 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:39,299 INFO L82 PathProgramCache]: Analyzing trace with hash -1361713172, now seen corresponding path program 1 times [2018-11-23 04:06:39,299 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:39,300 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:39,300 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:39,300 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:39,300 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:39,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:39,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:39,358 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:39,358 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 04:06:39,358 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:39,359 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 04:06:39,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 04:06:39,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 04:06:39,359 INFO L87 Difference]: Start difference. First operand 8545 states and 21304 transitions. Second operand 4 states. [2018-11-23 04:06:39,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:39,490 INFO L93 Difference]: Finished difference Result 9960 states and 24428 transitions. [2018-11-23 04:06:39,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 04:06:39,491 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 98 [2018-11-23 04:06:39,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:39,498 INFO L225 Difference]: With dead ends: 9960 [2018-11-23 04:06:39,498 INFO L226 Difference]: Without dead ends: 9960 [2018-11-23 04:06:39,499 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 04:06:39,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9960 states. [2018-11-23 04:06:39,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9960 to 9441. [2018-11-23 04:06:39,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9441 states. [2018-11-23 04:06:39,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9441 states to 9441 states and 23271 transitions. [2018-11-23 04:06:39,589 INFO L78 Accepts]: Start accepts. Automaton has 9441 states and 23271 transitions. Word has length 98 [2018-11-23 04:06:39,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:39,590 INFO L480 AbstractCegarLoop]: Abstraction has 9441 states and 23271 transitions. [2018-11-23 04:06:39,590 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 04:06:39,590 INFO L276 IsEmpty]: Start isEmpty. Operand 9441 states and 23271 transitions. [2018-11-23 04:06:39,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-23 04:06:39,597 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:39,597 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:39,597 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:39,597 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:39,597 INFO L82 PathProgramCache]: Analyzing trace with hash 856044781, now seen corresponding path program 1 times [2018-11-23 04:06:39,597 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:39,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:39,599 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:39,599 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:39,599 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:39,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:39,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:39,640 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:39,640 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 04:06:39,640 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:39,644 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 04:06:39,645 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 04:06:39,645 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 04:06:39,645 INFO L87 Difference]: Start difference. First operand 9441 states and 23271 transitions. Second operand 3 states. [2018-11-23 04:06:39,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:39,841 INFO L93 Difference]: Finished difference Result 12725 states and 30850 transitions. [2018-11-23 04:06:39,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 04:06:39,841 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2018-11-23 04:06:39,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:39,851 INFO L225 Difference]: With dead ends: 12725 [2018-11-23 04:06:39,851 INFO L226 Difference]: Without dead ends: 12725 [2018-11-23 04:06:39,851 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 04:06:39,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12725 states. [2018-11-23 04:06:39,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12725 to 11524. [2018-11-23 04:06:39,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11524 states. [2018-11-23 04:06:40,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11524 states to 11524 states and 28181 transitions. [2018-11-23 04:06:40,000 INFO L78 Accepts]: Start accepts. Automaton has 11524 states and 28181 transitions. Word has length 98 [2018-11-23 04:06:40,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:40,001 INFO L480 AbstractCegarLoop]: Abstraction has 11524 states and 28181 transitions. [2018-11-23 04:06:40,001 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 04:06:40,001 INFO L276 IsEmpty]: Start isEmpty. Operand 11524 states and 28181 transitions. [2018-11-23 04:06:40,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-23 04:06:40,010 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:40,011 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:40,011 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:40,011 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:40,011 INFO L82 PathProgramCache]: Analyzing trace with hash -1908326467, now seen corresponding path program 2 times [2018-11-23 04:06:40,011 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:40,012 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:40,012 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:40,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:40,013 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:40,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:40,085 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:40,085 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:40,085 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 04:06:40,085 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:40,086 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 04:06:40,086 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 04:06:40,086 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 04:06:40,086 INFO L87 Difference]: Start difference. First operand 11524 states and 28181 transitions. Second operand 6 states. [2018-11-23 04:06:40,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:40,438 INFO L93 Difference]: Finished difference Result 14264 states and 34204 transitions. [2018-11-23 04:06:40,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 04:06:40,438 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 98 [2018-11-23 04:06:40,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:40,449 INFO L225 Difference]: With dead ends: 14264 [2018-11-23 04:06:40,449 INFO L226 Difference]: Without dead ends: 14264 [2018-11-23 04:06:40,449 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-23 04:06:40,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14264 states. [2018-11-23 04:06:40,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14264 to 11317. [2018-11-23 04:06:40,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11317 states. [2018-11-23 04:06:40,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11317 states to 11317 states and 27219 transitions. [2018-11-23 04:06:40,555 INFO L78 Accepts]: Start accepts. Automaton has 11317 states and 27219 transitions. Word has length 98 [2018-11-23 04:06:40,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:40,555 INFO L480 AbstractCegarLoop]: Abstraction has 11317 states and 27219 transitions. [2018-11-23 04:06:40,555 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 04:06:40,555 INFO L276 IsEmpty]: Start isEmpty. Operand 11317 states and 27219 transitions. [2018-11-23 04:06:40,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-23 04:06:40,563 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:40,563 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:40,563 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:40,564 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:40,564 INFO L82 PathProgramCache]: Analyzing trace with hash 1659083001, now seen corresponding path program 1 times [2018-11-23 04:06:40,564 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:40,565 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:40,565 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 04:06:40,565 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:40,565 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:40,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:40,670 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:40,670 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:40,670 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 04:06:40,670 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:40,671 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 04:06:40,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 04:06:40,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-23 04:06:40,671 INFO L87 Difference]: Start difference. First operand 11317 states and 27219 transitions. Second operand 6 states. [2018-11-23 04:06:40,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:40,873 INFO L93 Difference]: Finished difference Result 13695 states and 32744 transitions. [2018-11-23 04:06:40,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 04:06:40,874 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 100 [2018-11-23 04:06:40,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:40,883 INFO L225 Difference]: With dead ends: 13695 [2018-11-23 04:06:40,883 INFO L226 Difference]: Without dead ends: 13663 [2018-11-23 04:06:40,883 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 04:06:40,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13663 states. [2018-11-23 04:06:40,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13663 to 12238. [2018-11-23 04:06:40,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12238 states. [2018-11-23 04:06:40,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12238 states to 12238 states and 29366 transitions. [2018-11-23 04:06:40,982 INFO L78 Accepts]: Start accepts. Automaton has 12238 states and 29366 transitions. Word has length 100 [2018-11-23 04:06:40,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:40,982 INFO L480 AbstractCegarLoop]: Abstraction has 12238 states and 29366 transitions. [2018-11-23 04:06:40,982 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 04:06:40,983 INFO L276 IsEmpty]: Start isEmpty. Operand 12238 states and 29366 transitions. [2018-11-23 04:06:40,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-23 04:06:40,991 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:40,991 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:40,991 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:40,991 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:40,992 INFO L82 PathProgramCache]: Analyzing trace with hash -137868358, now seen corresponding path program 1 times [2018-11-23 04:06:40,992 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:40,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:40,993 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:40,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:40,993 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:41,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:41,073 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:41,073 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:41,073 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 04:06:41,073 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:41,074 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 04:06:41,074 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 04:06:41,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-23 04:06:41,074 INFO L87 Difference]: Start difference. First operand 12238 states and 29366 transitions. Second operand 7 states. [2018-11-23 04:06:41,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:41,434 INFO L93 Difference]: Finished difference Result 18053 states and 43645 transitions. [2018-11-23 04:06:41,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 04:06:41,434 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 100 [2018-11-23 04:06:41,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:41,446 INFO L225 Difference]: With dead ends: 18053 [2018-11-23 04:06:41,447 INFO L226 Difference]: Without dead ends: 18053 [2018-11-23 04:06:41,447 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=91, Unknown=0, NotChecked=0, Total=132 [2018-11-23 04:06:41,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18053 states. [2018-11-23 04:06:41,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18053 to 12767. [2018-11-23 04:06:41,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12767 states. [2018-11-23 04:06:41,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12767 states to 12767 states and 30777 transitions. [2018-11-23 04:06:41,568 INFO L78 Accepts]: Start accepts. Automaton has 12767 states and 30777 transitions. Word has length 100 [2018-11-23 04:06:41,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:41,568 INFO L480 AbstractCegarLoop]: Abstraction has 12767 states and 30777 transitions. [2018-11-23 04:06:41,568 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 04:06:41,568 INFO L276 IsEmpty]: Start isEmpty. Operand 12767 states and 30777 transitions. [2018-11-23 04:06:41,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-23 04:06:41,577 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:41,577 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:41,577 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:41,577 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:41,577 INFO L82 PathProgramCache]: Analyzing trace with hash 749635323, now seen corresponding path program 1 times [2018-11-23 04:06:41,577 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:41,578 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:41,578 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:41,578 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:41,578 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:41,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:41,661 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:41,661 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:41,661 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 04:06:41,662 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:41,662 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 04:06:41,662 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 04:06:41,662 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 04:06:41,662 INFO L87 Difference]: Start difference. First operand 12767 states and 30777 transitions. Second operand 6 states. [2018-11-23 04:06:41,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:41,854 INFO L93 Difference]: Finished difference Result 15015 states and 35894 transitions. [2018-11-23 04:06:41,854 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 04:06:41,854 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 100 [2018-11-23 04:06:41,854 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:41,864 INFO L225 Difference]: With dead ends: 15015 [2018-11-23 04:06:41,864 INFO L226 Difference]: Without dead ends: 15015 [2018-11-23 04:06:41,864 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 04:06:41,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15015 states. [2018-11-23 04:06:41,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15015 to 13041. [2018-11-23 04:06:41,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13041 states. [2018-11-23 04:06:41,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13041 states to 13041 states and 31436 transitions. [2018-11-23 04:06:41,986 INFO L78 Accepts]: Start accepts. Automaton has 13041 states and 31436 transitions. Word has length 100 [2018-11-23 04:06:41,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:41,986 INFO L480 AbstractCegarLoop]: Abstraction has 13041 states and 31436 transitions. [2018-11-23 04:06:41,986 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 04:06:41,986 INFO L276 IsEmpty]: Start isEmpty. Operand 13041 states and 31436 transitions. [2018-11-23 04:06:41,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-23 04:06:41,995 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:41,995 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:41,996 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:41,996 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:41,996 INFO L82 PathProgramCache]: Analyzing trace with hash 2119042649, now seen corresponding path program 1 times [2018-11-23 04:06:41,996 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:41,997 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:41,998 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:41,998 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:41,998 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:42,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:42,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:42,075 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:42,075 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 04:06:42,075 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:42,075 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 04:06:42,075 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 04:06:42,075 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 04:06:42,075 INFO L87 Difference]: Start difference. First operand 13041 states and 31436 transitions. Second operand 6 states. [2018-11-23 04:06:42,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:42,177 INFO L93 Difference]: Finished difference Result 12769 states and 30484 transitions. [2018-11-23 04:06:42,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 04:06:42,177 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 100 [2018-11-23 04:06:42,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:42,186 INFO L225 Difference]: With dead ends: 12769 [2018-11-23 04:06:42,186 INFO L226 Difference]: Without dead ends: 12769 [2018-11-23 04:06:42,186 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-23 04:06:42,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12769 states. [2018-11-23 04:06:42,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12769 to 10327. [2018-11-23 04:06:42,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10327 states. [2018-11-23 04:06:42,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10327 states to 10327 states and 24777 transitions. [2018-11-23 04:06:42,278 INFO L78 Accepts]: Start accepts. Automaton has 10327 states and 24777 transitions. Word has length 100 [2018-11-23 04:06:42,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:42,278 INFO L480 AbstractCegarLoop]: Abstraction has 10327 states and 24777 transitions. [2018-11-23 04:06:42,279 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 04:06:42,279 INFO L276 IsEmpty]: Start isEmpty. Operand 10327 states and 24777 transitions. [2018-11-23 04:06:42,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-23 04:06:42,286 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:42,286 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:42,286 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:42,286 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:42,286 INFO L82 PathProgramCache]: Analyzing trace with hash -22235627, now seen corresponding path program 1 times [2018-11-23 04:06:42,286 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:42,287 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:42,287 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:42,287 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:42,287 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:42,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:42,337 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:42,338 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:42,338 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 04:06:42,338 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:42,338 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 04:06:42,338 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 04:06:42,339 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 04:06:42,339 INFO L87 Difference]: Start difference. First operand 10327 states and 24777 transitions. Second operand 5 states. [2018-11-23 04:06:42,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:42,512 INFO L93 Difference]: Finished difference Result 12330 states and 29018 transitions. [2018-11-23 04:06:42,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 04:06:42,512 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 100 [2018-11-23 04:06:42,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:42,520 INFO L225 Difference]: With dead ends: 12330 [2018-11-23 04:06:42,521 INFO L226 Difference]: Without dead ends: 12330 [2018-11-23 04:06:42,521 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 04:06:42,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12330 states. [2018-11-23 04:06:42,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12330 to 10500. [2018-11-23 04:06:42,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10500 states. [2018-11-23 04:06:42,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10500 states to 10500 states and 25146 transitions. [2018-11-23 04:06:42,609 INFO L78 Accepts]: Start accepts. Automaton has 10500 states and 25146 transitions. Word has length 100 [2018-11-23 04:06:42,610 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:42,610 INFO L480 AbstractCegarLoop]: Abstraction has 10500 states and 25146 transitions. [2018-11-23 04:06:42,610 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 04:06:42,610 INFO L276 IsEmpty]: Start isEmpty. Operand 10500 states and 25146 transitions. [2018-11-23 04:06:42,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 04:06:42,616 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:42,616 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:42,616 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:42,617 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:42,617 INFO L82 PathProgramCache]: Analyzing trace with hash -909176834, now seen corresponding path program 1 times [2018-11-23 04:06:42,617 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:42,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:42,618 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:42,618 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:42,618 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:42,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:42,691 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:42,691 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:42,691 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 04:06:42,691 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:42,691 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 04:06:42,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 04:06:42,692 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-11-23 04:06:42,692 INFO L87 Difference]: Start difference. First operand 10500 states and 25146 transitions. Second operand 8 states. [2018-11-23 04:06:43,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:43,504 INFO L93 Difference]: Finished difference Result 18823 states and 44161 transitions. [2018-11-23 04:06:43,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-23 04:06:43,505 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 102 [2018-11-23 04:06:43,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:43,518 INFO L225 Difference]: With dead ends: 18823 [2018-11-23 04:06:43,518 INFO L226 Difference]: Without dead ends: 18728 [2018-11-23 04:06:43,518 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=261, Unknown=0, NotChecked=0, Total=342 [2018-11-23 04:06:43,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18728 states. [2018-11-23 04:06:43,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18728 to 13537. [2018-11-23 04:06:43,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13537 states. [2018-11-23 04:06:43,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13537 states to 13537 states and 32323 transitions. [2018-11-23 04:06:43,654 INFO L78 Accepts]: Start accepts. Automaton has 13537 states and 32323 transitions. Word has length 102 [2018-11-23 04:06:43,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:43,654 INFO L480 AbstractCegarLoop]: Abstraction has 13537 states and 32323 transitions. [2018-11-23 04:06:43,654 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 04:06:43,654 INFO L276 IsEmpty]: Start isEmpty. Operand 13537 states and 32323 transitions. [2018-11-23 04:06:43,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 04:06:43,664 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:43,664 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:43,664 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:43,664 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:43,665 INFO L82 PathProgramCache]: Analyzing trace with hash 1308581119, now seen corresponding path program 1 times [2018-11-23 04:06:43,665 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:43,665 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:43,666 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:43,666 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:43,666 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:43,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:43,753 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:43,753 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:43,753 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 04:06:43,753 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:43,754 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 04:06:43,755 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 04:06:43,756 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-23 04:06:43,756 INFO L87 Difference]: Start difference. First operand 13537 states and 32323 transitions. Second operand 7 states. [2018-11-23 04:06:44,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:44,059 INFO L93 Difference]: Finished difference Result 18636 states and 43263 transitions. [2018-11-23 04:06:44,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-23 04:06:44,059 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-23 04:06:44,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:44,072 INFO L225 Difference]: With dead ends: 18636 [2018-11-23 04:06:44,072 INFO L226 Difference]: Without dead ends: 18636 [2018-11-23 04:06:44,073 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-11-23 04:06:44,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18636 states. [2018-11-23 04:06:44,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18636 to 15989. [2018-11-23 04:06:44,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15989 states. [2018-11-23 04:06:44,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15989 states to 15989 states and 37604 transitions. [2018-11-23 04:06:44,225 INFO L78 Accepts]: Start accepts. Automaton has 15989 states and 37604 transitions. Word has length 102 [2018-11-23 04:06:44,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:44,225 INFO L480 AbstractCegarLoop]: Abstraction has 15989 states and 37604 transitions. [2018-11-23 04:06:44,225 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 04:06:44,225 INFO L276 IsEmpty]: Start isEmpty. Operand 15989 states and 37604 transitions. [2018-11-23 04:06:44,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 04:06:44,239 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:44,240 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:44,240 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:44,240 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:44,240 INFO L82 PathProgramCache]: Analyzing trace with hash 1519932032, now seen corresponding path program 1 times [2018-11-23 04:06:44,240 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:44,241 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:44,241 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:44,242 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:44,242 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:44,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:44,348 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:44,348 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:44,348 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 04:06:44,349 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:44,349 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 04:06:44,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 04:06:44,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-23 04:06:44,349 INFO L87 Difference]: Start difference. First operand 15989 states and 37604 transitions. Second operand 7 states. [2018-11-23 04:06:44,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:44,550 INFO L93 Difference]: Finished difference Result 16663 states and 39077 transitions. [2018-11-23 04:06:44,551 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 04:06:44,551 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-23 04:06:44,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:44,564 INFO L225 Difference]: With dead ends: 16663 [2018-11-23 04:06:44,564 INFO L226 Difference]: Without dead ends: 16663 [2018-11-23 04:06:44,564 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=72, Unknown=0, NotChecked=0, Total=110 [2018-11-23 04:06:44,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16663 states. [2018-11-23 04:06:44,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16663 to 16516. [2018-11-23 04:06:44,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16516 states. [2018-11-23 04:06:44,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16516 states to 16516 states and 38784 transitions. [2018-11-23 04:06:44,706 INFO L78 Accepts]: Start accepts. Automaton has 16516 states and 38784 transitions. Word has length 102 [2018-11-23 04:06:44,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:44,706 INFO L480 AbstractCegarLoop]: Abstraction has 16516 states and 38784 transitions. [2018-11-23 04:06:44,706 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 04:06:44,706 INFO L276 IsEmpty]: Start isEmpty. Operand 16516 states and 38784 transitions. [2018-11-23 04:06:44,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 04:06:44,718 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:44,718 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:44,718 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:44,719 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:44,719 INFO L82 PathProgramCache]: Analyzing trace with hash -1887531583, now seen corresponding path program 1 times [2018-11-23 04:06:44,719 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:44,720 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:44,720 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:44,720 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:44,720 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:44,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:44,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:44,806 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:44,806 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-23 04:06:44,806 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:44,806 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 04:06:44,807 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 04:06:44,807 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-11-23 04:06:44,807 INFO L87 Difference]: Start difference. First operand 16516 states and 38784 transitions. Second operand 9 states. [2018-11-23 04:06:44,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:44,938 INFO L93 Difference]: Finished difference Result 20356 states and 48058 transitions. [2018-11-23 04:06:44,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 04:06:44,938 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 102 [2018-11-23 04:06:44,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:44,942 INFO L225 Difference]: With dead ends: 20356 [2018-11-23 04:06:44,942 INFO L226 Difference]: Without dead ends: 4035 [2018-11-23 04:06:44,943 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2018-11-23 04:06:44,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4035 states. [2018-11-23 04:06:44,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4035 to 4033. [2018-11-23 04:06:44,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4033 states. [2018-11-23 04:06:44,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4033 states to 4033 states and 9587 transitions. [2018-11-23 04:06:44,982 INFO L78 Accepts]: Start accepts. Automaton has 4033 states and 9587 transitions. Word has length 102 [2018-11-23 04:06:44,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:44,983 INFO L480 AbstractCegarLoop]: Abstraction has 4033 states and 9587 transitions. [2018-11-23 04:06:44,983 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 04:06:44,983 INFO L276 IsEmpty]: Start isEmpty. Operand 4033 states and 9587 transitions. [2018-11-23 04:06:44,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 04:06:44,986 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:44,986 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:44,986 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:44,987 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:44,987 INFO L82 PathProgramCache]: Analyzing trace with hash 1406724183, now seen corresponding path program 1 times [2018-11-23 04:06:44,987 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:44,988 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:44,988 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:44,988 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:44,988 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:44,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:45,020 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:45,020 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:45,021 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 04:06:45,021 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:45,021 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 04:06:45,021 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 04:06:45,021 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 04:06:45,021 INFO L87 Difference]: Start difference. First operand 4033 states and 9587 transitions. Second operand 5 states. [2018-11-23 04:06:45,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:45,157 INFO L93 Difference]: Finished difference Result 4506 states and 10608 transitions. [2018-11-23 04:06:45,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 04:06:45,158 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 102 [2018-11-23 04:06:45,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:45,161 INFO L225 Difference]: With dead ends: 4506 [2018-11-23 04:06:45,161 INFO L226 Difference]: Without dead ends: 4472 [2018-11-23 04:06:45,161 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 04:06:45,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4472 states. [2018-11-23 04:06:45,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4472 to 4081. [2018-11-23 04:06:45,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4081 states. [2018-11-23 04:06:45,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4081 states to 4081 states and 9696 transitions. [2018-11-23 04:06:45,193 INFO L78 Accepts]: Start accepts. Automaton has 4081 states and 9696 transitions. Word has length 102 [2018-11-23 04:06:45,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:45,193 INFO L480 AbstractCegarLoop]: Abstraction has 4081 states and 9696 transitions. [2018-11-23 04:06:45,193 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 04:06:45,193 INFO L276 IsEmpty]: Start isEmpty. Operand 4081 states and 9696 transitions. [2018-11-23 04:06:45,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 04:06:45,196 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:45,196 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:45,196 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:45,196 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:45,197 INFO L82 PathProgramCache]: Analyzing trace with hash -716436783, now seen corresponding path program 1 times [2018-11-23 04:06:45,197 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:45,198 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:45,198 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:45,198 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:45,198 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:45,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:45,258 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:45,258 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:45,258 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 04:06:45,258 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:45,258 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 04:06:45,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 04:06:45,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-23 04:06:45,259 INFO L87 Difference]: Start difference. First operand 4081 states and 9696 transitions. Second operand 7 states. [2018-11-23 04:06:45,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:45,446 INFO L93 Difference]: Finished difference Result 4528 states and 10637 transitions. [2018-11-23 04:06:45,447 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 04:06:45,447 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-23 04:06:45,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:45,450 INFO L225 Difference]: With dead ends: 4528 [2018-11-23 04:06:45,450 INFO L226 Difference]: Without dead ends: 4528 [2018-11-23 04:06:45,451 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-11-23 04:06:45,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4528 states. [2018-11-23 04:06:45,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4528 to 4023. [2018-11-23 04:06:45,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4023 states. [2018-11-23 04:06:45,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4023 states to 4023 states and 9578 transitions. [2018-11-23 04:06:45,481 INFO L78 Accepts]: Start accepts. Automaton has 4023 states and 9578 transitions. Word has length 102 [2018-11-23 04:06:45,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:45,481 INFO L480 AbstractCegarLoop]: Abstraction has 4023 states and 9578 transitions. [2018-11-23 04:06:45,481 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 04:06:45,481 INFO L276 IsEmpty]: Start isEmpty. Operand 4023 states and 9578 transitions. [2018-11-23 04:06:45,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 04:06:45,484 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:45,485 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:45,485 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:45,485 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:45,485 INFO L82 PathProgramCache]: Analyzing trace with hash 299428272, now seen corresponding path program 2 times [2018-11-23 04:06:45,485 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:45,486 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:45,486 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 04:06:45,486 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:45,486 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:45,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:45,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:45,595 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:45,595 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-23 04:06:45,595 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:45,595 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 04:06:45,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 04:06:45,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2018-11-23 04:06:45,596 INFO L87 Difference]: Start difference. First operand 4023 states and 9578 transitions. Second operand 12 states. [2018-11-23 04:06:46,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:46,026 INFO L93 Difference]: Finished difference Result 5432 states and 12702 transitions. [2018-11-23 04:06:46,026 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 04:06:46,026 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 102 [2018-11-23 04:06:46,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:46,029 INFO L225 Difference]: With dead ends: 5432 [2018-11-23 04:06:46,029 INFO L226 Difference]: Without dead ends: 5432 [2018-11-23 04:06:46,030 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=299, Unknown=0, NotChecked=0, Total=380 [2018-11-23 04:06:46,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5432 states. [2018-11-23 04:06:46,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5432 to 4068. [2018-11-23 04:06:46,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4068 states. [2018-11-23 04:06:46,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4068 states to 4068 states and 9662 transitions. [2018-11-23 04:06:46,060 INFO L78 Accepts]: Start accepts. Automaton has 4068 states and 9662 transitions. Word has length 102 [2018-11-23 04:06:46,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:46,060 INFO L480 AbstractCegarLoop]: Abstraction has 4068 states and 9662 transitions. [2018-11-23 04:06:46,060 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 04:06:46,060 INFO L276 IsEmpty]: Start isEmpty. Operand 4068 states and 9662 transitions. [2018-11-23 04:06:46,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 04:06:46,062 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:46,063 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:46,063 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:46,063 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:46,063 INFO L82 PathProgramCache]: Analyzing trace with hash 1186931953, now seen corresponding path program 2 times [2018-11-23 04:06:46,063 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:46,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:46,064 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 04:06:46,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:46,064 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:46,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 04:06:46,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 04:06:46,204 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 04:06:46,204 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-11-23 04:06:46,204 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 04:06:46,204 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-23 04:06:46,204 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-23 04:06:46,204 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2018-11-23 04:06:46,205 INFO L87 Difference]: Start difference. First operand 4068 states and 9662 transitions. Second operand 13 states. [2018-11-23 04:06:46,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 04:06:46,613 INFO L93 Difference]: Finished difference Result 6512 states and 15247 transitions. [2018-11-23 04:06:46,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 04:06:46,613 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 102 [2018-11-23 04:06:46,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 04:06:46,617 INFO L225 Difference]: With dead ends: 6512 [2018-11-23 04:06:46,617 INFO L226 Difference]: Without dead ends: 4690 [2018-11-23 04:06:46,617 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=387, Unknown=0, NotChecked=0, Total=462 [2018-11-23 04:06:46,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4690 states. [2018-11-23 04:06:46,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4690 to 4124. [2018-11-23 04:06:46,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4124 states. [2018-11-23 04:06:46,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4124 states to 4124 states and 9724 transitions. [2018-11-23 04:06:46,646 INFO L78 Accepts]: Start accepts. Automaton has 4124 states and 9724 transitions. Word has length 102 [2018-11-23 04:06:46,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 04:06:46,647 INFO L480 AbstractCegarLoop]: Abstraction has 4124 states and 9724 transitions. [2018-11-23 04:06:46,647 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-23 04:06:46,647 INFO L276 IsEmpty]: Start isEmpty. Operand 4124 states and 9724 transitions. [2018-11-23 04:06:46,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 04:06:46,650 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 04:06:46,650 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 04:06:46,650 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 04:06:46,650 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 04:06:46,650 INFO L82 PathProgramCache]: Analyzing trace with hash -1820697969, now seen corresponding path program 3 times [2018-11-23 04:06:46,650 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 04:06:46,651 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:46,652 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 04:06:46,652 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 04:06:46,652 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 04:06:46,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 04:06:46,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 04:06:46,711 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [609] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [465] L-1-->L672: Formula: (= |v_#valid_9| (store |v_#valid_10| 0 0)) InVars {#valid=|v_#valid_10|} OutVars{#valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [572] L672-->L674: Formula: (= v_~__unbuffered_cnt~0_6 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [628] L674-->L676: Formula: (= v_~__unbuffered_p0_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [456] L676-->L678: Formula: (= v_~__unbuffered_p1_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 [528] L678-->L679: Formula: (= v_~__unbuffered_p1_EBX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 [678] L679-->L680: Formula: (= v_~main$tmp_guard0~0_3 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 [585] L680-->L682: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [666] L682-->L684: Formula: (= v_~x~0_3 0) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [489] L684-->L685: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [627] L685-->L686: Formula: (= v_~y$flush_delayed~0_9 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_9} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 [530] L686-->L687: Formula: (= v_~y$mem_tmp~0_5 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_5} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 [482] L687-->L688: Formula: (= v_~y$r_buff0_thd0~0_13 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_13} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 [616] L688-->L689: Formula: (= v_~y$r_buff0_thd1~0_32 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_32} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 [526] L689-->L690: Formula: (= v_~y$r_buff0_thd2~0_44 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_44} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 [677] L690-->L691: Formula: (= v_~y$r_buff1_thd0~0_9 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 [584] L691-->L692: Formula: (= v_~y$r_buff1_thd1~0_18 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_18} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 [497] L692-->L693: Formula: (= v_~y$r_buff1_thd2~0_25 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_25} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 [664] L693-->L694: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [570] L694-->L695: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [488] L695-->L696: Formula: (= v_~y$w_buff0~0_17 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_17} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [626] L696-->L697: Formula: (= v_~y$w_buff0_used~0_85 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_85} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [529] L697-->L698: Formula: (= v_~y$w_buff1~0_16 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_16} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [479] L698-->L699: Formula: (= v_~y$w_buff1_used~0_48 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_48} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [615] L699-->L700: Formula: (= v_~weak$$choice0~0_3 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_3} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [525] L700-->L-1-1: Formula: (= v_~weak$$choice2~0_27 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_27} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [665] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [661] L-1-2-->L786: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet57=|v_ULTIMATE.start_main_#t~nondet57_2|, ULTIMATE.start_main_#t~nondet58=|v_ULTIMATE.start_main_#t~nondet58_2|, ULTIMATE.start_main_~#t1774~0.offset=|v_ULTIMATE.start_main_~#t1774~0.offset_5|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_5|, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_5|, ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_5|, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_5|, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_5|, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_5|, ULTIMATE.start_main_~#t1773~0.base=|v_ULTIMATE.start_main_~#t1773~0.base_5|, ULTIMATE.start_main_~#t1773~0.offset=|v_ULTIMATE.start_main_~#t1773~0.offset_5|, ULTIMATE.start_main_~#t1774~0.base=|v_ULTIMATE.start_main_~#t1774~0.base_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite62, ULTIMATE.start_main_#t~ite63, ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#t~ite61, ULTIMATE.start_main_#t~nondet57, ULTIMATE.start_main_~#t1773~0.base, ULTIMATE.start_main_#t~nondet58, ULTIMATE.start_main_~#t1774~0.offset, ULTIMATE.start_main_~#t1773~0.offset, ULTIMATE.start_main_#t~ite59, ULTIMATE.start_main_#t~ite64, ULTIMATE.start_main_~#t1774~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [471] L786-->L786-1: Formula: (and (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1773~0.base_1| 4) |v_#length_1|) (= 0 |v_ULTIMATE.start_main_~#t1773~0.offset_1|) (= |v_#valid_1| (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1773~0.base_1| 1)) (not (= |v_ULTIMATE.start_main_~#t1773~0.base_1| 0)) (= 0 (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1773~0.base_1|))) InVars {#length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{ULTIMATE.start_main_~#t1773~0.offset=|v_ULTIMATE.start_main_~#t1773~0.offset_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1773~0.base=|v_ULTIMATE.start_main_~#t1773~0.base_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1773~0.base, #valid, ULTIMATE.start_main_~#t1773~0.offset, #length] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [472] L786-1-->L787: Formula: (= |v_#memory_int_1| (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1773~0.base_2| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1773~0.base_2|) |v_ULTIMATE.start_main_~#t1773~0.offset_2| 0))) InVars {#memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t1773~0.offset=|v_ULTIMATE.start_main_~#t1773~0.offset_2|, ULTIMATE.start_main_~#t1773~0.base=|v_ULTIMATE.start_main_~#t1773~0.base_2|} OutVars{#memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t1773~0.offset=|v_ULTIMATE.start_main_~#t1773~0.offset_2|, ULTIMATE.start_main_~#t1773~0.base=|v_ULTIMATE.start_main_~#t1773~0.base_2|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 [839] L787-->P0ENTRY: Formula: (and (= 0 |v_Thread0_P0_#in~arg.offset_3|) (= 0 v_Thread0_P0_thidvar0_2) (= 0 |v_Thread0_P0_#in~arg.base_3|)) InVars {} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_3|, Thread0_P0_thidvar0=v_Thread0_P0_thidvar0_2, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P0_#in~arg.base, Thread0_P0_thidvar0, Thread0_P0_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [613] L787-1-->L788: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet57=|v_ULTIMATE.start_main_#t~nondet57_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet57] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [521] L788-->L788-1: Formula: (and (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t1774~0.base_1| 4)) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t1774~0.base_1|) 0) (= 0 |v_ULTIMATE.start_main_~#t1774~0.offset_1|) (not (= |v_ULTIMATE.start_main_~#t1774~0.base_1| 0)) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t1774~0.base_1| 1) |v_#valid_3|)) InVars {#length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{ULTIMATE.start_main_~#t1774~0.offset=|v_ULTIMATE.start_main_~#t1774~0.offset_1|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1774~0.base=|v_ULTIMATE.start_main_~#t1774~0.base_1|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#t1774~0.offset, #length, ULTIMATE.start_main_~#t1774~0.base] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [522] L788-1-->L789: Formula: (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1774~0.base_2| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1774~0.base_2|) |v_ULTIMATE.start_main_~#t1774~0.offset_2| 1)) |v_#memory_int_3|) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t1774~0.offset=|v_ULTIMATE.start_main_~#t1774~0.offset_2|, ULTIMATE.start_main_~#t1774~0.base=|v_ULTIMATE.start_main_~#t1774~0.base_2|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t1774~0.offset=|v_ULTIMATE.start_main_~#t1774~0.offset_2|, ULTIMATE.start_main_~#t1774~0.base=|v_ULTIMATE.start_main_~#t1774~0.base_2|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 [840] L789-->P1ENTRY: Formula: (and (= 0 |v_Thread1_P1_#in~arg.base_3|) (= 0 |v_Thread1_P1_#in~arg.offset_3|) (= 1 v_Thread1_P1_thidvar0_2)) InVars {} OutVars{Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_3|, Thread1_P1_thidvar0=v_Thread1_P1_thidvar0_2, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread1_P1_#in~arg.base, Thread1_P1_thidvar0, Thread1_P1_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [749] P1ENTRY-->L5: Formula: (and (= v_Thread1_P1_~arg.offset_1 |v_Thread1_P1_#in~arg.offset_1|) (= v_~y$w_buff1~0_7 v_~y$w_buff0~0_8) (= |v_Thread1_P1___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= (mod v_~y$w_buff0_used~0_35 256) 0)) (not (= (mod v_~y$w_buff1_used~0_20 256) 0)))) 1 0)) (= v_~y$w_buff0_used~0_35 1) (= v_Thread1_P1_~arg.base_1 |v_Thread1_P1_#in~arg.base_1|) (= v_Thread1_P1___VERIFIER_assert_~expression_1 |v_Thread1_P1___VERIFIER_assert_#in~expression_1|) (= v_~y$w_buff0~0_7 1) (= v_~y$w_buff1_used~0_20 v_~y$w_buff0_used~0_36)) InVars {Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_36, ~y$w_buff0~0=v_~y$w_buff0~0_8, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_1, Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_~arg.offset=v_Thread1_P1_~arg.offset_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_35, ~y$w_buff1~0=v_~y$w_buff1~0_7, Thread1_P1_~arg.base=v_Thread1_P1_~arg.base_1, ~y$w_buff0~0=v_~y$w_buff0~0_7, Thread1_P1___VERIFIER_assert_#in~expression=|v_Thread1_P1___VERIFIER_assert_#in~expression_1|, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_20} AuxVars[] AssignedVars[Thread1_P1___VERIFIER_assert_~expression, Thread1_P1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, Thread1_P1_~arg.base, ~y$w_buff0~0, Thread1_P1___VERIFIER_assert_#in~expression, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [751] L5-->L5-3: Formula: (not (= v_Thread1_P1___VERIFIER_assert_~expression_3 0)) InVars {Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [754] L5-3-->L749: Formula: (and (= v_~y$mem_tmp~0_3 v_~y~0_7) (= v_~y$r_buff1_thd2~0_5 v_~y$r_buff0_thd2~0_9) (= v_~y$r_buff0_thd2~0_8 1) (= v_~weak$$choice0~0_2 |v_Thread1_P1_#t~nondet27_1|) (= v_~weak$$choice2~0_18 |v_Thread1_P1_#t~nondet28_1|) (= v_~y$r_buff1_thd1~0_17 v_~y$r_buff0_thd1~0_31) (= v_~y$flush_delayed~0_5 v_~weak$$choice2~0_18) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1)) InVars {Thread1_P1_#t~nondet27=|v_Thread1_P1_#t~nondet27_1|, Thread1_P1_#t~nondet28=|v_Thread1_P1_#t~nondet28_1|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_9, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_31, ~y~0=v_~y~0_7} OutVars{Thread1_P1_#t~nondet27=|v_Thread1_P1_#t~nondet27_2|, Thread1_P1_#t~nondet28=|v_Thread1_P1_#t~nondet28_2|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_5, ~weak$$choice0~0=v_~weak$$choice0~0_2, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_17, ~y$mem_tmp~0=v_~y$mem_tmp~0_3, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_8, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_31, ~y$flush_delayed~0=v_~y$flush_delayed~0_5, ~y~0=v_~y~0_7, ~weak$$choice2~0=v_~weak$$choice2~0_18, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~weak$$choice0~0, ~y$r_buff1_thd1~0, Thread1_P1_#t~nondet27, ~y$mem_tmp~0, Thread1_P1_#t~nondet28, ~y$r_buff0_thd2~0, ~y$flush_delayed~0, ~weak$$choice2~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [756] L749-->L749-2: Formula: (let ((.cse0 (not (= 0 (mod v_~y$r_buff0_thd2~0_13 256))))) (and (or .cse0 (not (= 0 (mod v_~y$r_buff1_thd2~0_8 256)))) (not (= 0 (mod v_~y$w_buff0_used~0_41 256))) (or .cse0 (not (= 0 (mod v_~y$w_buff1_used~0_24 256)))))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_41, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_24} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_41, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_24} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [758] L749-2-->L749-4: Formula: (and (not (= 0 (mod v_~y$w_buff0_used~0_43 256))) (not (= 0 (mod v_~y$r_buff0_thd2~0_15 256))) (= |v_Thread1_P1_#t~ite29_2| v_~y$w_buff0~0_9)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$w_buff0~0=v_~y$w_buff0~0_9, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_15} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$w_buff0~0=v_~y$w_buff0~0_9, Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_15} AuxVars[] AssignedVars[Thread1_P1_#t~ite29] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite29|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [762] L749-4-->L749-5: Formula: (= |v_Thread1_P1_#t~ite30_4| |v_Thread1_P1_#t~ite29_4|) InVars {Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_4|} OutVars{Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_4|, Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_4|} AuxVars[] AssignedVars[Thread1_P1_#t~ite30] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite29|=1, |Thread1_P1_#t~ite30|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [757] L749-5-->L750: Formula: (= v_~y~0_10 |v_Thread1_P1_#t~ite30_2|) InVars {Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_2|} OutVars{~y~0=v_~y~0_10, Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_1|, Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_3|} AuxVars[] AssignedVars[Thread1_P1_#t~ite30, ~y~0, Thread1_P1_#t~ite29] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [760] L750-->L750-8: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= |v_Thread1_P1_#t~ite33_1| v_~y$w_buff0~0_10)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_19, ~y$w_buff0~0=v_~y$w_buff0~0_10} OutVars{Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_1|, ~weak$$choice2~0=v_~weak$$choice2~0_19, ~y$w_buff0~0=v_~y$w_buff0~0_10} AuxVars[] AssignedVars[Thread1_P1_#t~ite33] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite33|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [763] L750-8-->L751: Formula: (= v_~y$w_buff0~0_15 |v_Thread1_P1_#t~ite33_2|) InVars {Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_2|} OutVars{Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_3|, Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_1|, Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_1|, ~y$w_buff0~0=v_~y$w_buff0~0_15} AuxVars[] AssignedVars[Thread1_P1_#t~ite31, Thread1_P1_#t~ite32, ~y$w_buff0~0, Thread1_P1_#t~ite33] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [766] L751-->L751-8: Formula: (and (not (= (mod v_~weak$$choice2~0_21 256) 0)) (= |v_Thread1_P1_#t~ite36_1| v_~y$w_buff1~0_10)) InVars {~y$w_buff1~0=v_~y$w_buff1~0_10, ~weak$$choice2~0=v_~weak$$choice2~0_21} OutVars{Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_1|, ~y$w_buff1~0=v_~y$w_buff1~0_10, ~weak$$choice2~0=v_~weak$$choice2~0_21} AuxVars[] AssignedVars[Thread1_P1_#t~ite36] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite36|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [771] L751-8-->L752: Formula: (= v_~y$w_buff1~0_14 |v_Thread1_P1_#t~ite36_2|) InVars {Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_2|} OutVars{Thread1_P1_#t~ite35=|v_Thread1_P1_#t~ite35_1|, Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_3|, Thread1_P1_#t~ite34=|v_Thread1_P1_#t~ite34_1|, ~y$w_buff1~0=v_~y$w_buff1~0_14} AuxVars[] AssignedVars[~y$w_buff1~0, Thread1_P1_#t~ite35, Thread1_P1_#t~ite36, Thread1_P1_#t~ite34] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [775] L752-->L752-8: Formula: (and (= |v_Thread1_P1_#t~ite39_1| v_~y$w_buff0_used~0_63) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_63, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_63, ~weak$$choice2~0=v_~weak$$choice2~0_23, Thread1_P1_#t~ite39=|v_Thread1_P1_#t~ite39_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite39] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite39|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [780] L752-8-->L753: Formula: (= v_~y$w_buff0_used~0_69 |v_Thread1_P1_#t~ite39_2|) InVars {Thread1_P1_#t~ite39=|v_Thread1_P1_#t~ite39_2|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_69, Thread1_P1_#t~ite39=|v_Thread1_P1_#t~ite39_3|, Thread1_P1_#t~ite37=|v_Thread1_P1_#t~ite37_1|, Thread1_P1_#t~ite38=|v_Thread1_P1_#t~ite38_1|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite39, Thread1_P1_#t~ite37, Thread1_P1_#t~ite38] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [784] L753-->L753-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_25 256))) (= |v_Thread1_P1_#t~ite42_1| v_~y$w_buff1_used~0_38)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_25, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_38} OutVars{Thread1_P1_#t~ite42=|v_Thread1_P1_#t~ite42_1|, ~weak$$choice2~0=v_~weak$$choice2~0_25, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_38} AuxVars[] AssignedVars[Thread1_P1_#t~ite42] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite42|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [789] L753-8-->L754: Formula: (= v_~y$w_buff1_used~0_17 |v_Thread1_P1_#t~ite42_2|) InVars {Thread1_P1_#t~ite42=|v_Thread1_P1_#t~ite42_2|} OutVars{Thread1_P1_#t~ite42=|v_Thread1_P1_#t~ite42_3|, Thread1_P1_#t~ite40=|v_Thread1_P1_#t~ite40_1|, Thread1_P1_#t~ite41=|v_Thread1_P1_#t~ite41_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} AuxVars[] AssignedVars[Thread1_P1_#t~ite42, Thread1_P1_#t~ite40, Thread1_P1_#t~ite41, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [793] L754-->L754-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_14 256))) (= |v_Thread1_P1_#t~ite45_1| v_~y$r_buff0_thd2~0_1)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_14, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_1} OutVars{Thread1_P1_#t~ite45=|v_Thread1_P1_#t~ite45_1|, ~weak$$choice2~0=v_~weak$$choice2~0_14, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_1} AuxVars[] AssignedVars[Thread1_P1_#t~ite45] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite45|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [798] L754-8-->L755: Formula: (= v_~y$r_buff0_thd2~0_6 |v_Thread1_P1_#t~ite45_2|) InVars {Thread1_P1_#t~ite45=|v_Thread1_P1_#t~ite45_2|} OutVars{Thread1_P1_#t~ite44=|v_Thread1_P1_#t~ite44_1|, Thread1_P1_#t~ite45=|v_Thread1_P1_#t~ite45_3|, Thread1_P1_#t~ite43=|v_Thread1_P1_#t~ite43_1|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_6} AuxVars[] AssignedVars[Thread1_P1_#t~ite43, ~y$r_buff0_thd2~0, Thread1_P1_#t~ite44, Thread1_P1_#t~ite45] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [802] L755-->L755-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= |v_Thread1_P1_#t~ite48_1| v_~y$r_buff1_thd2~0_3)) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, ~weak$$choice2~0=v_~weak$$choice2~0_16, Thread1_P1_#t~ite48=|v_Thread1_P1_#t~ite48_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite48] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite48|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [807] L755-8-->L757: Formula: (and (= v_~__unbuffered_p1_EAX~0_1 v_~y~0_9) (= v_~y$r_buff1_thd2~0_9 |v_Thread1_P1_#t~ite48_2|)) InVars {~y~0=v_~y~0_9, Thread1_P1_#t~ite48=|v_Thread1_P1_#t~ite48_2|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_1, Thread1_P1_#t~ite46=|v_Thread1_P1_#t~ite46_1|, Thread1_P1_#t~ite47=|v_Thread1_P1_#t~ite47_1|, ~y~0=v_~y~0_9, Thread1_P1_#t~ite48=|v_Thread1_P1_#t~ite48_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_p1_EAX~0, Thread1_P1_#t~ite46, Thread1_P1_#t~ite47, Thread1_P1_#t~ite48] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [811] L757-->L757-2: Formula: (and (= |v_Thread1_P1_#t~ite49_1| v_~y$mem_tmp~0_4) (not (= (mod v_~y$flush_delayed~0_6 256) 0))) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_4} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_4, Thread1_P1_#t~ite49=|v_Thread1_P1_#t~ite49_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite49] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite49|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [816] L757-2-->L764: Formula: (and (= v_~y~0_12 |v_Thread1_P1_#t~ite49_3|) (= v_~y$flush_delayed~0_8 0) (= v_~__unbuffered_p1_EBX~0_1 v_~x~0_2)) InVars {~x~0=v_~x~0_2, Thread1_P1_#t~ite49=|v_Thread1_P1_#t~ite49_3|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_8, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_1, ~y~0=v_~y~0_12, ~x~0=v_~x~0_2, Thread1_P1_#t~ite49=|v_Thread1_P1_#t~ite49_4|} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0, ~y$flush_delayed~0, ~y~0, Thread1_P1_#t~ite49] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [818] L764-->L764-5: Formula: (and (not (= 0 (mod v_~y$r_buff0_thd2~0_18 256))) (not (= (mod v_~y$w_buff0_used~0_46 256) 0)) (= |v_Thread1_P1_#t~ite51_1| v_~y$w_buff0~0_12)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ~y$w_buff0~0=v_~y$w_buff0~0_12, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_18} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ~y$w_buff0~0=v_~y$w_buff0~0_12, Thread1_P1_#t~ite51=|v_Thread1_P1_#t~ite51_1|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_18} AuxVars[] AssignedVars[Thread1_P1_#t~ite51] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite51|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [682] P0ENTRY-->L713: Formula: (and (= v_Thread0_P0_~arg.base_1 |v_Thread0_P0_#in~arg.base_1|) (= v_Thread0_P0_~arg.offset_1 |v_Thread0_P0_#in~arg.offset_1|) (= v_~weak$$choice0~0_1 |v_Thread0_P0_#t~nondet3_1|) (= v_~weak$$choice2~0_1 |v_Thread0_P0_#t~nondet4_1|) (= v_~y$mem_tmp~0_1 v_~y~0_1) (= v_~x~0_1 1) (= v_~y$flush_delayed~0_1 v_~weak$$choice2~0_1)) InVars {Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_#t~nondet3=|v_Thread0_P0_#t~nondet3_1|, ~y~0=v_~y~0_1, Thread0_P0_#t~nondet4=|v_Thread0_P0_#t~nondet4_1|, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_~arg.offset=v_Thread0_P0_~arg.offset_1, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|, ~weak$$choice0~0=v_~weak$$choice0~0_1, Thread0_P0_#t~nondet3=|v_Thread0_P0_#t~nondet3_2|, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, Thread0_P0_#t~nondet4=|v_Thread0_P0_#t~nondet4_2|, Thread0_P0_~arg.base=v_Thread0_P0_~arg.base_1, ~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y~0=v_~y~0_1, ~weak$$choice2~0=v_~weak$$choice2~0_1, ~x~0=v_~x~0_1} AuxVars[] AssignedVars[~weak$$choice0~0, Thread0_P0_#t~nondet3, Thread0_P0_~arg.offset, ~y$mem_tmp~0, Thread0_P0_#t~nondet4, Thread0_P0_~arg.base, ~y$flush_delayed~0, ~weak$$choice2~0, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite51|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [683] L713-->L713-5: Formula: (and (= |v_Thread0_P0_#t~ite6_1| v_~y~0_2) (let ((.cse0 (= (mod v_~y$r_buff0_thd1~0_2 256) 0))) (or (and (= 0 (mod v_~y$r_buff1_thd1~0_2 256)) .cse0) (= (mod v_~y$w_buff0_used~0_2 256) 0) (and .cse0 (= (mod v_~y$w_buff1_used~0_2 256) 0))))) InVars {~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y~0=v_~y~0_2, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_2} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2, ~y~0=v_~y~0_2, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite51|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [820] L764-5-->L765: Formula: (= v_~y~0_14 |v_Thread1_P1_#t~ite51_2|) InVars {Thread1_P1_#t~ite51=|v_Thread1_P1_#t~ite51_2|} OutVars{Thread1_P1_#t~ite50=|v_Thread1_P1_#t~ite50_1|, ~y~0=v_~y~0_14, Thread1_P1_#t~ite51=|v_Thread1_P1_#t~ite51_3|} AuxVars[] AssignedVars[Thread1_P1_#t~ite50, Thread1_P1_#t~ite51, ~y~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [823] L765-->L765-2: Formula: (and (not (= 0 (mod v_~y$r_buff0_thd2~0_23 256))) (= |v_Thread1_P1_#t~ite52_1| 0) (not (= (mod v_~y$w_buff0_used~0_51 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_51, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_23} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_51, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_23, Thread1_P1_#t~ite52=|v_Thread1_P1_#t~ite52_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite52] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite52|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [826] L765-2-->L766: Formula: (= v_~y$w_buff0_used~0_53 |v_Thread1_P1_#t~ite52_3|) InVars {Thread1_P1_#t~ite52=|v_Thread1_P1_#t~ite52_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_53, Thread1_P1_#t~ite52=|v_Thread1_P1_#t~ite52_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite52] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [828] L766-->L766-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_28 256)) (= (mod v_~y$w_buff0_used~0_57 256) 0)) (= |v_Thread1_P1_#t~ite53_2| v_~y$w_buff1_used~0_32) (or (= 0 (mod v_~y$w_buff1_used~0_32 256)) (= (mod v_~y$r_buff1_thd2~0_17 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_17, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_57, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_28, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_17, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_57, Thread1_P1_#t~ite53=|v_Thread1_P1_#t~ite53_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_28, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} AuxVars[] AssignedVars[Thread1_P1_#t~ite53] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [685] L713-5-->L714: Formula: (= v_~y~0_4 |v_Thread0_P0_#t~ite6_2|) InVars {Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_2|} OutVars{Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_1|, ~y~0=v_~y~0_4, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_3|} AuxVars[] AssignedVars[Thread0_P0_#t~ite5, ~y~0, Thread0_P0_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [688] L714-->L714-8: Formula: (and (not (= (mod v_~weak$$choice2~0_2 256) 0)) (= |v_Thread0_P0_#t~ite9_1| v_~y$w_buff0~0_2)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2} OutVars{Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_1|, ~weak$$choice2~0=v_~weak$$choice2~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite9] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite9|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [691] L714-8-->L715: Formula: (= v_~y$w_buff0~0_6 |v_Thread0_P0_#t~ite9_2|) InVars {Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_2|} OutVars{Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_1|, Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_1|, Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_3|, ~y$w_buff0~0=v_~y$w_buff0~0_6} AuxVars[] AssignedVars[~y$w_buff0~0, Thread0_P0_#t~ite7, Thread0_P0_#t~ite8, Thread0_P0_#t~ite9] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [694] L715-->L715-8: Formula: (and (= |v_Thread0_P0_#t~ite12_1| v_~y$w_buff1~0_2) (not (= 0 (mod v_~weak$$choice2~0_4 256)))) InVars {~y$w_buff1~0=v_~y$w_buff1~0_2, ~weak$$choice2~0=v_~weak$$choice2~0_4} OutVars{Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_1|, ~y$w_buff1~0=v_~y$w_buff1~0_2, ~weak$$choice2~0=v_~weak$$choice2~0_4} AuxVars[] AssignedVars[Thread0_P0_#t~ite12] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite12|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [699] L715-8-->L716: Formula: (= v_~y$w_buff1~0_6 |v_Thread0_P0_#t~ite12_2|) InVars {Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_2|} OutVars{Thread0_P0_#t~ite11=|v_Thread0_P0_#t~ite11_1|, Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_3|, ~y$w_buff1~0=v_~y$w_buff1~0_6, Thread0_P0_#t~ite10=|v_Thread0_P0_#t~ite10_1|} AuxVars[] AssignedVars[~y$w_buff1~0, Thread0_P0_#t~ite10, Thread0_P0_#t~ite11, Thread0_P0_#t~ite12] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [829] L766-2-->L767: Formula: (= v_~y$w_buff1_used~0_33 |v_Thread1_P1_#t~ite53_3|) InVars {Thread1_P1_#t~ite53=|v_Thread1_P1_#t~ite53_3|} OutVars{Thread1_P1_#t~ite53=|v_Thread1_P1_#t~ite53_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} AuxVars[] AssignedVars[Thread1_P1_#t~ite53, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [831] L767-->L767-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_32 256)) (= 0 (mod v_~y$w_buff0_used~0_61 256))) (= |v_Thread1_P1_#t~ite54_2| v_~y$r_buff0_thd2~0_32)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_61, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_32} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_61, Thread1_P1_#t~ite54=|v_Thread1_P1_#t~ite54_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_32} AuxVars[] AssignedVars[Thread1_P1_#t~ite54] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite54|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [832] L767-2-->L768: Formula: (= v_~y$r_buff0_thd2~0_33 |v_Thread1_P1_#t~ite54_3|) InVars {Thread1_P1_#t~ite54=|v_Thread1_P1_#t~ite54_3|} OutVars{Thread1_P1_#t~ite54=|v_Thread1_P1_#t~ite54_4|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_33} AuxVars[] AssignedVars[Thread1_P1_#t~ite54, ~y$r_buff0_thd2~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [834] L768-->L768-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd2~0_19 256)) (= 0 (mod v_~y$w_buff1_used~0_35 256))) (= |v_Thread1_P1_#t~ite55_2| v_~y$r_buff1_thd2~0_19) (or (= 0 (mod v_~y$w_buff0_used~0_64 256)) (= (mod v_~y$r_buff0_thd2~0_35 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_19, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_64, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_35, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_35} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_19, Thread1_P1_#t~ite55=|v_Thread1_P1_#t~ite55_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_64, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_35, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_35} AuxVars[] AssignedVars[Thread1_P1_#t~ite55] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite55|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [835] L768-2-->L773: Formula: (and (= v_~y$r_buff1_thd2~0_20 |v_Thread1_P1_#t~ite55_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4, Thread1_P1_#t~ite55=|v_Thread1_P1_#t~ite55_3|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_20, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread1_P1_#t~ite55=|v_Thread1_P1_#t~ite55_4|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, Thread1_P1_#t~ite55] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [703] L716-->L716-8: Formula: (and (not (= (mod v_~weak$$choice2~0_6 256) 0)) (= |v_Thread0_P0_#t~ite15_1| v_~y$w_buff0_used~0_16)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, ~weak$$choice2~0=v_~weak$$choice2~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_1|, ~weak$$choice2~0=v_~weak$$choice2~0_6} AuxVars[] AssignedVars[Thread0_P0_#t~ite15] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite15|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [708] L716-8-->L717: Formula: (= v_~y$w_buff0_used~0_21 |v_Thread0_P0_#t~ite15_2|) InVars {Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_2|} OutVars{Thread0_P0_#t~ite13=|v_Thread0_P0_#t~ite13_1|, Thread0_P0_#t~ite14=|v_Thread0_P0_#t~ite14_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_21, Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_3|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread0_P0_#t~ite13, Thread0_P0_#t~ite14, Thread0_P0_#t~ite15] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [712] L717-->L717-8: Formula: (and (not (= (mod v_~weak$$choice2~0_8 256) 0)) (= |v_Thread0_P0_#t~ite18_1| v_~y$w_buff1_used~0_10)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_10} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_8, Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_10} AuxVars[] AssignedVars[Thread0_P0_#t~ite18] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite18|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [717] L717-8-->L718: Formula: (= v_~y$w_buff1_used~0_13 |v_Thread0_P0_#t~ite18_2|) InVars {Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_2|} OutVars{Thread0_P0_#t~ite16=|v_Thread0_P0_#t~ite16_1|, Thread0_P0_#t~ite17=|v_Thread0_P0_#t~ite17_1|, Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_13} AuxVars[] AssignedVars[Thread0_P0_#t~ite16, Thread0_P0_#t~ite17, Thread0_P0_#t~ite18, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [721] L718-->L718-8: Formula: (and (not (= (mod v_~weak$$choice2~0_10 256) 0)) (= |v_Thread0_P0_#t~ite21_1| v_~y$r_buff0_thd1~0_24)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_10, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_24} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_10, Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_1|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_24} AuxVars[] AssignedVars[Thread0_P0_#t~ite21] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite21|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [726] L718-8-->L719: Formula: (= v_~y$r_buff0_thd1~0_29 |v_Thread0_P0_#t~ite21_2|) InVars {Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_2|} OutVars{Thread0_P0_#t~ite19=|v_Thread0_P0_#t~ite19_1|, Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_3|, Thread0_P0_#t~ite20=|v_Thread0_P0_#t~ite20_1|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_29} AuxVars[] AssignedVars[Thread0_P0_#t~ite19, Thread0_P0_#t~ite21, Thread0_P0_#t~ite20, ~y$r_buff0_thd1~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [730] L719-->L719-8: Formula: (and (not (= (mod v_~weak$$choice2~0_12 256) 0)) (= |v_Thread0_P0_#t~ite24_1| v_~y$r_buff1_thd1~0_15)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_12, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_15} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_15, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_1|, ~weak$$choice2~0=v_~weak$$choice2~0_12} AuxVars[] AssignedVars[Thread0_P0_#t~ite24] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite24|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [735] L719-8-->L721: Formula: (and (= v_~y$r_buff1_thd1~0_4 |v_Thread0_P0_#t~ite24_2|) (= v_~__unbuffered_p0_EAX~0_1 v_~y~0_3)) InVars {~y~0=v_~y~0_3, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_2|} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_4, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_1, Thread0_P0_#t~ite23=|v_Thread0_P0_#t~ite23_1|, Thread0_P0_#t~ite22=|v_Thread0_P0_#t~ite22_1|, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_3|, ~y~0=v_~y~0_3} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, ~__unbuffered_p0_EAX~0, Thread0_P0_#t~ite23, Thread0_P0_#t~ite22, Thread0_P0_#t~ite24] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [739] L721-->L721-2: Formula: (and (not (= 0 (mod v_~y$flush_delayed~0_2 256))) (= |v_Thread0_P0_#t~ite25_1| v_~y$mem_tmp~0_2)) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_1|} AuxVars[] AssignedVars[Thread0_P0_#t~ite25] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite25|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [744] L721-2-->L729: Formula: (and (= v_~y$flush_delayed~0_4 0) (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~y~0_6 |v_Thread0_P0_#t~ite25_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_3|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_4, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_4|, ~y~0=v_~y~0_6} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, Thread0_P0_#t~ite25, ~y~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [672] L789-1-->L793: Formula: (= v_~main$tmp_guard0~0_1 (ite (= (ite (= v_~__unbuffered_cnt~0_5 2) 1 0) 0) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_1, ULTIMATE.start_main_#t~nondet58=|v_ULTIMATE.start_main_#t~nondet58_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet58, ~main$tmp_guard0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [562] L793-->L795: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_2 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [646] L795-->L795-2: Formula: (or (= 0 (mod v_~y$r_buff0_thd0~0_3 256)) (= (mod v_~y$w_buff0_used~0_75 256) 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_75, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_3} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_75, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [622] L795-2-->L795-4: Formula: (and (or (= (mod v_~y$w_buff1_used~0_42 256) 0) (= (mod v_~y$r_buff1_thd0~0_3 256) 0)) (= |v_ULTIMATE.start_main_#t~ite59_2| v_~y~0_15)) InVars {~y~0=v_~y~0_15, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_3, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_42} OutVars{ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_2|, ~y~0=v_~y~0_15, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_3, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_42} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite59] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [631] L795-4-->L795-5: Formula: (= |v_ULTIMATE.start_main_#t~ite60_2| |v_ULTIMATE.start_main_#t~ite59_3|) InVars {ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_3|} OutVars{ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_2|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite60] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_#t~ite60|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [634] L795-5-->L796: Formula: (= v_~y~0_16 |v_ULTIMATE.start_main_#t~ite60_4|) InVars {ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_4|} OutVars{ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_3|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_4|, ~y~0=v_~y~0_16} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#t~ite59, ~y~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [545] L796-->L796-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_77 256)) (= (mod v_~y$r_buff0_thd0~0_5 256) 0)) (= |v_ULTIMATE.start_main_#t~ite61_2| v_~y$w_buff0_used~0_77)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_77, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_5} OutVars{ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_77, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_5} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite61] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite61|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [558] L796-2-->L797: Formula: (= v_~y$w_buff0_used~0_78 |v_ULTIMATE.start_main_#t~ite61_4|) InVars {ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_4|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_78, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite61, ~y$w_buff0_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [469] L797-->L797-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd0~0_7 256)) (= (mod v_~y$w_buff0_used~0_80 256) 0)) (or (= 0 (mod v_~y$w_buff1_used~0_44 256)) (= 0 (mod v_~y$r_buff1_thd0~0_5 256))) (= |v_ULTIMATE.start_main_#t~ite62_2| v_~y$w_buff1_used~0_44)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_80, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_5, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_44} OutVars{ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_80, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_5, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_44} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite62] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite62|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [474] L797-2-->L798: Formula: (= v_~y$w_buff1_used~0_45 |v_ULTIMATE.start_main_#t~ite62_4|) InVars {ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_4|} OutVars{ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_45} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite62, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [608] L798-->L798-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite63_2| v_~y$r_buff0_thd0~0_9) (or (= 0 (mod v_~y$r_buff0_thd0~0_9 256)) (= 0 (mod v_~y$w_buff0_used~0_82 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_82, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_9} OutVars{ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_82, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite63|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [614] L798-2-->L799: Formula: (= v_~y$r_buff0_thd0~0_10 |v_ULTIMATE.start_main_#t~ite63_4|) InVars {ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_4|} OutVars{ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_3|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63, ~y$r_buff0_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [538] L799-->L799-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite64_2| v_~y$r_buff1_thd0~0_7) (or (= 0 (mod v_~y$r_buff0_thd0~0_12 256)) (= 0 (mod v_~y$w_buff0_used~0_84 256))) (or (= 0 (mod v_~y$w_buff1_used~0_47 256)) (= (mod v_~y$r_buff1_thd0~0_7 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_84, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_47} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_84, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_12, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_2|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_47} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite64] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite64|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [523] L799-2-->L804: Formula: (and (= v_~y$r_buff1_thd0~0_8 |v_ULTIMATE.start_main_#t~ite64_4|) (= v_~main$tmp_guard1~0_1 (ite (= (ite (not (and (= 0 v_~__unbuffered_p1_EBX~0_2) (= 1 v_~__unbuffered_p1_EAX~0_2) (= v_~__unbuffered_p0_EAX~0_2 0))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_4|} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_3|} AuxVars[] AssignedVars[~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite64] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [561] L804-->L804-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [564] L804-1-->L5: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [623] L5-->L5-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [653] L5-1-->L5-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [647] L5-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1773~0.base, main_~#t1773~0.offset, main_~#t1774~0.base, main_~#t1774~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1773~0.base, main_~#t1773~0.offset := #Ultimate.alloc(4); srcloc: L786 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1773~0.base, main_~#t1773~0.offset, 4); srcloc: L786-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1774~0.base, main_~#t1774~0.offset := #Ultimate.alloc(4); srcloc: L788 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1774~0.base, main_~#t1774~0.offset, 4); srcloc: L788-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd2~0 := 1;~weak$$choice0~0 := #t~nondet27;havoc #t~nondet27;~weak$$choice2~0 := #t~nondet28;havoc #t~nondet28;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite29 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 #t~ite30 := #t~ite29; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=1, |P1_#t~ite30|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite30;havoc #t~ite29;havoc #t~ite30; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite33 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite33|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0~0 := #t~ite33;havoc #t~ite32;havoc #t~ite33;havoc #t~ite31; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite36 := ~y$w_buff1~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite36|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff1~0 := #t~ite36;havoc #t~ite35;havoc #t~ite34;havoc #t~ite36; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite39 := ~y$w_buff0_used~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite39|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite39;havoc #t~ite37;havoc #t~ite38;havoc #t~ite39; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite42 := ~y$w_buff1_used~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite42|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite42;havoc #t~ite40;havoc #t~ite42;havoc #t~ite41; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite45 := ~y$r_buff0_thd2~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite45|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$r_buff0_thd2~0 := #t~ite45;havoc #t~ite45;havoc #t~ite43;havoc #t~ite44; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite48 := ~y$r_buff1_thd2~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite48|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$r_buff1_thd2~0 := #t~ite48;havoc #t~ite47;havoc #t~ite48;havoc #t~ite46;~__unbuffered_p1_EAX~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$flush_delayed~0 % 256;#t~ite49 := ~y$mem_tmp~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite49|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y~0 := #t~ite49;havoc #t~ite49;~y$flush_delayed~0 := 0;~__unbuffered_p1_EBX~0 := ~x~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite51 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 1;~weak$$choice0~0 := #t~nondet3;havoc #t~nondet3;~weak$$choice2~0 := #t~nondet4;havoc #t~nondet4;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256);#t~ite6 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite51;havoc #t~ite50;havoc #t~ite51; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite52 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite52|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite52;havoc #t~ite52; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite53 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite6;havoc #t~ite5;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite9 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite9|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0~0 := #t~ite9;havoc #t~ite8;havoc #t~ite7;havoc #t~ite9; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite12 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite12|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1~0 := #t~ite12;havoc #t~ite11;havoc #t~ite12;havoc #t~ite10; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$w_buff1_used~0 := #t~ite53;havoc #t~ite53; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite54 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite54|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff0_thd2~0 := #t~ite54;havoc #t~ite54; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite55 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite55|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd2~0 := #t~ite55;havoc #t~ite55;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite15 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite15|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0_used~0 := #t~ite15;havoc #t~ite13;havoc #t~ite15;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite18 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1_used~0 := #t~ite18;havoc #t~ite16;havoc #t~ite18;havoc #t~ite17; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite21 := ~y$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite21|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff0_thd1~0 := #t~ite21;havoc #t~ite21;havoc #t~ite20;havoc #t~ite19; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite24 := ~y$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite24|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff1_thd1~0 := #t~ite24;havoc #t~ite22;havoc #t~ite24;havoc #t~ite23;~__unbuffered_p0_EAX~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite25 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite25|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y~0 := #t~ite25;havoc #t~ite25;~y$flush_delayed~0 := 0;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet58;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite59 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 main_#t~ite60 := main_#t~ite59; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_#t~ite60|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y~0 := main_#t~ite60;havoc main_#t~ite59;havoc main_#t~ite60; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite61 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite61|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := main_#t~ite61;havoc main_#t~ite61; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite62 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite62|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := main_#t~ite62;havoc main_#t~ite62; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite63|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite63;havoc main_#t~ite63; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite64|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite64;havoc main_#t~ite64;~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1773~0.base, main_~#t1773~0.offset, main_~#t1774~0.base, main_~#t1774~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1773~0.base, main_~#t1773~0.offset := #Ultimate.alloc(4); srcloc: L786 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1773~0.base, main_~#t1773~0.offset, 4); srcloc: L786-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1774~0.base, main_~#t1774~0.offset := #Ultimate.alloc(4); srcloc: L788 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1774~0.base, main_~#t1774~0.offset, 4); srcloc: L788-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd2~0 := 1;~weak$$choice0~0 := #t~nondet27;havoc #t~nondet27;~weak$$choice2~0 := #t~nondet28;havoc #t~nondet28;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite29 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 #t~ite30 := #t~ite29; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=1, |P1_#t~ite30|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite30;havoc #t~ite29;havoc #t~ite30; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite33 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite33|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0~0 := #t~ite33;havoc #t~ite32;havoc #t~ite33;havoc #t~ite31; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite36 := ~y$w_buff1~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite36|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff1~0 := #t~ite36;havoc #t~ite35;havoc #t~ite34;havoc #t~ite36; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite39 := ~y$w_buff0_used~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite39|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite39;havoc #t~ite37;havoc #t~ite38;havoc #t~ite39; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite42 := ~y$w_buff1_used~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite42|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite42;havoc #t~ite40;havoc #t~ite42;havoc #t~ite41; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite45 := ~y$r_buff0_thd2~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite45|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$r_buff0_thd2~0 := #t~ite45;havoc #t~ite45;havoc #t~ite43;havoc #t~ite44; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite48 := ~y$r_buff1_thd2~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite48|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$r_buff1_thd2~0 := #t~ite48;havoc #t~ite47;havoc #t~ite48;havoc #t~ite46;~__unbuffered_p1_EAX~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$flush_delayed~0 % 256;#t~ite49 := ~y$mem_tmp~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite49|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y~0 := #t~ite49;havoc #t~ite49;~y$flush_delayed~0 := 0;~__unbuffered_p1_EBX~0 := ~x~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite51 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 1;~weak$$choice0~0 := #t~nondet3;havoc #t~nondet3;~weak$$choice2~0 := #t~nondet4;havoc #t~nondet4;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256);#t~ite6 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite51;havoc #t~ite50;havoc #t~ite51; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite52 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite52|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite52;havoc #t~ite52; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite53 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite6;havoc #t~ite5;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite9 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite9|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0~0 := #t~ite9;havoc #t~ite8;havoc #t~ite7;havoc #t~ite9; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite12 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite12|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1~0 := #t~ite12;havoc #t~ite11;havoc #t~ite12;havoc #t~ite10; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$w_buff1_used~0 := #t~ite53;havoc #t~ite53; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite54 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite54|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff0_thd2~0 := #t~ite54;havoc #t~ite54; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite55 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite55|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd2~0 := #t~ite55;havoc #t~ite55;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite15 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite15|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0_used~0 := #t~ite15;havoc #t~ite13;havoc #t~ite15;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite18 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1_used~0 := #t~ite18;havoc #t~ite16;havoc #t~ite18;havoc #t~ite17; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite21 := ~y$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite21|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff0_thd1~0 := #t~ite21;havoc #t~ite21;havoc #t~ite20;havoc #t~ite19; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite24 := ~y$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite24|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff1_thd1~0 := #t~ite24;havoc #t~ite22;havoc #t~ite24;havoc #t~ite23;~__unbuffered_p0_EAX~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite25 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite25|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y~0 := #t~ite25;havoc #t~ite25;~y$flush_delayed~0 := 0;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet58;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite59 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 main_#t~ite60 := main_#t~ite59; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_#t~ite60|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y~0 := main_#t~ite60;havoc main_#t~ite59;havoc main_#t~ite60; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite61 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite61|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := main_#t~ite61;havoc main_#t~ite61; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite62 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite62|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := main_#t~ite62;havoc main_#t~ite62; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite63|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite63;havoc main_#t~ite63; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite64|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite64;havoc main_#t~ite64;~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1773~0.base, main_~#t1773~0.offset, main_~#t1774~0.base, main_~#t1774~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 call main_~#t1773~0.base, main_~#t1773~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] -1 call write~int(0, main_~#t1773~0.base, main_~#t1773~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] -1 havoc main_#t~nondet57; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L788] -1 call main_~#t1774~0.base, main_~#t1774~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 call write~int(1, main_~#t1774~0.base, main_~#t1774~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L731-L774] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L734] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L735] 0 ~y$w_buff0~0 := 1; [L736] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L737] 0 ~y$w_buff0_used~0 := 1; [L738] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L738] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L740] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L741] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L742] 0 ~y$r_buff0_thd2~0 := 1; [L745] 0 ~weak$$choice0~0 := #t~nondet27; [L745] 0 havoc #t~nondet27; [L746] 0 ~weak$$choice2~0 := #t~nondet28; [L746] 0 havoc #t~nondet28; [L747] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L748] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 assume !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L749] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 #t~ite30 := #t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=1, #t~ite30=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 ~y~0 := #t~ite30; [L749] 0 havoc #t~ite29; [L749] 0 havoc #t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] 0 assume 0 != ~weak$$choice2~0 % 256; [L750] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] 0 ~y$w_buff0~0 := #t~ite33; [L750] 0 havoc #t~ite32; [L750] 0 havoc #t~ite33; [L750] 0 havoc #t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] 0 assume 0 != ~weak$$choice2~0 % 256; [L751] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] 0 ~y$w_buff1~0 := #t~ite36; [L751] 0 havoc #t~ite35; [L751] 0 havoc #t~ite34; [L751] 0 havoc #t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] 0 assume 0 != ~weak$$choice2~0 % 256; [L752] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite39=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] 0 ~y$w_buff0_used~0 := #t~ite39; [L752] 0 havoc #t~ite37; [L752] 0 havoc #t~ite38; [L752] 0 havoc #t~ite39; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 assume 0 != ~weak$$choice2~0 % 256; [L753] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff1_used~0 := #t~ite42; [L753] 0 havoc #t~ite40; [L753] 0 havoc #t~ite42; [L753] 0 havoc #t~ite41; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 assume 0 != ~weak$$choice2~0 % 256; [L754] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L754] 0 havoc #t~ite45; [L754] 0 havoc #t~ite43; [L754] 0 havoc #t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 assume 0 != ~weak$$choice2~0 % 256; [L755] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L755] 0 havoc #t~ite47; [L755] 0 havoc #t~ite48; [L755] 0 havoc #t~ite46; [L756] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 assume 0 != ~y$flush_delayed~0 % 256; [L757] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite49=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y~0 := #t~ite49; [L757] 0 havoc #t~ite49; [L758] 0 ~y$flush_delayed~0 := 0; [L761] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L764] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701-L730] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L704] 1 ~x~0 := 1; [L709] 1 ~weak$$choice0~0 := #t~nondet3; [L709] 1 havoc #t~nondet3; [L710] 1 ~weak$$choice2~0 := #t~nondet4; [L710] 1 havoc #t~nondet4; [L711] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L712] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256); [L713] 1 #t~ite6 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] 0 ~y~0 := #t~ite51; [L764] 0 havoc #t~ite50; [L764] 0 havoc #t~ite51; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L765] 0 #t~ite52 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite52=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite52; [L765] 0 havoc #t~ite52; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L766] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L766] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L713] 1 ~y~0 := #t~ite6; [L713] 1 havoc #t~ite5; [L713] 1 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 1 assume 0 != ~weak$$choice2~0 % 256; [L714] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 1 ~y$w_buff0~0 := #t~ite9; [L714] 1 havoc #t~ite8; [L714] 1 havoc #t~ite7; [L714] 1 havoc #t~ite9; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 1 assume 0 != ~weak$$choice2~0 % 256; [L715] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 1 ~y$w_buff1~0 := #t~ite12; [L715] 1 havoc #t~ite11; [L715] 1 havoc #t~ite12; [L715] 1 havoc #t~ite10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L766] 0 ~y$w_buff1_used~0 := #t~ite53; [L766] 0 havoc #t~ite53; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L767] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite54=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L767] 0 havoc #t~ite54; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L768] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite55=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L768] 0 havoc #t~ite55; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 assume 0 != ~weak$$choice2~0 % 256; [L716] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 ~y$w_buff0_used~0 := #t~ite15; [L716] 1 havoc #t~ite13; [L716] 1 havoc #t~ite15; [L716] 1 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 assume 0 != ~weak$$choice2~0 % 256; [L717] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff1_used~0 := #t~ite18; [L717] 1 havoc #t~ite16; [L717] 1 havoc #t~ite18; [L717] 1 havoc #t~ite17; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 assume 0 != ~weak$$choice2~0 % 256; [L718] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L718] 1 havoc #t~ite21; [L718] 1 havoc #t~ite20; [L718] 1 havoc #t~ite19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 assume 0 != ~weak$$choice2~0 % 256; [L719] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L719] 1 havoc #t~ite22; [L719] 1 havoc #t~ite24; [L719] 1 havoc #t~ite23; [L720] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 assume 0 != ~y$flush_delayed~0 % 256; [L721] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y~0 := #t~ite25; [L721] 1 havoc #t~ite25; [L722] 1 ~y$flush_delayed~0 := 0; [L727] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 havoc main_#t~nondet58; [L791] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L793] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L795] -1 main_#t~ite59 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 main_#t~ite60 := main_#t~ite59; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_#t~ite60=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 ~y~0 := main_#t~ite60; [L795] -1 havoc main_#t~ite59; [L795] -1 havoc main_#t~ite60; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L796] -1 main_#t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite61=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 ~y$w_buff0_used~0 := main_#t~ite61; [L796] -1 havoc main_#t~ite61; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L797] -1 main_#t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite62=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] -1 ~y$w_buff1_used~0 := main_#t~ite62; [L797] -1 havoc main_#t~ite62; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L798] -1 main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite63=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y$r_buff0_thd0~0 := main_#t~ite63; [L798] -1 havoc main_#t~ite63; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L799] -1 main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite64=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$r_buff1_thd0~0 := main_#t~ite64; [L799] -1 havoc main_#t~ite64; [L802] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L804] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L804] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1773~0.base, main_~#t1773~0.offset, main_~#t1774~0.base, main_~#t1774~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 call main_~#t1773~0.base, main_~#t1773~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] -1 call write~int(0, main_~#t1773~0.base, main_~#t1773~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] -1 havoc main_#t~nondet57; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L788] -1 call main_~#t1774~0.base, main_~#t1774~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 call write~int(1, main_~#t1774~0.base, main_~#t1774~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L731-L774] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L734] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L735] 0 ~y$w_buff0~0 := 1; [L736] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L737] 0 ~y$w_buff0_used~0 := 1; [L738] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L738] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L740] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L741] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L742] 0 ~y$r_buff0_thd2~0 := 1; [L745] 0 ~weak$$choice0~0 := #t~nondet27; [L745] 0 havoc #t~nondet27; [L746] 0 ~weak$$choice2~0 := #t~nondet28; [L746] 0 havoc #t~nondet28; [L747] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L748] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 assume !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L749] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 #t~ite30 := #t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=1, #t~ite30=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 ~y~0 := #t~ite30; [L749] 0 havoc #t~ite29; [L749] 0 havoc #t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] 0 assume 0 != ~weak$$choice2~0 % 256; [L750] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] 0 ~y$w_buff0~0 := #t~ite33; [L750] 0 havoc #t~ite32; [L750] 0 havoc #t~ite33; [L750] 0 havoc #t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] 0 assume 0 != ~weak$$choice2~0 % 256; [L751] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] 0 ~y$w_buff1~0 := #t~ite36; [L751] 0 havoc #t~ite35; [L751] 0 havoc #t~ite34; [L751] 0 havoc #t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] 0 assume 0 != ~weak$$choice2~0 % 256; [L752] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite39=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] 0 ~y$w_buff0_used~0 := #t~ite39; [L752] 0 havoc #t~ite37; [L752] 0 havoc #t~ite38; [L752] 0 havoc #t~ite39; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 assume 0 != ~weak$$choice2~0 % 256; [L753] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff1_used~0 := #t~ite42; [L753] 0 havoc #t~ite40; [L753] 0 havoc #t~ite42; [L753] 0 havoc #t~ite41; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 assume 0 != ~weak$$choice2~0 % 256; [L754] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L754] 0 havoc #t~ite45; [L754] 0 havoc #t~ite43; [L754] 0 havoc #t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 assume 0 != ~weak$$choice2~0 % 256; [L755] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L755] 0 havoc #t~ite47; [L755] 0 havoc #t~ite48; [L755] 0 havoc #t~ite46; [L756] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 assume 0 != ~y$flush_delayed~0 % 256; [L757] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite49=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y~0 := #t~ite49; [L757] 0 havoc #t~ite49; [L758] 0 ~y$flush_delayed~0 := 0; [L761] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L764] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701-L730] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L704] 1 ~x~0 := 1; [L709] 1 ~weak$$choice0~0 := #t~nondet3; [L709] 1 havoc #t~nondet3; [L710] 1 ~weak$$choice2~0 := #t~nondet4; [L710] 1 havoc #t~nondet4; [L711] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L712] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256); [L713] 1 #t~ite6 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] 0 ~y~0 := #t~ite51; [L764] 0 havoc #t~ite50; [L764] 0 havoc #t~ite51; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L765] 0 #t~ite52 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite52=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite52; [L765] 0 havoc #t~ite52; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L766] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L766] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L713] 1 ~y~0 := #t~ite6; [L713] 1 havoc #t~ite5; [L713] 1 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 1 assume 0 != ~weak$$choice2~0 % 256; [L714] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 1 ~y$w_buff0~0 := #t~ite9; [L714] 1 havoc #t~ite8; [L714] 1 havoc #t~ite7; [L714] 1 havoc #t~ite9; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 1 assume 0 != ~weak$$choice2~0 % 256; [L715] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 1 ~y$w_buff1~0 := #t~ite12; [L715] 1 havoc #t~ite11; [L715] 1 havoc #t~ite12; [L715] 1 havoc #t~ite10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L766] 0 ~y$w_buff1_used~0 := #t~ite53; [L766] 0 havoc #t~ite53; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L767] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite54=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L767] 0 havoc #t~ite54; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L768] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite55=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L768] 0 havoc #t~ite55; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 assume 0 != ~weak$$choice2~0 % 256; [L716] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 ~y$w_buff0_used~0 := #t~ite15; [L716] 1 havoc #t~ite13; [L716] 1 havoc #t~ite15; [L716] 1 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 assume 0 != ~weak$$choice2~0 % 256; [L717] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff1_used~0 := #t~ite18; [L717] 1 havoc #t~ite16; [L717] 1 havoc #t~ite18; [L717] 1 havoc #t~ite17; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 assume 0 != ~weak$$choice2~0 % 256; [L718] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L718] 1 havoc #t~ite21; [L718] 1 havoc #t~ite20; [L718] 1 havoc #t~ite19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 assume 0 != ~weak$$choice2~0 % 256; [L719] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L719] 1 havoc #t~ite22; [L719] 1 havoc #t~ite24; [L719] 1 havoc #t~ite23; [L720] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 assume 0 != ~y$flush_delayed~0 % 256; [L721] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y~0 := #t~ite25; [L721] 1 havoc #t~ite25; [L722] 1 ~y$flush_delayed~0 := 0; [L727] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 havoc main_#t~nondet58; [L791] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L793] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L795] -1 main_#t~ite59 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 main_#t~ite60 := main_#t~ite59; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_#t~ite60=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 ~y~0 := main_#t~ite60; [L795] -1 havoc main_#t~ite59; [L795] -1 havoc main_#t~ite60; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L796] -1 main_#t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite61=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 ~y$w_buff0_used~0 := main_#t~ite61; [L796] -1 havoc main_#t~ite61; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L797] -1 main_#t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite62=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] -1 ~y$w_buff1_used~0 := main_#t~ite62; [L797] -1 havoc main_#t~ite62; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L798] -1 main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite63=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y$r_buff0_thd0~0 := main_#t~ite63; [L798] -1 havoc main_#t~ite63; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L799] -1 main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite64=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$r_buff1_thd0~0 := main_#t~ite64; [L799] -1 havoc main_#t~ite64; [L802] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L804] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L804] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1773~0, main_~#t1774~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] FCALL -1 call main_~#t1773~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FCALL -1 call write~int(0, main_~#t1773~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] -1 havoc main_#t~nondet57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L788] FCALL -1 call main_~#t1774~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call write~int(1, main_~#t1774~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L731-L774] 0 ~arg := #in~arg; [L734] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L735] 0 ~y$w_buff0~0 := 1; [L736] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L737] 0 ~y$w_buff0_used~0 := 1; [L738] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L738] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L740] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L741] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L742] 0 ~y$r_buff0_thd2~0 := 1; [L745] 0 ~weak$$choice0~0 := #t~nondet27; [L745] 0 havoc #t~nondet27; [L746] 0 ~weak$$choice2~0 := #t~nondet28; [L746] 0 havoc #t~nondet28; [L747] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L748] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND FALSE 0 !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L749] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 #t~ite30 := #t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=1, #t~ite30=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 ~y~0 := #t~ite30; [L749] 0 havoc #t~ite29; [L749] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L750] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] 0 ~y$w_buff0~0 := #t~ite33; [L750] 0 havoc #t~ite32; [L750] 0 havoc #t~ite33; [L750] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L751] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] 0 ~y$w_buff1~0 := #t~ite36; [L751] 0 havoc #t~ite35; [L751] 0 havoc #t~ite34; [L751] 0 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L752] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite39=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] 0 ~y$w_buff0_used~0 := #t~ite39; [L752] 0 havoc #t~ite37; [L752] 0 havoc #t~ite38; [L752] 0 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L753] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff1_used~0 := #t~ite42; [L753] 0 havoc #t~ite40; [L753] 0 havoc #t~ite42; [L753] 0 havoc #t~ite41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L754] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L754] 0 havoc #t~ite45; [L754] 0 havoc #t~ite43; [L754] 0 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L755] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L755] 0 havoc #t~ite47; [L755] 0 havoc #t~ite48; [L755] 0 havoc #t~ite46; [L756] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L757] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite49=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y~0 := #t~ite49; [L757] 0 havoc #t~ite49; [L758] 0 ~y$flush_delayed~0 := 0; [L761] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L764] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701-L730] 1 ~arg := #in~arg; [L704] 1 ~x~0 := 1; [L709] 1 ~weak$$choice0~0 := #t~nondet3; [L709] 1 havoc #t~nondet3; [L710] 1 ~weak$$choice2~0 := #t~nondet4; [L710] 1 havoc #t~nondet4; [L711] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L712] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L713] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] 0 ~y~0 := #t~ite51; [L764] 0 havoc #t~ite50; [L764] 0 havoc #t~ite51; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L765] 0 #t~ite52 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite52=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite52; [L765] 0 havoc #t~ite52; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L766] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L766] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L713] 1 ~y~0 := #t~ite6; [L713] 1 havoc #t~ite5; [L713] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L714] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 1 ~y$w_buff0~0 := #t~ite9; [L714] 1 havoc #t~ite8; [L714] 1 havoc #t~ite7; [L714] 1 havoc #t~ite9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L715] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 1 ~y$w_buff1~0 := #t~ite12; [L715] 1 havoc #t~ite11; [L715] 1 havoc #t~ite12; [L715] 1 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L766] 0 ~y$w_buff1_used~0 := #t~ite53; [L766] 0 havoc #t~ite53; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L767] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite54=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L767] 0 havoc #t~ite54; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L768] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite55=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L768] 0 havoc #t~ite55; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L716] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 ~y$w_buff0_used~0 := #t~ite15; [L716] 1 havoc #t~ite13; [L716] 1 havoc #t~ite15; [L716] 1 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff1_used~0 := #t~ite18; [L717] 1 havoc #t~ite16; [L717] 1 havoc #t~ite18; [L717] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L718] 1 havoc #t~ite21; [L718] 1 havoc #t~ite20; [L718] 1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L719] 1 havoc #t~ite22; [L719] 1 havoc #t~ite24; [L719] 1 havoc #t~ite23; [L720] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L721] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y~0 := #t~ite25; [L721] 1 havoc #t~ite25; [L722] 1 ~y$flush_delayed~0 := 0; [L727] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 havoc main_#t~nondet58; [L791] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L793] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L795] -1 main_#t~ite59 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 main_#t~ite60 := main_#t~ite59; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_#t~ite60=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 ~y~0 := main_#t~ite60; [L795] -1 havoc main_#t~ite59; [L795] -1 havoc main_#t~ite60; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L796] -1 main_#t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite61=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 ~y$w_buff0_used~0 := main_#t~ite61; [L796] -1 havoc main_#t~ite61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L797] -1 main_#t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite62=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] -1 ~y$w_buff1_used~0 := main_#t~ite62; [L797] -1 havoc main_#t~ite62; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L798] -1 main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite63=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y$r_buff0_thd0~0 := main_#t~ite63; [L798] -1 havoc main_#t~ite63; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L799] -1 main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite64=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$r_buff1_thd0~0 := main_#t~ite64; [L799] -1 havoc main_#t~ite64; [L802] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L804] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L804] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1773~0, main_~#t1774~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] FCALL -1 call main_~#t1773~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FCALL -1 call write~int(0, main_~#t1773~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] -1 havoc main_#t~nondet57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L788] FCALL -1 call main_~#t1774~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call write~int(1, main_~#t1774~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L731-L774] 0 ~arg := #in~arg; [L734] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L735] 0 ~y$w_buff0~0 := 1; [L736] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L737] 0 ~y$w_buff0_used~0 := 1; [L738] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L738] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L740] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L741] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L742] 0 ~y$r_buff0_thd2~0 := 1; [L745] 0 ~weak$$choice0~0 := #t~nondet27; [L745] 0 havoc #t~nondet27; [L746] 0 ~weak$$choice2~0 := #t~nondet28; [L746] 0 havoc #t~nondet28; [L747] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L748] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND FALSE 0 !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L749] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 #t~ite30 := #t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=1, #t~ite30=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 ~y~0 := #t~ite30; [L749] 0 havoc #t~ite29; [L749] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L750] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] 0 ~y$w_buff0~0 := #t~ite33; [L750] 0 havoc #t~ite32; [L750] 0 havoc #t~ite33; [L750] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L751] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] 0 ~y$w_buff1~0 := #t~ite36; [L751] 0 havoc #t~ite35; [L751] 0 havoc #t~ite34; [L751] 0 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L752] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite39=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] 0 ~y$w_buff0_used~0 := #t~ite39; [L752] 0 havoc #t~ite37; [L752] 0 havoc #t~ite38; [L752] 0 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L753] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff1_used~0 := #t~ite42; [L753] 0 havoc #t~ite40; [L753] 0 havoc #t~ite42; [L753] 0 havoc #t~ite41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L754] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L754] 0 havoc #t~ite45; [L754] 0 havoc #t~ite43; [L754] 0 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L755] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L755] 0 havoc #t~ite47; [L755] 0 havoc #t~ite48; [L755] 0 havoc #t~ite46; [L756] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L757] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite49=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y~0 := #t~ite49; [L757] 0 havoc #t~ite49; [L758] 0 ~y$flush_delayed~0 := 0; [L761] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L764] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701-L730] 1 ~arg := #in~arg; [L704] 1 ~x~0 := 1; [L709] 1 ~weak$$choice0~0 := #t~nondet3; [L709] 1 havoc #t~nondet3; [L710] 1 ~weak$$choice2~0 := #t~nondet4; [L710] 1 havoc #t~nondet4; [L711] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L712] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L713] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] 0 ~y~0 := #t~ite51; [L764] 0 havoc #t~ite50; [L764] 0 havoc #t~ite51; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L765] 0 #t~ite52 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite52=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite52; [L765] 0 havoc #t~ite52; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L766] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L766] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L713] 1 ~y~0 := #t~ite6; [L713] 1 havoc #t~ite5; [L713] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L714] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 1 ~y$w_buff0~0 := #t~ite9; [L714] 1 havoc #t~ite8; [L714] 1 havoc #t~ite7; [L714] 1 havoc #t~ite9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L715] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 1 ~y$w_buff1~0 := #t~ite12; [L715] 1 havoc #t~ite11; [L715] 1 havoc #t~ite12; [L715] 1 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L766] 0 ~y$w_buff1_used~0 := #t~ite53; [L766] 0 havoc #t~ite53; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L767] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite54=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L767] 0 havoc #t~ite54; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L768] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite55=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L768] 0 havoc #t~ite55; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L716] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 ~y$w_buff0_used~0 := #t~ite15; [L716] 1 havoc #t~ite13; [L716] 1 havoc #t~ite15; [L716] 1 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff1_used~0 := #t~ite18; [L717] 1 havoc #t~ite16; [L717] 1 havoc #t~ite18; [L717] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L718] 1 havoc #t~ite21; [L718] 1 havoc #t~ite20; [L718] 1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L719] 1 havoc #t~ite22; [L719] 1 havoc #t~ite24; [L719] 1 havoc #t~ite23; [L720] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L721] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y~0 := #t~ite25; [L721] 1 havoc #t~ite25; [L722] 1 ~y$flush_delayed~0 := 0; [L727] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 havoc main_#t~nondet58; [L791] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L793] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L795] -1 main_#t~ite59 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 main_#t~ite60 := main_#t~ite59; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_#t~ite60=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 ~y~0 := main_#t~ite60; [L795] -1 havoc main_#t~ite59; [L795] -1 havoc main_#t~ite60; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L796] -1 main_#t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite61=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 ~y$w_buff0_used~0 := main_#t~ite61; [L796] -1 havoc main_#t~ite61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L797] -1 main_#t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite62=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] -1 ~y$w_buff1_used~0 := main_#t~ite62; [L797] -1 havoc main_#t~ite62; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L798] -1 main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite63=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y$r_buff0_thd0~0 := main_#t~ite63; [L798] -1 havoc main_#t~ite63; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L799] -1 main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite64=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$r_buff1_thd0~0 := main_#t~ite64; [L799] -1 havoc main_#t~ite64; [L802] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L804] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L804] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] FCALL -1 call ~#t1773~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FCALL -1 call write~int(0, ~#t1773~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] -1 havoc #t~nondet57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L788] FCALL -1 call ~#t1774~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call write~int(1, ~#t1774~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L731-L774] 0 ~arg := #in~arg; [L734] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L735] 0 ~y$w_buff0~0 := 1; [L736] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L737] 0 ~y$w_buff0_used~0 := 1; [L5] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L740] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L741] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L742] 0 ~y$r_buff0_thd2~0 := 1; [L745] 0 ~weak$$choice0~0 := #t~nondet27; [L745] 0 havoc #t~nondet27; [L746] 0 ~weak$$choice2~0 := #t~nondet28; [L746] 0 havoc #t~nondet28; [L747] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L748] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND FALSE 0 !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L749] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 #t~ite30 := #t~ite29; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 ~y~0 := #t~ite30; [L749] 0 havoc #t~ite29; [L749] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L750] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] 0 ~y$w_buff0~0 := #t~ite33; [L750] 0 havoc #t~ite32; [L750] 0 havoc #t~ite33; [L750] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L751] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] 0 ~y$w_buff1~0 := #t~ite36; [L751] 0 havoc #t~ite35; [L751] 0 havoc #t~ite34; [L751] 0 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L752] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] 0 ~y$w_buff0_used~0 := #t~ite39; [L752] 0 havoc #t~ite37; [L752] 0 havoc #t~ite38; [L752] 0 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L753] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff1_used~0 := #t~ite42; [L753] 0 havoc #t~ite40; [L753] 0 havoc #t~ite42; [L753] 0 havoc #t~ite41; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L754] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L754] 0 havoc #t~ite45; [L754] 0 havoc #t~ite43; [L754] 0 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L755] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L755] 0 havoc #t~ite47; [L755] 0 havoc #t~ite48; [L755] 0 havoc #t~ite46; [L756] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L757] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y~0 := #t~ite49; [L757] 0 havoc #t~ite49; [L758] 0 ~y$flush_delayed~0 := 0; [L761] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L764] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701-L730] 1 ~arg := #in~arg; [L704] 1 ~x~0 := 1; [L709] 1 ~weak$$choice0~0 := #t~nondet3; [L709] 1 havoc #t~nondet3; [L710] 1 ~weak$$choice2~0 := #t~nondet4; [L710] 1 havoc #t~nondet4; [L711] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L712] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L713] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] 0 ~y~0 := #t~ite51; [L764] 0 havoc #t~ite50; [L764] 0 havoc #t~ite51; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L765] 0 #t~ite52 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite52; [L765] 0 havoc #t~ite52; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L766] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L766] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L713] 1 ~y~0 := #t~ite6; [L713] 1 havoc #t~ite5; [L713] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L714] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 1 ~y$w_buff0~0 := #t~ite9; [L714] 1 havoc #t~ite8; [L714] 1 havoc #t~ite7; [L714] 1 havoc #t~ite9; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L715] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 1 ~y$w_buff1~0 := #t~ite12; [L715] 1 havoc #t~ite11; [L715] 1 havoc #t~ite12; [L715] 1 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L766] 0 ~y$w_buff1_used~0 := #t~ite53; [L766] 0 havoc #t~ite53; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L767] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L767] 0 havoc #t~ite54; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L768] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L768] 0 havoc #t~ite55; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L716] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 ~y$w_buff0_used~0 := #t~ite15; [L716] 1 havoc #t~ite13; [L716] 1 havoc #t~ite15; [L716] 1 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff1_used~0 := #t~ite18; [L717] 1 havoc #t~ite16; [L717] 1 havoc #t~ite18; [L717] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L718] 1 havoc #t~ite21; [L718] 1 havoc #t~ite20; [L718] 1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L719] 1 havoc #t~ite22; [L719] 1 havoc #t~ite24; [L719] 1 havoc #t~ite23; [L720] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L721] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y~0 := #t~ite25; [L721] 1 havoc #t~ite25; [L722] 1 ~y$flush_delayed~0 := 0; [L727] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 havoc #t~nondet58; [L791] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L793] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L795] -1 #t~ite59 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 #t~ite60 := #t~ite59; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 ~y~0 := #t~ite60; [L795] -1 havoc #t~ite59; [L795] -1 havoc #t~ite60; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L796] -1 #t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 ~y$w_buff0_used~0 := #t~ite61; [L796] -1 havoc #t~ite61; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L797] -1 #t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] -1 ~y$w_buff1_used~0 := #t~ite62; [L797] -1 havoc #t~ite62; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L798] -1 #t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y$r_buff0_thd0~0 := #t~ite63; [L798] -1 havoc #t~ite63; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L799] -1 #t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$r_buff1_thd0~0 := #t~ite64; [L799] -1 havoc #t~ite64; [L802] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] FCALL -1 call ~#t1773~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FCALL -1 call write~int(0, ~#t1773~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] -1 havoc #t~nondet57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L788] FCALL -1 call ~#t1774~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call write~int(1, ~#t1774~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L731-L774] 0 ~arg := #in~arg; [L734] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L735] 0 ~y$w_buff0~0 := 1; [L736] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L737] 0 ~y$w_buff0_used~0 := 1; [L5] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L740] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L741] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L742] 0 ~y$r_buff0_thd2~0 := 1; [L745] 0 ~weak$$choice0~0 := #t~nondet27; [L745] 0 havoc #t~nondet27; [L746] 0 ~weak$$choice2~0 := #t~nondet28; [L746] 0 havoc #t~nondet28; [L747] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L748] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND FALSE 0 !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L749] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 #t~ite30 := #t~ite29; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 ~y~0 := #t~ite30; [L749] 0 havoc #t~ite29; [L749] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L750] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] 0 ~y$w_buff0~0 := #t~ite33; [L750] 0 havoc #t~ite32; [L750] 0 havoc #t~ite33; [L750] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L751] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] 0 ~y$w_buff1~0 := #t~ite36; [L751] 0 havoc #t~ite35; [L751] 0 havoc #t~ite34; [L751] 0 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L752] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] 0 ~y$w_buff0_used~0 := #t~ite39; [L752] 0 havoc #t~ite37; [L752] 0 havoc #t~ite38; [L752] 0 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L753] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff1_used~0 := #t~ite42; [L753] 0 havoc #t~ite40; [L753] 0 havoc #t~ite42; [L753] 0 havoc #t~ite41; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L754] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L754] 0 havoc #t~ite45; [L754] 0 havoc #t~ite43; [L754] 0 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L755] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L755] 0 havoc #t~ite47; [L755] 0 havoc #t~ite48; [L755] 0 havoc #t~ite46; [L756] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L757] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y~0 := #t~ite49; [L757] 0 havoc #t~ite49; [L758] 0 ~y$flush_delayed~0 := 0; [L761] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L764] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701-L730] 1 ~arg := #in~arg; [L704] 1 ~x~0 := 1; [L709] 1 ~weak$$choice0~0 := #t~nondet3; [L709] 1 havoc #t~nondet3; [L710] 1 ~weak$$choice2~0 := #t~nondet4; [L710] 1 havoc #t~nondet4; [L711] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L712] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L713] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] 0 ~y~0 := #t~ite51; [L764] 0 havoc #t~ite50; [L764] 0 havoc #t~ite51; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L765] 0 #t~ite52 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite52; [L765] 0 havoc #t~ite52; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L766] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L766] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L713] 1 ~y~0 := #t~ite6; [L713] 1 havoc #t~ite5; [L713] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L714] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 1 ~y$w_buff0~0 := #t~ite9; [L714] 1 havoc #t~ite8; [L714] 1 havoc #t~ite7; [L714] 1 havoc #t~ite9; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L715] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 1 ~y$w_buff1~0 := #t~ite12; [L715] 1 havoc #t~ite11; [L715] 1 havoc #t~ite12; [L715] 1 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L766] 0 ~y$w_buff1_used~0 := #t~ite53; [L766] 0 havoc #t~ite53; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L767] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L767] 0 havoc #t~ite54; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L768] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L768] 0 havoc #t~ite55; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L716] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 ~y$w_buff0_used~0 := #t~ite15; [L716] 1 havoc #t~ite13; [L716] 1 havoc #t~ite15; [L716] 1 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff1_used~0 := #t~ite18; [L717] 1 havoc #t~ite16; [L717] 1 havoc #t~ite18; [L717] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L718] 1 havoc #t~ite21; [L718] 1 havoc #t~ite20; [L718] 1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L719] 1 havoc #t~ite22; [L719] 1 havoc #t~ite24; [L719] 1 havoc #t~ite23; [L720] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L721] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y~0 := #t~ite25; [L721] 1 havoc #t~ite25; [L722] 1 ~y$flush_delayed~0 := 0; [L727] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 havoc #t~nondet58; [L791] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L793] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L795] -1 #t~ite59 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 #t~ite60 := #t~ite59; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 ~y~0 := #t~ite60; [L795] -1 havoc #t~ite59; [L795] -1 havoc #t~ite60; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L796] -1 #t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 ~y$w_buff0_used~0 := #t~ite61; [L796] -1 havoc #t~ite61; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L797] -1 #t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] -1 ~y$w_buff1_used~0 := #t~ite62; [L797] -1 havoc #t~ite62; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L798] -1 #t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y$r_buff0_thd0~0 := #t~ite63; [L798] -1 havoc #t~ite63; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L799] -1 #t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$r_buff1_thd0~0 := #t~ite64; [L799] -1 havoc #t~ite64; [L802] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L678] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L679] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L680] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L682] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L684] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L685] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L686] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L687] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L688] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L689] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L690] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L691] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L692] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L693] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L694] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L695] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L696] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L697] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L698] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L699] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L700] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L786] -1 pthread_t t1773; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] FCALL, FORK -1 pthread_create(&t1773, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L788] -1 pthread_t t1774; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] FCALL, FORK -1 pthread_create(&t1774, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L734] 0 y$w_buff1 = y$w_buff0 [L735] 0 y$w_buff0 = 1 [L736] 0 y$w_buff1_used = y$w_buff0_used [L737] 0 y$w_buff0_used = (_Bool)1 [L5] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L739] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L740] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L741] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L742] 0 y$r_buff0_thd2 = (_Bool)1 [L745] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L746] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L747] 0 y$flush_delayed = weak$$choice2 [L748] 0 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L749] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L749] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L749] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L749] 0 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L750] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L750] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L751] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L751] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L752] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L753] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L753] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L754] EXPR 0 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L754] 0 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L755] EXPR 0 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L755] 0 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L756] 0 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 0 y = y$flush_delayed ? y$mem_tmp : y [L758] 0 y$flush_delayed = (_Bool)0 [L761] 0 __unbuffered_p1_EBX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L764] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L704] 1 x = 1 [L709] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L710] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L711] 1 y$flush_delayed = weak$$choice2 [L712] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L713] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L764] 0 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L765] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L765] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L766] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L713] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L714] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L714] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L715] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L715] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L766] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L767] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L767] 0 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L768] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L768] 0 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L771] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L717] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L718] EXPR 1 weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] 1 y$r_buff0_thd1 = weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) [L719] EXPR 1 weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L719] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L720] 1 __unbuffered_p0_EAX = y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L721] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L721] 1 y = y$flush_delayed ? y$mem_tmp : y [L722] 1 y$flush_delayed = (_Bool)0 [L727] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L791] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L796] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L796] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L797] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L797] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L799] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L802] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 0 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] ----- [2018-11-23 04:06:49,071 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-23 04:06:49,073 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 04:06:49 BasicIcfg [2018-11-23 04:06:49,073 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-23 04:06:49,073 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-23 04:06:49,073 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-23 04:06:49,073 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-23 04:06:49,074 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 04:05:43" (3/4) ... [2018-11-23 04:06:49,076 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [609] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [465] L-1-->L672: Formula: (= |v_#valid_9| (store |v_#valid_10| 0 0)) InVars {#valid=|v_#valid_10|} OutVars{#valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [572] L672-->L674: Formula: (= v_~__unbuffered_cnt~0_6 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [628] L674-->L676: Formula: (= v_~__unbuffered_p0_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [456] L676-->L678: Formula: (= v_~__unbuffered_p1_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 [528] L678-->L679: Formula: (= v_~__unbuffered_p1_EBX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 [678] L679-->L680: Formula: (= v_~main$tmp_guard0~0_3 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 [585] L680-->L682: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [666] L682-->L684: Formula: (= v_~x~0_3 0) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [489] L684-->L685: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [627] L685-->L686: Formula: (= v_~y$flush_delayed~0_9 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_9} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 [530] L686-->L687: Formula: (= v_~y$mem_tmp~0_5 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_5} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 [482] L687-->L688: Formula: (= v_~y$r_buff0_thd0~0_13 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_13} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 [616] L688-->L689: Formula: (= v_~y$r_buff0_thd1~0_32 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_32} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 [526] L689-->L690: Formula: (= v_~y$r_buff0_thd2~0_44 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_44} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 [677] L690-->L691: Formula: (= v_~y$r_buff1_thd0~0_9 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 [584] L691-->L692: Formula: (= v_~y$r_buff1_thd1~0_18 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_18} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 [497] L692-->L693: Formula: (= v_~y$r_buff1_thd2~0_25 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_25} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 [664] L693-->L694: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [570] L694-->L695: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [488] L695-->L696: Formula: (= v_~y$w_buff0~0_17 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_17} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [626] L696-->L697: Formula: (= v_~y$w_buff0_used~0_85 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_85} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [529] L697-->L698: Formula: (= v_~y$w_buff1~0_16 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_16} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [479] L698-->L699: Formula: (= v_~y$w_buff1_used~0_48 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_48} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [615] L699-->L700: Formula: (= v_~weak$$choice0~0_3 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_3} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [525] L700-->L-1-1: Formula: (= v_~weak$$choice2~0_27 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_27} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [665] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [661] L-1-2-->L786: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet57=|v_ULTIMATE.start_main_#t~nondet57_2|, ULTIMATE.start_main_#t~nondet58=|v_ULTIMATE.start_main_#t~nondet58_2|, ULTIMATE.start_main_~#t1774~0.offset=|v_ULTIMATE.start_main_~#t1774~0.offset_5|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_5|, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_5|, ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_5|, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_5|, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_5|, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_5|, ULTIMATE.start_main_~#t1773~0.base=|v_ULTIMATE.start_main_~#t1773~0.base_5|, ULTIMATE.start_main_~#t1773~0.offset=|v_ULTIMATE.start_main_~#t1773~0.offset_5|, ULTIMATE.start_main_~#t1774~0.base=|v_ULTIMATE.start_main_~#t1774~0.base_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite62, ULTIMATE.start_main_#t~ite63, ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#t~ite61, ULTIMATE.start_main_#t~nondet57, ULTIMATE.start_main_~#t1773~0.base, ULTIMATE.start_main_#t~nondet58, ULTIMATE.start_main_~#t1774~0.offset, ULTIMATE.start_main_~#t1773~0.offset, ULTIMATE.start_main_#t~ite59, ULTIMATE.start_main_#t~ite64, ULTIMATE.start_main_~#t1774~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [471] L786-->L786-1: Formula: (and (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1773~0.base_1| 4) |v_#length_1|) (= 0 |v_ULTIMATE.start_main_~#t1773~0.offset_1|) (= |v_#valid_1| (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1773~0.base_1| 1)) (not (= |v_ULTIMATE.start_main_~#t1773~0.base_1| 0)) (= 0 (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1773~0.base_1|))) InVars {#length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{ULTIMATE.start_main_~#t1773~0.offset=|v_ULTIMATE.start_main_~#t1773~0.offset_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1773~0.base=|v_ULTIMATE.start_main_~#t1773~0.base_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1773~0.base, #valid, ULTIMATE.start_main_~#t1773~0.offset, #length] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [472] L786-1-->L787: Formula: (= |v_#memory_int_1| (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1773~0.base_2| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1773~0.base_2|) |v_ULTIMATE.start_main_~#t1773~0.offset_2| 0))) InVars {#memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t1773~0.offset=|v_ULTIMATE.start_main_~#t1773~0.offset_2|, ULTIMATE.start_main_~#t1773~0.base=|v_ULTIMATE.start_main_~#t1773~0.base_2|} OutVars{#memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t1773~0.offset=|v_ULTIMATE.start_main_~#t1773~0.offset_2|, ULTIMATE.start_main_~#t1773~0.base=|v_ULTIMATE.start_main_~#t1773~0.base_2|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 [839] L787-->P0ENTRY: Formula: (and (= 0 |v_Thread0_P0_#in~arg.offset_3|) (= 0 v_Thread0_P0_thidvar0_2) (= 0 |v_Thread0_P0_#in~arg.base_3|)) InVars {} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_3|, Thread0_P0_thidvar0=v_Thread0_P0_thidvar0_2, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P0_#in~arg.base, Thread0_P0_thidvar0, Thread0_P0_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [613] L787-1-->L788: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet57=|v_ULTIMATE.start_main_#t~nondet57_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet57] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [521] L788-->L788-1: Formula: (and (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t1774~0.base_1| 4)) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t1774~0.base_1|) 0) (= 0 |v_ULTIMATE.start_main_~#t1774~0.offset_1|) (not (= |v_ULTIMATE.start_main_~#t1774~0.base_1| 0)) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t1774~0.base_1| 1) |v_#valid_3|)) InVars {#length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{ULTIMATE.start_main_~#t1774~0.offset=|v_ULTIMATE.start_main_~#t1774~0.offset_1|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1774~0.base=|v_ULTIMATE.start_main_~#t1774~0.base_1|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#t1774~0.offset, #length, ULTIMATE.start_main_~#t1774~0.base] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [522] L788-1-->L789: Formula: (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1774~0.base_2| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1774~0.base_2|) |v_ULTIMATE.start_main_~#t1774~0.offset_2| 1)) |v_#memory_int_3|) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t1774~0.offset=|v_ULTIMATE.start_main_~#t1774~0.offset_2|, ULTIMATE.start_main_~#t1774~0.base=|v_ULTIMATE.start_main_~#t1774~0.base_2|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t1774~0.offset=|v_ULTIMATE.start_main_~#t1774~0.offset_2|, ULTIMATE.start_main_~#t1774~0.base=|v_ULTIMATE.start_main_~#t1774~0.base_2|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 [840] L789-->P1ENTRY: Formula: (and (= 0 |v_Thread1_P1_#in~arg.base_3|) (= 0 |v_Thread1_P1_#in~arg.offset_3|) (= 1 v_Thread1_P1_thidvar0_2)) InVars {} OutVars{Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_3|, Thread1_P1_thidvar0=v_Thread1_P1_thidvar0_2, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread1_P1_#in~arg.base, Thread1_P1_thidvar0, Thread1_P1_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [749] P1ENTRY-->L5: Formula: (and (= v_Thread1_P1_~arg.offset_1 |v_Thread1_P1_#in~arg.offset_1|) (= v_~y$w_buff1~0_7 v_~y$w_buff0~0_8) (= |v_Thread1_P1___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= (mod v_~y$w_buff0_used~0_35 256) 0)) (not (= (mod v_~y$w_buff1_used~0_20 256) 0)))) 1 0)) (= v_~y$w_buff0_used~0_35 1) (= v_Thread1_P1_~arg.base_1 |v_Thread1_P1_#in~arg.base_1|) (= v_Thread1_P1___VERIFIER_assert_~expression_1 |v_Thread1_P1___VERIFIER_assert_#in~expression_1|) (= v_~y$w_buff0~0_7 1) (= v_~y$w_buff1_used~0_20 v_~y$w_buff0_used~0_36)) InVars {Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_36, ~y$w_buff0~0=v_~y$w_buff0~0_8, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_1, Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_~arg.offset=v_Thread1_P1_~arg.offset_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_35, ~y$w_buff1~0=v_~y$w_buff1~0_7, Thread1_P1_~arg.base=v_Thread1_P1_~arg.base_1, ~y$w_buff0~0=v_~y$w_buff0~0_7, Thread1_P1___VERIFIER_assert_#in~expression=|v_Thread1_P1___VERIFIER_assert_#in~expression_1|, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_20} AuxVars[] AssignedVars[Thread1_P1___VERIFIER_assert_~expression, Thread1_P1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, Thread1_P1_~arg.base, ~y$w_buff0~0, Thread1_P1___VERIFIER_assert_#in~expression, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [751] L5-->L5-3: Formula: (not (= v_Thread1_P1___VERIFIER_assert_~expression_3 0)) InVars {Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [754] L5-3-->L749: Formula: (and (= v_~y$mem_tmp~0_3 v_~y~0_7) (= v_~y$r_buff1_thd2~0_5 v_~y$r_buff0_thd2~0_9) (= v_~y$r_buff0_thd2~0_8 1) (= v_~weak$$choice0~0_2 |v_Thread1_P1_#t~nondet27_1|) (= v_~weak$$choice2~0_18 |v_Thread1_P1_#t~nondet28_1|) (= v_~y$r_buff1_thd1~0_17 v_~y$r_buff0_thd1~0_31) (= v_~y$flush_delayed~0_5 v_~weak$$choice2~0_18) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1)) InVars {Thread1_P1_#t~nondet27=|v_Thread1_P1_#t~nondet27_1|, Thread1_P1_#t~nondet28=|v_Thread1_P1_#t~nondet28_1|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_9, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_31, ~y~0=v_~y~0_7} OutVars{Thread1_P1_#t~nondet27=|v_Thread1_P1_#t~nondet27_2|, Thread1_P1_#t~nondet28=|v_Thread1_P1_#t~nondet28_2|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_5, ~weak$$choice0~0=v_~weak$$choice0~0_2, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_17, ~y$mem_tmp~0=v_~y$mem_tmp~0_3, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_8, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_31, ~y$flush_delayed~0=v_~y$flush_delayed~0_5, ~y~0=v_~y~0_7, ~weak$$choice2~0=v_~weak$$choice2~0_18, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~weak$$choice0~0, ~y$r_buff1_thd1~0, Thread1_P1_#t~nondet27, ~y$mem_tmp~0, Thread1_P1_#t~nondet28, ~y$r_buff0_thd2~0, ~y$flush_delayed~0, ~weak$$choice2~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [756] L749-->L749-2: Formula: (let ((.cse0 (not (= 0 (mod v_~y$r_buff0_thd2~0_13 256))))) (and (or .cse0 (not (= 0 (mod v_~y$r_buff1_thd2~0_8 256)))) (not (= 0 (mod v_~y$w_buff0_used~0_41 256))) (or .cse0 (not (= 0 (mod v_~y$w_buff1_used~0_24 256)))))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_41, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_24} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_41, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_24} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [758] L749-2-->L749-4: Formula: (and (not (= 0 (mod v_~y$w_buff0_used~0_43 256))) (not (= 0 (mod v_~y$r_buff0_thd2~0_15 256))) (= |v_Thread1_P1_#t~ite29_2| v_~y$w_buff0~0_9)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$w_buff0~0=v_~y$w_buff0~0_9, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_15} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$w_buff0~0=v_~y$w_buff0~0_9, Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_15} AuxVars[] AssignedVars[Thread1_P1_#t~ite29] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite29|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [762] L749-4-->L749-5: Formula: (= |v_Thread1_P1_#t~ite30_4| |v_Thread1_P1_#t~ite29_4|) InVars {Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_4|} OutVars{Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_4|, Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_4|} AuxVars[] AssignedVars[Thread1_P1_#t~ite30] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite29|=1, |Thread1_P1_#t~ite30|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [757] L749-5-->L750: Formula: (= v_~y~0_10 |v_Thread1_P1_#t~ite30_2|) InVars {Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_2|} OutVars{~y~0=v_~y~0_10, Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_1|, Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_3|} AuxVars[] AssignedVars[Thread1_P1_#t~ite30, ~y~0, Thread1_P1_#t~ite29] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [760] L750-->L750-8: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= |v_Thread1_P1_#t~ite33_1| v_~y$w_buff0~0_10)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_19, ~y$w_buff0~0=v_~y$w_buff0~0_10} OutVars{Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_1|, ~weak$$choice2~0=v_~weak$$choice2~0_19, ~y$w_buff0~0=v_~y$w_buff0~0_10} AuxVars[] AssignedVars[Thread1_P1_#t~ite33] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite33|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [763] L750-8-->L751: Formula: (= v_~y$w_buff0~0_15 |v_Thread1_P1_#t~ite33_2|) InVars {Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_2|} OutVars{Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_3|, Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_1|, Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_1|, ~y$w_buff0~0=v_~y$w_buff0~0_15} AuxVars[] AssignedVars[Thread1_P1_#t~ite31, Thread1_P1_#t~ite32, ~y$w_buff0~0, Thread1_P1_#t~ite33] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [766] L751-->L751-8: Formula: (and (not (= (mod v_~weak$$choice2~0_21 256) 0)) (= |v_Thread1_P1_#t~ite36_1| v_~y$w_buff1~0_10)) InVars {~y$w_buff1~0=v_~y$w_buff1~0_10, ~weak$$choice2~0=v_~weak$$choice2~0_21} OutVars{Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_1|, ~y$w_buff1~0=v_~y$w_buff1~0_10, ~weak$$choice2~0=v_~weak$$choice2~0_21} AuxVars[] AssignedVars[Thread1_P1_#t~ite36] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite36|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [771] L751-8-->L752: Formula: (= v_~y$w_buff1~0_14 |v_Thread1_P1_#t~ite36_2|) InVars {Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_2|} OutVars{Thread1_P1_#t~ite35=|v_Thread1_P1_#t~ite35_1|, Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_3|, Thread1_P1_#t~ite34=|v_Thread1_P1_#t~ite34_1|, ~y$w_buff1~0=v_~y$w_buff1~0_14} AuxVars[] AssignedVars[~y$w_buff1~0, Thread1_P1_#t~ite35, Thread1_P1_#t~ite36, Thread1_P1_#t~ite34] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [775] L752-->L752-8: Formula: (and (= |v_Thread1_P1_#t~ite39_1| v_~y$w_buff0_used~0_63) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_63, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_63, ~weak$$choice2~0=v_~weak$$choice2~0_23, Thread1_P1_#t~ite39=|v_Thread1_P1_#t~ite39_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite39] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite39|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [780] L752-8-->L753: Formula: (= v_~y$w_buff0_used~0_69 |v_Thread1_P1_#t~ite39_2|) InVars {Thread1_P1_#t~ite39=|v_Thread1_P1_#t~ite39_2|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_69, Thread1_P1_#t~ite39=|v_Thread1_P1_#t~ite39_3|, Thread1_P1_#t~ite37=|v_Thread1_P1_#t~ite37_1|, Thread1_P1_#t~ite38=|v_Thread1_P1_#t~ite38_1|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite39, Thread1_P1_#t~ite37, Thread1_P1_#t~ite38] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [784] L753-->L753-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_25 256))) (= |v_Thread1_P1_#t~ite42_1| v_~y$w_buff1_used~0_38)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_25, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_38} OutVars{Thread1_P1_#t~ite42=|v_Thread1_P1_#t~ite42_1|, ~weak$$choice2~0=v_~weak$$choice2~0_25, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_38} AuxVars[] AssignedVars[Thread1_P1_#t~ite42] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite42|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [789] L753-8-->L754: Formula: (= v_~y$w_buff1_used~0_17 |v_Thread1_P1_#t~ite42_2|) InVars {Thread1_P1_#t~ite42=|v_Thread1_P1_#t~ite42_2|} OutVars{Thread1_P1_#t~ite42=|v_Thread1_P1_#t~ite42_3|, Thread1_P1_#t~ite40=|v_Thread1_P1_#t~ite40_1|, Thread1_P1_#t~ite41=|v_Thread1_P1_#t~ite41_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} AuxVars[] AssignedVars[Thread1_P1_#t~ite42, Thread1_P1_#t~ite40, Thread1_P1_#t~ite41, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [793] L754-->L754-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_14 256))) (= |v_Thread1_P1_#t~ite45_1| v_~y$r_buff0_thd2~0_1)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_14, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_1} OutVars{Thread1_P1_#t~ite45=|v_Thread1_P1_#t~ite45_1|, ~weak$$choice2~0=v_~weak$$choice2~0_14, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_1} AuxVars[] AssignedVars[Thread1_P1_#t~ite45] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite45|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [798] L754-8-->L755: Formula: (= v_~y$r_buff0_thd2~0_6 |v_Thread1_P1_#t~ite45_2|) InVars {Thread1_P1_#t~ite45=|v_Thread1_P1_#t~ite45_2|} OutVars{Thread1_P1_#t~ite44=|v_Thread1_P1_#t~ite44_1|, Thread1_P1_#t~ite45=|v_Thread1_P1_#t~ite45_3|, Thread1_P1_#t~ite43=|v_Thread1_P1_#t~ite43_1|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_6} AuxVars[] AssignedVars[Thread1_P1_#t~ite43, ~y$r_buff0_thd2~0, Thread1_P1_#t~ite44, Thread1_P1_#t~ite45] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [802] L755-->L755-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= |v_Thread1_P1_#t~ite48_1| v_~y$r_buff1_thd2~0_3)) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, ~weak$$choice2~0=v_~weak$$choice2~0_16, Thread1_P1_#t~ite48=|v_Thread1_P1_#t~ite48_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite48] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite48|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [807] L755-8-->L757: Formula: (and (= v_~__unbuffered_p1_EAX~0_1 v_~y~0_9) (= v_~y$r_buff1_thd2~0_9 |v_Thread1_P1_#t~ite48_2|)) InVars {~y~0=v_~y~0_9, Thread1_P1_#t~ite48=|v_Thread1_P1_#t~ite48_2|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_1, Thread1_P1_#t~ite46=|v_Thread1_P1_#t~ite46_1|, Thread1_P1_#t~ite47=|v_Thread1_P1_#t~ite47_1|, ~y~0=v_~y~0_9, Thread1_P1_#t~ite48=|v_Thread1_P1_#t~ite48_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_p1_EAX~0, Thread1_P1_#t~ite46, Thread1_P1_#t~ite47, Thread1_P1_#t~ite48] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [811] L757-->L757-2: Formula: (and (= |v_Thread1_P1_#t~ite49_1| v_~y$mem_tmp~0_4) (not (= (mod v_~y$flush_delayed~0_6 256) 0))) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_4} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_4, Thread1_P1_#t~ite49=|v_Thread1_P1_#t~ite49_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite49] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite49|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [816] L757-2-->L764: Formula: (and (= v_~y~0_12 |v_Thread1_P1_#t~ite49_3|) (= v_~y$flush_delayed~0_8 0) (= v_~__unbuffered_p1_EBX~0_1 v_~x~0_2)) InVars {~x~0=v_~x~0_2, Thread1_P1_#t~ite49=|v_Thread1_P1_#t~ite49_3|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_8, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_1, ~y~0=v_~y~0_12, ~x~0=v_~x~0_2, Thread1_P1_#t~ite49=|v_Thread1_P1_#t~ite49_4|} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0, ~y$flush_delayed~0, ~y~0, Thread1_P1_#t~ite49] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [818] L764-->L764-5: Formula: (and (not (= 0 (mod v_~y$r_buff0_thd2~0_18 256))) (not (= (mod v_~y$w_buff0_used~0_46 256) 0)) (= |v_Thread1_P1_#t~ite51_1| v_~y$w_buff0~0_12)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ~y$w_buff0~0=v_~y$w_buff0~0_12, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_18} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ~y$w_buff0~0=v_~y$w_buff0~0_12, Thread1_P1_#t~ite51=|v_Thread1_P1_#t~ite51_1|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_18} AuxVars[] AssignedVars[Thread1_P1_#t~ite51] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite51|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [682] P0ENTRY-->L713: Formula: (and (= v_Thread0_P0_~arg.base_1 |v_Thread0_P0_#in~arg.base_1|) (= v_Thread0_P0_~arg.offset_1 |v_Thread0_P0_#in~arg.offset_1|) (= v_~weak$$choice0~0_1 |v_Thread0_P0_#t~nondet3_1|) (= v_~weak$$choice2~0_1 |v_Thread0_P0_#t~nondet4_1|) (= v_~y$mem_tmp~0_1 v_~y~0_1) (= v_~x~0_1 1) (= v_~y$flush_delayed~0_1 v_~weak$$choice2~0_1)) InVars {Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_#t~nondet3=|v_Thread0_P0_#t~nondet3_1|, ~y~0=v_~y~0_1, Thread0_P0_#t~nondet4=|v_Thread0_P0_#t~nondet4_1|, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_~arg.offset=v_Thread0_P0_~arg.offset_1, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|, ~weak$$choice0~0=v_~weak$$choice0~0_1, Thread0_P0_#t~nondet3=|v_Thread0_P0_#t~nondet3_2|, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, Thread0_P0_#t~nondet4=|v_Thread0_P0_#t~nondet4_2|, Thread0_P0_~arg.base=v_Thread0_P0_~arg.base_1, ~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y~0=v_~y~0_1, ~weak$$choice2~0=v_~weak$$choice2~0_1, ~x~0=v_~x~0_1} AuxVars[] AssignedVars[~weak$$choice0~0, Thread0_P0_#t~nondet3, Thread0_P0_~arg.offset, ~y$mem_tmp~0, Thread0_P0_#t~nondet4, Thread0_P0_~arg.base, ~y$flush_delayed~0, ~weak$$choice2~0, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite51|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [683] L713-->L713-5: Formula: (and (= |v_Thread0_P0_#t~ite6_1| v_~y~0_2) (let ((.cse0 (= (mod v_~y$r_buff0_thd1~0_2 256) 0))) (or (and (= 0 (mod v_~y$r_buff1_thd1~0_2 256)) .cse0) (= (mod v_~y$w_buff0_used~0_2 256) 0) (and .cse0 (= (mod v_~y$w_buff1_used~0_2 256) 0))))) InVars {~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y~0=v_~y~0_2, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_2} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2, ~y~0=v_~y~0_2, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite51|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [820] L764-5-->L765: Formula: (= v_~y~0_14 |v_Thread1_P1_#t~ite51_2|) InVars {Thread1_P1_#t~ite51=|v_Thread1_P1_#t~ite51_2|} OutVars{Thread1_P1_#t~ite50=|v_Thread1_P1_#t~ite50_1|, ~y~0=v_~y~0_14, Thread1_P1_#t~ite51=|v_Thread1_P1_#t~ite51_3|} AuxVars[] AssignedVars[Thread1_P1_#t~ite50, Thread1_P1_#t~ite51, ~y~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [823] L765-->L765-2: Formula: (and (not (= 0 (mod v_~y$r_buff0_thd2~0_23 256))) (= |v_Thread1_P1_#t~ite52_1| 0) (not (= (mod v_~y$w_buff0_used~0_51 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_51, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_23} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_51, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_23, Thread1_P1_#t~ite52=|v_Thread1_P1_#t~ite52_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite52] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite52|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [826] L765-2-->L766: Formula: (= v_~y$w_buff0_used~0_53 |v_Thread1_P1_#t~ite52_3|) InVars {Thread1_P1_#t~ite52=|v_Thread1_P1_#t~ite52_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_53, Thread1_P1_#t~ite52=|v_Thread1_P1_#t~ite52_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite52] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [828] L766-->L766-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_28 256)) (= (mod v_~y$w_buff0_used~0_57 256) 0)) (= |v_Thread1_P1_#t~ite53_2| v_~y$w_buff1_used~0_32) (or (= 0 (mod v_~y$w_buff1_used~0_32 256)) (= (mod v_~y$r_buff1_thd2~0_17 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_17, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_57, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_28, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_17, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_57, Thread1_P1_#t~ite53=|v_Thread1_P1_#t~ite53_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_28, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} AuxVars[] AssignedVars[Thread1_P1_#t~ite53] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [685] L713-5-->L714: Formula: (= v_~y~0_4 |v_Thread0_P0_#t~ite6_2|) InVars {Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_2|} OutVars{Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_1|, ~y~0=v_~y~0_4, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_3|} AuxVars[] AssignedVars[Thread0_P0_#t~ite5, ~y~0, Thread0_P0_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [688] L714-->L714-8: Formula: (and (not (= (mod v_~weak$$choice2~0_2 256) 0)) (= |v_Thread0_P0_#t~ite9_1| v_~y$w_buff0~0_2)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2} OutVars{Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_1|, ~weak$$choice2~0=v_~weak$$choice2~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite9] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite9|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [691] L714-8-->L715: Formula: (= v_~y$w_buff0~0_6 |v_Thread0_P0_#t~ite9_2|) InVars {Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_2|} OutVars{Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_1|, Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_1|, Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_3|, ~y$w_buff0~0=v_~y$w_buff0~0_6} AuxVars[] AssignedVars[~y$w_buff0~0, Thread0_P0_#t~ite7, Thread0_P0_#t~ite8, Thread0_P0_#t~ite9] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [694] L715-->L715-8: Formula: (and (= |v_Thread0_P0_#t~ite12_1| v_~y$w_buff1~0_2) (not (= 0 (mod v_~weak$$choice2~0_4 256)))) InVars {~y$w_buff1~0=v_~y$w_buff1~0_2, ~weak$$choice2~0=v_~weak$$choice2~0_4} OutVars{Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_1|, ~y$w_buff1~0=v_~y$w_buff1~0_2, ~weak$$choice2~0=v_~weak$$choice2~0_4} AuxVars[] AssignedVars[Thread0_P0_#t~ite12] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite12|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [699] L715-8-->L716: Formula: (= v_~y$w_buff1~0_6 |v_Thread0_P0_#t~ite12_2|) InVars {Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_2|} OutVars{Thread0_P0_#t~ite11=|v_Thread0_P0_#t~ite11_1|, Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_3|, ~y$w_buff1~0=v_~y$w_buff1~0_6, Thread0_P0_#t~ite10=|v_Thread0_P0_#t~ite10_1|} AuxVars[] AssignedVars[~y$w_buff1~0, Thread0_P0_#t~ite10, Thread0_P0_#t~ite11, Thread0_P0_#t~ite12] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [829] L766-2-->L767: Formula: (= v_~y$w_buff1_used~0_33 |v_Thread1_P1_#t~ite53_3|) InVars {Thread1_P1_#t~ite53=|v_Thread1_P1_#t~ite53_3|} OutVars{Thread1_P1_#t~ite53=|v_Thread1_P1_#t~ite53_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} AuxVars[] AssignedVars[Thread1_P1_#t~ite53, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [831] L767-->L767-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_32 256)) (= 0 (mod v_~y$w_buff0_used~0_61 256))) (= |v_Thread1_P1_#t~ite54_2| v_~y$r_buff0_thd2~0_32)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_61, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_32} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_61, Thread1_P1_#t~ite54=|v_Thread1_P1_#t~ite54_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_32} AuxVars[] AssignedVars[Thread1_P1_#t~ite54] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite54|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [832] L767-2-->L768: Formula: (= v_~y$r_buff0_thd2~0_33 |v_Thread1_P1_#t~ite54_3|) InVars {Thread1_P1_#t~ite54=|v_Thread1_P1_#t~ite54_3|} OutVars{Thread1_P1_#t~ite54=|v_Thread1_P1_#t~ite54_4|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_33} AuxVars[] AssignedVars[Thread1_P1_#t~ite54, ~y$r_buff0_thd2~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [834] L768-->L768-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd2~0_19 256)) (= 0 (mod v_~y$w_buff1_used~0_35 256))) (= |v_Thread1_P1_#t~ite55_2| v_~y$r_buff1_thd2~0_19) (or (= 0 (mod v_~y$w_buff0_used~0_64 256)) (= (mod v_~y$r_buff0_thd2~0_35 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_19, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_64, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_35, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_35} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_19, Thread1_P1_#t~ite55=|v_Thread1_P1_#t~ite55_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_64, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_35, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_35} AuxVars[] AssignedVars[Thread1_P1_#t~ite55] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite55|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [835] L768-2-->L773: Formula: (and (= v_~y$r_buff1_thd2~0_20 |v_Thread1_P1_#t~ite55_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4, Thread1_P1_#t~ite55=|v_Thread1_P1_#t~ite55_3|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_20, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread1_P1_#t~ite55=|v_Thread1_P1_#t~ite55_4|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, Thread1_P1_#t~ite55] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [703] L716-->L716-8: Formula: (and (not (= (mod v_~weak$$choice2~0_6 256) 0)) (= |v_Thread0_P0_#t~ite15_1| v_~y$w_buff0_used~0_16)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, ~weak$$choice2~0=v_~weak$$choice2~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_1|, ~weak$$choice2~0=v_~weak$$choice2~0_6} AuxVars[] AssignedVars[Thread0_P0_#t~ite15] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite15|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [708] L716-8-->L717: Formula: (= v_~y$w_buff0_used~0_21 |v_Thread0_P0_#t~ite15_2|) InVars {Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_2|} OutVars{Thread0_P0_#t~ite13=|v_Thread0_P0_#t~ite13_1|, Thread0_P0_#t~ite14=|v_Thread0_P0_#t~ite14_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_21, Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_3|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread0_P0_#t~ite13, Thread0_P0_#t~ite14, Thread0_P0_#t~ite15] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [712] L717-->L717-8: Formula: (and (not (= (mod v_~weak$$choice2~0_8 256) 0)) (= |v_Thread0_P0_#t~ite18_1| v_~y$w_buff1_used~0_10)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_10} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_8, Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_10} AuxVars[] AssignedVars[Thread0_P0_#t~ite18] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite18|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [717] L717-8-->L718: Formula: (= v_~y$w_buff1_used~0_13 |v_Thread0_P0_#t~ite18_2|) InVars {Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_2|} OutVars{Thread0_P0_#t~ite16=|v_Thread0_P0_#t~ite16_1|, Thread0_P0_#t~ite17=|v_Thread0_P0_#t~ite17_1|, Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_13} AuxVars[] AssignedVars[Thread0_P0_#t~ite16, Thread0_P0_#t~ite17, Thread0_P0_#t~ite18, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [721] L718-->L718-8: Formula: (and (not (= (mod v_~weak$$choice2~0_10 256) 0)) (= |v_Thread0_P0_#t~ite21_1| v_~y$r_buff0_thd1~0_24)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_10, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_24} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_10, Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_1|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_24} AuxVars[] AssignedVars[Thread0_P0_#t~ite21] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite21|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [726] L718-8-->L719: Formula: (= v_~y$r_buff0_thd1~0_29 |v_Thread0_P0_#t~ite21_2|) InVars {Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_2|} OutVars{Thread0_P0_#t~ite19=|v_Thread0_P0_#t~ite19_1|, Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_3|, Thread0_P0_#t~ite20=|v_Thread0_P0_#t~ite20_1|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_29} AuxVars[] AssignedVars[Thread0_P0_#t~ite19, Thread0_P0_#t~ite21, Thread0_P0_#t~ite20, ~y$r_buff0_thd1~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [730] L719-->L719-8: Formula: (and (not (= (mod v_~weak$$choice2~0_12 256) 0)) (= |v_Thread0_P0_#t~ite24_1| v_~y$r_buff1_thd1~0_15)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_12, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_15} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_15, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_1|, ~weak$$choice2~0=v_~weak$$choice2~0_12} AuxVars[] AssignedVars[Thread0_P0_#t~ite24] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite24|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [735] L719-8-->L721: Formula: (and (= v_~y$r_buff1_thd1~0_4 |v_Thread0_P0_#t~ite24_2|) (= v_~__unbuffered_p0_EAX~0_1 v_~y~0_3)) InVars {~y~0=v_~y~0_3, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_2|} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_4, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_1, Thread0_P0_#t~ite23=|v_Thread0_P0_#t~ite23_1|, Thread0_P0_#t~ite22=|v_Thread0_P0_#t~ite22_1|, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_3|, ~y~0=v_~y~0_3} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, ~__unbuffered_p0_EAX~0, Thread0_P0_#t~ite23, Thread0_P0_#t~ite22, Thread0_P0_#t~ite24] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [739] L721-->L721-2: Formula: (and (not (= 0 (mod v_~y$flush_delayed~0_2 256))) (= |v_Thread0_P0_#t~ite25_1| v_~y$mem_tmp~0_2)) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_1|} AuxVars[] AssignedVars[Thread0_P0_#t~ite25] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite25|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [744] L721-2-->L729: Formula: (and (= v_~y$flush_delayed~0_4 0) (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~y~0_6 |v_Thread0_P0_#t~ite25_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_3|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_4, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_4|, ~y~0=v_~y~0_6} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, Thread0_P0_#t~ite25, ~y~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [672] L789-1-->L793: Formula: (= v_~main$tmp_guard0~0_1 (ite (= (ite (= v_~__unbuffered_cnt~0_5 2) 1 0) 0) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_1, ULTIMATE.start_main_#t~nondet58=|v_ULTIMATE.start_main_#t~nondet58_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet58, ~main$tmp_guard0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [562] L793-->L795: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_2 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [646] L795-->L795-2: Formula: (or (= 0 (mod v_~y$r_buff0_thd0~0_3 256)) (= (mod v_~y$w_buff0_used~0_75 256) 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_75, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_3} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_75, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [622] L795-2-->L795-4: Formula: (and (or (= (mod v_~y$w_buff1_used~0_42 256) 0) (= (mod v_~y$r_buff1_thd0~0_3 256) 0)) (= |v_ULTIMATE.start_main_#t~ite59_2| v_~y~0_15)) InVars {~y~0=v_~y~0_15, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_3, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_42} OutVars{ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_2|, ~y~0=v_~y~0_15, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_3, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_42} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite59] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [631] L795-4-->L795-5: Formula: (= |v_ULTIMATE.start_main_#t~ite60_2| |v_ULTIMATE.start_main_#t~ite59_3|) InVars {ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_3|} OutVars{ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_2|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite60] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_#t~ite60|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [634] L795-5-->L796: Formula: (= v_~y~0_16 |v_ULTIMATE.start_main_#t~ite60_4|) InVars {ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_4|} OutVars{ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_3|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_4|, ~y~0=v_~y~0_16} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#t~ite59, ~y~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [545] L796-->L796-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_77 256)) (= (mod v_~y$r_buff0_thd0~0_5 256) 0)) (= |v_ULTIMATE.start_main_#t~ite61_2| v_~y$w_buff0_used~0_77)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_77, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_5} OutVars{ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_77, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_5} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite61] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite61|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [558] L796-2-->L797: Formula: (= v_~y$w_buff0_used~0_78 |v_ULTIMATE.start_main_#t~ite61_4|) InVars {ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_4|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_78, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite61, ~y$w_buff0_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [469] L797-->L797-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd0~0_7 256)) (= (mod v_~y$w_buff0_used~0_80 256) 0)) (or (= 0 (mod v_~y$w_buff1_used~0_44 256)) (= 0 (mod v_~y$r_buff1_thd0~0_5 256))) (= |v_ULTIMATE.start_main_#t~ite62_2| v_~y$w_buff1_used~0_44)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_80, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_5, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_44} OutVars{ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_80, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_5, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_44} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite62] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite62|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [474] L797-2-->L798: Formula: (= v_~y$w_buff1_used~0_45 |v_ULTIMATE.start_main_#t~ite62_4|) InVars {ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_4|} OutVars{ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_45} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite62, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [608] L798-->L798-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite63_2| v_~y$r_buff0_thd0~0_9) (or (= 0 (mod v_~y$r_buff0_thd0~0_9 256)) (= 0 (mod v_~y$w_buff0_used~0_82 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_82, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_9} OutVars{ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_82, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite63|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [614] L798-2-->L799: Formula: (= v_~y$r_buff0_thd0~0_10 |v_ULTIMATE.start_main_#t~ite63_4|) InVars {ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_4|} OutVars{ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_3|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63, ~y$r_buff0_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [538] L799-->L799-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite64_2| v_~y$r_buff1_thd0~0_7) (or (= 0 (mod v_~y$r_buff0_thd0~0_12 256)) (= 0 (mod v_~y$w_buff0_used~0_84 256))) (or (= 0 (mod v_~y$w_buff1_used~0_47 256)) (= (mod v_~y$r_buff1_thd0~0_7 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_84, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_47} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_84, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_12, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_2|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_47} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite64] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite64|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [523] L799-2-->L804: Formula: (and (= v_~y$r_buff1_thd0~0_8 |v_ULTIMATE.start_main_#t~ite64_4|) (= v_~main$tmp_guard1~0_1 (ite (= (ite (not (and (= 0 v_~__unbuffered_p1_EBX~0_2) (= 1 v_~__unbuffered_p1_EAX~0_2) (= v_~__unbuffered_p0_EAX~0_2 0))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_4|} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_3|} AuxVars[] AssignedVars[~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite64] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [561] L804-->L804-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [564] L804-1-->L5: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [623] L5-->L5-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [653] L5-1-->L5-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [647] L5-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1773~0.base, main_~#t1773~0.offset, main_~#t1774~0.base, main_~#t1774~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1773~0.base, main_~#t1773~0.offset := #Ultimate.alloc(4); srcloc: L786 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1773~0.base, main_~#t1773~0.offset, 4); srcloc: L786-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1774~0.base, main_~#t1774~0.offset := #Ultimate.alloc(4); srcloc: L788 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1774~0.base, main_~#t1774~0.offset, 4); srcloc: L788-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd2~0 := 1;~weak$$choice0~0 := #t~nondet27;havoc #t~nondet27;~weak$$choice2~0 := #t~nondet28;havoc #t~nondet28;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite29 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 #t~ite30 := #t~ite29; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=1, |P1_#t~ite30|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite30;havoc #t~ite29;havoc #t~ite30; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite33 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite33|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0~0 := #t~ite33;havoc #t~ite32;havoc #t~ite33;havoc #t~ite31; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite36 := ~y$w_buff1~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite36|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff1~0 := #t~ite36;havoc #t~ite35;havoc #t~ite34;havoc #t~ite36; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite39 := ~y$w_buff0_used~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite39|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite39;havoc #t~ite37;havoc #t~ite38;havoc #t~ite39; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite42 := ~y$w_buff1_used~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite42|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite42;havoc #t~ite40;havoc #t~ite42;havoc #t~ite41; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite45 := ~y$r_buff0_thd2~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite45|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$r_buff0_thd2~0 := #t~ite45;havoc #t~ite45;havoc #t~ite43;havoc #t~ite44; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite48 := ~y$r_buff1_thd2~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite48|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$r_buff1_thd2~0 := #t~ite48;havoc #t~ite47;havoc #t~ite48;havoc #t~ite46;~__unbuffered_p1_EAX~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$flush_delayed~0 % 256;#t~ite49 := ~y$mem_tmp~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite49|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y~0 := #t~ite49;havoc #t~ite49;~y$flush_delayed~0 := 0;~__unbuffered_p1_EBX~0 := ~x~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite51 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 1;~weak$$choice0~0 := #t~nondet3;havoc #t~nondet3;~weak$$choice2~0 := #t~nondet4;havoc #t~nondet4;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256);#t~ite6 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite51;havoc #t~ite50;havoc #t~ite51; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite52 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite52|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite52;havoc #t~ite52; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite53 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite6;havoc #t~ite5;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite9 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite9|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0~0 := #t~ite9;havoc #t~ite8;havoc #t~ite7;havoc #t~ite9; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite12 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite12|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1~0 := #t~ite12;havoc #t~ite11;havoc #t~ite12;havoc #t~ite10; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$w_buff1_used~0 := #t~ite53;havoc #t~ite53; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite54 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite54|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff0_thd2~0 := #t~ite54;havoc #t~ite54; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite55 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite55|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd2~0 := #t~ite55;havoc #t~ite55;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite15 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite15|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0_used~0 := #t~ite15;havoc #t~ite13;havoc #t~ite15;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite18 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1_used~0 := #t~ite18;havoc #t~ite16;havoc #t~ite18;havoc #t~ite17; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite21 := ~y$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite21|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff0_thd1~0 := #t~ite21;havoc #t~ite21;havoc #t~ite20;havoc #t~ite19; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite24 := ~y$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite24|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff1_thd1~0 := #t~ite24;havoc #t~ite22;havoc #t~ite24;havoc #t~ite23;~__unbuffered_p0_EAX~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite25 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite25|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y~0 := #t~ite25;havoc #t~ite25;~y$flush_delayed~0 := 0;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet58;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite59 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 main_#t~ite60 := main_#t~ite59; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_#t~ite60|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y~0 := main_#t~ite60;havoc main_#t~ite59;havoc main_#t~ite60; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite61 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite61|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := main_#t~ite61;havoc main_#t~ite61; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite62 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite62|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := main_#t~ite62;havoc main_#t~ite62; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite63|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite63;havoc main_#t~ite63; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite64|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite64;havoc main_#t~ite64;~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1773~0.base, main_~#t1773~0.offset, main_~#t1774~0.base, main_~#t1774~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1773~0.base, main_~#t1773~0.offset := #Ultimate.alloc(4); srcloc: L786 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1773~0.base, main_~#t1773~0.offset, 4); srcloc: L786-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1774~0.base, main_~#t1774~0.offset := #Ultimate.alloc(4); srcloc: L788 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1774~0.base, main_~#t1774~0.offset, 4); srcloc: L788-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd2~0 := 1;~weak$$choice0~0 := #t~nondet27;havoc #t~nondet27;~weak$$choice2~0 := #t~nondet28;havoc #t~nondet28;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite29 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 #t~ite30 := #t~ite29; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=1, |P1_#t~ite30|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite30;havoc #t~ite29;havoc #t~ite30; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite33 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite33|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0~0 := #t~ite33;havoc #t~ite32;havoc #t~ite33;havoc #t~ite31; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite36 := ~y$w_buff1~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite36|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff1~0 := #t~ite36;havoc #t~ite35;havoc #t~ite34;havoc #t~ite36; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite39 := ~y$w_buff0_used~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite39|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite39;havoc #t~ite37;havoc #t~ite38;havoc #t~ite39; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite42 := ~y$w_buff1_used~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite42|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite42;havoc #t~ite40;havoc #t~ite42;havoc #t~ite41; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite45 := ~y$r_buff0_thd2~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite45|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$r_buff0_thd2~0 := #t~ite45;havoc #t~ite45;havoc #t~ite43;havoc #t~ite44; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite48 := ~y$r_buff1_thd2~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite48|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$r_buff1_thd2~0 := #t~ite48;havoc #t~ite47;havoc #t~ite48;havoc #t~ite46;~__unbuffered_p1_EAX~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$flush_delayed~0 % 256;#t~ite49 := ~y$mem_tmp~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite49|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y~0 := #t~ite49;havoc #t~ite49;~y$flush_delayed~0 := 0;~__unbuffered_p1_EBX~0 := ~x~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite51 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 1;~weak$$choice0~0 := #t~nondet3;havoc #t~nondet3;~weak$$choice2~0 := #t~nondet4;havoc #t~nondet4;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256);#t~ite6 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite51;havoc #t~ite50;havoc #t~ite51; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite52 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite52|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite52;havoc #t~ite52; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite53 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite6;havoc #t~ite5;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite9 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite9|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0~0 := #t~ite9;havoc #t~ite8;havoc #t~ite7;havoc #t~ite9; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite12 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite12|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1~0 := #t~ite12;havoc #t~ite11;havoc #t~ite12;havoc #t~ite10; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$w_buff1_used~0 := #t~ite53;havoc #t~ite53; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite54 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite54|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff0_thd2~0 := #t~ite54;havoc #t~ite54; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite55 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite55|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd2~0 := #t~ite55;havoc #t~ite55;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite15 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite15|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0_used~0 := #t~ite15;havoc #t~ite13;havoc #t~ite15;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite18 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1_used~0 := #t~ite18;havoc #t~ite16;havoc #t~ite18;havoc #t~ite17; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite21 := ~y$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite21|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff0_thd1~0 := #t~ite21;havoc #t~ite21;havoc #t~ite20;havoc #t~ite19; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite24 := ~y$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite24|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff1_thd1~0 := #t~ite24;havoc #t~ite22;havoc #t~ite24;havoc #t~ite23;~__unbuffered_p0_EAX~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite25 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite25|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y~0 := #t~ite25;havoc #t~ite25;~y$flush_delayed~0 := 0;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet58;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite59 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 main_#t~ite60 := main_#t~ite59; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_#t~ite60|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y~0 := main_#t~ite60;havoc main_#t~ite59;havoc main_#t~ite60; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite61 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite61|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := main_#t~ite61;havoc main_#t~ite61; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite62 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite62|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := main_#t~ite62;havoc main_#t~ite62; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite63|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite63;havoc main_#t~ite63; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite64|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite64;havoc main_#t~ite64;~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1773~0.base|=6, |ULTIMATE.start_main_~#t1773~0.offset|=0, |ULTIMATE.start_main_~#t1774~0.base|=7, |ULTIMATE.start_main_~#t1774~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1773~0.base, main_~#t1773~0.offset, main_~#t1774~0.base, main_~#t1774~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 call main_~#t1773~0.base, main_~#t1773~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] -1 call write~int(0, main_~#t1773~0.base, main_~#t1773~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] -1 havoc main_#t~nondet57; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L788] -1 call main_~#t1774~0.base, main_~#t1774~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 call write~int(1, main_~#t1774~0.base, main_~#t1774~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L731-L774] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L734] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L735] 0 ~y$w_buff0~0 := 1; [L736] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L737] 0 ~y$w_buff0_used~0 := 1; [L738] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L738] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L740] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L741] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L742] 0 ~y$r_buff0_thd2~0 := 1; [L745] 0 ~weak$$choice0~0 := #t~nondet27; [L745] 0 havoc #t~nondet27; [L746] 0 ~weak$$choice2~0 := #t~nondet28; [L746] 0 havoc #t~nondet28; [L747] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L748] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 assume !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L749] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 #t~ite30 := #t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=1, #t~ite30=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 ~y~0 := #t~ite30; [L749] 0 havoc #t~ite29; [L749] 0 havoc #t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] 0 assume 0 != ~weak$$choice2~0 % 256; [L750] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] 0 ~y$w_buff0~0 := #t~ite33; [L750] 0 havoc #t~ite32; [L750] 0 havoc #t~ite33; [L750] 0 havoc #t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] 0 assume 0 != ~weak$$choice2~0 % 256; [L751] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] 0 ~y$w_buff1~0 := #t~ite36; [L751] 0 havoc #t~ite35; [L751] 0 havoc #t~ite34; [L751] 0 havoc #t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] 0 assume 0 != ~weak$$choice2~0 % 256; [L752] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite39=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] 0 ~y$w_buff0_used~0 := #t~ite39; [L752] 0 havoc #t~ite37; [L752] 0 havoc #t~ite38; [L752] 0 havoc #t~ite39; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 assume 0 != ~weak$$choice2~0 % 256; [L753] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff1_used~0 := #t~ite42; [L753] 0 havoc #t~ite40; [L753] 0 havoc #t~ite42; [L753] 0 havoc #t~ite41; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 assume 0 != ~weak$$choice2~0 % 256; [L754] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L754] 0 havoc #t~ite45; [L754] 0 havoc #t~ite43; [L754] 0 havoc #t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 assume 0 != ~weak$$choice2~0 % 256; [L755] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L755] 0 havoc #t~ite47; [L755] 0 havoc #t~ite48; [L755] 0 havoc #t~ite46; [L756] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 assume 0 != ~y$flush_delayed~0 % 256; [L757] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite49=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y~0 := #t~ite49; [L757] 0 havoc #t~ite49; [L758] 0 ~y$flush_delayed~0 := 0; [L761] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L764] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701-L730] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L704] 1 ~x~0 := 1; [L709] 1 ~weak$$choice0~0 := #t~nondet3; [L709] 1 havoc #t~nondet3; [L710] 1 ~weak$$choice2~0 := #t~nondet4; [L710] 1 havoc #t~nondet4; [L711] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L712] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256); [L713] 1 #t~ite6 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] 0 ~y~0 := #t~ite51; [L764] 0 havoc #t~ite50; [L764] 0 havoc #t~ite51; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L765] 0 #t~ite52 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite52=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite52; [L765] 0 havoc #t~ite52; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L766] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L766] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L713] 1 ~y~0 := #t~ite6; [L713] 1 havoc #t~ite5; [L713] 1 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 1 assume 0 != ~weak$$choice2~0 % 256; [L714] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 1 ~y$w_buff0~0 := #t~ite9; [L714] 1 havoc #t~ite8; [L714] 1 havoc #t~ite7; [L714] 1 havoc #t~ite9; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 1 assume 0 != ~weak$$choice2~0 % 256; [L715] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 1 ~y$w_buff1~0 := #t~ite12; [L715] 1 havoc #t~ite11; [L715] 1 havoc #t~ite12; [L715] 1 havoc #t~ite10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L766] 0 ~y$w_buff1_used~0 := #t~ite53; [L766] 0 havoc #t~ite53; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L767] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite54=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L767] 0 havoc #t~ite54; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L768] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite55=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L768] 0 havoc #t~ite55; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 assume 0 != ~weak$$choice2~0 % 256; [L716] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 ~y$w_buff0_used~0 := #t~ite15; [L716] 1 havoc #t~ite13; [L716] 1 havoc #t~ite15; [L716] 1 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 assume 0 != ~weak$$choice2~0 % 256; [L717] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff1_used~0 := #t~ite18; [L717] 1 havoc #t~ite16; [L717] 1 havoc #t~ite18; [L717] 1 havoc #t~ite17; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 assume 0 != ~weak$$choice2~0 % 256; [L718] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L718] 1 havoc #t~ite21; [L718] 1 havoc #t~ite20; [L718] 1 havoc #t~ite19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 assume 0 != ~weak$$choice2~0 % 256; [L719] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L719] 1 havoc #t~ite22; [L719] 1 havoc #t~ite24; [L719] 1 havoc #t~ite23; [L720] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 assume 0 != ~y$flush_delayed~0 % 256; [L721] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y~0 := #t~ite25; [L721] 1 havoc #t~ite25; [L722] 1 ~y$flush_delayed~0 := 0; [L727] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 havoc main_#t~nondet58; [L791] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L793] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L795] -1 main_#t~ite59 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 main_#t~ite60 := main_#t~ite59; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_#t~ite60=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 ~y~0 := main_#t~ite60; [L795] -1 havoc main_#t~ite59; [L795] -1 havoc main_#t~ite60; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L796] -1 main_#t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite61=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 ~y$w_buff0_used~0 := main_#t~ite61; [L796] -1 havoc main_#t~ite61; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L797] -1 main_#t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite62=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] -1 ~y$w_buff1_used~0 := main_#t~ite62; [L797] -1 havoc main_#t~ite62; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L798] -1 main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite63=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y$r_buff0_thd0~0 := main_#t~ite63; [L798] -1 havoc main_#t~ite63; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L799] -1 main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite64=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$r_buff1_thd0~0 := main_#t~ite64; [L799] -1 havoc main_#t~ite64; [L802] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L804] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L804] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1773~0.base, main_~#t1773~0.offset, main_~#t1774~0.base, main_~#t1774~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 call main_~#t1773~0.base, main_~#t1773~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] -1 call write~int(0, main_~#t1773~0.base, main_~#t1773~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] -1 havoc main_#t~nondet57; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L788] -1 call main_~#t1774~0.base, main_~#t1774~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 call write~int(1, main_~#t1774~0.base, main_~#t1774~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L731-L774] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L734] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L735] 0 ~y$w_buff0~0 := 1; [L736] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L737] 0 ~y$w_buff0_used~0 := 1; [L738] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L738] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L740] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L741] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L742] 0 ~y$r_buff0_thd2~0 := 1; [L745] 0 ~weak$$choice0~0 := #t~nondet27; [L745] 0 havoc #t~nondet27; [L746] 0 ~weak$$choice2~0 := #t~nondet28; [L746] 0 havoc #t~nondet28; [L747] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L748] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 assume !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L749] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 #t~ite30 := #t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=1, #t~ite30=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 ~y~0 := #t~ite30; [L749] 0 havoc #t~ite29; [L749] 0 havoc #t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] 0 assume 0 != ~weak$$choice2~0 % 256; [L750] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] 0 ~y$w_buff0~0 := #t~ite33; [L750] 0 havoc #t~ite32; [L750] 0 havoc #t~ite33; [L750] 0 havoc #t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] 0 assume 0 != ~weak$$choice2~0 % 256; [L751] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] 0 ~y$w_buff1~0 := #t~ite36; [L751] 0 havoc #t~ite35; [L751] 0 havoc #t~ite34; [L751] 0 havoc #t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] 0 assume 0 != ~weak$$choice2~0 % 256; [L752] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite39=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] 0 ~y$w_buff0_used~0 := #t~ite39; [L752] 0 havoc #t~ite37; [L752] 0 havoc #t~ite38; [L752] 0 havoc #t~ite39; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 assume 0 != ~weak$$choice2~0 % 256; [L753] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff1_used~0 := #t~ite42; [L753] 0 havoc #t~ite40; [L753] 0 havoc #t~ite42; [L753] 0 havoc #t~ite41; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 assume 0 != ~weak$$choice2~0 % 256; [L754] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L754] 0 havoc #t~ite45; [L754] 0 havoc #t~ite43; [L754] 0 havoc #t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 assume 0 != ~weak$$choice2~0 % 256; [L755] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L755] 0 havoc #t~ite47; [L755] 0 havoc #t~ite48; [L755] 0 havoc #t~ite46; [L756] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 assume 0 != ~y$flush_delayed~0 % 256; [L757] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite49=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y~0 := #t~ite49; [L757] 0 havoc #t~ite49; [L758] 0 ~y$flush_delayed~0 := 0; [L761] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L764] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701-L730] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L704] 1 ~x~0 := 1; [L709] 1 ~weak$$choice0~0 := #t~nondet3; [L709] 1 havoc #t~nondet3; [L710] 1 ~weak$$choice2~0 := #t~nondet4; [L710] 1 havoc #t~nondet4; [L711] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L712] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256); [L713] 1 #t~ite6 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] 0 ~y~0 := #t~ite51; [L764] 0 havoc #t~ite50; [L764] 0 havoc #t~ite51; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L765] 0 #t~ite52 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite52=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite52; [L765] 0 havoc #t~ite52; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L766] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L766] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L713] 1 ~y~0 := #t~ite6; [L713] 1 havoc #t~ite5; [L713] 1 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 1 assume 0 != ~weak$$choice2~0 % 256; [L714] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 1 ~y$w_buff0~0 := #t~ite9; [L714] 1 havoc #t~ite8; [L714] 1 havoc #t~ite7; [L714] 1 havoc #t~ite9; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 1 assume 0 != ~weak$$choice2~0 % 256; [L715] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 1 ~y$w_buff1~0 := #t~ite12; [L715] 1 havoc #t~ite11; [L715] 1 havoc #t~ite12; [L715] 1 havoc #t~ite10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L766] 0 ~y$w_buff1_used~0 := #t~ite53; [L766] 0 havoc #t~ite53; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L767] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite54=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L767] 0 havoc #t~ite54; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L768] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite55=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L768] 0 havoc #t~ite55; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 assume 0 != ~weak$$choice2~0 % 256; [L716] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 ~y$w_buff0_used~0 := #t~ite15; [L716] 1 havoc #t~ite13; [L716] 1 havoc #t~ite15; [L716] 1 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 assume 0 != ~weak$$choice2~0 % 256; [L717] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff1_used~0 := #t~ite18; [L717] 1 havoc #t~ite16; [L717] 1 havoc #t~ite18; [L717] 1 havoc #t~ite17; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 assume 0 != ~weak$$choice2~0 % 256; [L718] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L718] 1 havoc #t~ite21; [L718] 1 havoc #t~ite20; [L718] 1 havoc #t~ite19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 assume 0 != ~weak$$choice2~0 % 256; [L719] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L719] 1 havoc #t~ite22; [L719] 1 havoc #t~ite24; [L719] 1 havoc #t~ite23; [L720] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 assume 0 != ~y$flush_delayed~0 % 256; [L721] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y~0 := #t~ite25; [L721] 1 havoc #t~ite25; [L722] 1 ~y$flush_delayed~0 := 0; [L727] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 havoc main_#t~nondet58; [L791] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L793] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L795] -1 main_#t~ite59 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 main_#t~ite60 := main_#t~ite59; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_#t~ite60=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 ~y~0 := main_#t~ite60; [L795] -1 havoc main_#t~ite59; [L795] -1 havoc main_#t~ite60; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L796] -1 main_#t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite61=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 ~y$w_buff0_used~0 := main_#t~ite61; [L796] -1 havoc main_#t~ite61; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L797] -1 main_#t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite62=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] -1 ~y$w_buff1_used~0 := main_#t~ite62; [L797] -1 havoc main_#t~ite62; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L798] -1 main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite63=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y$r_buff0_thd0~0 := main_#t~ite63; [L798] -1 havoc main_#t~ite63; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L799] -1 main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite64=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$r_buff1_thd0~0 := main_#t~ite64; [L799] -1 havoc main_#t~ite64; [L802] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L804] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L804] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0.base=6, main_~#t1773~0.offset=0, main_~#t1774~0.base=7, main_~#t1774~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1773~0, main_~#t1774~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] FCALL -1 call main_~#t1773~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FCALL -1 call write~int(0, main_~#t1773~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] -1 havoc main_#t~nondet57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L788] FCALL -1 call main_~#t1774~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call write~int(1, main_~#t1774~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L731-L774] 0 ~arg := #in~arg; [L734] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L735] 0 ~y$w_buff0~0 := 1; [L736] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L737] 0 ~y$w_buff0_used~0 := 1; [L738] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L738] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L740] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L741] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L742] 0 ~y$r_buff0_thd2~0 := 1; [L745] 0 ~weak$$choice0~0 := #t~nondet27; [L745] 0 havoc #t~nondet27; [L746] 0 ~weak$$choice2~0 := #t~nondet28; [L746] 0 havoc #t~nondet28; [L747] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L748] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND FALSE 0 !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L749] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 #t~ite30 := #t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=1, #t~ite30=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 ~y~0 := #t~ite30; [L749] 0 havoc #t~ite29; [L749] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L750] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] 0 ~y$w_buff0~0 := #t~ite33; [L750] 0 havoc #t~ite32; [L750] 0 havoc #t~ite33; [L750] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L751] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] 0 ~y$w_buff1~0 := #t~ite36; [L751] 0 havoc #t~ite35; [L751] 0 havoc #t~ite34; [L751] 0 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L752] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite39=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] 0 ~y$w_buff0_used~0 := #t~ite39; [L752] 0 havoc #t~ite37; [L752] 0 havoc #t~ite38; [L752] 0 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L753] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff1_used~0 := #t~ite42; [L753] 0 havoc #t~ite40; [L753] 0 havoc #t~ite42; [L753] 0 havoc #t~ite41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L754] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L754] 0 havoc #t~ite45; [L754] 0 havoc #t~ite43; [L754] 0 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L755] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L755] 0 havoc #t~ite47; [L755] 0 havoc #t~ite48; [L755] 0 havoc #t~ite46; [L756] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L757] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite49=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y~0 := #t~ite49; [L757] 0 havoc #t~ite49; [L758] 0 ~y$flush_delayed~0 := 0; [L761] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L764] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701-L730] 1 ~arg := #in~arg; [L704] 1 ~x~0 := 1; [L709] 1 ~weak$$choice0~0 := #t~nondet3; [L709] 1 havoc #t~nondet3; [L710] 1 ~weak$$choice2~0 := #t~nondet4; [L710] 1 havoc #t~nondet4; [L711] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L712] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L713] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] 0 ~y~0 := #t~ite51; [L764] 0 havoc #t~ite50; [L764] 0 havoc #t~ite51; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L765] 0 #t~ite52 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite52=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite52; [L765] 0 havoc #t~ite52; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L766] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L766] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L713] 1 ~y~0 := #t~ite6; [L713] 1 havoc #t~ite5; [L713] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L714] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 1 ~y$w_buff0~0 := #t~ite9; [L714] 1 havoc #t~ite8; [L714] 1 havoc #t~ite7; [L714] 1 havoc #t~ite9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L715] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 1 ~y$w_buff1~0 := #t~ite12; [L715] 1 havoc #t~ite11; [L715] 1 havoc #t~ite12; [L715] 1 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L766] 0 ~y$w_buff1_used~0 := #t~ite53; [L766] 0 havoc #t~ite53; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L767] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite54=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L767] 0 havoc #t~ite54; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L768] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite55=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L768] 0 havoc #t~ite55; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L716] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 ~y$w_buff0_used~0 := #t~ite15; [L716] 1 havoc #t~ite13; [L716] 1 havoc #t~ite15; [L716] 1 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff1_used~0 := #t~ite18; [L717] 1 havoc #t~ite16; [L717] 1 havoc #t~ite18; [L717] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L718] 1 havoc #t~ite21; [L718] 1 havoc #t~ite20; [L718] 1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L719] 1 havoc #t~ite22; [L719] 1 havoc #t~ite24; [L719] 1 havoc #t~ite23; [L720] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L721] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y~0 := #t~ite25; [L721] 1 havoc #t~ite25; [L722] 1 ~y$flush_delayed~0 := 0; [L727] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 havoc main_#t~nondet58; [L791] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L793] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L795] -1 main_#t~ite59 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 main_#t~ite60 := main_#t~ite59; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_#t~ite60=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 ~y~0 := main_#t~ite60; [L795] -1 havoc main_#t~ite59; [L795] -1 havoc main_#t~ite60; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L796] -1 main_#t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite61=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 ~y$w_buff0_used~0 := main_#t~ite61; [L796] -1 havoc main_#t~ite61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L797] -1 main_#t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite62=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] -1 ~y$w_buff1_used~0 := main_#t~ite62; [L797] -1 havoc main_#t~ite62; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L798] -1 main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite63=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y$r_buff0_thd0~0 := main_#t~ite63; [L798] -1 havoc main_#t~ite63; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L799] -1 main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite64=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$r_buff1_thd0~0 := main_#t~ite64; [L799] -1 havoc main_#t~ite64; [L802] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L804] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L804] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1773~0, main_~#t1774~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] FCALL -1 call main_~#t1773~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FCALL -1 call write~int(0, main_~#t1773~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] -1 havoc main_#t~nondet57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L788] FCALL -1 call main_~#t1774~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call write~int(1, main_~#t1774~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L731-L774] 0 ~arg := #in~arg; [L734] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L735] 0 ~y$w_buff0~0 := 1; [L736] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L737] 0 ~y$w_buff0_used~0 := 1; [L738] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L738] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L740] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L741] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L742] 0 ~y$r_buff0_thd2~0 := 1; [L745] 0 ~weak$$choice0~0 := #t~nondet27; [L745] 0 havoc #t~nondet27; [L746] 0 ~weak$$choice2~0 := #t~nondet28; [L746] 0 havoc #t~nondet28; [L747] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L748] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND FALSE 0 !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L749] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 #t~ite30 := #t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=1, #t~ite30=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 ~y~0 := #t~ite30; [L749] 0 havoc #t~ite29; [L749] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L750] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] 0 ~y$w_buff0~0 := #t~ite33; [L750] 0 havoc #t~ite32; [L750] 0 havoc #t~ite33; [L750] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L751] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] 0 ~y$w_buff1~0 := #t~ite36; [L751] 0 havoc #t~ite35; [L751] 0 havoc #t~ite34; [L751] 0 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L752] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite39=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] 0 ~y$w_buff0_used~0 := #t~ite39; [L752] 0 havoc #t~ite37; [L752] 0 havoc #t~ite38; [L752] 0 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L753] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff1_used~0 := #t~ite42; [L753] 0 havoc #t~ite40; [L753] 0 havoc #t~ite42; [L753] 0 havoc #t~ite41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L754] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L754] 0 havoc #t~ite45; [L754] 0 havoc #t~ite43; [L754] 0 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L755] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L755] 0 havoc #t~ite47; [L755] 0 havoc #t~ite48; [L755] 0 havoc #t~ite46; [L756] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L757] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite49=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y~0 := #t~ite49; [L757] 0 havoc #t~ite49; [L758] 0 ~y$flush_delayed~0 := 0; [L761] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L764] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701-L730] 1 ~arg := #in~arg; [L704] 1 ~x~0 := 1; [L709] 1 ~weak$$choice0~0 := #t~nondet3; [L709] 1 havoc #t~nondet3; [L710] 1 ~weak$$choice2~0 := #t~nondet4; [L710] 1 havoc #t~nondet4; [L711] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L712] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L713] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] 0 ~y~0 := #t~ite51; [L764] 0 havoc #t~ite50; [L764] 0 havoc #t~ite51; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L765] 0 #t~ite52 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite52=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite52; [L765] 0 havoc #t~ite52; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L766] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L766] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L713] 1 ~y~0 := #t~ite6; [L713] 1 havoc #t~ite5; [L713] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L714] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 1 ~y$w_buff0~0 := #t~ite9; [L714] 1 havoc #t~ite8; [L714] 1 havoc #t~ite7; [L714] 1 havoc #t~ite9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L715] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 1 ~y$w_buff1~0 := #t~ite12; [L715] 1 havoc #t~ite11; [L715] 1 havoc #t~ite12; [L715] 1 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L766] 0 ~y$w_buff1_used~0 := #t~ite53; [L766] 0 havoc #t~ite53; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L767] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite54=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L767] 0 havoc #t~ite54; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L768] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite55=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L768] 0 havoc #t~ite55; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L716] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 ~y$w_buff0_used~0 := #t~ite15; [L716] 1 havoc #t~ite13; [L716] 1 havoc #t~ite15; [L716] 1 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff1_used~0 := #t~ite18; [L717] 1 havoc #t~ite16; [L717] 1 havoc #t~ite18; [L717] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L718] 1 havoc #t~ite21; [L718] 1 havoc #t~ite20; [L718] 1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L719] 1 havoc #t~ite22; [L719] 1 havoc #t~ite24; [L719] 1 havoc #t~ite23; [L720] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L721] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y~0 := #t~ite25; [L721] 1 havoc #t~ite25; [L722] 1 ~y$flush_delayed~0 := 0; [L727] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 havoc main_#t~nondet58; [L791] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L793] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L795] -1 main_#t~ite59 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 main_#t~ite60 := main_#t~ite59; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_#t~ite60=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 ~y~0 := main_#t~ite60; [L795] -1 havoc main_#t~ite59; [L795] -1 havoc main_#t~ite60; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L796] -1 main_#t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite61=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 ~y$w_buff0_used~0 := main_#t~ite61; [L796] -1 havoc main_#t~ite61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L797] -1 main_#t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite62=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] -1 ~y$w_buff1_used~0 := main_#t~ite62; [L797] -1 havoc main_#t~ite62; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L798] -1 main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite63=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y$r_buff0_thd0~0 := main_#t~ite63; [L798] -1 havoc main_#t~ite63; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L799] -1 main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite64=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$r_buff1_thd0~0 := main_#t~ite64; [L799] -1 havoc main_#t~ite64; [L802] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L804] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L804] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1773~0!base=6, main_~#t1773~0!offset=0, main_~#t1774~0!base=7, main_~#t1774~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] FCALL -1 call ~#t1773~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FCALL -1 call write~int(0, ~#t1773~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] -1 havoc #t~nondet57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L788] FCALL -1 call ~#t1774~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call write~int(1, ~#t1774~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L731-L774] 0 ~arg := #in~arg; [L734] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L735] 0 ~y$w_buff0~0 := 1; [L736] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L737] 0 ~y$w_buff0_used~0 := 1; [L5] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L740] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L741] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L742] 0 ~y$r_buff0_thd2~0 := 1; [L745] 0 ~weak$$choice0~0 := #t~nondet27; [L745] 0 havoc #t~nondet27; [L746] 0 ~weak$$choice2~0 := #t~nondet28; [L746] 0 havoc #t~nondet28; [L747] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L748] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND FALSE 0 !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L749] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 #t~ite30 := #t~ite29; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 ~y~0 := #t~ite30; [L749] 0 havoc #t~ite29; [L749] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L750] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] 0 ~y$w_buff0~0 := #t~ite33; [L750] 0 havoc #t~ite32; [L750] 0 havoc #t~ite33; [L750] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L751] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] 0 ~y$w_buff1~0 := #t~ite36; [L751] 0 havoc #t~ite35; [L751] 0 havoc #t~ite34; [L751] 0 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L752] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] 0 ~y$w_buff0_used~0 := #t~ite39; [L752] 0 havoc #t~ite37; [L752] 0 havoc #t~ite38; [L752] 0 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L753] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff1_used~0 := #t~ite42; [L753] 0 havoc #t~ite40; [L753] 0 havoc #t~ite42; [L753] 0 havoc #t~ite41; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L754] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L754] 0 havoc #t~ite45; [L754] 0 havoc #t~ite43; [L754] 0 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L755] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L755] 0 havoc #t~ite47; [L755] 0 havoc #t~ite48; [L755] 0 havoc #t~ite46; [L756] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L757] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y~0 := #t~ite49; [L757] 0 havoc #t~ite49; [L758] 0 ~y$flush_delayed~0 := 0; [L761] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L764] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701-L730] 1 ~arg := #in~arg; [L704] 1 ~x~0 := 1; [L709] 1 ~weak$$choice0~0 := #t~nondet3; [L709] 1 havoc #t~nondet3; [L710] 1 ~weak$$choice2~0 := #t~nondet4; [L710] 1 havoc #t~nondet4; [L711] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L712] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L713] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] 0 ~y~0 := #t~ite51; [L764] 0 havoc #t~ite50; [L764] 0 havoc #t~ite51; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L765] 0 #t~ite52 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite52; [L765] 0 havoc #t~ite52; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L766] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L766] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L713] 1 ~y~0 := #t~ite6; [L713] 1 havoc #t~ite5; [L713] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L714] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 1 ~y$w_buff0~0 := #t~ite9; [L714] 1 havoc #t~ite8; [L714] 1 havoc #t~ite7; [L714] 1 havoc #t~ite9; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L715] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 1 ~y$w_buff1~0 := #t~ite12; [L715] 1 havoc #t~ite11; [L715] 1 havoc #t~ite12; [L715] 1 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L766] 0 ~y$w_buff1_used~0 := #t~ite53; [L766] 0 havoc #t~ite53; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L767] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L767] 0 havoc #t~ite54; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L768] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L768] 0 havoc #t~ite55; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L716] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 ~y$w_buff0_used~0 := #t~ite15; [L716] 1 havoc #t~ite13; [L716] 1 havoc #t~ite15; [L716] 1 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff1_used~0 := #t~ite18; [L717] 1 havoc #t~ite16; [L717] 1 havoc #t~ite18; [L717] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L718] 1 havoc #t~ite21; [L718] 1 havoc #t~ite20; [L718] 1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L719] 1 havoc #t~ite22; [L719] 1 havoc #t~ite24; [L719] 1 havoc #t~ite23; [L720] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L721] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y~0 := #t~ite25; [L721] 1 havoc #t~ite25; [L722] 1 ~y$flush_delayed~0 := 0; [L727] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 havoc #t~nondet58; [L791] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L793] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L795] -1 #t~ite59 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 #t~ite60 := #t~ite59; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 ~y~0 := #t~ite60; [L795] -1 havoc #t~ite59; [L795] -1 havoc #t~ite60; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L796] -1 #t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 ~y$w_buff0_used~0 := #t~ite61; [L796] -1 havoc #t~ite61; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L797] -1 #t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] -1 ~y$w_buff1_used~0 := #t~ite62; [L797] -1 havoc #t~ite62; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L798] -1 #t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y$r_buff0_thd0~0 := #t~ite63; [L798] -1 havoc #t~ite63; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L799] -1 #t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$r_buff1_thd0~0 := #t~ite64; [L799] -1 havoc #t~ite64; [L802] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] FCALL -1 call ~#t1773~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FCALL -1 call write~int(0, ~#t1773~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L787] -1 havoc #t~nondet57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L788] FCALL -1 call ~#t1774~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call write~int(1, ~#t1774~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L731-L774] 0 ~arg := #in~arg; [L734] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L735] 0 ~y$w_buff0~0 := 1; [L736] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L737] 0 ~y$w_buff0_used~0 := 1; [L5] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L740] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L741] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L742] 0 ~y$r_buff0_thd2~0 := 1; [L745] 0 ~weak$$choice0~0 := #t~nondet27; [L745] 0 havoc #t~nondet27; [L746] 0 ~weak$$choice2~0 := #t~nondet28; [L746] 0 havoc #t~nondet28; [L747] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L748] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND FALSE 0 !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L749] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 #t~ite30 := #t~ite29; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 0 ~y~0 := #t~ite30; [L749] 0 havoc #t~ite29; [L749] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L750] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L750] 0 ~y$w_buff0~0 := #t~ite33; [L750] 0 havoc #t~ite32; [L750] 0 havoc #t~ite33; [L750] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L751] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L751] 0 ~y$w_buff1~0 := #t~ite36; [L751] 0 havoc #t~ite35; [L751] 0 havoc #t~ite34; [L751] 0 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L752] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L752] 0 ~y$w_buff0_used~0 := #t~ite39; [L752] 0 havoc #t~ite37; [L752] 0 havoc #t~ite38; [L752] 0 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L753] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff1_used~0 := #t~ite42; [L753] 0 havoc #t~ite40; [L753] 0 havoc #t~ite42; [L753] 0 havoc #t~ite41; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L754] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L754] 0 havoc #t~ite45; [L754] 0 havoc #t~ite43; [L754] 0 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L755] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L755] 0 havoc #t~ite47; [L755] 0 havoc #t~ite48; [L755] 0 havoc #t~ite46; [L756] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L757] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y~0 := #t~ite49; [L757] 0 havoc #t~ite49; [L758] 0 ~y$flush_delayed~0 := 0; [L761] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L764] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701-L730] 1 ~arg := #in~arg; [L704] 1 ~x~0 := 1; [L709] 1 ~weak$$choice0~0 := #t~nondet3; [L709] 1 havoc #t~nondet3; [L710] 1 ~weak$$choice2~0 := #t~nondet4; [L710] 1 havoc #t~nondet4; [L711] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L712] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L713] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L764] 0 ~y~0 := #t~ite51; [L764] 0 havoc #t~ite50; [L764] 0 havoc #t~ite51; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L765] 0 #t~ite52 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite52; [L765] 0 havoc #t~ite52; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L766] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L766] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L713] 1 ~y~0 := #t~ite6; [L713] 1 havoc #t~ite5; [L713] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L714] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 1 ~y$w_buff0~0 := #t~ite9; [L714] 1 havoc #t~ite8; [L714] 1 havoc #t~ite7; [L714] 1 havoc #t~ite9; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L715] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 1 ~y$w_buff1~0 := #t~ite12; [L715] 1 havoc #t~ite11; [L715] 1 havoc #t~ite12; [L715] 1 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L766] 0 ~y$w_buff1_used~0 := #t~ite53; [L766] 0 havoc #t~ite53; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L767] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L767] 0 havoc #t~ite54; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L768] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L768] 0 havoc #t~ite55; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L716] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 ~y$w_buff0_used~0 := #t~ite15; [L716] 1 havoc #t~ite13; [L716] 1 havoc #t~ite15; [L716] 1 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff1_used~0 := #t~ite18; [L717] 1 havoc #t~ite16; [L717] 1 havoc #t~ite18; [L717] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L718] 1 havoc #t~ite21; [L718] 1 havoc #t~ite20; [L718] 1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L719] 1 havoc #t~ite22; [L719] 1 havoc #t~ite24; [L719] 1 havoc #t~ite23; [L720] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L721] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y~0 := #t~ite25; [L721] 1 havoc #t~ite25; [L722] 1 ~y$flush_delayed~0 := 0; [L727] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 havoc #t~nondet58; [L791] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L793] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L795] -1 #t~ite59 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 #t~ite60 := #t~ite59; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L795] -1 ~y~0 := #t~ite60; [L795] -1 havoc #t~ite59; [L795] -1 havoc #t~ite60; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L796] -1 #t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 ~y$w_buff0_used~0 := #t~ite61; [L796] -1 havoc #t~ite61; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L797] -1 #t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L797] -1 ~y$w_buff1_used~0 := #t~ite62; [L797] -1 havoc #t~ite62; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L798] -1 #t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y$r_buff0_thd0~0 := #t~ite63; [L798] -1 havoc #t~ite63; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L799] -1 #t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$r_buff1_thd0~0 := #t~ite64; [L799] -1 havoc #t~ite64; [L802] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L678] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L679] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L680] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L682] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L684] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L685] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L686] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L687] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L688] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L689] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L690] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L691] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L692] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L693] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L694] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L695] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L696] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L697] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L698] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L699] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L700] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L786] -1 pthread_t t1773; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] FCALL, FORK -1 pthread_create(&t1773, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L788] -1 pthread_t t1774; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] FCALL, FORK -1 pthread_create(&t1774, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L734] 0 y$w_buff1 = y$w_buff0 [L735] 0 y$w_buff0 = 1 [L736] 0 y$w_buff1_used = y$w_buff0_used [L737] 0 y$w_buff0_used = (_Bool)1 [L5] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L739] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L740] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L741] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L742] 0 y$r_buff0_thd2 = (_Bool)1 [L745] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L746] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L747] 0 y$flush_delayed = weak$$choice2 [L748] 0 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L749] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L749] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L749] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L749] 0 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L750] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L750] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L751] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L751] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L752] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L753] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L753] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L754] EXPR 0 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L754] 0 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L755] EXPR 0 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L755] 0 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L756] 0 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 0 y = y$flush_delayed ? y$mem_tmp : y [L758] 0 y$flush_delayed = (_Bool)0 [L761] 0 __unbuffered_p1_EBX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L764] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L704] 1 x = 1 [L709] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L710] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L711] 1 y$flush_delayed = weak$$choice2 [L712] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L713] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L764] 0 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L765] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L765] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L766] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L713] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L714] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L714] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L715] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L715] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L766] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L767] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L767] 0 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L768] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L768] 0 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L771] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L717] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L718] EXPR 1 weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] 1 y$r_buff0_thd1 = weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) [L719] EXPR 1 weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L719] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L720] 1 __unbuffered_p0_EAX = y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L721] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L721] 1 y = y$flush_delayed ? y$mem_tmp : y [L722] 1 y$flush_delayed = (_Bool)0 [L727] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L791] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L796] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L796] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L797] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L797] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L799] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L802] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 0 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] ----- [2018-11-23 04:06:54,448 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_36442646-b783-40cc-b437-83134e5fc7f7/bin-2019/utaipan/witness.graphml [2018-11-23 04:06:54,449 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 04:06:54,449 INFO L168 Benchmark]: Toolchain (without parser) took 71656.37 ms. Allocated memory was 1.0 GB in the beginning and 6.5 GB in the end (delta: 5.5 GB). Free memory was 955.5 MB in the beginning and 3.8 GB in the end (delta: -2.8 GB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. [2018-11-23 04:06:54,450 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 04:06:54,451 INFO L168 Benchmark]: CACSL2BoogieTranslator took 452.55 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 127.4 MB). Free memory was 955.5 MB in the beginning and 1.1 GB in the end (delta: -149.3 MB). Peak memory consumption was 38.3 MB. Max. memory is 11.5 GB. [2018-11-23 04:06:54,451 INFO L168 Benchmark]: Boogie Procedure Inliner took 43.82 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-23 04:06:54,451 INFO L168 Benchmark]: Boogie Preprocessor took 28.60 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-23 04:06:54,451 INFO L168 Benchmark]: RCFGBuilder took 518.72 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 52.5 MB). Peak memory consumption was 52.5 MB. Max. memory is 11.5 GB. [2018-11-23 04:06:54,452 INFO L168 Benchmark]: TraceAbstraction took 65233.90 ms. Allocated memory was 1.2 GB in the beginning and 6.5 GB in the end (delta: 5.4 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 2.5 GB. Max. memory is 11.5 GB. [2018-11-23 04:06:54,452 INFO L168 Benchmark]: Witness Printer took 5375.53 ms. Allocated memory is still 6.5 GB. Free memory was 3.9 GB in the beginning and 3.8 GB in the end (delta: 147.2 MB). Peak memory consumption was 147.2 MB. Max. memory is 11.5 GB. [2018-11-23 04:06:54,453 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 452.55 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 127.4 MB). Free memory was 955.5 MB in the beginning and 1.1 GB in the end (delta: -149.3 MB). Peak memory consumption was 38.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 43.82 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 28.60 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 518.72 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 52.5 MB). Peak memory consumption was 52.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 65233.90 ms. Allocated memory was 1.2 GB in the beginning and 6.5 GB in the end (delta: 5.4 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 2.5 GB. Max. memory is 11.5 GB. * Witness Printer took 5375.53 ms. Allocated memory is still 6.5 GB. Free memory was 3.9 GB in the beginning and 3.8 GB in the end (delta: 147.2 MB). Peak memory consumption was 147.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L678] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L679] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L680] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L682] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L684] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L685] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L686] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L687] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L688] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L689] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L690] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L691] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L692] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L693] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L694] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L695] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L696] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L697] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L698] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L699] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L700] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L786] -1 pthread_t t1773; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] FCALL, FORK -1 pthread_create(&t1773, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L788] -1 pthread_t t1774; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] FCALL, FORK -1 pthread_create(&t1774, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L734] 0 y$w_buff1 = y$w_buff0 [L735] 0 y$w_buff0 = 1 [L736] 0 y$w_buff1_used = y$w_buff0_used [L737] 0 y$w_buff0_used = (_Bool)1 [L5] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L739] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L740] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L741] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L742] 0 y$r_buff0_thd2 = (_Bool)1 [L745] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L746] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L747] 0 y$flush_delayed = weak$$choice2 [L748] 0 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L749] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L749] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L749] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L749] 0 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L750] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L750] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L751] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L751] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L752] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L753] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L753] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L754] EXPR 0 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L754] 0 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L755] EXPR 0 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L755] 0 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L756] 0 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 0 y = y$flush_delayed ? y$mem_tmp : y [L758] 0 y$flush_delayed = (_Bool)0 [L761] 0 __unbuffered_p1_EBX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L764] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L704] 1 x = 1 [L709] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L710] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L711] 1 y$flush_delayed = weak$$choice2 [L712] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L713] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L764] 0 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L765] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L765] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L766] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L713] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L714] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L714] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L715] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L715] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L766] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L767] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L767] 0 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L768] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L768] 0 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L771] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L717] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L718] EXPR 1 weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] 1 y$r_buff0_thd1 = weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) [L719] EXPR 1 weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L719] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L720] 1 __unbuffered_p0_EAX = y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L721] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L721] 1 y = y$flush_delayed ? y$mem_tmp : y [L722] 1 y$flush_delayed = (_Bool)0 [L727] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L791] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L796] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L796] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L797] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L797] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L799] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L802] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 0 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 283 locations, 3 error locations. UNSAFE Result, 65.1s OverallTime, 31 OverallIterations, 1 TraceHistogramMax, 19.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 11123 SDtfs, 13725 SDslu, 29410 SDs, 0 SdLazy, 11930 SolverSat, 695 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 313 GetRequests, 76 SyntacticMatches, 19 SemanticMatches, 218 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 228 ImplicationChecksByTransitivity, 1.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=228356occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 35.2s AutomataMinimizationTime, 30 MinimizatonAttempts, 370262 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 2509 NumberOfCodeBlocks, 2509 NumberOfCodeBlocksAsserted, 31 NumberOfCheckSat, 2377 ConstructedInterpolants, 0 QuantifiedInterpolants, 496221 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 30 InterpolantComputations, 30 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...