./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/bitvector/soft_float_1_true-unreach-call_true-no-overflow_true-termination.c.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/bitvector/soft_float_1_true-unreach-call_true-no-overflow_true-termination.c.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f756365182c9801d4a2ac186a40692687a86b469 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/bitvector/soft_float_1_true-unreach-call_true-no-overflow_true-termination.c.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f756365182c9801d4a2ac186a40692687a86b469 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Result: TRUE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 06:45:39,791 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 06:45:39,793 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 06:45:39,800 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 06:45:39,800 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 06:45:39,801 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 06:45:39,802 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 06:45:39,803 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 06:45:39,804 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 06:45:39,805 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 06:45:39,805 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 06:45:39,805 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 06:45:39,806 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 06:45:39,807 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 06:45:39,807 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 06:45:39,808 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 06:45:39,809 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 06:45:39,810 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 06:45:39,812 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 06:45:39,813 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 06:45:39,814 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 06:45:39,815 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 06:45:39,817 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 06:45:39,817 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 06:45:39,817 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 06:45:39,818 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 06:45:39,819 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 06:45:39,819 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 06:45:39,820 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 06:45:39,821 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 06:45:39,821 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 06:45:39,821 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 06:45:39,822 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 06:45:39,822 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 06:45:39,822 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 06:45:39,823 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 06:45:39,823 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-11-23 06:45:39,834 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 06:45:39,834 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 06:45:39,835 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 06:45:39,835 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 06:45:39,835 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-23 06:45:39,835 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-23 06:45:39,835 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-23 06:45:39,835 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-23 06:45:39,836 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-23 06:45:39,836 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-23 06:45:39,836 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-23 06:45:39,836 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-23 06:45:39,836 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-23 06:45:39,837 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 06:45:39,838 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 06:45:39,838 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 06:45:39,838 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 06:45:39,838 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 06:45:39,838 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 06:45:39,838 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 06:45:39,838 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 06:45:39,838 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 06:45:39,839 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 06:45:39,839 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 06:45:39,839 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 06:45:39,839 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 06:45:39,839 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 06:45:39,839 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 06:45:39,839 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 06:45:39,839 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 06:45:39,839 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 06:45:39,839 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 06:45:39,839 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 06:45:39,839 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-23 06:45:39,840 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 06:45:39,840 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 06:45:39,840 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 06:45:39,840 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f756365182c9801d4a2ac186a40692687a86b469 [2018-11-23 06:45:39,863 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 06:45:39,871 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 06:45:39,874 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 06:45:39,875 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 06:45:39,876 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 06:45:39,876 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/../../sv-benchmarks/c/bitvector/soft_float_1_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-11-23 06:45:39,914 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/data/cc6ea11ca/c36bd7dbb4c4423186794260d1af8c72/FLAGd5e25b6db [2018-11-23 06:45:40,245 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 06:45:40,245 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/sv-benchmarks/c/bitvector/soft_float_1_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-11-23 06:45:40,250 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/data/cc6ea11ca/c36bd7dbb4c4423186794260d1af8c72/FLAGd5e25b6db [2018-11-23 06:45:40,259 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/data/cc6ea11ca/c36bd7dbb4c4423186794260d1af8c72 [2018-11-23 06:45:40,261 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 06:45:40,262 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 06:45:40,262 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 06:45:40,262 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 06:45:40,265 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 06:45:40,265 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 06:45:40" (1/1) ... [2018-11-23 06:45:40,267 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3d4baec3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:40, skipping insertion in model container [2018-11-23 06:45:40,267 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 06:45:40" (1/1) ... [2018-11-23 06:45:40,273 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 06:45:40,295 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 06:45:40,445 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 06:45:40,448 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 06:45:40,482 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 06:45:40,490 INFO L195 MainTranslator]: Completed translation [2018-11-23 06:45:40,490 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:40 WrapperNode [2018-11-23 06:45:40,491 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 06:45:40,491 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 06:45:40,491 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 06:45:40,491 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 06:45:40,496 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:40" (1/1) ... [2018-11-23 06:45:40,501 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:40" (1/1) ... [2018-11-23 06:45:40,546 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 06:45:40,547 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 06:45:40,547 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 06:45:40,547 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 06:45:40,553 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:40" (1/1) ... [2018-11-23 06:45:40,553 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:40" (1/1) ... [2018-11-23 06:45:40,555 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:40" (1/1) ... [2018-11-23 06:45:40,555 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:40" (1/1) ... [2018-11-23 06:45:40,561 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:40" (1/1) ... [2018-11-23 06:45:40,568 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:40" (1/1) ... [2018-11-23 06:45:40,570 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:40" (1/1) ... [2018-11-23 06:45:40,572 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 06:45:40,572 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 06:45:40,572 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 06:45:40,572 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 06:45:40,573 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:40" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 06:45:40,611 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 06:45:40,611 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 06:45:40,611 INFO L130 BoogieDeclarations]: Found specification of procedure base2flt [2018-11-23 06:45:40,611 INFO L138 BoogieDeclarations]: Found implementation of procedure base2flt [2018-11-23 06:45:40,611 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 06:45:40,611 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 06:45:40,612 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 06:45:40,612 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 06:45:40,612 INFO L130 BoogieDeclarations]: Found specification of procedure addflt [2018-11-23 06:45:40,612 INFO L138 BoogieDeclarations]: Found implementation of procedure addflt [2018-11-23 06:45:40,612 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 06:45:40,612 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 06:45:40,858 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 06:45:40,859 INFO L280 CfgBuilder]: Removed 2 assue(true) statements. [2018-11-23 06:45:40,859 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 06:45:40 BoogieIcfgContainer [2018-11-23 06:45:40,859 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 06:45:40,860 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 06:45:40,860 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 06:45:40,863 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 06:45:40,863 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 06:45:40" (1/3) ... [2018-11-23 06:45:40,864 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@59d29fcd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 06:45:40, skipping insertion in model container [2018-11-23 06:45:40,864 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:40" (2/3) ... [2018-11-23 06:45:40,864 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@59d29fcd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 06:45:40, skipping insertion in model container [2018-11-23 06:45:40,864 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 06:45:40" (3/3) ... [2018-11-23 06:45:40,866 INFO L112 eAbstractionObserver]: Analyzing ICFG soft_float_1_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-11-23 06:45:40,874 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 06:45:40,879 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 06:45:40,891 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 06:45:40,913 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 06:45:40,913 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 06:45:40,914 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 06:45:40,914 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 06:45:40,914 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 06:45:40,914 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 06:45:40,914 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 06:45:40,914 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 06:45:40,925 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states. [2018-11-23 06:45:40,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-23 06:45:40,929 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:40,930 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:40,932 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:40,935 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:40,935 INFO L82 PathProgramCache]: Analyzing trace with hash -441638981, now seen corresponding path program 1 times [2018-11-23 06:45:40,937 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:45:40,967 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:40,967 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:40,967 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:40,968 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:45:41,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:41,163 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:41,165 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:41,165 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-23 06:45:41,165 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 37 with the following transitions: [2018-11-23 06:45:41,167 INFO L202 CegarAbsIntRunner]: [0], [1], [4], [62], [63], [67], [69], [71], [73], [76], [89], [194], [197], [205], [229], [232], [234], [240], [241], [242], [244], [245], [246], [247], [248], [249], [250], [258] [2018-11-23 06:45:41,196 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-23 06:45:41,196 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-23 06:45:41,286 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-11-23 06:45:41,287 INFO L272 AbstractInterpreter]: Visited 19 different actions 27 times. Never merged. Never widened. Performed 71 root evaluator evaluations with a maximum evaluation depth of 3. Performed 71 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Never found a fixpoint. Largest state had 29 variables. [2018-11-23 06:45:41,292 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:41,293 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-11-23 06:45:41,353 INFO L227 lantSequenceWeakener]: Weakened 10 states. On average, predicates are now at 68.83% of their original sizes. [2018-11-23 06:45:41,353 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-11-23 06:45:41,463 INFO L415 sIntCurrentIteration]: We unified 35 AI predicates to 35 [2018-11-23 06:45:41,463 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-11-23 06:45:41,463 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-23 06:45:41,464 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [6] total 16 [2018-11-23 06:45:41,464 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:45:41,467 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 06:45:41,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 06:45:41,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-11-23 06:45:41,471 INFO L87 Difference]: Start difference. First operand 77 states. Second operand 12 states. [2018-11-23 06:45:42,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:42,419 INFO L93 Difference]: Finished difference Result 224 states and 366 transitions. [2018-11-23 06:45:42,419 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 06:45:42,420 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 36 [2018-11-23 06:45:42,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:42,429 INFO L225 Difference]: With dead ends: 224 [2018-11-23 06:45:42,430 INFO L226 Difference]: Without dead ends: 142 [2018-11-23 06:45:42,433 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 39 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=190, Unknown=0, NotChecked=0, Total=240 [2018-11-23 06:45:42,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-11-23 06:45:42,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 130. [2018-11-23 06:45:42,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-11-23 06:45:42,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 183 transitions. [2018-11-23 06:45:42,477 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 183 transitions. Word has length 36 [2018-11-23 06:45:42,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:42,478 INFO L480 AbstractCegarLoop]: Abstraction has 130 states and 183 transitions. [2018-11-23 06:45:42,478 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 06:45:42,478 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 183 transitions. [2018-11-23 06:45:42,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-23 06:45:42,480 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:42,480 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:42,481 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:42,481 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:42,481 INFO L82 PathProgramCache]: Analyzing trace with hash 1149609499, now seen corresponding path program 1 times [2018-11-23 06:45:42,482 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:45:42,482 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:42,483 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:42,483 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:42,483 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:45:42,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:42,637 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:42,637 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:42,637 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-23 06:45:42,637 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 41 with the following transitions: [2018-11-23 06:45:42,638 INFO L202 CegarAbsIntRunner]: [0], [1], [4], [62], [63], [67], [69], [71], [73], [78], [83], [85], [91], [96], [98], [194], [197], [205], [229], [232], [234], [240], [241], [242], [244], [245], [246], [247], [248], [249], [250], [258] [2018-11-23 06:45:42,639 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-23 06:45:42,640 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-23 06:45:42,655 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-11-23 06:45:42,655 INFO L272 AbstractInterpreter]: Visited 27 different actions 35 times. Never merged. Never widened. Performed 95 root evaluator evaluations with a maximum evaluation depth of 3. Performed 95 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Never found a fixpoint. Largest state had 29 variables. [2018-11-23 06:45:42,657 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:42,657 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-11-23 06:45:42,684 INFO L227 lantSequenceWeakener]: Weakened 15 states. On average, predicates are now at 62.65% of their original sizes. [2018-11-23 06:45:42,684 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-11-23 06:45:42,805 INFO L415 sIntCurrentIteration]: We unified 39 AI predicates to 39 [2018-11-23 06:45:42,805 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-11-23 06:45:42,805 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-23 06:45:42,805 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [9] total 24 [2018-11-23 06:45:42,805 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:45:42,807 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 06:45:42,807 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 06:45:42,807 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2018-11-23 06:45:42,807 INFO L87 Difference]: Start difference. First operand 130 states and 183 transitions. Second operand 17 states. [2018-11-23 06:45:43,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:43,840 INFO L93 Difference]: Finished difference Result 187 states and 264 transitions. [2018-11-23 06:45:43,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-23 06:45:43,840 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 40 [2018-11-23 06:45:43,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:43,842 INFO L225 Difference]: With dead ends: 187 [2018-11-23 06:45:43,842 INFO L226 Difference]: Without dead ends: 148 [2018-11-23 06:45:43,843 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 45 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=428, Unknown=0, NotChecked=0, Total=506 [2018-11-23 06:45:43,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-11-23 06:45:43,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 136. [2018-11-23 06:45:43,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-11-23 06:45:43,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 188 transitions. [2018-11-23 06:45:43,855 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 188 transitions. Word has length 40 [2018-11-23 06:45:43,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:43,855 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 188 transitions. [2018-11-23 06:45:43,856 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 06:45:43,856 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 188 transitions. [2018-11-23 06:45:43,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-23 06:45:43,857 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:43,857 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:43,857 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:43,858 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:43,858 INFO L82 PathProgramCache]: Analyzing trace with hash -1042420980, now seen corresponding path program 1 times [2018-11-23 06:45:43,858 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:45:43,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:43,859 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:43,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:43,859 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:45:43,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:43,981 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:43,981 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:43,981 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-23 06:45:43,981 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 45 with the following transitions: [2018-11-23 06:45:43,981 INFO L202 CegarAbsIntRunner]: [0], [1], [4], [6], [35], [44], [48], [54], [62], [63], [67], [69], [71], [73], [78], [83], [85], [91], [96], [98], [194], [197], [205], [229], [232], [234], [240], [241], [242], [244], [245], [246], [247], [248], [249], [250], [258] [2018-11-23 06:45:43,983 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-23 06:45:43,983 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-23 06:45:44,034 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-23 06:45:44,034 INFO L272 AbstractInterpreter]: Visited 37 different actions 88 times. Merged at 13 different actions 25 times. Never widened. Performed 265 root evaluator evaluations with a maximum evaluation depth of 6. Performed 265 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Found 2 fixpoints after 2 different actions. Largest state had 29 variables. [2018-11-23 06:45:44,045 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:44,046 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-23 06:45:44,046 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:44,046 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 06:45:44,061 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:44,061 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-23 06:45:44,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:44,092 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:44,181 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 06:45:44,181 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:45:44,290 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:44,305 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-23 06:45:44,305 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11, 9] total 19 [2018-11-23 06:45:44,306 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-23 06:45:44,306 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 06:45:44,307 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 06:45:44,308 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=298, Unknown=0, NotChecked=0, Total=342 [2018-11-23 06:45:44,308 INFO L87 Difference]: Start difference. First operand 136 states and 188 transitions. Second operand 12 states. [2018-11-23 06:45:44,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:44,584 INFO L93 Difference]: Finished difference Result 214 states and 304 transitions. [2018-11-23 06:45:44,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-23 06:45:44,584 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 44 [2018-11-23 06:45:44,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:44,586 INFO L225 Difference]: With dead ends: 214 [2018-11-23 06:45:44,586 INFO L226 Difference]: Without dead ends: 176 [2018-11-23 06:45:44,587 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 78 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=600, Unknown=0, NotChecked=0, Total=702 [2018-11-23 06:45:44,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-11-23 06:45:44,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 150. [2018-11-23 06:45:44,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-11-23 06:45:44,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 208 transitions. [2018-11-23 06:45:44,600 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 208 transitions. Word has length 44 [2018-11-23 06:45:44,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:44,600 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 208 transitions. [2018-11-23 06:45:44,601 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 06:45:44,601 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 208 transitions. [2018-11-23 06:45:44,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-23 06:45:44,602 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:44,602 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:44,602 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:44,602 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:44,602 INFO L82 PathProgramCache]: Analyzing trace with hash -985162678, now seen corresponding path program 1 times [2018-11-23 06:45:44,602 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:45:44,603 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:44,603 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:44,603 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:44,604 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:45:44,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:44,756 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-23 06:45:44,757 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:44,757 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-23 06:45:44,757 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 45 with the following transitions: [2018-11-23 06:45:44,757 INFO L202 CegarAbsIntRunner]: [0], [1], [4], [6], [35], [44], [48], [54], [62], [63], [67], [69], [71], [73], [78], [83], [85], [91], [96], [98], [194], [199], [205], [229], [232], [234], [240], [241], [242], [244], [245], [246], [247], [248], [249], [250], [258] [2018-11-23 06:45:44,758 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-23 06:45:44,758 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-23 06:45:44,788 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-23 06:45:44,788 INFO L272 AbstractInterpreter]: Visited 37 different actions 92 times. Merged at 13 different actions 28 times. Never widened. Performed 281 root evaluator evaluations with a maximum evaluation depth of 6. Performed 281 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Found 2 fixpoints after 2 different actions. Largest state had 29 variables. [2018-11-23 06:45:44,790 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:44,790 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-23 06:45:44,790 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:44,790 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 06:45:44,797 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:44,797 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-23 06:45:44,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:44,815 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:44,936 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 06:45:44,936 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:45:45,264 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-23 06:45:45,290 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-23 06:45:45,290 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 14] total 31 [2018-11-23 06:45:45,290 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-23 06:45:45,290 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 06:45:45,290 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 06:45:45,290 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=839, Unknown=0, NotChecked=0, Total=930 [2018-11-23 06:45:45,290 INFO L87 Difference]: Start difference. First operand 150 states and 208 transitions. Second operand 19 states. [2018-11-23 06:45:45,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:45,805 INFO L93 Difference]: Finished difference Result 315 states and 459 transitions. [2018-11-23 06:45:45,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-23 06:45:45,806 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 44 [2018-11-23 06:45:45,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:45,808 INFO L225 Difference]: With dead ends: 315 [2018-11-23 06:45:45,808 INFO L226 Difference]: Without dead ends: 242 [2018-11-23 06:45:45,810 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 67 SyntacticMatches, 4 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 283 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=201, Invalid=1691, Unknown=0, NotChecked=0, Total=1892 [2018-11-23 06:45:45,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-11-23 06:45:45,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 208. [2018-11-23 06:45:45,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-11-23 06:45:45,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 289 transitions. [2018-11-23 06:45:45,826 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 289 transitions. Word has length 44 [2018-11-23 06:45:45,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:45,826 INFO L480 AbstractCegarLoop]: Abstraction has 208 states and 289 transitions. [2018-11-23 06:45:45,826 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 06:45:45,827 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 289 transitions. [2018-11-23 06:45:45,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-23 06:45:45,828 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:45,828 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:45,828 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:45,828 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:45,829 INFO L82 PathProgramCache]: Analyzing trace with hash 1720292238, now seen corresponding path program 1 times [2018-11-23 06:45:45,829 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:45:45,829 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:45,829 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:45,830 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:45,830 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:45:45,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:45,943 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:45,944 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:45,944 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-23 06:45:45,944 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 45 with the following transitions: [2018-11-23 06:45:45,944 INFO L202 CegarAbsIntRunner]: [0], [1], [4], [6], [35], [44], [50], [60], [62], [63], [67], [69], [71], [73], [78], [83], [85], [91], [96], [98], [194], [199], [205], [229], [232], [234], [240], [241], [242], [244], [245], [246], [247], [248], [249], [250], [258] [2018-11-23 06:45:45,946 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-23 06:45:45,946 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-23 06:45:45,988 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-23 06:45:45,988 INFO L272 AbstractInterpreter]: Visited 37 different actions 113 times. Merged at 13 different actions 35 times. Never widened. Performed 341 root evaluator evaluations with a maximum evaluation depth of 6. Performed 341 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Never found a fixpoint. Largest state had 29 variables. [2018-11-23 06:45:46,000 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:46,001 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-23 06:45:46,001 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:46,001 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 06:45:46,020 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:46,020 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-23 06:45:46,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:46,040 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:46,138 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-23 06:45:46,138 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:45:46,273 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:46,289 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-23 06:45:46,289 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10, 10] total 22 [2018-11-23 06:45:46,289 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-23 06:45:46,289 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 06:45:46,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 06:45:46,289 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=408, Unknown=0, NotChecked=0, Total=462 [2018-11-23 06:45:46,290 INFO L87 Difference]: Start difference. First operand 208 states and 289 transitions. Second operand 17 states. [2018-11-23 06:45:46,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:46,697 INFO L93 Difference]: Finished difference Result 359 states and 519 transitions. [2018-11-23 06:45:46,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-23 06:45:46,697 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 44 [2018-11-23 06:45:46,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:46,699 INFO L225 Difference]: With dead ends: 359 [2018-11-23 06:45:46,699 INFO L226 Difference]: Without dead ends: 295 [2018-11-23 06:45:46,700 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 74 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 203 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=157, Invalid=1175, Unknown=0, NotChecked=0, Total=1332 [2018-11-23 06:45:46,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 295 states. [2018-11-23 06:45:46,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 295 to 222. [2018-11-23 06:45:46,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states. [2018-11-23 06:45:46,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 306 transitions. [2018-11-23 06:45:46,715 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 306 transitions. Word has length 44 [2018-11-23 06:45:46,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:46,715 INFO L480 AbstractCegarLoop]: Abstraction has 222 states and 306 transitions. [2018-11-23 06:45:46,715 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 06:45:46,716 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 306 transitions. [2018-11-23 06:45:46,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-23 06:45:46,718 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:46,718 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:46,718 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:46,718 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:46,719 INFO L82 PathProgramCache]: Analyzing trace with hash 770276810, now seen corresponding path program 1 times [2018-11-23 06:45:46,719 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:45:46,719 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:46,719 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:46,720 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:46,720 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:45:46,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:46,798 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:46,799 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:46,799 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-23 06:45:46,799 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 45 with the following transitions: [2018-11-23 06:45:46,799 INFO L202 CegarAbsIntRunner]: [0], [1], [4], [6], [35], [44], [48], [54], [62], [63], [67], [69], [71], [73], [78], [81], [85], [91], [94], [98], [194], [197], [205], [229], [232], [234], [240], [241], [242], [244], [245], [246], [247], [248], [249], [250], [258] [2018-11-23 06:45:46,800 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-23 06:45:46,800 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-23 06:45:46,838 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-23 06:45:46,838 INFO L272 AbstractInterpreter]: Visited 37 different actions 84 times. Merged at 11 different actions 23 times. Never widened. Performed 242 root evaluator evaluations with a maximum evaluation depth of 6. Performed 242 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Never found a fixpoint. Largest state had 29 variables. [2018-11-23 06:45:46,852 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:46,852 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-23 06:45:46,852 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:46,852 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 06:45:46,864 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:46,864 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-23 06:45:46,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:46,893 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:46,966 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 06:45:46,966 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:45:47,047 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:47,071 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-23 06:45:47,071 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [8, 8] total 18 [2018-11-23 06:45:47,071 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:45:47,072 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:45:47,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:45:47,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2018-11-23 06:45:47,072 INFO L87 Difference]: Start difference. First operand 222 states and 306 transitions. Second operand 6 states. [2018-11-23 06:45:47,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:47,142 INFO L93 Difference]: Finished difference Result 311 states and 440 transitions. [2018-11-23 06:45:47,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 06:45:47,144 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2018-11-23 06:45:47,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:47,146 INFO L225 Difference]: With dead ends: 311 [2018-11-23 06:45:47,146 INFO L226 Difference]: Without dead ends: 268 [2018-11-23 06:45:47,154 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 79 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=301, Unknown=0, NotChecked=0, Total=342 [2018-11-23 06:45:47,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 268 states. [2018-11-23 06:45:47,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 268 to 228. [2018-11-23 06:45:47,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states. [2018-11-23 06:45:47,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 313 transitions. [2018-11-23 06:45:47,169 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 313 transitions. Word has length 44 [2018-11-23 06:45:47,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:47,170 INFO L480 AbstractCegarLoop]: Abstraction has 228 states and 313 transitions. [2018-11-23 06:45:47,170 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:45:47,170 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 313 transitions. [2018-11-23 06:45:47,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-23 06:45:47,171 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:47,171 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:47,171 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:47,172 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:47,172 INFO L82 PathProgramCache]: Analyzing trace with hash -1063865541, now seen corresponding path program 2 times [2018-11-23 06:45:47,172 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:45:47,172 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:47,173 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:47,173 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:47,173 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:45:47,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:47,389 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-23 06:45:47,390 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:45:47,390 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-11-23 06:45:47,390 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:45:47,390 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 06:45:47,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 06:45:47,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=154, Unknown=0, NotChecked=0, Total=182 [2018-11-23 06:45:47,391 INFO L87 Difference]: Start difference. First operand 228 states and 313 transitions. Second operand 14 states. [2018-11-23 06:45:47,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:47,653 INFO L93 Difference]: Finished difference Result 399 states and 574 transitions. [2018-11-23 06:45:47,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 06:45:47,661 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 48 [2018-11-23 06:45:47,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:47,662 INFO L225 Difference]: With dead ends: 399 [2018-11-23 06:45:47,662 INFO L226 Difference]: Without dead ends: 333 [2018-11-23 06:45:47,663 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=48, Invalid=258, Unknown=0, NotChecked=0, Total=306 [2018-11-23 06:45:47,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2018-11-23 06:45:47,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 316. [2018-11-23 06:45:47,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 316 states. [2018-11-23 06:45:47,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316 states to 316 states and 439 transitions. [2018-11-23 06:45:47,677 INFO L78 Accepts]: Start accepts. Automaton has 316 states and 439 transitions. Word has length 48 [2018-11-23 06:45:47,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:47,677 INFO L480 AbstractCegarLoop]: Abstraction has 316 states and 439 transitions. [2018-11-23 06:45:47,677 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 06:45:47,678 INFO L276 IsEmpty]: Start isEmpty. Operand 316 states and 439 transitions. [2018-11-23 06:45:47,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-23 06:45:47,679 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:47,679 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:47,679 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:47,679 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:47,679 INFO L82 PathProgramCache]: Analyzing trace with hash 1641589375, now seen corresponding path program 1 times [2018-11-23 06:45:47,679 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:45:47,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:47,680 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 06:45:47,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:47,680 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:45:47,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:47,761 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 06:45:47,761 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:47,761 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-23 06:45:47,761 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 49 with the following transitions: [2018-11-23 06:45:47,761 INFO L202 CegarAbsIntRunner]: [0], [1], [4], [6], [35], [44], [48], [50], [54], [60], [62], [63], [67], [69], [71], [73], [78], [81], [85], [91], [94], [98], [194], [197], [205], [229], [232], [234], [240], [241], [242], [244], [245], [246], [247], [248], [249], [250], [258] [2018-11-23 06:45:47,762 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-23 06:45:47,762 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-23 06:45:47,799 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-23 06:45:47,800 INFO L272 AbstractInterpreter]: Visited 39 different actions 128 times. Merged at 12 different actions 49 times. Never widened. Performed 332 root evaluator evaluations with a maximum evaluation depth of 6. Performed 332 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Found 3 fixpoints after 1 different actions. Largest state had 29 variables. [2018-11-23 06:45:47,801 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:47,802 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-23 06:45:47,802 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:47,802 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 06:45:47,815 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:47,815 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-23 06:45:47,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:47,834 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:47,846 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 06:45:47,846 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:45:48,071 WARN L832 $PredicateComparison]: unable to prove that (forall ((main_~b~0 Int)) (<= (mod main_~b~0 4294967296) (mod c_main_~a~0 4294967296))) is different from false [2018-11-23 06:45:48,283 WARN L832 $PredicateComparison]: unable to prove that (forall ((main_~b~0 Int)) (<= (mod main_~b~0 4294967296) (mod |c_main_#t~ret5| 4294967296))) is different from false [2018-11-23 06:45:48,496 WARN L832 $PredicateComparison]: unable to prove that (forall ((main_~b~0 Int)) (<= (mod main_~b~0 4294967296) (mod |c_base2flt_#res| 4294967296))) is different from false [2018-11-23 06:45:48,701 WARN L832 $PredicateComparison]: unable to prove that (forall ((main_~b~0 Int)) (<= (mod main_~b~0 4294967296) (mod c_base2flt_~__retres4~0 4294967296))) is different from false [2018-11-23 06:45:48,706 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 06:45:48,721 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-23 06:45:48,721 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 14 [2018-11-23 06:45:48,721 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-23 06:45:48,721 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 06:45:48,721 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 06:45:48,722 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=75, Unknown=4, NotChecked=76, Total=182 [2018-11-23 06:45:48,722 INFO L87 Difference]: Start difference. First operand 316 states and 439 transitions. Second operand 8 states. [2018-11-23 06:45:48,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:48,796 INFO L93 Difference]: Finished difference Result 388 states and 541 transitions. [2018-11-23 06:45:48,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 06:45:48,798 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 48 [2018-11-23 06:45:48,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:48,800 INFO L225 Difference]: With dead ends: 388 [2018-11-23 06:45:48,800 INFO L226 Difference]: Without dead ends: 349 [2018-11-23 06:45:48,801 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 90 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=37, Invalid=107, Unknown=4, NotChecked=92, Total=240 [2018-11-23 06:45:48,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 349 states. [2018-11-23 06:45:48,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 349 to 335. [2018-11-23 06:45:48,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 335 states. [2018-11-23 06:45:48,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 335 states to 335 states and 462 transitions. [2018-11-23 06:45:48,816 INFO L78 Accepts]: Start accepts. Automaton has 335 states and 462 transitions. Word has length 48 [2018-11-23 06:45:48,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:48,816 INFO L480 AbstractCegarLoop]: Abstraction has 335 states and 462 transitions. [2018-11-23 06:45:48,816 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 06:45:48,816 INFO L276 IsEmpty]: Start isEmpty. Operand 335 states and 462 transitions. [2018-11-23 06:45:48,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-23 06:45:48,817 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:48,817 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:48,818 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:48,818 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:48,818 INFO L82 PathProgramCache]: Analyzing trace with hash 1698847677, now seen corresponding path program 1 times [2018-11-23 06:45:48,818 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:45:48,818 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:48,819 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:48,819 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:45:48,819 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:45:48,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 06:45:48,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 06:45:48,854 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] CALL call ULTIMATE.init(); [?] assume true; [?] RET #241#return; [?] CALL call #t~ret8 := main(); [?] havoc ~a~0;~ma~2 := #t~nondet0;havoc #t~nondet0;assume -128 <= #t~nondet1 && #t~nondet1 <= 127;~ea~2 := #t~nondet1;havoc #t~nondet1;havoc ~b~0;~mb~2 := #t~nondet2;havoc #t~nondet2;assume -128 <= #t~nondet3 && #t~nondet3 <= 127;~eb~2 := #t~nondet3;havoc #t~nondet3;havoc ~r_add~0;havoc ~zero~0;havoc ~sa~0;havoc ~sb~0;havoc ~tmp~2;havoc ~tmp___0~0;havoc ~tmp___1~0;havoc ~tmp___2~0;havoc ~tmp___3~0;havoc ~tmp___4~0;havoc ~tmp___5~0;havoc ~tmp___6~0;havoc ~tmp___7~0;havoc ~tmp___8~0;havoc ~tmp___9~0;havoc ~__retres23~0; VAL [main_~ea~2=127, main_~eb~2=0, main_~ma~2=33554432, main_~mb~2=16777216] [?] CALL call #t~ret4 := base2flt(0, 0); VAL [|base2flt_#in~e|=0, |base2flt_#in~m|=0] [?] ~m := #in~m;~e := #in~e;havoc ~res~0;havoc ~__retres4~0; VAL [base2flt_~e=0, base2flt_~m=0, |base2flt_#in~e|=0, |base2flt_#in~m|=0] [?] assume 0 == ~m % 4294967296;~__retres4~0 := 0; VAL [base2flt_~__retres4~0=0, base2flt_~e=0, base2flt_~m=0, |base2flt_#in~e|=0, |base2flt_#in~m|=0] [?] #res := ~__retres4~0; VAL [base2flt_~__retres4~0=0, base2flt_~e=0, base2flt_~m=0, |base2flt_#in~e|=0, |base2flt_#in~m|=0, |base2flt_#res|=0] [?] assume true; VAL [base2flt_~__retres4~0=0, base2flt_~e=0, base2flt_~m=0, |base2flt_#in~e|=0, |base2flt_#in~m|=0, |base2flt_#res|=0] [?] RET #245#return; VAL [main_~ea~2=127, main_~eb~2=0, main_~ma~2=33554432, main_~mb~2=16777216, |main_#t~ret4|=0] [?] ~zero~0 := #t~ret4;havoc #t~ret4; VAL [main_~ea~2=127, main_~eb~2=0, main_~ma~2=33554432, main_~mb~2=16777216, main_~zero~0=0] [?] CALL call #t~ret5 := base2flt(~ma~2, ~ea~2); VAL [|base2flt_#in~e|=127, |base2flt_#in~m|=33554432] [?] ~m := #in~m;~e := #in~e;havoc ~res~0;havoc ~__retres4~0; VAL [base2flt_~e=127, base2flt_~m=33554432, |base2flt_#in~e|=127, |base2flt_#in~m|=33554432] [?] assume !(0 == ~m % 4294967296); VAL [base2flt_~e=127, base2flt_~m=33554432, |base2flt_#in~e|=127, |base2flt_#in~m|=33554432] [?] assume !(~m % 4294967296 < 16777216); VAL [base2flt_~e=127, base2flt_~m=33554432, |base2flt_#in~e|=127, |base2flt_#in~m|=33554432] [?] assume !false; VAL [base2flt_~e=127, base2flt_~m=33554432, |base2flt_#in~e|=127, |base2flt_#in~m|=33554432] [?] assume ~m % 4294967296 >= 33554432; VAL [base2flt_~e=127, base2flt_~m=33554432, |base2flt_#in~e|=127, |base2flt_#in~m|=33554432] [?] assume ~e >= 127;~__retres4~0 := 4294967295; VAL [base2flt_~__retres4~0=4294967295, base2flt_~e=127, base2flt_~m=33554432, |base2flt_#in~e|=127, |base2flt_#in~m|=33554432] [?] #res := ~__retres4~0; VAL [base2flt_~__retres4~0=4294967295, base2flt_~e=127, base2flt_~m=33554432, |base2flt_#in~e|=127, |base2flt_#in~m|=33554432, |base2flt_#res|=4294967295] [?] assume true; VAL [base2flt_~__retres4~0=4294967295, base2flt_~e=127, base2flt_~m=33554432, |base2flt_#in~e|=127, |base2flt_#in~m|=33554432, |base2flt_#res|=4294967295] [?] RET #247#return; VAL [main_~ea~2=127, main_~eb~2=0, main_~ma~2=33554432, main_~mb~2=16777216, main_~zero~0=0, |main_#t~ret5|=4294967295] [?] ~a~0 := #t~ret5;havoc #t~ret5; VAL [main_~a~0=4294967295, main_~ea~2=127, main_~eb~2=0, main_~ma~2=33554432, main_~mb~2=16777216, main_~zero~0=0] [?] CALL call #t~ret6 := base2flt(~mb~2, ~eb~2); VAL [|base2flt_#in~e|=0, |base2flt_#in~m|=16777216] [?] ~m := #in~m;~e := #in~e;havoc ~res~0;havoc ~__retres4~0; VAL [base2flt_~e=0, base2flt_~m=16777216, |base2flt_#in~e|=0, |base2flt_#in~m|=16777216] [?] assume !(0 == ~m % 4294967296); VAL [base2flt_~e=0, base2flt_~m=16777216, |base2flt_#in~e|=0, |base2flt_#in~m|=16777216] [?] assume !(~m % 4294967296 < 16777216); VAL [base2flt_~e=0, base2flt_~m=16777216, |base2flt_#in~e|=0, |base2flt_#in~m|=16777216] [?] assume !false; VAL [base2flt_~e=0, base2flt_~m=16777216, |base2flt_#in~e|=0, |base2flt_#in~m|=16777216] [?] assume !(~m % 4294967296 >= 33554432); VAL [base2flt_~e=0, base2flt_~m=16777216, |base2flt_#in~e|=0, |base2flt_#in~m|=16777216] [?] ~m := ~bitwiseAnd(~m, ~bitwiseComplement(16777216));~res~0 := ~bitwiseOr(~m, 16777216 * (128 + ~e));~__retres4~0 := ~res~0; VAL [base2flt_~__retres4~0=(- 72057589726183425), base2flt_~e=0, base2flt_~res~0=(- 72057589726183425), |base2flt_#in~e|=0, |base2flt_#in~m|=16777216] [?] #res := ~__retres4~0; VAL [base2flt_~__retres4~0=(- 72057589726183425), base2flt_~e=0, base2flt_~res~0=(- 72057589726183425), |base2flt_#in~e|=0, |base2flt_#in~m|=16777216, |base2flt_#res|=(- 72057589726183425)] [?] assume true; VAL [base2flt_~__retres4~0=(- 72057589726183425), base2flt_~e=0, base2flt_~res~0=(- 72057589726183425), |base2flt_#in~e|=0, |base2flt_#in~m|=16777216, |base2flt_#res|=(- 72057589726183425)] [?] RET #249#return; VAL [main_~a~0=4294967295, main_~ea~2=127, main_~eb~2=0, main_~ma~2=33554432, main_~mb~2=16777216, main_~zero~0=0, |main_#t~ret6|=(- 72057589726183425)] [?] ~b~0 := #t~ret6;havoc #t~ret6; VAL [main_~a~0=4294967295, main_~b~0=(- 72057589726183425), main_~ea~2=127, main_~eb~2=0, main_~ma~2=33554432, main_~mb~2=16777216, main_~zero~0=0] [?] assume !(~a~0 % 4294967296 < ~zero~0 % 4294967296); VAL [main_~a~0=4294967295, main_~b~0=(- 72057589726183425), main_~ea~2=127, main_~eb~2=0, main_~ma~2=33554432, main_~mb~2=16777216, main_~zero~0=0] [?] assume ~a~0 % 4294967296 > ~zero~0 % 4294967296;~tmp~2 := 1; VAL [main_~a~0=4294967295, main_~b~0=(- 72057589726183425), main_~ea~2=127, main_~eb~2=0, main_~ma~2=33554432, main_~mb~2=16777216, main_~tmp~2=1, main_~zero~0=0] [?] ~sa~0 := ~tmp~2; VAL [main_~a~0=4294967295, main_~b~0=(- 72057589726183425), main_~ea~2=127, main_~eb~2=0, main_~ma~2=33554432, main_~mb~2=16777216, main_~sa~0=1, main_~tmp~2=1, main_~zero~0=0] [?] assume !(~b~0 % 4294967296 < ~zero~0 % 4294967296); VAL [main_~a~0=4294967295, main_~b~0=(- 72057589726183425), main_~ea~2=127, main_~eb~2=0, main_~ma~2=33554432, main_~mb~2=16777216, main_~sa~0=1, main_~tmp~2=1, main_~zero~0=0] [?] assume ~b~0 % 4294967296 > ~zero~0 % 4294967296;~tmp___0~0 := 1; VAL [main_~a~0=4294967295, main_~b~0=(- 72057589726183425), main_~ea~2=127, main_~eb~2=0, main_~ma~2=33554432, main_~mb~2=16777216, main_~sa~0=1, main_~tmp___0~0=1, main_~tmp~2=1, main_~zero~0=0] [?] ~sb~0 := ~tmp___0~0; VAL [main_~a~0=4294967295, main_~b~0=(- 72057589726183425), main_~ea~2=127, main_~eb~2=0, main_~ma~2=33554432, main_~mb~2=16777216, main_~sa~0=1, main_~sb~0=1, main_~tmp___0~0=1, main_~tmp~2=1, main_~zero~0=0] [?] CALL call #t~ret7 := addflt(~a~0, ~b~0); VAL [|addflt_#in~a|=4294967295, |addflt_#in~b|=(- 72057589726183425)] [?] ~a := #in~a;~b := #in~b;havoc ~res~1;havoc ~ma~0;havoc ~mb~0;havoc ~delta~0;havoc ~ea~0;havoc ~eb~0;havoc ~tmp~0;havoc ~__retres10~0; VAL [addflt_~a=4294967295, addflt_~b=(- 72057589726183425), |addflt_#in~a|=4294967295, |addflt_#in~b|=(- 72057589726183425)] [?] assume !(~a % 4294967296 < ~b % 4294967296); VAL [addflt_~a=4294967295, addflt_~b=(- 72057589726183425), |addflt_#in~a|=4294967295, |addflt_#in~b|=(- 72057589726183425)] [?] assume !(0 == ~b % 4294967296);~ma~0 := ~bitwiseAnd(~a, 16777215);~ea~0 := (if ~a / 16777216 % 4294967296 % 4294967296 <= 2147483647 then ~a / 16777216 % 4294967296 % 4294967296 else ~a / 16777216 % 4294967296 % 4294967296 - 4294967296) - 128;~ma~0 := ~bitwiseOr(~ma~0, 16777216);~mb~0 := ~bitwiseAnd(~b, 16777215);~eb~0 := (if ~b / 16777216 % 4294967296 % 4294967296 <= 2147483647 then ~b / 16777216 % 4294967296 % 4294967296 else ~b / 16777216 % 4294967296 % 4294967296 - 4294967296) - 128;~mb~0 := ~bitwiseOr(~mb~0, 16777216); VAL [addflt_~a=4294967295, addflt_~b=(- 72057589726183425), addflt_~ea~0=127, addflt_~eb~0=128, |addflt_#in~a|=4294967295, |addflt_#in~b|=(- 72057589726183425)] [?] CALL call __VERIFIER_assert((if ~ea~0 >= ~eb~0 then 1 else 0)); VAL [|__VERIFIER_assert_#in~cond|=0] [?] ~cond := #in~cond; VAL [__VERIFIER_assert_~cond=0, |__VERIFIER_assert_#in~cond|=0] [?] assume 0 == ~cond; VAL [__VERIFIER_assert_~cond=0, |__VERIFIER_assert_#in~cond|=0] [?] assume !false; VAL [__VERIFIER_assert_~cond=0, |__VERIFIER_assert_#in~cond|=0] [?] CALL call ULTIMATE.init(); [?] ensures true; [?] RET call ULTIMATE.init(); [?] CALL call #t~ret8 := main(); [L215] havoc ~a~0; [L216] ~ma~2 := #t~nondet0; [L216] havoc #t~nondet0; [L217] assume -128 <= #t~nondet1 && #t~nondet1 <= 127; [L217] ~ea~2 := #t~nondet1; [L217] havoc #t~nondet1; [L218] havoc ~b~0; [L219] ~mb~2 := #t~nondet2; [L219] havoc #t~nondet2; [L220] assume -128 <= #t~nondet3 && #t~nondet3 <= 127; [L220] ~eb~2 := #t~nondet3; [L220] havoc #t~nondet3; [L221] havoc ~r_add~0; [L222] havoc ~zero~0; [L223] havoc ~sa~0; [L224] havoc ~sb~0; [L225] havoc ~tmp~2; [L226] havoc ~tmp___0~0; [L227] havoc ~tmp___1~0; [L228] havoc ~tmp___2~0; [L229] havoc ~tmp___3~0; [L230] havoc ~tmp___4~0; [L231] havoc ~tmp___5~0; [L232] havoc ~tmp___6~0; [L233] havoc ~tmp___7~0; [L234] havoc ~tmp___8~0; [L235] havoc ~tmp___9~0; [L236] havoc ~__retres23~0; VAL [~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216] [L240] CALL call #t~ret4 := base2flt(0, 0); VAL [#in~e=0, #in~m=0] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=0, #in~m=0, ~e=0, ~m=0] [L19-L24] assume 0 == ~m % 4294967296; [L20] ~__retres4~0 := 0; VAL [#in~e=0, #in~m=0, ~__retres4~0=0, ~e=0, ~m=0] [L70] #res := ~__retres4~0; VAL [#in~e=0, #in~m=0, #res=0, ~__retres4~0=0, ~e=0, ~m=0] [L14-L72] ensures true; VAL [#in~e=0, #in~m=0, #res=0, ~__retres4~0=0, ~e=0, ~m=0] [L240] RET call #t~ret4 := base2flt(0, 0); VAL [#t~ret4=0, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216] [L240] ~zero~0 := #t~ret4; [L240] havoc #t~ret4; VAL [~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L241] CALL call #t~ret5 := base2flt(~ma~2, ~ea~2); VAL [#in~e=127, #in~m=33554432] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L19-L24] assume !(0 == ~m % 4294967296); VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L25-L65] assume !(~m % 4294967296 < 16777216); VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L47-L62] assume !false; VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L49-L53] assume ~m % 4294967296 >= 33554432; VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L54-L59] assume ~e >= 127; [L55] ~__retres4~0 := 4294967295; VAL [#in~e=127, #in~m=33554432, ~__retres4~0=4294967295, ~e=127, ~m=33554432] [L70] #res := ~__retres4~0; VAL [#in~e=127, #in~m=33554432, #res=4294967295, ~__retres4~0=4294967295, ~e=127, ~m=33554432] [L14-L72] ensures true; VAL [#in~e=127, #in~m=33554432, #res=4294967295, ~__retres4~0=4294967295, ~e=127, ~m=33554432] [L241] RET call #t~ret5 := base2flt(~ma~2, ~ea~2); VAL [#t~ret5=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L241] ~a~0 := #t~ret5; [L241] havoc #t~ret5; VAL [~a~0=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L242] CALL call #t~ret6 := base2flt(~mb~2, ~eb~2); VAL [#in~e=0, #in~m=16777216] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L19-L24] assume !(0 == ~m % 4294967296); VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L25-L65] assume !(~m % 4294967296 < 16777216); VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L47-L62] assume !false; VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L49-L53] assume !(~m % 4294967296 >= 33554432); VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L66] ~m := ~bitwiseAnd(~m, ~bitwiseComplement(16777216)); [L67] ~res~0 := ~bitwiseOr(~m, 16777216 * (128 + ~e)); [L68] ~__retres4~0 := ~res~0; VAL [#in~e=0, #in~m=16777216, ~__retres4~0=-72057589726183425, ~e=0, ~res~0=-72057589726183425] [L70] #res := ~__retres4~0; VAL [#in~e=0, #in~m=16777216, #res=-72057589726183425, ~__retres4~0=-72057589726183425, ~e=0, ~res~0=-72057589726183425] [L14-L72] ensures true; VAL [#in~e=0, #in~m=16777216, #res=-72057589726183425, ~__retres4~0=-72057589726183425, ~e=0, ~res~0=-72057589726183425] [L242] RET call #t~ret6 := base2flt(~mb~2, ~eb~2); VAL [#t~ret6=-72057589726183425, ~a~0=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L242] ~b~0 := #t~ret6; [L242] havoc #t~ret6; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L244-L253] assume !(~a~0 % 4294967296 < ~zero~0 % 4294967296); VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L247-L251] assume ~a~0 % 4294967296 > ~zero~0 % 4294967296; [L248] ~tmp~2 := 1; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~tmp~2=1, ~zero~0=0] [L252] ~sa~0 := ~tmp~2; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp~2=1, ~zero~0=0] [L254-L263] assume !(~b~0 % 4294967296 < ~zero~0 % 4294967296); VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp~2=1, ~zero~0=0] [L257-L261] assume ~b~0 % 4294967296 > ~zero~0 % 4294967296; [L258] ~tmp___0~0 := 1; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp___0~0=1, ~tmp~2=1, ~zero~0=0] [L262] ~sb~0 := ~tmp___0~0; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~sb~0=1, ~tmp___0~0=1, ~tmp~2=1, ~zero~0=0] [L265] CALL call #t~ret7 := addflt(~a~0, ~b~0); VAL [#in~a=4294967295, #in~b=-72057589726183425] [L73-L136] ~a := #in~a; [L73-L136] ~b := #in~b; [L74] havoc ~res~1; [L75] havoc ~ma~0; [L76] havoc ~mb~0; [L77] havoc ~delta~0; [L78] havoc ~ea~0; [L79] havoc ~eb~0; [L80] havoc ~tmp~0; [L81] havoc ~__retres10~0; VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425] [L84-L90] assume !(~a % 4294967296 < ~b % 4294967296); VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425] [L91-L96] assume !(0 == ~b % 4294967296); [L98] ~ma~0 := ~bitwiseAnd(~a, 16777215); [L99] ~ea~0 := (if ~a / 16777216 % 4294967296 % 4294967296 <= 2147483647 then ~a / 16777216 % 4294967296 % 4294967296 else ~a / 16777216 % 4294967296 % 4294967296 - 4294967296) - 128; [L100] ~ma~0 := ~bitwiseOr(~ma~0, 16777216); [L101] ~mb~0 := ~bitwiseAnd(~b, 16777215); [L102] ~eb~0 := (if ~b / 16777216 % 4294967296 % 4294967296 <= 2147483647 then ~b / 16777216 % 4294967296 % 4294967296 else ~b / 16777216 % 4294967296 % 4294967296 - 4294967296) - 128; [L103] ~mb~0 := ~bitwiseOr(~mb~0, 16777216); VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425, ~ea~0=127, ~eb~0=128] [L104] CALL call __VERIFIER_assert((if ~ea~0 >= ~eb~0 then 1 else 0)); VAL [#in~cond=0] [L5-L10] ~cond := #in~cond; VAL [#in~cond=0, ~cond=0] [L6-L8] assume 0 == ~cond; VAL [#in~cond=0, ~cond=0] [L7] assert false; VAL [#in~cond=0, ~cond=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] CALL call ULTIMATE.init(); [?] ensures true; [?] RET call ULTIMATE.init(); [?] CALL call #t~ret8 := main(); [L215] havoc ~a~0; [L216] ~ma~2 := #t~nondet0; [L216] havoc #t~nondet0; [L217] assume -128 <= #t~nondet1 && #t~nondet1 <= 127; [L217] ~ea~2 := #t~nondet1; [L217] havoc #t~nondet1; [L218] havoc ~b~0; [L219] ~mb~2 := #t~nondet2; [L219] havoc #t~nondet2; [L220] assume -128 <= #t~nondet3 && #t~nondet3 <= 127; [L220] ~eb~2 := #t~nondet3; [L220] havoc #t~nondet3; [L221] havoc ~r_add~0; [L222] havoc ~zero~0; [L223] havoc ~sa~0; [L224] havoc ~sb~0; [L225] havoc ~tmp~2; [L226] havoc ~tmp___0~0; [L227] havoc ~tmp___1~0; [L228] havoc ~tmp___2~0; [L229] havoc ~tmp___3~0; [L230] havoc ~tmp___4~0; [L231] havoc ~tmp___5~0; [L232] havoc ~tmp___6~0; [L233] havoc ~tmp___7~0; [L234] havoc ~tmp___8~0; [L235] havoc ~tmp___9~0; [L236] havoc ~__retres23~0; VAL [~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216] [L240] CALL call #t~ret4 := base2flt(0, 0); VAL [#in~e=0, #in~m=0] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=0, #in~m=0, ~e=0, ~m=0] [L19-L24] assume 0 == ~m % 4294967296; [L20] ~__retres4~0 := 0; VAL [#in~e=0, #in~m=0, ~__retres4~0=0, ~e=0, ~m=0] [L70] #res := ~__retres4~0; VAL [#in~e=0, #in~m=0, #res=0, ~__retres4~0=0, ~e=0, ~m=0] [L14-L72] ensures true; VAL [#in~e=0, #in~m=0, #res=0, ~__retres4~0=0, ~e=0, ~m=0] [L240] RET call #t~ret4 := base2flt(0, 0); VAL [#t~ret4=0, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216] [L240] ~zero~0 := #t~ret4; [L240] havoc #t~ret4; VAL [~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L241] CALL call #t~ret5 := base2flt(~ma~2, ~ea~2); VAL [#in~e=127, #in~m=33554432] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L19-L24] assume !(0 == ~m % 4294967296); VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L25-L65] assume !(~m % 4294967296 < 16777216); VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L47-L62] assume !false; VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L49-L53] assume ~m % 4294967296 >= 33554432; VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L54-L59] assume ~e >= 127; [L55] ~__retres4~0 := 4294967295; VAL [#in~e=127, #in~m=33554432, ~__retres4~0=4294967295, ~e=127, ~m=33554432] [L70] #res := ~__retres4~0; VAL [#in~e=127, #in~m=33554432, #res=4294967295, ~__retres4~0=4294967295, ~e=127, ~m=33554432] [L14-L72] ensures true; VAL [#in~e=127, #in~m=33554432, #res=4294967295, ~__retres4~0=4294967295, ~e=127, ~m=33554432] [L241] RET call #t~ret5 := base2flt(~ma~2, ~ea~2); VAL [#t~ret5=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L241] ~a~0 := #t~ret5; [L241] havoc #t~ret5; VAL [~a~0=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L242] CALL call #t~ret6 := base2flt(~mb~2, ~eb~2); VAL [#in~e=0, #in~m=16777216] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L19-L24] assume !(0 == ~m % 4294967296); VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L25-L65] assume !(~m % 4294967296 < 16777216); VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L47-L62] assume !false; VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L49-L53] assume !(~m % 4294967296 >= 33554432); VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L66] ~m := ~bitwiseAnd(~m, ~bitwiseComplement(16777216)); [L67] ~res~0 := ~bitwiseOr(~m, 16777216 * (128 + ~e)); [L68] ~__retres4~0 := ~res~0; VAL [#in~e=0, #in~m=16777216, ~__retres4~0=-72057589726183425, ~e=0, ~res~0=-72057589726183425] [L70] #res := ~__retres4~0; VAL [#in~e=0, #in~m=16777216, #res=-72057589726183425, ~__retres4~0=-72057589726183425, ~e=0, ~res~0=-72057589726183425] [L14-L72] ensures true; VAL [#in~e=0, #in~m=16777216, #res=-72057589726183425, ~__retres4~0=-72057589726183425, ~e=0, ~res~0=-72057589726183425] [L242] RET call #t~ret6 := base2flt(~mb~2, ~eb~2); VAL [#t~ret6=-72057589726183425, ~a~0=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L242] ~b~0 := #t~ret6; [L242] havoc #t~ret6; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L244-L253] assume !(~a~0 % 4294967296 < ~zero~0 % 4294967296); VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L247-L251] assume ~a~0 % 4294967296 > ~zero~0 % 4294967296; [L248] ~tmp~2 := 1; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~tmp~2=1, ~zero~0=0] [L252] ~sa~0 := ~tmp~2; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp~2=1, ~zero~0=0] [L254-L263] assume !(~b~0 % 4294967296 < ~zero~0 % 4294967296); VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp~2=1, ~zero~0=0] [L257-L261] assume ~b~0 % 4294967296 > ~zero~0 % 4294967296; [L258] ~tmp___0~0 := 1; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp___0~0=1, ~tmp~2=1, ~zero~0=0] [L262] ~sb~0 := ~tmp___0~0; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~sb~0=1, ~tmp___0~0=1, ~tmp~2=1, ~zero~0=0] [L265] CALL call #t~ret7 := addflt(~a~0, ~b~0); VAL [#in~a=4294967295, #in~b=-72057589726183425] [L73-L136] ~a := #in~a; [L73-L136] ~b := #in~b; [L74] havoc ~res~1; [L75] havoc ~ma~0; [L76] havoc ~mb~0; [L77] havoc ~delta~0; [L78] havoc ~ea~0; [L79] havoc ~eb~0; [L80] havoc ~tmp~0; [L81] havoc ~__retres10~0; VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425] [L84-L90] assume !(~a % 4294967296 < ~b % 4294967296); VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425] [L91-L96] assume !(0 == ~b % 4294967296); [L98] ~ma~0 := ~bitwiseAnd(~a, 16777215); [L99] ~ea~0 := (if ~a / 16777216 % 4294967296 % 4294967296 <= 2147483647 then ~a / 16777216 % 4294967296 % 4294967296 else ~a / 16777216 % 4294967296 % 4294967296 - 4294967296) - 128; [L100] ~ma~0 := ~bitwiseOr(~ma~0, 16777216); [L101] ~mb~0 := ~bitwiseAnd(~b, 16777215); [L102] ~eb~0 := (if ~b / 16777216 % 4294967296 % 4294967296 <= 2147483647 then ~b / 16777216 % 4294967296 % 4294967296 else ~b / 16777216 % 4294967296 % 4294967296 - 4294967296) - 128; [L103] ~mb~0 := ~bitwiseOr(~mb~0, 16777216); VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425, ~ea~0=127, ~eb~0=128] [L104] CALL call __VERIFIER_assert((if ~ea~0 >= ~eb~0 then 1 else 0)); VAL [#in~cond=0] [L5-L10] ~cond := #in~cond; VAL [#in~cond=0, ~cond=0] [L6-L8] assume 0 == ~cond; VAL [#in~cond=0, ~cond=0] [L7] assert false; VAL [#in~cond=0, ~cond=0] [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret8 := main(); [L215] havoc ~a~0; [L216] ~ma~2 := #t~nondet0; [L216] havoc #t~nondet0; [L217] assume -128 <= #t~nondet1 && #t~nondet1 <= 127; [L217] ~ea~2 := #t~nondet1; [L217] havoc #t~nondet1; [L218] havoc ~b~0; [L219] ~mb~2 := #t~nondet2; [L219] havoc #t~nondet2; [L220] assume -128 <= #t~nondet3 && #t~nondet3 <= 127; [L220] ~eb~2 := #t~nondet3; [L220] havoc #t~nondet3; [L221] havoc ~r_add~0; [L222] havoc ~zero~0; [L223] havoc ~sa~0; [L224] havoc ~sb~0; [L225] havoc ~tmp~2; [L226] havoc ~tmp___0~0; [L227] havoc ~tmp___1~0; [L228] havoc ~tmp___2~0; [L229] havoc ~tmp___3~0; [L230] havoc ~tmp___4~0; [L231] havoc ~tmp___5~0; [L232] havoc ~tmp___6~0; [L233] havoc ~tmp___7~0; [L234] havoc ~tmp___8~0; [L235] havoc ~tmp___9~0; [L236] havoc ~__retres23~0; VAL [~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216] [L240] CALL call #t~ret4 := base2flt(0, 0); VAL [#in~e=0, #in~m=0] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=0, #in~m=0, ~e=0, ~m=0] [L19] COND TRUE 0 == ~m % 4294967296 [L20] ~__retres4~0 := 0; VAL [#in~e=0, #in~m=0, ~__retres4~0=0, ~e=0, ~m=0] [L70] #res := ~__retres4~0; VAL [#in~e=0, #in~m=0, #res=0, ~__retres4~0=0, ~e=0, ~m=0] [L240] RET call #t~ret4 := base2flt(0, 0); VAL [#t~ret4=0, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216] [L240] ~zero~0 := #t~ret4; [L240] havoc #t~ret4; VAL [~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L241] CALL call #t~ret5 := base2flt(~ma~2, ~ea~2); VAL [#in~e=127, #in~m=33554432] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L19] COND FALSE !(0 == ~m % 4294967296) VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L25] COND FALSE !(~m % 4294967296 < 16777216) VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L47-L62] COND FALSE !(false) VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L49] COND TRUE ~m % 4294967296 >= 33554432 VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L54] COND TRUE ~e >= 127 [L55] ~__retres4~0 := 4294967295; VAL [#in~e=127, #in~m=33554432, ~__retres4~0=4294967295, ~e=127, ~m=33554432] [L70] #res := ~__retres4~0; VAL [#in~e=127, #in~m=33554432, #res=4294967295, ~__retres4~0=4294967295, ~e=127, ~m=33554432] [L241] RET call #t~ret5 := base2flt(~ma~2, ~ea~2); VAL [#t~ret5=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L241] ~a~0 := #t~ret5; [L241] havoc #t~ret5; VAL [~a~0=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L242] CALL call #t~ret6 := base2flt(~mb~2, ~eb~2); VAL [#in~e=0, #in~m=16777216] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L19] COND FALSE !(0 == ~m % 4294967296) VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L25] COND FALSE !(~m % 4294967296 < 16777216) VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L47-L62] COND FALSE !(false) VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L49] COND FALSE !(~m % 4294967296 >= 33554432) VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L66] ~m := ~bitwiseAnd(~m, ~bitwiseComplement(16777216)); [L67] ~res~0 := ~bitwiseOr(~m, 16777216 * (128 + ~e)); [L68] ~__retres4~0 := ~res~0; VAL [#in~e=0, #in~m=16777216, ~__retres4~0=-72057589726183425, ~e=0, ~res~0=-72057589726183425] [L70] #res := ~__retres4~0; VAL [#in~e=0, #in~m=16777216, #res=-72057589726183425, ~__retres4~0=-72057589726183425, ~e=0, ~res~0=-72057589726183425] [L242] RET call #t~ret6 := base2flt(~mb~2, ~eb~2); VAL [#t~ret6=-72057589726183425, ~a~0=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L242] ~b~0 := #t~ret6; [L242] havoc #t~ret6; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L244] COND FALSE !(~a~0 % 4294967296 < ~zero~0 % 4294967296) VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L247] COND TRUE ~a~0 % 4294967296 > ~zero~0 % 4294967296 [L248] ~tmp~2 := 1; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~tmp~2=1, ~zero~0=0] [L252] ~sa~0 := ~tmp~2; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp~2=1, ~zero~0=0] [L254] COND FALSE !(~b~0 % 4294967296 < ~zero~0 % 4294967296) VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp~2=1, ~zero~0=0] [L257] COND TRUE ~b~0 % 4294967296 > ~zero~0 % 4294967296 [L258] ~tmp___0~0 := 1; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp___0~0=1, ~tmp~2=1, ~zero~0=0] [L262] ~sb~0 := ~tmp___0~0; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~sb~0=1, ~tmp___0~0=1, ~tmp~2=1, ~zero~0=0] [L265] CALL call #t~ret7 := addflt(~a~0, ~b~0); VAL [#in~a=4294967295, #in~b=-72057589726183425] [L73-L136] ~a := #in~a; [L73-L136] ~b := #in~b; [L74] havoc ~res~1; [L75] havoc ~ma~0; [L76] havoc ~mb~0; [L77] havoc ~delta~0; [L78] havoc ~ea~0; [L79] havoc ~eb~0; [L80] havoc ~tmp~0; [L81] havoc ~__retres10~0; VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425] [L84] COND FALSE !(~a % 4294967296 < ~b % 4294967296) VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425] [L91] COND FALSE !(0 == ~b % 4294967296) [L98] ~ma~0 := ~bitwiseAnd(~a, 16777215); [L99] ~ea~0 := (if ~a / 16777216 % 4294967296 % 4294967296 <= 2147483647 then ~a / 16777216 % 4294967296 % 4294967296 else ~a / 16777216 % 4294967296 % 4294967296 - 4294967296) - 128; [L100] ~ma~0 := ~bitwiseOr(~ma~0, 16777216); [L101] ~mb~0 := ~bitwiseAnd(~b, 16777215); [L102] ~eb~0 := (if ~b / 16777216 % 4294967296 % 4294967296 <= 2147483647 then ~b / 16777216 % 4294967296 % 4294967296 else ~b / 16777216 % 4294967296 % 4294967296 - 4294967296) - 128; [L103] ~mb~0 := ~bitwiseOr(~mb~0, 16777216); VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425, ~ea~0=127, ~eb~0=128] [L104] CALL call __VERIFIER_assert((if ~ea~0 >= ~eb~0 then 1 else 0)); VAL [#in~cond=0] [L5-L10] ~cond := #in~cond; VAL [#in~cond=0, ~cond=0] [L6] COND TRUE 0 == ~cond VAL [#in~cond=0, ~cond=0] [L7] assert false; VAL [#in~cond=0, ~cond=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret8 := main(); [L215] havoc ~a~0; [L216] ~ma~2 := #t~nondet0; [L216] havoc #t~nondet0; [L217] assume -128 <= #t~nondet1 && #t~nondet1 <= 127; [L217] ~ea~2 := #t~nondet1; [L217] havoc #t~nondet1; [L218] havoc ~b~0; [L219] ~mb~2 := #t~nondet2; [L219] havoc #t~nondet2; [L220] assume -128 <= #t~nondet3 && #t~nondet3 <= 127; [L220] ~eb~2 := #t~nondet3; [L220] havoc #t~nondet3; [L221] havoc ~r_add~0; [L222] havoc ~zero~0; [L223] havoc ~sa~0; [L224] havoc ~sb~0; [L225] havoc ~tmp~2; [L226] havoc ~tmp___0~0; [L227] havoc ~tmp___1~0; [L228] havoc ~tmp___2~0; [L229] havoc ~tmp___3~0; [L230] havoc ~tmp___4~0; [L231] havoc ~tmp___5~0; [L232] havoc ~tmp___6~0; [L233] havoc ~tmp___7~0; [L234] havoc ~tmp___8~0; [L235] havoc ~tmp___9~0; [L236] havoc ~__retres23~0; VAL [~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216] [L240] CALL call #t~ret4 := base2flt(0, 0); VAL [#in~e=0, #in~m=0] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=0, #in~m=0, ~e=0, ~m=0] [L19] COND TRUE 0 == ~m % 4294967296 [L20] ~__retres4~0 := 0; VAL [#in~e=0, #in~m=0, ~__retres4~0=0, ~e=0, ~m=0] [L70] #res := ~__retres4~0; VAL [#in~e=0, #in~m=0, #res=0, ~__retres4~0=0, ~e=0, ~m=0] [L240] RET call #t~ret4 := base2flt(0, 0); VAL [#t~ret4=0, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216] [L240] ~zero~0 := #t~ret4; [L240] havoc #t~ret4; VAL [~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L241] CALL call #t~ret5 := base2flt(~ma~2, ~ea~2); VAL [#in~e=127, #in~m=33554432] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L19] COND FALSE !(0 == ~m % 4294967296) VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L25] COND FALSE !(~m % 4294967296 < 16777216) VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L47-L62] COND FALSE !(false) VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L49] COND TRUE ~m % 4294967296 >= 33554432 VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L54] COND TRUE ~e >= 127 [L55] ~__retres4~0 := 4294967295; VAL [#in~e=127, #in~m=33554432, ~__retres4~0=4294967295, ~e=127, ~m=33554432] [L70] #res := ~__retres4~0; VAL [#in~e=127, #in~m=33554432, #res=4294967295, ~__retres4~0=4294967295, ~e=127, ~m=33554432] [L241] RET call #t~ret5 := base2flt(~ma~2, ~ea~2); VAL [#t~ret5=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L241] ~a~0 := #t~ret5; [L241] havoc #t~ret5; VAL [~a~0=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L242] CALL call #t~ret6 := base2flt(~mb~2, ~eb~2); VAL [#in~e=0, #in~m=16777216] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L19] COND FALSE !(0 == ~m % 4294967296) VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L25] COND FALSE !(~m % 4294967296 < 16777216) VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L47-L62] COND FALSE !(false) VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L49] COND FALSE !(~m % 4294967296 >= 33554432) VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L66] ~m := ~bitwiseAnd(~m, ~bitwiseComplement(16777216)); [L67] ~res~0 := ~bitwiseOr(~m, 16777216 * (128 + ~e)); [L68] ~__retres4~0 := ~res~0; VAL [#in~e=0, #in~m=16777216, ~__retres4~0=-72057589726183425, ~e=0, ~res~0=-72057589726183425] [L70] #res := ~__retres4~0; VAL [#in~e=0, #in~m=16777216, #res=-72057589726183425, ~__retres4~0=-72057589726183425, ~e=0, ~res~0=-72057589726183425] [L242] RET call #t~ret6 := base2flt(~mb~2, ~eb~2); VAL [#t~ret6=-72057589726183425, ~a~0=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L242] ~b~0 := #t~ret6; [L242] havoc #t~ret6; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L244] COND FALSE !(~a~0 % 4294967296 < ~zero~0 % 4294967296) VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L247] COND TRUE ~a~0 % 4294967296 > ~zero~0 % 4294967296 [L248] ~tmp~2 := 1; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~tmp~2=1, ~zero~0=0] [L252] ~sa~0 := ~tmp~2; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp~2=1, ~zero~0=0] [L254] COND FALSE !(~b~0 % 4294967296 < ~zero~0 % 4294967296) VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp~2=1, ~zero~0=0] [L257] COND TRUE ~b~0 % 4294967296 > ~zero~0 % 4294967296 [L258] ~tmp___0~0 := 1; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp___0~0=1, ~tmp~2=1, ~zero~0=0] [L262] ~sb~0 := ~tmp___0~0; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~sb~0=1, ~tmp___0~0=1, ~tmp~2=1, ~zero~0=0] [L265] CALL call #t~ret7 := addflt(~a~0, ~b~0); VAL [#in~a=4294967295, #in~b=-72057589726183425] [L73-L136] ~a := #in~a; [L73-L136] ~b := #in~b; [L74] havoc ~res~1; [L75] havoc ~ma~0; [L76] havoc ~mb~0; [L77] havoc ~delta~0; [L78] havoc ~ea~0; [L79] havoc ~eb~0; [L80] havoc ~tmp~0; [L81] havoc ~__retres10~0; VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425] [L84] COND FALSE !(~a % 4294967296 < ~b % 4294967296) VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425] [L91] COND FALSE !(0 == ~b % 4294967296) [L98] ~ma~0 := ~bitwiseAnd(~a, 16777215); [L99] ~ea~0 := (if ~a / 16777216 % 4294967296 % 4294967296 <= 2147483647 then ~a / 16777216 % 4294967296 % 4294967296 else ~a / 16777216 % 4294967296 % 4294967296 - 4294967296) - 128; [L100] ~ma~0 := ~bitwiseOr(~ma~0, 16777216); [L101] ~mb~0 := ~bitwiseAnd(~b, 16777215); [L102] ~eb~0 := (if ~b / 16777216 % 4294967296 % 4294967296 <= 2147483647 then ~b / 16777216 % 4294967296 % 4294967296 else ~b / 16777216 % 4294967296 % 4294967296 - 4294967296) - 128; [L103] ~mb~0 := ~bitwiseOr(~mb~0, 16777216); VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425, ~ea~0=127, ~eb~0=128] [L104] CALL call __VERIFIER_assert((if ~ea~0 >= ~eb~0 then 1 else 0)); VAL [#in~cond=0] [L5-L10] ~cond := #in~cond; VAL [#in~cond=0, ~cond=0] [L6] COND TRUE 0 == ~cond VAL [#in~cond=0, ~cond=0] [L7] assert false; VAL [#in~cond=0, ~cond=0] [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret8 := main(); [L215] havoc ~a~0; [L216] ~ma~2 := #t~nondet0; [L216] havoc #t~nondet0; [L217] assume -128 <= #t~nondet1 && #t~nondet1 <= 127; [L217] ~ea~2 := #t~nondet1; [L217] havoc #t~nondet1; [L218] havoc ~b~0; [L219] ~mb~2 := #t~nondet2; [L219] havoc #t~nondet2; [L220] assume -128 <= #t~nondet3 && #t~nondet3 <= 127; [L220] ~eb~2 := #t~nondet3; [L220] havoc #t~nondet3; [L221] havoc ~r_add~0; [L222] havoc ~zero~0; [L223] havoc ~sa~0; [L224] havoc ~sb~0; [L225] havoc ~tmp~2; [L226] havoc ~tmp___0~0; [L227] havoc ~tmp___1~0; [L228] havoc ~tmp___2~0; [L229] havoc ~tmp___3~0; [L230] havoc ~tmp___4~0; [L231] havoc ~tmp___5~0; [L232] havoc ~tmp___6~0; [L233] havoc ~tmp___7~0; [L234] havoc ~tmp___8~0; [L235] havoc ~tmp___9~0; [L236] havoc ~__retres23~0; VAL [~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216] [L240] CALL call #t~ret4 := base2flt(0, 0); VAL [#in~e=0, #in~m=0] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=0, #in~m=0, ~e=0, ~m=0] [L19] COND TRUE 0 == ~m % 4294967296 [L20] ~__retres4~0 := 0; VAL [#in~e=0, #in~m=0, ~__retres4~0=0, ~e=0, ~m=0] [L70] #res := ~__retres4~0; VAL [#in~e=0, #in~m=0, #res=0, ~__retres4~0=0, ~e=0, ~m=0] [L240] RET call #t~ret4 := base2flt(0, 0); VAL [#t~ret4=0, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216] [L240] ~zero~0 := #t~ret4; [L240] havoc #t~ret4; VAL [~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L241] CALL call #t~ret5 := base2flt(~ma~2, ~ea~2); VAL [#in~e=127, #in~m=33554432] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L19] COND FALSE !(0 == ~m % 4294967296) VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L25] COND FALSE !(~m % 4294967296 < 16777216) VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L47-L62] COND FALSE !(false) VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L49] COND TRUE ~m % 4294967296 >= 33554432 VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L54] COND TRUE ~e >= 127 [L55] ~__retres4~0 := 4294967295; VAL [#in~e=127, #in~m=33554432, ~__retres4~0=4294967295, ~e=127, ~m=33554432] [L70] #res := ~__retres4~0; VAL [#in~e=127, #in~m=33554432, #res=4294967295, ~__retres4~0=4294967295, ~e=127, ~m=33554432] [L241] RET call #t~ret5 := base2flt(~ma~2, ~ea~2); VAL [#t~ret5=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L241] ~a~0 := #t~ret5; [L241] havoc #t~ret5; VAL [~a~0=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L242] CALL call #t~ret6 := base2flt(~mb~2, ~eb~2); VAL [#in~e=0, #in~m=16777216] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L19] COND FALSE !(0 == ~m % 4294967296) VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L25] COND FALSE !(~m % 4294967296 < 16777216) VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L47-L62] COND FALSE !(false) VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L49] COND FALSE !(~m % 4294967296 >= 33554432) VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L66] ~m := ~bitwiseAnd(~m, ~bitwiseComplement(16777216)); [L67] ~res~0 := ~bitwiseOr(~m, 16777216 * (128 + ~e)); [L68] ~__retres4~0 := ~res~0; VAL [#in~e=0, #in~m=16777216, ~__retres4~0=-72057589726183425, ~e=0, ~res~0=-72057589726183425] [L70] #res := ~__retres4~0; VAL [#in~e=0, #in~m=16777216, #res=-72057589726183425, ~__retres4~0=-72057589726183425, ~e=0, ~res~0=-72057589726183425] [L242] RET call #t~ret6 := base2flt(~mb~2, ~eb~2); VAL [#t~ret6=-72057589726183425, ~a~0=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L242] ~b~0 := #t~ret6; [L242] havoc #t~ret6; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L244] COND FALSE !(~a~0 % 4294967296 < ~zero~0 % 4294967296) VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L247] COND TRUE ~a~0 % 4294967296 > ~zero~0 % 4294967296 [L248] ~tmp~2 := 1; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~tmp~2=1, ~zero~0=0] [L252] ~sa~0 := ~tmp~2; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp~2=1, ~zero~0=0] [L254] COND FALSE !(~b~0 % 4294967296 < ~zero~0 % 4294967296) VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp~2=1, ~zero~0=0] [L257] COND TRUE ~b~0 % 4294967296 > ~zero~0 % 4294967296 [L258] ~tmp___0~0 := 1; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp___0~0=1, ~tmp~2=1, ~zero~0=0] [L262] ~sb~0 := ~tmp___0~0; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~sb~0=1, ~tmp___0~0=1, ~tmp~2=1, ~zero~0=0] [L265] CALL call #t~ret7 := addflt(~a~0, ~b~0); VAL [#in~a=4294967295, #in~b=-72057589726183425] [L73-L136] ~a := #in~a; [L73-L136] ~b := #in~b; [L74] havoc ~res~1; [L75] havoc ~ma~0; [L76] havoc ~mb~0; [L77] havoc ~delta~0; [L78] havoc ~ea~0; [L79] havoc ~eb~0; [L80] havoc ~tmp~0; [L81] havoc ~__retres10~0; VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425] [L84] COND FALSE !(~a % 4294967296 < ~b % 4294967296) VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425] [L91] COND FALSE !(0 == ~b % 4294967296) [L98] ~ma~0 := ~bitwiseAnd(~a, 16777215); [L99] ~ea~0 := (if ~a / 16777216 % 4294967296 % 4294967296 <= 2147483647 then ~a / 16777216 % 4294967296 % 4294967296 else ~a / 16777216 % 4294967296 % 4294967296 - 4294967296) - 128; [L100] ~ma~0 := ~bitwiseOr(~ma~0, 16777216); [L101] ~mb~0 := ~bitwiseAnd(~b, 16777215); [L102] ~eb~0 := (if ~b / 16777216 % 4294967296 % 4294967296 <= 2147483647 then ~b / 16777216 % 4294967296 % 4294967296 else ~b / 16777216 % 4294967296 % 4294967296 - 4294967296) - 128; [L103] ~mb~0 := ~bitwiseOr(~mb~0, 16777216); VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425, ~ea~0=127, ~eb~0=128] [L104] CALL call __VERIFIER_assert((if ~ea~0 >= ~eb~0 then 1 else 0)); VAL [#in~cond=0] [L5-L10] ~cond := #in~cond; VAL [#in~cond=0, ~cond=0] [L6] COND TRUE 0 == ~cond VAL [#in~cond=0, ~cond=0] [L7] assert false; VAL [#in~cond=0, ~cond=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret8 := main(); [L215] havoc ~a~0; [L216] ~ma~2 := #t~nondet0; [L216] havoc #t~nondet0; [L217] assume -128 <= #t~nondet1 && #t~nondet1 <= 127; [L217] ~ea~2 := #t~nondet1; [L217] havoc #t~nondet1; [L218] havoc ~b~0; [L219] ~mb~2 := #t~nondet2; [L219] havoc #t~nondet2; [L220] assume -128 <= #t~nondet3 && #t~nondet3 <= 127; [L220] ~eb~2 := #t~nondet3; [L220] havoc #t~nondet3; [L221] havoc ~r_add~0; [L222] havoc ~zero~0; [L223] havoc ~sa~0; [L224] havoc ~sb~0; [L225] havoc ~tmp~2; [L226] havoc ~tmp___0~0; [L227] havoc ~tmp___1~0; [L228] havoc ~tmp___2~0; [L229] havoc ~tmp___3~0; [L230] havoc ~tmp___4~0; [L231] havoc ~tmp___5~0; [L232] havoc ~tmp___6~0; [L233] havoc ~tmp___7~0; [L234] havoc ~tmp___8~0; [L235] havoc ~tmp___9~0; [L236] havoc ~__retres23~0; VAL [~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216] [L240] CALL call #t~ret4 := base2flt(0, 0); VAL [#in~e=0, #in~m=0] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=0, #in~m=0, ~e=0, ~m=0] [L19] COND TRUE 0 == ~m % 4294967296 [L20] ~__retres4~0 := 0; VAL [#in~e=0, #in~m=0, ~__retres4~0=0, ~e=0, ~m=0] [L70] #res := ~__retres4~0; VAL [#in~e=0, #in~m=0, #res=0, ~__retres4~0=0, ~e=0, ~m=0] [L240] RET call #t~ret4 := base2flt(0, 0); VAL [#t~ret4=0, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216] [L240] ~zero~0 := #t~ret4; [L240] havoc #t~ret4; VAL [~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L241] CALL call #t~ret5 := base2flt(~ma~2, ~ea~2); VAL [#in~e=127, #in~m=33554432] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L19] COND FALSE !(0 == ~m % 4294967296) VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L25] COND FALSE !(~m % 4294967296 < 16777216) VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L47-L62] COND FALSE !(false) VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L49] COND TRUE ~m % 4294967296 >= 33554432 VAL [#in~e=127, #in~m=33554432, ~e=127, ~m=33554432] [L54] COND TRUE ~e >= 127 [L55] ~__retres4~0 := 4294967295; VAL [#in~e=127, #in~m=33554432, ~__retres4~0=4294967295, ~e=127, ~m=33554432] [L70] #res := ~__retres4~0; VAL [#in~e=127, #in~m=33554432, #res=4294967295, ~__retres4~0=4294967295, ~e=127, ~m=33554432] [L241] RET call #t~ret5 := base2flt(~ma~2, ~ea~2); VAL [#t~ret5=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L241] ~a~0 := #t~ret5; [L241] havoc #t~ret5; VAL [~a~0=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L242] CALL call #t~ret6 := base2flt(~mb~2, ~eb~2); VAL [#in~e=0, #in~m=16777216] [L14-L72] ~m := #in~m; [L14-L72] ~e := #in~e; [L15] havoc ~res~0; [L16] havoc ~__retres4~0; VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L19] COND FALSE !(0 == ~m % 4294967296) VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L25] COND FALSE !(~m % 4294967296 < 16777216) VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L47-L62] COND FALSE !(false) VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L49] COND FALSE !(~m % 4294967296 >= 33554432) VAL [#in~e=0, #in~m=16777216, ~e=0, ~m=16777216] [L66] ~m := ~bitwiseAnd(~m, ~bitwiseComplement(16777216)); [L67] ~res~0 := ~bitwiseOr(~m, 16777216 * (128 + ~e)); [L68] ~__retres4~0 := ~res~0; VAL [#in~e=0, #in~m=16777216, ~__retres4~0=-72057589726183425, ~e=0, ~res~0=-72057589726183425] [L70] #res := ~__retres4~0; VAL [#in~e=0, #in~m=16777216, #res=-72057589726183425, ~__retres4~0=-72057589726183425, ~e=0, ~res~0=-72057589726183425] [L242] RET call #t~ret6 := base2flt(~mb~2, ~eb~2); VAL [#t~ret6=-72057589726183425, ~a~0=4294967295, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L242] ~b~0 := #t~ret6; [L242] havoc #t~ret6; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L244] COND FALSE !(~a~0 % 4294967296 < ~zero~0 % 4294967296) VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~zero~0=0] [L247] COND TRUE ~a~0 % 4294967296 > ~zero~0 % 4294967296 [L248] ~tmp~2 := 1; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~tmp~2=1, ~zero~0=0] [L252] ~sa~0 := ~tmp~2; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp~2=1, ~zero~0=0] [L254] COND FALSE !(~b~0 % 4294967296 < ~zero~0 % 4294967296) VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp~2=1, ~zero~0=0] [L257] COND TRUE ~b~0 % 4294967296 > ~zero~0 % 4294967296 [L258] ~tmp___0~0 := 1; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~tmp___0~0=1, ~tmp~2=1, ~zero~0=0] [L262] ~sb~0 := ~tmp___0~0; VAL [~a~0=4294967295, ~b~0=-72057589726183425, ~ea~2=127, ~eb~2=0, ~ma~2=33554432, ~mb~2=16777216, ~sa~0=1, ~sb~0=1, ~tmp___0~0=1, ~tmp~2=1, ~zero~0=0] [L265] CALL call #t~ret7 := addflt(~a~0, ~b~0); VAL [#in~a=4294967295, #in~b=-72057589726183425] [L73-L136] ~a := #in~a; [L73-L136] ~b := #in~b; [L74] havoc ~res~1; [L75] havoc ~ma~0; [L76] havoc ~mb~0; [L77] havoc ~delta~0; [L78] havoc ~ea~0; [L79] havoc ~eb~0; [L80] havoc ~tmp~0; [L81] havoc ~__retres10~0; VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425] [L84] COND FALSE !(~a % 4294967296 < ~b % 4294967296) VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425] [L91] COND FALSE !(0 == ~b % 4294967296) [L98] ~ma~0 := ~bitwiseAnd(~a, 16777215); [L99] ~ea~0 := (if ~a / 16777216 % 4294967296 % 4294967296 <= 2147483647 then ~a / 16777216 % 4294967296 % 4294967296 else ~a / 16777216 % 4294967296 % 4294967296 - 4294967296) - 128; [L100] ~ma~0 := ~bitwiseOr(~ma~0, 16777216); [L101] ~mb~0 := ~bitwiseAnd(~b, 16777215); [L102] ~eb~0 := (if ~b / 16777216 % 4294967296 % 4294967296 <= 2147483647 then ~b / 16777216 % 4294967296 % 4294967296 else ~b / 16777216 % 4294967296 % 4294967296 - 4294967296) - 128; [L103] ~mb~0 := ~bitwiseOr(~mb~0, 16777216); VAL [#in~a=4294967295, #in~b=-72057589726183425, ~a=4294967295, ~b=-72057589726183425, ~ea~0=127, ~eb~0=128] [L104] CALL call __VERIFIER_assert((if ~ea~0 >= ~eb~0 then 1 else 0)); VAL [#in~cond=0] [L5-L10] ~cond := #in~cond; VAL [#in~cond=0, ~cond=0] [L6] COND TRUE 0 == ~cond VAL [#in~cond=0, ~cond=0] [L7] assert false; VAL [#in~cond=0, ~cond=0] [L215] unsigned int a ; [L216] unsigned int ma = __VERIFIER_nondet_uint(); [L217] signed char ea = __VERIFIER_nondet_char(); [L218] unsigned int b ; [L219] unsigned int mb = __VERIFIER_nondet_uint(); [L220] signed char eb = __VERIFIER_nondet_char(); [L221] unsigned int r_add ; [L222] unsigned int zero ; [L223] int sa ; [L224] int sb ; [L225] int tmp ; [L226] int tmp___0 ; [L227] int tmp___1 ; [L228] int tmp___2 ; [L229] int tmp___3 ; [L230] int tmp___4 ; [L231] int tmp___5 ; [L232] int tmp___6 ; [L233] int tmp___7 ; [L234] int tmp___8 ; [L235] int tmp___9 ; [L236] int __retres23 ; VAL [ea=127, eb=0, ma=33554432, mb=16777216] [L240] CALL, EXPR base2flt(0, 0) VAL [\old(e)=0, \old(m)=0] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=0, \old(m)=0, e=0, m=0] [L19] COND TRUE ! m [L20] __retres4 = 0U VAL [\old(e)=0, \old(m)=0, __retres4=0, e=0, m=0] [L70] return (__retres4); VAL [\old(e)=0, \old(m)=0, \result=0, __retres4=0, e=0, m=0] [L240] RET, EXPR base2flt(0, 0) VAL [base2flt(0, 0)=0, ea=127, eb=0, ma=33554432, mb=16777216] [L240] zero = base2flt(0, 0) [L241] CALL, EXPR base2flt(ma, ea) VAL [\old(e)=127, \old(m)=33554432] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L19] COND FALSE !(! m) VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L25] COND FALSE !(m < 1U << 24U) VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L47] COND TRUE 1 VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L49] COND TRUE m >= 1U << 25U VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L54] COND TRUE e >= 127 [L55] __retres4 = 4294967295U VAL [\old(e)=127, \old(m)=33554432, __retres4=4294967295, e=127, m=33554432] [L70] return (__retres4); VAL [\old(e)=127, \old(m)=33554432, \result=4294967295, __retres4=4294967295, e=127, m=33554432] [L241] RET, EXPR base2flt(ma, ea) VAL [base2flt(ma, ea)=4294967295, ea=127, eb=0, ma=33554432, mb=16777216, zero=0] [L241] a = base2flt(ma, ea) [L242] CALL, EXPR base2flt(mb, eb) VAL [\old(e)=0, \old(m)=16777216] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L19] COND FALSE !(! m) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L25] COND FALSE !(m < 1U << 24U) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L47] COND TRUE 1 VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L49] COND FALSE !(m >= 1U << 25U) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L66] m = m & ~ (1U << 24U) [L67] res = m | (unsigned int )((e + 128) << 24U) [L68] __retres4 = res VAL [\old(e)=0, \old(m)=16777216, __retres4=16777215, e=0, res=16777215] [L70] return (__retres4); VAL [\old(e)=0, \old(m)=16777216, \result=-72057589726183425, __retres4=16777215, e=0, res=16777215] [L242] RET, EXPR base2flt(mb, eb) VAL [a=4294967295, base2flt(mb, eb)=-72057589726183425, ea=127, eb=0, ma=33554432, mb=16777216, zero=0] [L242] b = base2flt(mb, eb) [L244] COND FALSE !(a < zero) VAL [a=4294967295, b=16777215, ea=127, eb=0, ma=33554432, mb=16777216, zero=0] [L247] COND TRUE a > zero [L248] tmp = 1 VAL [a=4294967295, b=16777215, ea=127, eb=0, ma=33554432, mb=16777216, tmp=1, zero=0] [L252] sa = tmp VAL [a=4294967295, b=16777215, ea=127, eb=0, ma=33554432, mb=16777216, sa=1, tmp=1, zero=0] [L254] COND FALSE !(b < zero) VAL [a=4294967295, b=16777215, ea=127, eb=0, ma=33554432, mb=16777216, sa=1, tmp=1, zero=0] [L257] COND TRUE b > zero [L258] tmp___0 = 1 VAL [a=4294967295, b=16777215, ea=127, eb=0, ma=33554432, mb=16777216, sa=1, tmp=1, tmp___0=1, zero=0] [L262] sb = tmp___0 VAL [a=4294967295, b=16777215, ea=127, eb=0, ma=33554432, mb=16777216, sa=1, sb=1, tmp=1, tmp___0=1, zero=0] [L265] CALL addflt(a, b) VAL [\old(a)=4294967295, \old(b)=16777215] [L74] unsigned int res ; [L75] unsigned int ma ; [L76] unsigned int mb ; [L77] unsigned int delta ; [L78] int ea ; [L79] int eb ; [L80] unsigned int tmp ; [L81] unsigned int __retres10 ; VAL [\old(a)=4294967295, \old(b)=16777215, a=4294967295, b=16777215] [L84] COND FALSE !(a < b) VAL [\old(a)=4294967295, \old(b)=16777215, a=4294967295, b=16777215] [L91] COND FALSE !(! b) [L98] ma = a & ((1U << 24U) - 1U) [L99] ea = (int )(a >> 24U) - 128 [L100] ma = ma | (1U << 24U) [L101] mb = b & ((1U << 24U) - 1U) [L102] eb = (int )(b >> 24U) - 128 [L103] mb = mb | (1U << 24U) VAL [\old(a)=4294967295, \old(b)=16777215, a=4294967295, b=16777215, ea=127, eb=128] [L104] CALL __VERIFIER_assert(ea >= eb) VAL [\old(cond)=0] [L6] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L7] __VERIFIER_error() VAL [\old(cond)=0, cond=0] ----- [2018-11-23 06:45:48,934 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 06:45:48 BoogieIcfgContainer [2018-11-23 06:45:48,934 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-23 06:45:48,935 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-23 06:45:48,935 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-23 06:45:48,935 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-23 06:45:48,935 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 06:45:40" (3/4) ... [2018-11-23 06:45:48,938 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-11-23 06:45:48,938 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 06:45:48,939 INFO L168 Benchmark]: Toolchain (without parser) took 8677.82 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 331.4 MB). Free memory was 960.2 MB in the beginning and 1.1 GB in the end (delta: -143.6 MB). Peak memory consumption was 187.7 MB. Max. memory is 11.5 GB. [2018-11-23 06:45:48,940 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 06:45:48,942 INFO L168 Benchmark]: CACSL2BoogieTranslator took 228.62 ms. Allocated memory is still 1.0 GB. Free memory was 960.2 MB in the beginning and 944.1 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-11-23 06:45:48,942 INFO L168 Benchmark]: Boogie Procedure Inliner took 55.44 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 158.3 MB). Free memory was 944.1 MB in the beginning and 1.2 GB in the end (delta: -208.9 MB). Peak memory consumption was 14.6 MB. Max. memory is 11.5 GB. [2018-11-23 06:45:48,943 INFO L168 Benchmark]: Boogie Preprocessor took 25.22 ms. Allocated memory is still 1.2 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 06:45:48,943 INFO L168 Benchmark]: RCFGBuilder took 287.22 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 28.0 MB). Peak memory consumption was 28.0 MB. Max. memory is 11.5 GB. [2018-11-23 06:45:48,943 INFO L168 Benchmark]: TraceAbstraction took 8074.42 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 173.0 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 21.2 MB). Peak memory consumption was 194.2 MB. Max. memory is 11.5 GB. [2018-11-23 06:45:48,944 INFO L168 Benchmark]: Witness Printer took 3.72 ms. Allocated memory is still 1.4 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 06:45:48,946 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 228.62 ms. Allocated memory is still 1.0 GB. Free memory was 960.2 MB in the beginning and 944.1 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 55.44 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 158.3 MB). Free memory was 944.1 MB in the beginning and 1.2 GB in the end (delta: -208.9 MB). Peak memory consumption was 14.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.22 ms. Allocated memory is still 1.2 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 287.22 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 28.0 MB). Peak memory consumption was 28.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 8074.42 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 173.0 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 21.2 MB). Peak memory consumption was 194.2 MB. Max. memory is 11.5 GB. * Witness Printer took 3.72 ms. Allocated memory is still 1.4 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 7]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of bitwiseOr at line 100, overapproximation of bitwiseAnd at line 98. Possible FailurePath: [L215] unsigned int a ; [L216] unsigned int ma = __VERIFIER_nondet_uint(); [L217] signed char ea = __VERIFIER_nondet_char(); [L218] unsigned int b ; [L219] unsigned int mb = __VERIFIER_nondet_uint(); [L220] signed char eb = __VERIFIER_nondet_char(); [L221] unsigned int r_add ; [L222] unsigned int zero ; [L223] int sa ; [L224] int sb ; [L225] int tmp ; [L226] int tmp___0 ; [L227] int tmp___1 ; [L228] int tmp___2 ; [L229] int tmp___3 ; [L230] int tmp___4 ; [L231] int tmp___5 ; [L232] int tmp___6 ; [L233] int tmp___7 ; [L234] int tmp___8 ; [L235] int tmp___9 ; [L236] int __retres23 ; VAL [ea=127, eb=0, ma=33554432, mb=16777216] [L240] CALL, EXPR base2flt(0, 0) VAL [\old(e)=0, \old(m)=0] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=0, \old(m)=0, e=0, m=0] [L19] COND TRUE ! m [L20] __retres4 = 0U VAL [\old(e)=0, \old(m)=0, __retres4=0, e=0, m=0] [L70] return (__retres4); VAL [\old(e)=0, \old(m)=0, \result=0, __retres4=0, e=0, m=0] [L240] RET, EXPR base2flt(0, 0) VAL [base2flt(0, 0)=0, ea=127, eb=0, ma=33554432, mb=16777216] [L240] zero = base2flt(0, 0) [L241] CALL, EXPR base2flt(ma, ea) VAL [\old(e)=127, \old(m)=33554432] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L19] COND FALSE !(! m) VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L25] COND FALSE !(m < 1U << 24U) VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L47] COND TRUE 1 VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L49] COND TRUE m >= 1U << 25U VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L54] COND TRUE e >= 127 [L55] __retres4 = 4294967295U VAL [\old(e)=127, \old(m)=33554432, __retres4=4294967295, e=127, m=33554432] [L70] return (__retres4); VAL [\old(e)=127, \old(m)=33554432, \result=4294967295, __retres4=4294967295, e=127, m=33554432] [L241] RET, EXPR base2flt(ma, ea) VAL [base2flt(ma, ea)=4294967295, ea=127, eb=0, ma=33554432, mb=16777216, zero=0] [L241] a = base2flt(ma, ea) [L242] CALL, EXPR base2flt(mb, eb) VAL [\old(e)=0, \old(m)=16777216] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L19] COND FALSE !(! m) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L25] COND FALSE !(m < 1U << 24U) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L47] COND TRUE 1 VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L49] COND FALSE !(m >= 1U << 25U) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L66] m = m & ~ (1U << 24U) [L67] res = m | (unsigned int )((e + 128) << 24U) [L68] __retres4 = res VAL [\old(e)=0, \old(m)=16777216, __retres4=16777215, e=0, res=16777215] [L70] return (__retres4); VAL [\old(e)=0, \old(m)=16777216, \result=-72057589726183425, __retres4=16777215, e=0, res=16777215] [L242] RET, EXPR base2flt(mb, eb) VAL [a=4294967295, base2flt(mb, eb)=-72057589726183425, ea=127, eb=0, ma=33554432, mb=16777216, zero=0] [L242] b = base2flt(mb, eb) [L244] COND FALSE !(a < zero) VAL [a=4294967295, b=16777215, ea=127, eb=0, ma=33554432, mb=16777216, zero=0] [L247] COND TRUE a > zero [L248] tmp = 1 VAL [a=4294967295, b=16777215, ea=127, eb=0, ma=33554432, mb=16777216, tmp=1, zero=0] [L252] sa = tmp VAL [a=4294967295, b=16777215, ea=127, eb=0, ma=33554432, mb=16777216, sa=1, tmp=1, zero=0] [L254] COND FALSE !(b < zero) VAL [a=4294967295, b=16777215, ea=127, eb=0, ma=33554432, mb=16777216, sa=1, tmp=1, zero=0] [L257] COND TRUE b > zero [L258] tmp___0 = 1 VAL [a=4294967295, b=16777215, ea=127, eb=0, ma=33554432, mb=16777216, sa=1, tmp=1, tmp___0=1, zero=0] [L262] sb = tmp___0 VAL [a=4294967295, b=16777215, ea=127, eb=0, ma=33554432, mb=16777216, sa=1, sb=1, tmp=1, tmp___0=1, zero=0] [L265] CALL addflt(a, b) VAL [\old(a)=4294967295, \old(b)=16777215] [L74] unsigned int res ; [L75] unsigned int ma ; [L76] unsigned int mb ; [L77] unsigned int delta ; [L78] int ea ; [L79] int eb ; [L80] unsigned int tmp ; [L81] unsigned int __retres10 ; VAL [\old(a)=4294967295, \old(b)=16777215, a=4294967295, b=16777215] [L84] COND FALSE !(a < b) VAL [\old(a)=4294967295, \old(b)=16777215, a=4294967295, b=16777215] [L91] COND FALSE !(! b) [L98] ma = a & ((1U << 24U) - 1U) [L99] ea = (int )(a >> 24U) - 128 [L100] ma = ma | (1U << 24U) [L101] mb = b & ((1U << 24U) - 1U) [L102] eb = (int )(b >> 24U) - 128 [L103] mb = mb | (1U << 24U) VAL [\old(a)=4294967295, \old(b)=16777215, a=4294967295, b=16777215, ea=127, eb=128] [L104] CALL __VERIFIER_assert(ea >= eb) VAL [\old(cond)=0] [L6] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L7] __VERIFIER_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 77 locations, 1 error locations. UNSAFE Result, 8.0s OverallTime, 9 OverallIterations, 3 TraceHistogramMax, 3.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 943 SDtfs, 1124 SDslu, 8072 SDs, 0 SdLazy, 2425 SolverSat, 135 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.3s Time, PredicateUnifierStatistics: 4 DeclaredPredicates, 633 GetRequests, 441 SyntacticMatches, 8 SemanticMatches, 184 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 662 ImplicationChecksByTransitivity, 2.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=335occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.3s AbstIntTime, 7 AbstIntIterations, 2 AbstIntStrong, 0.6614543114543113 AbsIntWeakeningRatio, 2.0 AbsIntAvgWeakeningVarsNumRemoved, 0.918918918918919 AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 8 MinimizatonAttempts, 228 StatesRemovedByMinimization, 8 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.8s InterpolantComputationTime, 620 NumberOfCodeBlocks, 620 NumberOfCodeBlocksAsserted, 14 NumberOfCheckSat, 778 ConstructedInterpolants, 37 QuantifiedInterpolants, 122450 SizeOfPredicates, 24 NumberOfNonLiveVariables, 644 ConjunctsInSsa, 101 ConjunctsInUnsatCore, 18 InterpolantComputations, 2 PerfectInterpolantSequences, 203/283 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-aa41828 [2018-11-23 06:45:50,451 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 06:45:50,453 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 06:45:50,460 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 06:45:50,461 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 06:45:50,461 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 06:45:50,462 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 06:45:50,463 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 06:45:50,465 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 06:45:50,465 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 06:45:50,466 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 06:45:50,466 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 06:45:50,467 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 06:45:50,467 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 06:45:50,468 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 06:45:50,469 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 06:45:50,469 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 06:45:50,471 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 06:45:50,472 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 06:45:50,473 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 06:45:50,474 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 06:45:50,475 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 06:45:50,477 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 06:45:50,477 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 06:45:50,477 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 06:45:50,478 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 06:45:50,479 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 06:45:50,479 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 06:45:50,480 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 06:45:50,481 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 06:45:50,481 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 06:45:50,481 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 06:45:50,482 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 06:45:50,482 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 06:45:50,482 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 06:45:50,483 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 06:45:50,483 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf [2018-11-23 06:45:50,495 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 06:45:50,495 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 06:45:50,496 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 06:45:50,496 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 06:45:50,496 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-23 06:45:50,496 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-23 06:45:50,496 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-23 06:45:50,496 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-23 06:45:50,496 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-23 06:45:50,497 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-23 06:45:50,497 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 06:45:50,497 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 06:45:50,497 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 06:45:50,498 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 06:45:50,498 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 06:45:50,498 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 06:45:50,498 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 06:45:50,498 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 06:45:50,498 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 06:45:50,498 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 06:45:50,499 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 06:45:50,499 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 06:45:50,499 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 06:45:50,499 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 06:45:50,499 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 06:45:50,499 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 06:45:50,499 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 06:45:50,500 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 06:45:50,500 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 06:45:50,500 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 06:45:50,500 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 06:45:50,500 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-11-23 06:45:50,500 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 06:45:50,500 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 06:45:50,501 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 06:45:50,501 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f756365182c9801d4a2ac186a40692687a86b469 [2018-11-23 06:45:50,530 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 06:45:50,539 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 06:45:50,541 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 06:45:50,542 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 06:45:50,542 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 06:45:50,543 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/../../sv-benchmarks/c/bitvector/soft_float_1_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-11-23 06:45:50,582 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/data/ed1e190a1/e5bb362b15104ec981a379e676aafaed/FLAGee488f4ad [2018-11-23 06:45:50,931 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 06:45:50,932 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/sv-benchmarks/c/bitvector/soft_float_1_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-11-23 06:45:50,937 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/data/ed1e190a1/e5bb362b15104ec981a379e676aafaed/FLAGee488f4ad [2018-11-23 06:45:51,343 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/data/ed1e190a1/e5bb362b15104ec981a379e676aafaed [2018-11-23 06:45:51,345 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 06:45:51,346 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 06:45:51,347 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 06:45:51,348 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 06:45:51,350 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 06:45:51,351 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 06:45:51" (1/1) ... [2018-11-23 06:45:51,353 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@73d8ea8f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:51, skipping insertion in model container [2018-11-23 06:45:51,353 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 06:45:51" (1/1) ... [2018-11-23 06:45:51,360 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 06:45:51,384 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 06:45:51,535 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 06:45:51,539 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 06:45:51,577 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 06:45:51,590 INFO L195 MainTranslator]: Completed translation [2018-11-23 06:45:51,590 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:51 WrapperNode [2018-11-23 06:45:51,590 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 06:45:51,591 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 06:45:51,591 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 06:45:51,591 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 06:45:51,597 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:51" (1/1) ... [2018-11-23 06:45:51,604 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:51" (1/1) ... [2018-11-23 06:45:51,610 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 06:45:51,610 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 06:45:51,610 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 06:45:51,611 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 06:45:51,617 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:51" (1/1) ... [2018-11-23 06:45:51,618 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:51" (1/1) ... [2018-11-23 06:45:51,620 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:51" (1/1) ... [2018-11-23 06:45:51,620 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:51" (1/1) ... [2018-11-23 06:45:51,629 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:51" (1/1) ... [2018-11-23 06:45:51,681 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:51" (1/1) ... [2018-11-23 06:45:51,683 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:51" (1/1) ... [2018-11-23 06:45:51,686 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 06:45:51,687 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 06:45:51,687 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 06:45:51,687 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 06:45:51,688 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:51" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 06:45:51,724 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 06:45:51,724 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 06:45:51,724 INFO L130 BoogieDeclarations]: Found specification of procedure base2flt [2018-11-23 06:45:51,724 INFO L138 BoogieDeclarations]: Found implementation of procedure base2flt [2018-11-23 06:45:51,725 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 06:45:51,725 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 06:45:51,725 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 06:45:51,725 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 06:45:51,725 INFO L130 BoogieDeclarations]: Found specification of procedure addflt [2018-11-23 06:45:51,725 INFO L138 BoogieDeclarations]: Found implementation of procedure addflt [2018-11-23 06:45:51,725 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 06:45:51,726 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 06:45:51,996 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 06:45:51,996 INFO L280 CfgBuilder]: Removed 2 assue(true) statements. [2018-11-23 06:45:51,996 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 06:45:51 BoogieIcfgContainer [2018-11-23 06:45:51,996 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 06:45:51,997 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 06:45:51,997 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 06:45:51,999 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 06:45:51,999 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 06:45:51" (1/3) ... [2018-11-23 06:45:52,000 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3776fc59 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 06:45:51, skipping insertion in model container [2018-11-23 06:45:52,000 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:45:51" (2/3) ... [2018-11-23 06:45:52,000 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3776fc59 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 06:45:52, skipping insertion in model container [2018-11-23 06:45:52,000 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 06:45:51" (3/3) ... [2018-11-23 06:45:52,005 INFO L112 eAbstractionObserver]: Analyzing ICFG soft_float_1_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-11-23 06:45:52,011 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 06:45:52,016 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 06:45:52,026 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 06:45:52,048 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 06:45:52,049 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 06:45:52,049 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 06:45:52,049 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 06:45:52,049 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 06:45:52,049 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 06:45:52,049 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 06:45:52,049 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 06:45:52,049 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 06:45:52,062 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states. [2018-11-23 06:45:52,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-23 06:45:52,068 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:52,068 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:52,070 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:52,073 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:52,074 INFO L82 PathProgramCache]: Analyzing trace with hash -441638981, now seen corresponding path program 1 times [2018-11-23 06:45:52,076 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:45:52,077 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:45:52,091 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:52,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:52,144 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:52,250 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:52,250 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:45:52,293 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:52,296 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:52,296 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 06:45:52,303 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:52,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:52,322 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:52,327 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:52,327 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:45:52,400 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:52,426 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-23 06:45:52,426 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9] total 9 [2018-11-23 06:45:52,430 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 06:45:52,442 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 06:45:52,442 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-11-23 06:45:52,444 INFO L87 Difference]: Start difference. First operand 77 states. Second operand 9 states. [2018-11-23 06:45:52,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:52,641 INFO L93 Difference]: Finished difference Result 199 states and 318 transitions. [2018-11-23 06:45:52,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-23 06:45:52,642 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 36 [2018-11-23 06:45:52,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:52,652 INFO L225 Difference]: With dead ends: 199 [2018-11-23 06:45:52,652 INFO L226 Difference]: Without dead ends: 120 [2018-11-23 06:45:52,655 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 135 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=34, Invalid=122, Unknown=0, NotChecked=0, Total=156 [2018-11-23 06:45:52,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-11-23 06:45:52,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 105. [2018-11-23 06:45:52,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-11-23 06:45:52,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 154 transitions. [2018-11-23 06:45:52,698 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 154 transitions. Word has length 36 [2018-11-23 06:45:52,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:52,699 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 154 transitions. [2018-11-23 06:45:52,699 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 06:45:52,699 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 154 transitions. [2018-11-23 06:45:52,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-23 06:45:52,701 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:52,702 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:52,702 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:52,702 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:52,702 INFO L82 PathProgramCache]: Analyzing trace with hash 306755114, now seen corresponding path program 1 times [2018-11-23 06:45:52,703 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:45:52,703 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:45:52,728 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:52,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:52,754 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:52,810 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:52,810 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:45:52,870 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:52,873 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:52,873 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 06:45:52,880 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:52,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:52,903 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:52,984 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-23 06:45:52,985 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:45:53,063 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:53,088 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-23 06:45:53,088 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 10, 6] total 14 [2018-11-23 06:45:53,089 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 06:45:53,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 06:45:53,090 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=145, Unknown=0, NotChecked=0, Total=182 [2018-11-23 06:45:53,090 INFO L87 Difference]: Start difference. First operand 105 states and 154 transitions. Second operand 14 states. [2018-11-23 06:45:53,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:53,498 INFO L93 Difference]: Finished difference Result 344 states and 546 transitions. [2018-11-23 06:45:53,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 06:45:53,498 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 40 [2018-11-23 06:45:53,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:53,500 INFO L225 Difference]: With dead ends: 344 [2018-11-23 06:45:53,501 INFO L226 Difference]: Without dead ends: 274 [2018-11-23 06:45:53,501 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 143 SyntacticMatches, 3 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=195, Unknown=0, NotChecked=0, Total=240 [2018-11-23 06:45:53,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274 states. [2018-11-23 06:45:53,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274 to 156. [2018-11-23 06:45:53,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-11-23 06:45:53,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 237 transitions. [2018-11-23 06:45:53,522 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 237 transitions. Word has length 40 [2018-11-23 06:45:53,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:53,522 INFO L480 AbstractCegarLoop]: Abstraction has 156 states and 237 transitions. [2018-11-23 06:45:53,523 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 06:45:53,523 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 237 transitions. [2018-11-23 06:45:53,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-23 06:45:53,525 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:53,525 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:53,529 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:53,529 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:53,529 INFO L82 PathProgramCache]: Analyzing trace with hash 377249800, now seen corresponding path program 1 times [2018-11-23 06:45:53,530 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:45:53,530 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:45:53,547 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:53,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:53,568 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:53,603 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:53,603 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:45:53,650 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:53,652 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:53,652 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 06:45:53,658 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:53,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:53,671 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:53,742 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-23 06:45:53,742 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:45:53,854 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:53,869 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 3 imperfect interpolant sequences. [2018-11-23 06:45:53,869 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [8, 8, 12] total 18 [2018-11-23 06:45:53,870 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-23 06:45:53,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-23 06:45:53,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=259, Unknown=0, NotChecked=0, Total=306 [2018-11-23 06:45:53,870 INFO L87 Difference]: Start difference. First operand 156 states and 237 transitions. Second operand 18 states. [2018-11-23 06:45:54,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:54,477 INFO L93 Difference]: Finished difference Result 377 states and 566 transitions. [2018-11-23 06:45:54,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-23 06:45:54,477 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 44 [2018-11-23 06:45:54,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:54,479 INFO L225 Difference]: With dead ends: 377 [2018-11-23 06:45:54,480 INFO L226 Difference]: Without dead ends: 301 [2018-11-23 06:45:54,480 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 154 SyntacticMatches, 4 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=86, Invalid=466, Unknown=0, NotChecked=0, Total=552 [2018-11-23 06:45:54,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states. [2018-11-23 06:45:54,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 251. [2018-11-23 06:45:54,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 251 states. [2018-11-23 06:45:54,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 251 states to 251 states and 362 transitions. [2018-11-23 06:45:54,502 INFO L78 Accepts]: Start accepts. Automaton has 251 states and 362 transitions. Word has length 44 [2018-11-23 06:45:54,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:54,502 INFO L480 AbstractCegarLoop]: Abstraction has 251 states and 362 transitions. [2018-11-23 06:45:54,502 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-23 06:45:54,502 INFO L276 IsEmpty]: Start isEmpty. Operand 251 states and 362 transitions. [2018-11-23 06:45:54,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-23 06:45:54,505 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:54,505 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:54,505 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:54,505 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:54,505 INFO L82 PathProgramCache]: Analyzing trace with hash -1751112318, now seen corresponding path program 1 times [2018-11-23 06:45:54,505 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:45:54,506 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:45:54,527 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:54,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:54,543 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:54,573 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:45:54,573 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:45:54,575 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:45:54,575 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 06:45:54,575 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 06:45:54,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 06:45:54,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-23 06:45:54,575 INFO L87 Difference]: Start difference. First operand 251 states and 362 transitions. Second operand 8 states. [2018-11-23 06:45:54,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:54,659 INFO L93 Difference]: Finished difference Result 351 states and 509 transitions. [2018-11-23 06:45:54,659 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 06:45:54,659 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-11-23 06:45:54,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:54,661 INFO L225 Difference]: With dead ends: 351 [2018-11-23 06:45:54,661 INFO L226 Difference]: Without dead ends: 286 [2018-11-23 06:45:54,661 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-11-23 06:45:54,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 286 states. [2018-11-23 06:45:54,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 286 to 273. [2018-11-23 06:45:54,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 273 states. [2018-11-23 06:45:54,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 273 states to 273 states and 393 transitions. [2018-11-23 06:45:54,678 INFO L78 Accepts]: Start accepts. Automaton has 273 states and 393 transitions. Word has length 44 [2018-11-23 06:45:54,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:54,679 INFO L480 AbstractCegarLoop]: Abstraction has 273 states and 393 transitions. [2018-11-23 06:45:54,679 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 06:45:54,679 INFO L276 IsEmpty]: Start isEmpty. Operand 273 states and 393 transitions. [2018-11-23 06:45:54,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-23 06:45:54,681 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:54,681 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:54,681 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:54,681 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:54,681 INFO L82 PathProgramCache]: Analyzing trace with hash -1399634249, now seen corresponding path program 1 times [2018-11-23 06:45:54,681 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:45:54,682 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:45:54,693 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:54,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:54,711 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:54,755 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-23 06:45:54,755 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:45:54,761 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:45:54,761 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 06:45:54,761 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 06:45:54,761 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 06:45:54,761 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-23 06:45:54,762 INFO L87 Difference]: Start difference. First operand 273 states and 393 transitions. Second operand 7 states. [2018-11-23 06:45:54,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:54,904 INFO L93 Difference]: Finished difference Result 522 states and 772 transitions. [2018-11-23 06:45:54,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 06:45:54,904 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 48 [2018-11-23 06:45:54,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:54,906 INFO L225 Difference]: With dead ends: 522 [2018-11-23 06:45:54,906 INFO L226 Difference]: Without dead ends: 428 [2018-11-23 06:45:54,907 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-23 06:45:54,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 428 states. [2018-11-23 06:45:54,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 428 to 358. [2018-11-23 06:45:54,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 358 states. [2018-11-23 06:45:54,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 358 states to 358 states and 515 transitions. [2018-11-23 06:45:54,929 INFO L78 Accepts]: Start accepts. Automaton has 358 states and 515 transitions. Word has length 48 [2018-11-23 06:45:54,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:54,930 INFO L480 AbstractCegarLoop]: Abstraction has 358 states and 515 transitions. [2018-11-23 06:45:54,930 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 06:45:54,930 INFO L276 IsEmpty]: Start isEmpty. Operand 358 states and 515 transitions. [2018-11-23 06:45:54,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-23 06:45:54,931 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:54,932 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:54,932 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:54,932 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:54,932 INFO L82 PathProgramCache]: Analyzing trace with hash -1006607239, now seen corresponding path program 1 times [2018-11-23 06:45:54,932 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:45:54,932 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:45:54,953 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:54,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:54,989 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:55,097 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-23 06:45:55,097 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:45:55,098 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:45:55,098 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-11-23 06:45:55,099 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-23 06:45:55,099 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-23 06:45:55,099 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-11-23 06:45:55,099 INFO L87 Difference]: Start difference. First operand 358 states and 515 transitions. Second operand 13 states. [2018-11-23 06:45:55,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:55,519 INFO L93 Difference]: Finished difference Result 425 states and 606 transitions. [2018-11-23 06:45:55,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 06:45:55,520 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 48 [2018-11-23 06:45:55,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:55,522 INFO L225 Difference]: With dead ends: 425 [2018-11-23 06:45:55,522 INFO L226 Difference]: Without dead ends: 392 [2018-11-23 06:45:55,522 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2018-11-23 06:45:55,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2018-11-23 06:45:55,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 375. [2018-11-23 06:45:55,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 375 states. [2018-11-23 06:45:55,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 375 states to 375 states and 534 transitions. [2018-11-23 06:45:55,543 INFO L78 Accepts]: Start accepts. Automaton has 375 states and 534 transitions. Word has length 48 [2018-11-23 06:45:55,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:55,543 INFO L480 AbstractCegarLoop]: Abstraction has 375 states and 534 transitions. [2018-11-23 06:45:55,543 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-23 06:45:55,544 INFO L276 IsEmpty]: Start isEmpty. Operand 375 states and 534 transitions. [2018-11-23 06:45:55,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-23 06:45:55,545 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:55,545 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:55,545 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:55,545 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:55,545 INFO L82 PathProgramCache]: Analyzing trace with hash 1305820667, now seen corresponding path program 1 times [2018-11-23 06:45:55,546 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:45:55,546 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:45:55,568 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:55,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:55,587 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:55,629 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 06:45:55,629 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:45:55,662 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 06:45:55,663 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:55,663 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 06:45:55,674 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:55,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:55,689 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:55,696 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 06:45:55,696 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:45:55,751 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 06:45:55,767 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-23 06:45:55,767 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9] total 9 [2018-11-23 06:45:55,767 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 06:45:55,767 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 06:45:55,767 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-11-23 06:45:55,768 INFO L87 Difference]: Start difference. First operand 375 states and 534 transitions. Second operand 9 states. [2018-11-23 06:45:55,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:55,936 INFO L93 Difference]: Finished difference Result 810 states and 1190 transitions. [2018-11-23 06:45:55,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 06:45:55,937 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 48 [2018-11-23 06:45:55,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:55,939 INFO L225 Difference]: With dead ends: 810 [2018-11-23 06:45:55,939 INFO L226 Difference]: Without dead ends: 695 [2018-11-23 06:45:55,940 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 193 GetRequests, 179 SyntacticMatches, 4 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-11-23 06:45:55,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 695 states. [2018-11-23 06:45:55,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 695 to 438. [2018-11-23 06:45:55,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 438 states. [2018-11-23 06:45:55,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 438 states to 438 states and 621 transitions. [2018-11-23 06:45:55,967 INFO L78 Accepts]: Start accepts. Automaton has 438 states and 621 transitions. Word has length 48 [2018-11-23 06:45:55,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:55,968 INFO L480 AbstractCegarLoop]: Abstraction has 438 states and 621 transitions. [2018-11-23 06:45:55,968 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 06:45:55,968 INFO L276 IsEmpty]: Start isEmpty. Operand 438 states and 621 transitions. [2018-11-23 06:45:55,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-23 06:45:55,969 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:55,970 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:55,970 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:55,970 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:55,970 INFO L82 PathProgramCache]: Analyzing trace with hash 1698847677, now seen corresponding path program 1 times [2018-11-23 06:45:55,970 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:45:55,970 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:45:55,990 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:56,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:56,021 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:56,095 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 06:45:56,095 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:45:56,270 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:45:56,270 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 06:45:56,285 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:56,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:56,306 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:56,315 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 06:45:56,315 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:45:56,349 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 06:45:56,349 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-11-23 06:45:56,349 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-23 06:45:56,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-23 06:45:56,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2018-11-23 06:45:56,350 INFO L87 Difference]: Start difference. First operand 438 states and 621 transitions. Second operand 11 states. [2018-11-23 06:45:56,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:56,694 INFO L93 Difference]: Finished difference Result 492 states and 695 transitions. [2018-11-23 06:45:56,694 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-23 06:45:56,694 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 48 [2018-11-23 06:45:56,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:56,696 INFO L225 Difference]: With dead ends: 492 [2018-11-23 06:45:56,697 INFO L226 Difference]: Without dead ends: 459 [2018-11-23 06:45:56,697 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 111 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=62, Invalid=358, Unknown=0, NotChecked=0, Total=420 [2018-11-23 06:45:56,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 459 states. [2018-11-23 06:45:56,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 459 to 442. [2018-11-23 06:45:56,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 442 states. [2018-11-23 06:45:56,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 442 states to 442 states and 623 transitions. [2018-11-23 06:45:56,728 INFO L78 Accepts]: Start accepts. Automaton has 442 states and 623 transitions. Word has length 48 [2018-11-23 06:45:56,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:56,728 INFO L480 AbstractCegarLoop]: Abstraction has 442 states and 623 transitions. [2018-11-23 06:45:56,728 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-23 06:45:56,728 INFO L276 IsEmpty]: Start isEmpty. Operand 442 states and 623 transitions. [2018-11-23 06:45:56,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-23 06:45:56,729 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:56,730 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:56,730 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:56,730 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:56,730 INFO L82 PathProgramCache]: Analyzing trace with hash -294368905, now seen corresponding path program 1 times [2018-11-23 06:45:56,730 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:45:56,730 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:45:56,749 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:56,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:56,796 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:56,892 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 06:45:56,892 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:45:56,897 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:45:56,897 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-23 06:45:56,897 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 06:45:56,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 06:45:56,898 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-11-23 06:45:56,898 INFO L87 Difference]: Start difference. First operand 442 states and 623 transitions. Second operand 12 states. [2018-11-23 06:45:57,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:57,269 INFO L93 Difference]: Finished difference Result 545 states and 757 transitions. [2018-11-23 06:45:57,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 06:45:57,270 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 48 [2018-11-23 06:45:57,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:57,272 INFO L225 Difference]: With dead ends: 545 [2018-11-23 06:45:57,272 INFO L226 Difference]: Without dead ends: 446 [2018-11-23 06:45:57,273 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=282, Unknown=0, NotChecked=0, Total=342 [2018-11-23 06:45:57,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 446 states. [2018-11-23 06:45:57,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 446 to 411. [2018-11-23 06:45:57,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 411 states. [2018-11-23 06:45:57,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 411 states to 411 states and 575 transitions. [2018-11-23 06:45:57,295 INFO L78 Accepts]: Start accepts. Automaton has 411 states and 575 transitions. Word has length 48 [2018-11-23 06:45:57,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:57,295 INFO L480 AbstractCegarLoop]: Abstraction has 411 states and 575 transitions. [2018-11-23 06:45:57,295 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 06:45:57,296 INFO L276 IsEmpty]: Start isEmpty. Operand 411 states and 575 transitions. [2018-11-23 06:45:57,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-23 06:45:57,297 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:57,297 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:57,297 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:57,297 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:57,297 INFO L82 PathProgramCache]: Analyzing trace with hash -1883881285, now seen corresponding path program 1 times [2018-11-23 06:45:57,297 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:45:57,298 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:45:57,316 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:57,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:57,380 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:57,438 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-23 06:45:57,438 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:45:57,440 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:45:57,440 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 06:45:57,440 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:45:57,441 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:45:57,441 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:45:57,441 INFO L87 Difference]: Start difference. First operand 411 states and 575 transitions. Second operand 6 states. [2018-11-23 06:45:58,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:45:58,776 INFO L93 Difference]: Finished difference Result 452 states and 624 transitions. [2018-11-23 06:45:58,776 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 06:45:58,776 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 48 [2018-11-23 06:45:58,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:45:58,778 INFO L225 Difference]: With dead ends: 452 [2018-11-23 06:45:58,779 INFO L226 Difference]: Without dead ends: 450 [2018-11-23 06:45:58,779 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-23 06:45:58,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 450 states. [2018-11-23 06:45:58,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 450 to 417. [2018-11-23 06:45:58,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 417 states. [2018-11-23 06:45:58,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 417 states to 417 states and 582 transitions. [2018-11-23 06:45:58,803 INFO L78 Accepts]: Start accepts. Automaton has 417 states and 582 transitions. Word has length 48 [2018-11-23 06:45:58,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:45:58,804 INFO L480 AbstractCegarLoop]: Abstraction has 417 states and 582 transitions. [2018-11-23 06:45:58,804 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:45:58,804 INFO L276 IsEmpty]: Start isEmpty. Operand 417 states and 582 transitions. [2018-11-23 06:45:58,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-23 06:45:58,805 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:45:58,805 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:45:58,805 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:45:58,805 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:45:58,805 INFO L82 PathProgramCache]: Analyzing trace with hash -1826622983, now seen corresponding path program 1 times [2018-11-23 06:45:58,806 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:45:58,806 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:45:58,826 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:45:58,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:45:58,865 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:45:58,896 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-23 06:45:58,896 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:45:58,897 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:45:58,898 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 06:45:58,898 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:45:58,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:45:58,898 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:45:58,898 INFO L87 Difference]: Start difference. First operand 417 states and 582 transitions. Second operand 6 states. [2018-11-23 06:46:03,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:46:03,031 INFO L93 Difference]: Finished difference Result 436 states and 601 transitions. [2018-11-23 06:46:03,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 06:46:03,032 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 48 [2018-11-23 06:46:03,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:46:03,033 INFO L225 Difference]: With dead ends: 436 [2018-11-23 06:46:03,033 INFO L226 Difference]: Without dead ends: 434 [2018-11-23 06:46:03,034 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-23 06:46:03,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434 states. [2018-11-23 06:46:03,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434 to 415. [2018-11-23 06:46:03,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 415 states. [2018-11-23 06:46:03,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 415 states to 415 states and 578 transitions. [2018-11-23 06:46:03,059 INFO L78 Accepts]: Start accepts. Automaton has 415 states and 578 transitions. Word has length 48 [2018-11-23 06:46:03,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:46:03,059 INFO L480 AbstractCegarLoop]: Abstraction has 415 states and 578 transitions. [2018-11-23 06:46:03,059 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:46:03,059 INFO L276 IsEmpty]: Start isEmpty. Operand 415 states and 578 transitions. [2018-11-23 06:46:03,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 06:46:03,061 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:46:03,061 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:46:03,061 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:46:03,061 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:46:03,061 INFO L82 PathProgramCache]: Analyzing trace with hash 609641055, now seen corresponding path program 1 times [2018-11-23 06:46:03,061 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:46:03,062 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:46:03,082 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:03,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:03,105 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:03,144 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-23 06:46:03,144 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:46:03,146 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:46:03,146 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 06:46:03,146 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 06:46:03,147 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 06:46:03,147 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-23 06:46:03,147 INFO L87 Difference]: Start difference. First operand 415 states and 578 transitions. Second operand 7 states. [2018-11-23 06:46:03,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:46:03,393 INFO L93 Difference]: Finished difference Result 632 states and 907 transitions. [2018-11-23 06:46:03,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 06:46:03,393 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 49 [2018-11-23 06:46:03,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:46:03,395 INFO L225 Difference]: With dead ends: 632 [2018-11-23 06:46:03,395 INFO L226 Difference]: Without dead ends: 537 [2018-11-23 06:46:03,396 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-11-23 06:46:03,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states. [2018-11-23 06:46:03,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 410. [2018-11-23 06:46:03,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 410 states. [2018-11-23 06:46:03,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 410 states to 410 states and 569 transitions. [2018-11-23 06:46:03,418 INFO L78 Accepts]: Start accepts. Automaton has 410 states and 569 transitions. Word has length 49 [2018-11-23 06:46:03,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:46:03,419 INFO L480 AbstractCegarLoop]: Abstraction has 410 states and 569 transitions. [2018-11-23 06:46:03,419 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 06:46:03,419 INFO L276 IsEmpty]: Start isEmpty. Operand 410 states and 569 transitions. [2018-11-23 06:46:03,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 06:46:03,419 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:46:03,420 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:46:03,420 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:46:03,420 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:46:03,420 INFO L82 PathProgramCache]: Analyzing trace with hash 666899357, now seen corresponding path program 1 times [2018-11-23 06:46:03,420 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:46:03,420 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:46:03,464 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:03,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:03,499 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:03,511 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-23 06:46:03,512 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:46:03,516 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:46:03,517 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 06:46:03,517 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 06:46:03,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 06:46:03,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:46:03,517 INFO L87 Difference]: Start difference. First operand 410 states and 569 transitions. Second operand 4 states. [2018-11-23 06:46:03,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:46:03,576 INFO L93 Difference]: Finished difference Result 663 states and 957 transitions. [2018-11-23 06:46:03,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 06:46:03,576 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 49 [2018-11-23 06:46:03,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:46:03,578 INFO L225 Difference]: With dead ends: 663 [2018-11-23 06:46:03,579 INFO L226 Difference]: Without dead ends: 530 [2018-11-23 06:46:03,579 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 46 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:46:03,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 530 states. [2018-11-23 06:46:03,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 530 to 474. [2018-11-23 06:46:03,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 474 states. [2018-11-23 06:46:03,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 474 states to 474 states and 655 transitions. [2018-11-23 06:46:03,600 INFO L78 Accepts]: Start accepts. Automaton has 474 states and 655 transitions. Word has length 49 [2018-11-23 06:46:03,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:46:03,601 INFO L480 AbstractCegarLoop]: Abstraction has 474 states and 655 transitions. [2018-11-23 06:46:03,601 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 06:46:03,601 INFO L276 IsEmpty]: Start isEmpty. Operand 474 states and 655 transitions. [2018-11-23 06:46:03,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 06:46:03,602 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:46:03,602 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:46:03,602 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:46:03,602 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:46:03,602 INFO L82 PathProgramCache]: Analyzing trace with hash -855742356, now seen corresponding path program 1 times [2018-11-23 06:46:03,603 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:46:03,603 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:46:03,615 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:03,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:03,631 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:03,657 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-23 06:46:03,657 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:46:03,659 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:46:03,659 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 06:46:03,659 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 06:46:03,659 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 06:46:03,660 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:46:03,660 INFO L87 Difference]: Start difference. First operand 474 states and 655 transitions. Second operand 4 states. [2018-11-23 06:46:03,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:46:03,721 INFO L93 Difference]: Finished difference Result 849 states and 1159 transitions. [2018-11-23 06:46:03,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 06:46:03,722 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 49 [2018-11-23 06:46:03,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:46:03,723 INFO L225 Difference]: With dead ends: 849 [2018-11-23 06:46:03,723 INFO L226 Difference]: Without dead ends: 381 [2018-11-23 06:46:03,724 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 46 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:46:03,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 381 states. [2018-11-23 06:46:03,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 381 to 369. [2018-11-23 06:46:03,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 369 states. [2018-11-23 06:46:03,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 369 states to 369 states and 487 transitions. [2018-11-23 06:46:03,745 INFO L78 Accepts]: Start accepts. Automaton has 369 states and 487 transitions. Word has length 49 [2018-11-23 06:46:03,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:46:03,745 INFO L480 AbstractCegarLoop]: Abstraction has 369 states and 487 transitions. [2018-11-23 06:46:03,745 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 06:46:03,745 INFO L276 IsEmpty]: Start isEmpty. Operand 369 states and 487 transitions. [2018-11-23 06:46:03,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-23 06:46:03,746 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:46:03,746 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:46:03,746 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:46:03,747 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:46:03,747 INFO L82 PathProgramCache]: Analyzing trace with hash 849971633, now seen corresponding path program 1 times [2018-11-23 06:46:03,747 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:46:03,747 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:46:03,771 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:03,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:03,789 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:03,806 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-23 06:46:03,806 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:46:03,808 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:46:03,808 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 06:46:03,808 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 06:46:03,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 06:46:03,809 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:46:03,809 INFO L87 Difference]: Start difference. First operand 369 states and 487 transitions. Second operand 5 states. [2018-11-23 06:46:03,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:46:03,841 INFO L93 Difference]: Finished difference Result 376 states and 493 transitions. [2018-11-23 06:46:03,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 06:46:03,841 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2018-11-23 06:46:03,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:46:03,842 INFO L225 Difference]: With dead ends: 376 [2018-11-23 06:46:03,843 INFO L226 Difference]: Without dead ends: 369 [2018-11-23 06:46:03,843 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 46 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:46:03,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 369 states. [2018-11-23 06:46:03,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 369 to 369. [2018-11-23 06:46:03,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 369 states. [2018-11-23 06:46:03,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 369 states to 369 states and 483 transitions. [2018-11-23 06:46:03,864 INFO L78 Accepts]: Start accepts. Automaton has 369 states and 483 transitions. Word has length 50 [2018-11-23 06:46:03,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:46:03,864 INFO L480 AbstractCegarLoop]: Abstraction has 369 states and 483 transitions. [2018-11-23 06:46:03,864 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 06:46:03,864 INFO L276 IsEmpty]: Start isEmpty. Operand 369 states and 483 transitions. [2018-11-23 06:46:03,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-23 06:46:03,865 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:46:03,865 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:46:03,866 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:46:03,866 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:46:03,866 INFO L82 PathProgramCache]: Analyzing trace with hash 1699165264, now seen corresponding path program 1 times [2018-11-23 06:46:03,866 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:46:03,866 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:46:03,880 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:03,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:03,914 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:03,933 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-23 06:46:03,933 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:46:03,935 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:46:03,935 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 06:46:03,935 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 06:46:03,935 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 06:46:03,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:46:03,936 INFO L87 Difference]: Start difference. First operand 369 states and 483 transitions. Second operand 4 states. [2018-11-23 06:46:03,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:46:03,971 INFO L93 Difference]: Finished difference Result 411 states and 536 transitions. [2018-11-23 06:46:03,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 06:46:03,971 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 53 [2018-11-23 06:46:03,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:46:03,973 INFO L225 Difference]: With dead ends: 411 [2018-11-23 06:46:03,973 INFO L226 Difference]: Without dead ends: 386 [2018-11-23 06:46:03,974 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:46:03,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 386 states. [2018-11-23 06:46:03,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 386 to 361. [2018-11-23 06:46:04,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 361 states. [2018-11-23 06:46:04,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 361 states to 361 states and 471 transitions. [2018-11-23 06:46:04,001 INFO L78 Accepts]: Start accepts. Automaton has 361 states and 471 transitions. Word has length 53 [2018-11-23 06:46:04,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:46:04,001 INFO L480 AbstractCegarLoop]: Abstraction has 361 states and 471 transitions. [2018-11-23 06:46:04,001 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 06:46:04,001 INFO L276 IsEmpty]: Start isEmpty. Operand 361 states and 471 transitions. [2018-11-23 06:46:04,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-23 06:46:04,002 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:46:04,002 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:46:04,002 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:46:04,002 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:46:04,002 INFO L82 PathProgramCache]: Analyzing trace with hash 1987036572, now seen corresponding path program 1 times [2018-11-23 06:46:04,003 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:46:04,003 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:46:04,028 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:04,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:04,046 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:04,052 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-23 06:46:04,052 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:46:04,054 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:46:04,054 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 06:46:04,055 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 06:46:04,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 06:46:04,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:46:04,055 INFO L87 Difference]: Start difference. First operand 361 states and 471 transitions. Second operand 4 states. [2018-11-23 06:46:04,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:46:04,081 INFO L93 Difference]: Finished difference Result 378 states and 490 transitions. [2018-11-23 06:46:04,082 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 06:46:04,082 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 54 [2018-11-23 06:46:04,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:46:04,083 INFO L225 Difference]: With dead ends: 378 [2018-11-23 06:46:04,083 INFO L226 Difference]: Without dead ends: 305 [2018-11-23 06:46:04,083 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 51 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:46:04,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 305 states. [2018-11-23 06:46:04,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 305 to 303. [2018-11-23 06:46:04,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 303 states. [2018-11-23 06:46:04,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 303 states to 303 states and 384 transitions. [2018-11-23 06:46:04,096 INFO L78 Accepts]: Start accepts. Automaton has 303 states and 384 transitions. Word has length 54 [2018-11-23 06:46:04,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:46:04,097 INFO L480 AbstractCegarLoop]: Abstraction has 303 states and 384 transitions. [2018-11-23 06:46:04,097 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 06:46:04,097 INFO L276 IsEmpty]: Start isEmpty. Operand 303 states and 384 transitions. [2018-11-23 06:46:04,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-23 06:46:04,098 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:46:04,098 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:46:04,098 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:46:04,098 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:46:04,098 INFO L82 PathProgramCache]: Analyzing trace with hash -1813382670, now seen corresponding path program 1 times [2018-11-23 06:46:04,099 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:46:04,099 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:46:04,115 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:04,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:04,154 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:04,252 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-23 06:46:04,252 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:46:04,253 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:46:04,253 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-11-23 06:46:04,254 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-23 06:46:04,254 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-23 06:46:04,254 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2018-11-23 06:46:04,254 INFO L87 Difference]: Start difference. First operand 303 states and 384 transitions. Second operand 13 states. [2018-11-23 06:46:04,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:46:04,643 INFO L93 Difference]: Finished difference Result 366 states and 462 transitions. [2018-11-23 06:46:04,643 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 06:46:04,643 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 56 [2018-11-23 06:46:04,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:46:04,644 INFO L225 Difference]: With dead ends: 366 [2018-11-23 06:46:04,644 INFO L226 Difference]: Without dead ends: 321 [2018-11-23 06:46:04,645 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=225, Unknown=0, NotChecked=0, Total=272 [2018-11-23 06:46:04,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 321 states. [2018-11-23 06:46:04,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 321 to 298. [2018-11-23 06:46:04,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 298 states. [2018-11-23 06:46:04,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 298 states to 298 states and 376 transitions. [2018-11-23 06:46:04,665 INFO L78 Accepts]: Start accepts. Automaton has 298 states and 376 transitions. Word has length 56 [2018-11-23 06:46:04,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:46:04,665 INFO L480 AbstractCegarLoop]: Abstraction has 298 states and 376 transitions. [2018-11-23 06:46:04,665 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-23 06:46:04,665 INFO L276 IsEmpty]: Start isEmpty. Operand 298 states and 376 transitions. [2018-11-23 06:46:04,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-23 06:46:04,666 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:46:04,666 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:46:04,667 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:46:04,667 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:46:04,667 INFO L82 PathProgramCache]: Analyzing trace with hash -848138954, now seen corresponding path program 1 times [2018-11-23 06:46:04,667 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:46:04,667 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:46:04,685 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:04,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:04,725 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:04,877 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 06:46:04,877 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:46:04,974 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:46:04,974 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 06:46:04,982 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:04,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:04,999 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:05,062 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 06:46:05,062 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:46:05,124 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 06:46:05,124 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-11-23 06:46:05,124 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-23 06:46:05,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-23 06:46:05,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2018-11-23 06:46:05,125 INFO L87 Difference]: Start difference. First operand 298 states and 376 transitions. Second operand 11 states. [2018-11-23 06:46:05,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:46:05,438 INFO L93 Difference]: Finished difference Result 350 states and 443 transitions. [2018-11-23 06:46:05,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-23 06:46:05,439 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2018-11-23 06:46:05,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:46:05,440 INFO L225 Difference]: With dead ends: 350 [2018-11-23 06:46:05,440 INFO L226 Difference]: Without dead ends: 319 [2018-11-23 06:46:05,440 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=65, Invalid=277, Unknown=0, NotChecked=0, Total=342 [2018-11-23 06:46:05,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 319 states. [2018-11-23 06:46:05,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 319 to 296. [2018-11-23 06:46:05,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 296 states. [2018-11-23 06:46:05,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 296 states to 296 states and 372 transitions. [2018-11-23 06:46:05,454 INFO L78 Accepts]: Start accepts. Automaton has 296 states and 372 transitions. Word has length 56 [2018-11-23 06:46:05,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:46:05,455 INFO L480 AbstractCegarLoop]: Abstraction has 296 states and 372 transitions. [2018-11-23 06:46:05,455 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-23 06:46:05,455 INFO L276 IsEmpty]: Start isEmpty. Operand 296 states and 372 transitions. [2018-11-23 06:46:05,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-23 06:46:05,455 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:46:05,456 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:46:05,456 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:46:05,456 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:46:05,456 INFO L82 PathProgramCache]: Analyzing trace with hash 1591720731, now seen corresponding path program 1 times [2018-11-23 06:46:05,456 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:46:05,456 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:46:05,479 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:05,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:05,496 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:05,530 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-23 06:46:05,531 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:46:05,532 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:46:05,532 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 06:46:05,532 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:46:05,532 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:46:05,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:46:05,532 INFO L87 Difference]: Start difference. First operand 296 states and 372 transitions. Second operand 6 states. [2018-11-23 06:46:05,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:46:05,668 INFO L93 Difference]: Finished difference Result 378 states and 489 transitions. [2018-11-23 06:46:05,668 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 06:46:05,669 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 55 [2018-11-23 06:46:05,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:46:05,670 INFO L225 Difference]: With dead ends: 378 [2018-11-23 06:46:05,670 INFO L226 Difference]: Without dead ends: 331 [2018-11-23 06:46:05,671 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-23 06:46:05,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2018-11-23 06:46:05,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 302. [2018-11-23 06:46:05,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 302 states. [2018-11-23 06:46:05,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 302 states to 302 states and 378 transitions. [2018-11-23 06:46:05,695 INFO L78 Accepts]: Start accepts. Automaton has 302 states and 378 transitions. Word has length 55 [2018-11-23 06:46:05,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:46:05,695 INFO L480 AbstractCegarLoop]: Abstraction has 302 states and 378 transitions. [2018-11-23 06:46:05,696 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:46:05,696 INFO L276 IsEmpty]: Start isEmpty. Operand 302 states and 378 transitions. [2018-11-23 06:46:05,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-23 06:46:05,697 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:46:05,697 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:46:05,697 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:46:05,697 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:46:05,697 INFO L82 PathProgramCache]: Analyzing trace with hash -1018041358, now seen corresponding path program 1 times [2018-11-23 06:46:05,697 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:46:05,698 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:46:05,717 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:05,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:05,742 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:05,797 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-23 06:46:05,797 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:46:05,831 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 06:46:05,832 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:46:05,832 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 06:46:05,839 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:05,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:05,863 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:05,868 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-23 06:46:05,868 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:46:05,901 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 06:46:05,917 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-23 06:46:05,917 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10] total 10 [2018-11-23 06:46:05,918 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 06:46:05,918 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 06:46:05,918 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-11-23 06:46:05,918 INFO L87 Difference]: Start difference. First operand 302 states and 378 transitions. Second operand 10 states. [2018-11-23 06:46:06,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:46:06,040 INFO L93 Difference]: Finished difference Result 407 states and 501 transitions. [2018-11-23 06:46:06,040 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 06:46:06,040 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 56 [2018-11-23 06:46:06,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:46:06,041 INFO L225 Difference]: With dead ends: 407 [2018-11-23 06:46:06,041 INFO L226 Difference]: Without dead ends: 329 [2018-11-23 06:46:06,042 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 227 GetRequests, 210 SyntacticMatches, 4 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2018-11-23 06:46:06,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329 states. [2018-11-23 06:46:06,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 329 to 280. [2018-11-23 06:46:06,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 280 states. [2018-11-23 06:46:06,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 280 states to 280 states and 352 transitions. [2018-11-23 06:46:06,056 INFO L78 Accepts]: Start accepts. Automaton has 280 states and 352 transitions. Word has length 56 [2018-11-23 06:46:06,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:46:06,056 INFO L480 AbstractCegarLoop]: Abstraction has 280 states and 352 transitions. [2018-11-23 06:46:06,056 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 06:46:06,056 INFO L276 IsEmpty]: Start isEmpty. Operand 280 states and 352 transitions. [2018-11-23 06:46:06,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-23 06:46:06,057 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:46:06,057 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:46:06,057 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:46:06,057 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:46:06,057 INFO L82 PathProgramCache]: Analyzing trace with hash -1440743184, now seen corresponding path program 1 times [2018-11-23 06:46:06,058 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:46:06,058 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:46:06,075 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:06,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:06,118 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:08,229 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 06:46:08,230 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:46:08,231 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:46:08,231 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-23 06:46:08,231 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 06:46:08,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 06:46:08,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=110, Unknown=1, NotChecked=0, Total=132 [2018-11-23 06:46:08,232 INFO L87 Difference]: Start difference. First operand 280 states and 352 transitions. Second operand 12 states. [2018-11-23 06:46:18,016 WARN L180 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 25 [2018-11-23 06:46:24,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:46:24,319 INFO L93 Difference]: Finished difference Result 324 states and 406 transitions. [2018-11-23 06:46:24,320 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-23 06:46:24,321 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2018-11-23 06:46:24,321 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:46:24,321 INFO L225 Difference]: With dead ends: 324 [2018-11-23 06:46:24,321 INFO L226 Difference]: Without dead ends: 291 [2018-11-23 06:46:24,322 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 16.0s TimeCoverageRelationStatistics Valid=100, Invalid=401, Unknown=5, NotChecked=0, Total=506 [2018-11-23 06:46:24,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2018-11-23 06:46:24,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 278. [2018-11-23 06:46:24,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 278 states. [2018-11-23 06:46:24,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 278 states to 278 states and 348 transitions. [2018-11-23 06:46:24,344 INFO L78 Accepts]: Start accepts. Automaton has 278 states and 348 transitions. Word has length 56 [2018-11-23 06:46:24,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:46:24,345 INFO L480 AbstractCegarLoop]: Abstraction has 278 states and 348 transitions. [2018-11-23 06:46:24,345 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 06:46:24,345 INFO L276 IsEmpty]: Start isEmpty. Operand 278 states and 348 transitions. [2018-11-23 06:46:24,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-23 06:46:24,346 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:46:24,346 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:46:24,346 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:46:24,346 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:46:24,346 INFO L82 PathProgramCache]: Analyzing trace with hash -475499468, now seen corresponding path program 1 times [2018-11-23 06:46:24,347 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:46:24,347 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:46:24,368 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:24,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:24,415 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:29,280 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-23 06:46:29,280 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:46:29,285 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:46:29,285 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 06:46:29,285 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 06:46:29,285 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 06:46:29,285 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=37, Unknown=1, NotChecked=0, Total=56 [2018-11-23 06:46:29,286 INFO L87 Difference]: Start difference. First operand 278 states and 348 transitions. Second operand 8 states. [2018-11-23 06:46:42,229 WARN L180 SmtUtils]: Spent 4.85 s on a formula simplification. DAG size of input: 25 DAG size of output: 17 [2018-11-23 06:46:42,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:46:42,334 INFO L93 Difference]: Finished difference Result 301 states and 371 transitions. [2018-11-23 06:46:42,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 06:46:42,335 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 56 [2018-11-23 06:46:42,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:46:42,336 INFO L225 Difference]: With dead ends: 301 [2018-11-23 06:46:42,336 INFO L226 Difference]: Without dead ends: 299 [2018-11-23 06:46:42,337 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 11.7s TimeCoverageRelationStatistics Valid=27, Invalid=61, Unknown=2, NotChecked=0, Total=90 [2018-11-23 06:46:42,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 299 states. [2018-11-23 06:46:42,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 299 to 283. [2018-11-23 06:46:42,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 283 states. [2018-11-23 06:46:42,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 283 states to 283 states and 353 transitions. [2018-11-23 06:46:42,362 INFO L78 Accepts]: Start accepts. Automaton has 283 states and 353 transitions. Word has length 56 [2018-11-23 06:46:42,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:46:42,362 INFO L480 AbstractCegarLoop]: Abstraction has 283 states and 353 transitions. [2018-11-23 06:46:42,362 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 06:46:42,362 INFO L276 IsEmpty]: Start isEmpty. Operand 283 states and 353 transitions. [2018-11-23 06:46:42,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-23 06:46:42,363 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:46:42,363 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:46:42,364 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:46:42,364 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:46:42,364 INFO L82 PathProgramCache]: Analyzing trace with hash -695289963, now seen corresponding path program 1 times [2018-11-23 06:46:42,364 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:46:42,364 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:46:42,388 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:42,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:42,411 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:42,507 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 06:46:42,507 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:46:42,513 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:46:42,513 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-23 06:46:42,513 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 06:46:42,513 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 06:46:42,513 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2018-11-23 06:46:42,514 INFO L87 Difference]: Start difference. First operand 283 states and 353 transitions. Second operand 12 states. [2018-11-23 06:46:42,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:46:42,884 INFO L93 Difference]: Finished difference Result 352 states and 443 transitions. [2018-11-23 06:46:42,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 06:46:42,885 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2018-11-23 06:46:42,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:46:42,886 INFO L225 Difference]: With dead ends: 352 [2018-11-23 06:46:42,886 INFO L226 Difference]: Without dead ends: 327 [2018-11-23 06:46:42,886 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-11-23 06:46:42,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2018-11-23 06:46:42,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 299. [2018-11-23 06:46:42,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 299 states. [2018-11-23 06:46:42,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 299 states to 299 states and 375 transitions. [2018-11-23 06:46:42,902 INFO L78 Accepts]: Start accepts. Automaton has 299 states and 375 transitions. Word has length 56 [2018-11-23 06:46:42,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:46:42,903 INFO L480 AbstractCegarLoop]: Abstraction has 299 states and 375 transitions. [2018-11-23 06:46:42,903 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 06:46:42,903 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 375 transitions. [2018-11-23 06:46:42,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-23 06:46:42,904 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:46:42,904 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:46:42,904 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:46:42,904 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:46:42,904 INFO L82 PathProgramCache]: Analyzing trace with hash 1684269273, now seen corresponding path program 1 times [2018-11-23 06:46:42,905 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:46:42,905 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:46:42,924 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:42,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:42,943 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:43,006 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-23 06:46:43,007 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:46:43,008 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:46:43,008 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 06:46:43,008 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 06:46:43,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 06:46:43,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-23 06:46:43,008 INFO L87 Difference]: Start difference. First operand 299 states and 375 transitions. Second operand 8 states. [2018-11-23 06:46:43,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:46:43,188 INFO L93 Difference]: Finished difference Result 367 states and 465 transitions. [2018-11-23 06:46:43,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 06:46:43,188 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 56 [2018-11-23 06:46:43,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:46:43,189 INFO L225 Difference]: With dead ends: 367 [2018-11-23 06:46:43,189 INFO L226 Difference]: Without dead ends: 348 [2018-11-23 06:46:43,190 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-11-23 06:46:43,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 348 states. [2018-11-23 06:46:43,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 348 to 298. [2018-11-23 06:46:43,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 298 states. [2018-11-23 06:46:43,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 298 states to 298 states and 382 transitions. [2018-11-23 06:46:43,209 INFO L78 Accepts]: Start accepts. Automaton has 298 states and 382 transitions. Word has length 56 [2018-11-23 06:46:43,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:46:43,210 INFO L480 AbstractCegarLoop]: Abstraction has 298 states and 382 transitions. [2018-11-23 06:46:43,210 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 06:46:43,210 INFO L276 IsEmpty]: Start isEmpty. Operand 298 states and 382 transitions. [2018-11-23 06:46:43,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-23 06:46:43,211 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:46:43,211 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:46:43,211 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:46:43,211 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:46:43,211 INFO L82 PathProgramCache]: Analyzing trace with hash -2092005707, now seen corresponding path program 1 times [2018-11-23 06:46:43,211 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:46:43,212 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:46:43,225 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:46:43,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:46:43,272 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:46:53,434 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-23 06:46:53,434 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:46:53,436 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:46:53,436 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 06:46:53,436 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 06:46:53,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 06:46:53,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=37, Unknown=5, NotChecked=0, Total=56 [2018-11-23 06:46:53,437 INFO L87 Difference]: Start difference. First operand 298 states and 382 transitions. Second operand 8 states. [2018-11-23 06:47:11,770 WARN L180 SmtUtils]: Spent 2.05 s on a formula simplification that was a NOOP. DAG size: 21 [2018-11-23 06:47:22,760 WARN L180 SmtUtils]: Spent 6.86 s on a formula simplification. DAG size of input: 27 DAG size of output: 24 [2018-11-23 06:47:33,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:33,070 INFO L93 Difference]: Finished difference Result 314 states and 397 transitions. [2018-11-23 06:47:33,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 06:47:33,071 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 57 [2018-11-23 06:47:33,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:33,072 INFO L225 Difference]: With dead ends: 314 [2018-11-23 06:47:33,072 INFO L226 Difference]: Without dead ends: 312 [2018-11-23 06:47:33,072 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 29.2s TimeCoverageRelationStatistics Valid=33, Invalid=89, Unknown=10, NotChecked=0, Total=132 [2018-11-23 06:47:33,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states. [2018-11-23 06:47:33,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 297. [2018-11-23 06:47:33,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297 states. [2018-11-23 06:47:33,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297 states to 297 states and 380 transitions. [2018-11-23 06:47:33,088 INFO L78 Accepts]: Start accepts. Automaton has 297 states and 380 transitions. Word has length 57 [2018-11-23 06:47:33,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:33,089 INFO L480 AbstractCegarLoop]: Abstraction has 297 states and 380 transitions. [2018-11-23 06:47:33,089 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 06:47:33,089 INFO L276 IsEmpty]: Start isEmpty. Operand 297 states and 380 transitions. [2018-11-23 06:47:33,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-23 06:47:33,090 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:33,090 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:33,090 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:33,090 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:33,090 INFO L82 PathProgramCache]: Analyzing trace with hash -364789831, now seen corresponding path program 1 times [2018-11-23 06:47:33,090 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:33,091 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:33,111 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:33,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:33,128 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:33,179 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-23 06:47:33,179 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:47:33,180 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:47:33,180 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 06:47:33,180 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 06:47:33,181 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 06:47:33,181 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:47:33,181 INFO L87 Difference]: Start difference. First operand 297 states and 380 transitions. Second operand 5 states. [2018-11-23 06:47:33,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:33,254 INFO L93 Difference]: Finished difference Result 332 states and 420 transitions. [2018-11-23 06:47:33,254 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 06:47:33,254 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 57 [2018-11-23 06:47:33,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:33,255 INFO L225 Difference]: With dead ends: 332 [2018-11-23 06:47:33,255 INFO L226 Difference]: Without dead ends: 309 [2018-11-23 06:47:33,255 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:47:33,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2018-11-23 06:47:33,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 297. [2018-11-23 06:47:33,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297 states. [2018-11-23 06:47:33,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297 states to 297 states and 378 transitions. [2018-11-23 06:47:33,275 INFO L78 Accepts]: Start accepts. Automaton has 297 states and 378 transitions. Word has length 57 [2018-11-23 06:47:33,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:33,275 INFO L480 AbstractCegarLoop]: Abstraction has 297 states and 378 transitions. [2018-11-23 06:47:33,275 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 06:47:33,276 INFO L276 IsEmpty]: Start isEmpty. Operand 297 states and 378 transitions. [2018-11-23 06:47:33,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-23 06:47:33,276 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:33,276 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:33,276 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:33,276 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:33,276 INFO L82 PathProgramCache]: Analyzing trace with hash 306992977, now seen corresponding path program 1 times [2018-11-23 06:47:33,277 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:33,277 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:33,290 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:33,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:33,305 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:33,311 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-23 06:47:33,311 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:47:33,312 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:47:33,312 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 06:47:33,312 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 06:47:33,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 06:47:33,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:47:33,313 INFO L87 Difference]: Start difference. First operand 297 states and 378 transitions. Second operand 4 states. [2018-11-23 06:47:33,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:33,337 INFO L93 Difference]: Finished difference Result 306 states and 386 transitions. [2018-11-23 06:47:33,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 06:47:33,337 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 58 [2018-11-23 06:47:33,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:33,338 INFO L225 Difference]: With dead ends: 306 [2018-11-23 06:47:33,338 INFO L226 Difference]: Without dead ends: 264 [2018-11-23 06:47:33,339 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:47:33,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 264 states. [2018-11-23 06:47:33,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 264 to 254. [2018-11-23 06:47:33,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-11-23 06:47:33,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 316 transitions. [2018-11-23 06:47:33,353 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 316 transitions. Word has length 58 [2018-11-23 06:47:33,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:33,353 INFO L480 AbstractCegarLoop]: Abstraction has 254 states and 316 transitions. [2018-11-23 06:47:33,354 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 06:47:33,354 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 316 transitions. [2018-11-23 06:47:33,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-11-23 06:47:33,354 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:33,354 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:33,354 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:33,355 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:33,355 INFO L82 PathProgramCache]: Analyzing trace with hash 1560523616, now seen corresponding path program 1 times [2018-11-23 06:47:33,355 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:33,355 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:33,368 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:33,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:33,387 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:33,436 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-23 06:47:33,437 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:47:33,438 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:47:33,438 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 06:47:33,438 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 06:47:33,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 06:47:33,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-23 06:47:33,438 INFO L87 Difference]: Start difference. First operand 254 states and 316 transitions. Second operand 8 states. [2018-11-23 06:47:33,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:33,636 INFO L93 Difference]: Finished difference Result 348 states and 445 transitions. [2018-11-23 06:47:33,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 06:47:33,636 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 62 [2018-11-23 06:47:33,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:33,638 INFO L225 Difference]: With dead ends: 348 [2018-11-23 06:47:33,638 INFO L226 Difference]: Without dead ends: 308 [2018-11-23 06:47:33,638 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-11-23 06:47:33,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 308 states. [2018-11-23 06:47:33,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 308 to 286. [2018-11-23 06:47:33,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 286 states. [2018-11-23 06:47:33,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 286 states to 286 states and 361 transitions. [2018-11-23 06:47:33,653 INFO L78 Accepts]: Start accepts. Automaton has 286 states and 361 transitions. Word has length 62 [2018-11-23 06:47:33,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:33,653 INFO L480 AbstractCegarLoop]: Abstraction has 286 states and 361 transitions. [2018-11-23 06:47:33,653 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 06:47:33,653 INFO L276 IsEmpty]: Start isEmpty. Operand 286 states and 361 transitions. [2018-11-23 06:47:33,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-23 06:47:33,654 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:33,654 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:33,654 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:33,654 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:33,654 INFO L82 PathProgramCache]: Analyzing trace with hash -1628619175, now seen corresponding path program 1 times [2018-11-23 06:47:33,654 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:33,654 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:33,679 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:33,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:33,699 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:33,716 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-23 06:47:33,716 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:47:33,717 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:47:33,718 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 06:47:33,718 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:47:33,718 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:47:33,718 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:47:33,718 INFO L87 Difference]: Start difference. First operand 286 states and 361 transitions. Second operand 6 states. [2018-11-23 06:47:33,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:33,791 INFO L93 Difference]: Finished difference Result 377 states and 489 transitions. [2018-11-23 06:47:33,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 06:47:33,792 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 64 [2018-11-23 06:47:33,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:33,792 INFO L225 Difference]: With dead ends: 377 [2018-11-23 06:47:33,792 INFO L226 Difference]: Without dead ends: 304 [2018-11-23 06:47:33,793 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-23 06:47:33,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 304 states. [2018-11-23 06:47:33,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 304 to 268. [2018-11-23 06:47:33,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 268 states. [2018-11-23 06:47:33,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 322 transitions. [2018-11-23 06:47:33,812 INFO L78 Accepts]: Start accepts. Automaton has 268 states and 322 transitions. Word has length 64 [2018-11-23 06:47:33,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:33,812 INFO L480 AbstractCegarLoop]: Abstraction has 268 states and 322 transitions. [2018-11-23 06:47:33,812 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:47:33,812 INFO L276 IsEmpty]: Start isEmpty. Operand 268 states and 322 transitions. [2018-11-23 06:47:33,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-23 06:47:33,813 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:33,813 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:33,813 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:33,813 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:33,813 INFO L82 PathProgramCache]: Analyzing trace with hash 1905751366, now seen corresponding path program 1 times [2018-11-23 06:47:33,813 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:33,813 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:33,826 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:33,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:33,870 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:33,907 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-23 06:47:33,907 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:47:33,908 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:47:33,908 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 06:47:33,908 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:47:33,908 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:47:33,909 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:47:33,909 INFO L87 Difference]: Start difference. First operand 268 states and 322 transitions. Second operand 6 states. [2018-11-23 06:47:33,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:33,955 INFO L93 Difference]: Finished difference Result 309 states and 374 transitions. [2018-11-23 06:47:33,955 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 06:47:33,955 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 64 [2018-11-23 06:47:33,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:33,956 INFO L225 Difference]: With dead ends: 309 [2018-11-23 06:47:33,957 INFO L226 Difference]: Without dead ends: 307 [2018-11-23 06:47:33,957 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-23 06:47:33,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 307 states. [2018-11-23 06:47:33,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 307 to 277. [2018-11-23 06:47:33,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 277 states. [2018-11-23 06:47:33,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 277 states to 277 states and 333 transitions. [2018-11-23 06:47:33,970 INFO L78 Accepts]: Start accepts. Automaton has 277 states and 333 transitions. Word has length 64 [2018-11-23 06:47:33,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:33,971 INFO L480 AbstractCegarLoop]: Abstraction has 277 states and 333 transitions. [2018-11-23 06:47:33,971 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:47:33,971 INFO L276 IsEmpty]: Start isEmpty. Operand 277 states and 333 transitions. [2018-11-23 06:47:33,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-23 06:47:33,971 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:33,971 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:33,972 INFO L423 AbstractCegarLoop]: === Iteration 32 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:33,972 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:33,972 INFO L82 PathProgramCache]: Analyzing trace with hash 1397816770, now seen corresponding path program 1 times [2018-11-23 06:47:33,972 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:33,972 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 40 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:33,985 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:34,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:34,028 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:34,044 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-23 06:47:34,044 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:47:34,045 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:47:34,046 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 06:47:34,046 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:47:34,046 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:47:34,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:47:34,046 INFO L87 Difference]: Start difference. First operand 277 states and 333 transitions. Second operand 6 states. [2018-11-23 06:47:34,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:34,087 INFO L93 Difference]: Finished difference Result 306 states and 365 transitions. [2018-11-23 06:47:34,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 06:47:34,088 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 64 [2018-11-23 06:47:34,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:34,089 INFO L225 Difference]: With dead ends: 306 [2018-11-23 06:47:34,089 INFO L226 Difference]: Without dead ends: 304 [2018-11-23 06:47:34,089 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-23 06:47:34,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 304 states. [2018-11-23 06:47:34,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 304 to 281. [2018-11-23 06:47:34,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 281 states. [2018-11-23 06:47:34,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 281 states to 281 states and 336 transitions. [2018-11-23 06:47:34,104 INFO L78 Accepts]: Start accepts. Automaton has 281 states and 336 transitions. Word has length 64 [2018-11-23 06:47:34,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:34,105 INFO L480 AbstractCegarLoop]: Abstraction has 281 states and 336 transitions. [2018-11-23 06:47:34,105 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:47:34,105 INFO L276 IsEmpty]: Start isEmpty. Operand 281 states and 336 transitions. [2018-11-23 06:47:34,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-11-23 06:47:34,105 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:34,105 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:34,105 INFO L423 AbstractCegarLoop]: === Iteration 33 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:34,106 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:34,106 INFO L82 PathProgramCache]: Analyzing trace with hash -186874661, now seen corresponding path program 1 times [2018-11-23 06:47:34,106 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:34,106 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:34,121 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:34,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:34,188 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:34,912 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-23 06:47:34,912 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:47:35,291 WARN L180 SmtUtils]: Spent 257.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 67 [2018-11-23 06:47:36,999 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-23 06:47:37,001 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:47:37,001 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 06:47:37,008 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:37,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:37,049 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:37,237 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-11-23 06:47:37,237 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:47:37,253 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-23 06:47:37,253 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [14, 15] total 26 [2018-11-23 06:47:37,254 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-11-23 06:47:37,254 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-11-23 06:47:37,254 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=572, Unknown=0, NotChecked=0, Total=650 [2018-11-23 06:47:37,254 INFO L87 Difference]: Start difference. First operand 281 states and 336 transitions. Second operand 26 states. [2018-11-23 06:47:37,841 WARN L180 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 40 [2018-11-23 06:47:39,330 WARN L180 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 43 [2018-11-23 06:47:40,095 WARN L180 SmtUtils]: Spent 238.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 46 [2018-11-23 06:47:42,229 WARN L180 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 42 [2018-11-23 06:47:42,998 WARN L180 SmtUtils]: Spent 266.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 68 [2018-11-23 06:47:43,718 WARN L180 SmtUtils]: Spent 312.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 72 [2018-11-23 06:47:45,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:45,149 INFO L93 Difference]: Finished difference Result 375 states and 460 transitions. [2018-11-23 06:47:45,151 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-11-23 06:47:45,151 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 69 [2018-11-23 06:47:45,151 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:45,152 INFO L225 Difference]: With dead ends: 375 [2018-11-23 06:47:45,152 INFO L226 Difference]: Without dead ends: 347 [2018-11-23 06:47:45,153 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 229 GetRequests, 176 SyntacticMatches, 5 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 384 ImplicationChecksByTransitivity, 6.6s TimeCoverageRelationStatistics Valid=359, Invalid=2091, Unknown=0, NotChecked=0, Total=2450 [2018-11-23 06:47:45,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2018-11-23 06:47:45,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 300. [2018-11-23 06:47:45,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 300 states. [2018-11-23 06:47:45,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 361 transitions. [2018-11-23 06:47:45,175 INFO L78 Accepts]: Start accepts. Automaton has 300 states and 361 transitions. Word has length 69 [2018-11-23 06:47:45,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:45,175 INFO L480 AbstractCegarLoop]: Abstraction has 300 states and 361 transitions. [2018-11-23 06:47:45,175 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-11-23 06:47:45,176 INFO L276 IsEmpty]: Start isEmpty. Operand 300 states and 361 transitions. [2018-11-23 06:47:45,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-23 06:47:45,176 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:45,176 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:45,177 INFO L423 AbstractCegarLoop]: === Iteration 34 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:45,177 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:45,177 INFO L82 PathProgramCache]: Analyzing trace with hash 457791470, now seen corresponding path program 1 times [2018-11-23 06:47:45,177 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:45,177 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:45,192 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:45,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:45,213 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:45,269 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 7 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 06:47:45,270 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:47:45,387 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 7 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 06:47:45,388 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:47:45,388 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 06:47:45,395 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:45,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:45,410 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:45,415 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 7 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 06:47:45,415 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:47:45,494 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 7 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 06:47:45,509 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-23 06:47:45,509 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11] total 14 [2018-11-23 06:47:45,510 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 06:47:45,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 06:47:45,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=154, Unknown=0, NotChecked=0, Total=182 [2018-11-23 06:47:45,510 INFO L87 Difference]: Start difference. First operand 300 states and 361 transitions. Second operand 14 states. [2018-11-23 06:47:45,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:45,865 INFO L93 Difference]: Finished difference Result 327 states and 392 transitions. [2018-11-23 06:47:45,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-23 06:47:45,866 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 70 [2018-11-23 06:47:45,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:45,867 INFO L225 Difference]: With dead ends: 327 [2018-11-23 06:47:45,867 INFO L226 Difference]: Without dead ends: 320 [2018-11-23 06:47:45,867 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 287 GetRequests, 261 SyntacticMatches, 5 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=84, Invalid=422, Unknown=0, NotChecked=0, Total=506 [2018-11-23 06:47:45,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 320 states. [2018-11-23 06:47:45,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 320 to 297. [2018-11-23 06:47:45,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297 states. [2018-11-23 06:47:45,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297 states to 297 states and 358 transitions. [2018-11-23 06:47:45,888 INFO L78 Accepts]: Start accepts. Automaton has 297 states and 358 transitions. Word has length 70 [2018-11-23 06:47:45,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:45,888 INFO L480 AbstractCegarLoop]: Abstraction has 297 states and 358 transitions. [2018-11-23 06:47:45,888 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 06:47:45,888 INFO L276 IsEmpty]: Start isEmpty. Operand 297 states and 358 transitions. [2018-11-23 06:47:45,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-23 06:47:45,889 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:45,889 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:45,889 INFO L423 AbstractCegarLoop]: === Iteration 35 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:45,889 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:45,889 INFO L82 PathProgramCache]: Analyzing trace with hash -297341722, now seen corresponding path program 2 times [2018-11-23 06:47:45,889 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:45,890 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:45,903 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 06:47:45,936 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 06:47:45,937 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 06:47:45,940 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:46,044 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 06:47:46,044 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:47:46,046 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:47:46,046 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-23 06:47:46,046 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 06:47:46,046 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 06:47:46,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2018-11-23 06:47:46,046 INFO L87 Difference]: Start difference. First operand 297 states and 358 transitions. Second operand 12 states. [2018-11-23 06:47:46,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:46,333 INFO L93 Difference]: Finished difference Result 320 states and 382 transitions. [2018-11-23 06:47:46,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 06:47:46,334 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 70 [2018-11-23 06:47:46,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:46,335 INFO L225 Difference]: With dead ends: 320 [2018-11-23 06:47:46,335 INFO L226 Difference]: Without dead ends: 313 [2018-11-23 06:47:46,335 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=58, Invalid=248, Unknown=0, NotChecked=0, Total=306 [2018-11-23 06:47:46,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 313 states. [2018-11-23 06:47:46,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 313 to 289. [2018-11-23 06:47:46,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 289 states. [2018-11-23 06:47:46,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 289 states to 289 states and 348 transitions. [2018-11-23 06:47:46,356 INFO L78 Accepts]: Start accepts. Automaton has 289 states and 348 transitions. Word has length 70 [2018-11-23 06:47:46,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:46,357 INFO L480 AbstractCegarLoop]: Abstraction has 289 states and 348 transitions. [2018-11-23 06:47:46,357 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 06:47:46,357 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 348 transitions. [2018-11-23 06:47:46,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-23 06:47:46,358 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:46,358 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:46,358 INFO L423 AbstractCegarLoop]: === Iteration 36 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:46,358 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:46,358 INFO L82 PathProgramCache]: Analyzing trace with hash 1221744938, now seen corresponding path program 1 times [2018-11-23 06:47:46,358 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:46,358 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 46 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:46,377 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 06:47:46,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:46,397 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:46,434 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-11-23 06:47:46,434 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:47:46,435 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:47:46,435 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 06:47:46,435 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:47:46,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:47:46,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:47:46,436 INFO L87 Difference]: Start difference. First operand 289 states and 348 transitions. Second operand 6 states. [2018-11-23 06:47:46,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:46,719 INFO L93 Difference]: Finished difference Result 387 states and 474 transitions. [2018-11-23 06:47:46,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 06:47:46,719 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2018-11-23 06:47:46,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:46,720 INFO L225 Difference]: With dead ends: 387 [2018-11-23 06:47:46,720 INFO L226 Difference]: Without dead ends: 368 [2018-11-23 06:47:46,721 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-23 06:47:46,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 368 states. [2018-11-23 06:47:46,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 368 to 285. [2018-11-23 06:47:46,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 285 states. [2018-11-23 06:47:46,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 285 states to 285 states and 345 transitions. [2018-11-23 06:47:46,753 INFO L78 Accepts]: Start accepts. Automaton has 285 states and 345 transitions. Word has length 70 [2018-11-23 06:47:46,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:46,753 INFO L480 AbstractCegarLoop]: Abstraction has 285 states and 345 transitions. [2018-11-23 06:47:46,753 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:47:46,753 INFO L276 IsEmpty]: Start isEmpty. Operand 285 states and 345 transitions. [2018-11-23 06:47:46,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-23 06:47:46,754 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:46,754 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:46,754 INFO L423 AbstractCegarLoop]: === Iteration 37 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:46,754 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:46,754 INFO L82 PathProgramCache]: Analyzing trace with hash -1115137352, now seen corresponding path program 1 times [2018-11-23 06:47:46,754 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:46,754 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:46,769 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:46,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:46,833 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:46,942 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-11-23 06:47:46,942 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:47:46,943 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:47:46,943 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-23 06:47:46,943 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 06:47:46,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 06:47:46,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-11-23 06:47:46,944 INFO L87 Difference]: Start difference. First operand 285 states and 345 transitions. Second operand 9 states. [2018-11-23 06:47:47,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:47,384 INFO L93 Difference]: Finished difference Result 335 states and 405 transitions. [2018-11-23 06:47:47,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 06:47:47,385 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 70 [2018-11-23 06:47:47,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:47,386 INFO L225 Difference]: With dead ends: 335 [2018-11-23 06:47:47,386 INFO L226 Difference]: Without dead ends: 294 [2018-11-23 06:47:47,387 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2018-11-23 06:47:47,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 294 states. [2018-11-23 06:47:47,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 294 to 266. [2018-11-23 06:47:47,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 266 states. [2018-11-23 06:47:47,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 266 states to 266 states and 314 transitions. [2018-11-23 06:47:47,410 INFO L78 Accepts]: Start accepts. Automaton has 266 states and 314 transitions. Word has length 70 [2018-11-23 06:47:47,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:47,410 INFO L480 AbstractCegarLoop]: Abstraction has 266 states and 314 transitions. [2018-11-23 06:47:47,410 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 06:47:47,410 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 314 transitions. [2018-11-23 06:47:47,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-23 06:47:47,411 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:47,411 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:47,411 INFO L423 AbstractCegarLoop]: === Iteration 38 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:47,411 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:47,411 INFO L82 PathProgramCache]: Analyzing trace with hash -40698028, now seen corresponding path program 1 times [2018-11-23 06:47:47,411 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:47,411 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 48 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:47,426 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:47,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:47,474 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:47,495 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-11-23 06:47:47,496 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:47:47,498 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:47:47,498 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 06:47:47,498 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:47:47,499 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:47:47,499 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:47:47,499 INFO L87 Difference]: Start difference. First operand 266 states and 314 transitions. Second operand 6 states. [2018-11-23 06:47:47,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:47,581 INFO L93 Difference]: Finished difference Result 287 states and 336 transitions. [2018-11-23 06:47:47,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 06:47:47,582 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-11-23 06:47:47,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:47,583 INFO L225 Difference]: With dead ends: 287 [2018-11-23 06:47:47,583 INFO L226 Difference]: Without dead ends: 283 [2018-11-23 06:47:47,584 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-23 06:47:47,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 283 states. [2018-11-23 06:47:47,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 283 to 253. [2018-11-23 06:47:47,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 253 states. [2018-11-23 06:47:47,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 253 states to 253 states and 297 transitions. [2018-11-23 06:47:47,604 INFO L78 Accepts]: Start accepts. Automaton has 253 states and 297 transitions. Word has length 72 [2018-11-23 06:47:47,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:47,605 INFO L480 AbstractCegarLoop]: Abstraction has 253 states and 297 transitions. [2018-11-23 06:47:47,605 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:47:47,605 INFO L276 IsEmpty]: Start isEmpty. Operand 253 states and 297 transitions. [2018-11-23 06:47:47,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-23 06:47:47,605 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:47,606 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:47,606 INFO L423 AbstractCegarLoop]: === Iteration 39 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:47,606 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:47,606 INFO L82 PathProgramCache]: Analyzing trace with hash 16560274, now seen corresponding path program 1 times [2018-11-23 06:47:47,606 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:47,606 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:47,622 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:47,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:47,670 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:47,971 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 7 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 06:47:47,971 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 06:47:48,428 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 06:47:48,428 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 06:47:48,435 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:48,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:48,452 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:48,566 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-11-23 06:47:48,567 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:47:48,582 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-23 06:47:48,583 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [13] total 17 [2018-11-23 06:47:48,583 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 06:47:48,583 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 06:47:48,583 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=340, Unknown=0, NotChecked=0, Total=380 [2018-11-23 06:47:48,583 INFO L87 Difference]: Start difference. First operand 253 states and 297 transitions. Second operand 17 states. [2018-11-23 06:47:49,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:49,667 INFO L93 Difference]: Finished difference Result 302 states and 348 transitions. [2018-11-23 06:47:49,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-23 06:47:49,668 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 72 [2018-11-23 06:47:49,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:49,668 INFO L225 Difference]: With dead ends: 302 [2018-11-23 06:47:49,669 INFO L226 Difference]: Without dead ends: 158 [2018-11-23 06:47:49,669 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=99, Invalid=831, Unknown=0, NotChecked=0, Total=930 [2018-11-23 06:47:49,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-11-23 06:47:49,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 138. [2018-11-23 06:47:49,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-11-23 06:47:49,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 168 transitions. [2018-11-23 06:47:49,682 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 168 transitions. Word has length 72 [2018-11-23 06:47:49,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:49,682 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 168 transitions. [2018-11-23 06:47:49,682 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 06:47:49,682 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 168 transitions. [2018-11-23 06:47:49,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-11-23 06:47:49,682 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:49,683 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:49,683 INFO L423 AbstractCegarLoop]: === Iteration 40 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:49,683 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:49,683 INFO L82 PathProgramCache]: Analyzing trace with hash -1073890760, now seen corresponding path program 1 times [2018-11-23 06:47:49,683 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:49,683 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:49,702 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:49,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:49,722 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:49,731 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-23 06:47:49,731 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:47:49,732 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:47:49,732 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 06:47:49,732 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 06:47:49,732 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 06:47:49,732 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:47:49,732 INFO L87 Difference]: Start difference. First operand 138 states and 168 transitions. Second operand 4 states. [2018-11-23 06:47:49,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:49,755 INFO L93 Difference]: Finished difference Result 162 states and 194 transitions. [2018-11-23 06:47:49,755 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 06:47:49,755 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 71 [2018-11-23 06:47:49,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:49,756 INFO L225 Difference]: With dead ends: 162 [2018-11-23 06:47:49,756 INFO L226 Difference]: Without dead ends: 138 [2018-11-23 06:47:49,756 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:47:49,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-11-23 06:47:49,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-11-23 06:47:49,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-11-23 06:47:49,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 162 transitions. [2018-11-23 06:47:49,767 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 162 transitions. Word has length 71 [2018-11-23 06:47:49,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:49,767 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 162 transitions. [2018-11-23 06:47:49,767 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 06:47:49,768 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 162 transitions. [2018-11-23 06:47:49,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-11-23 06:47:49,768 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:49,768 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:49,768 INFO L423 AbstractCegarLoop]: === Iteration 41 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:49,768 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:49,768 INFO L82 PathProgramCache]: Analyzing trace with hash -1571950312, now seen corresponding path program 1 times [2018-11-23 06:47:49,768 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:49,768 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 52 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:49,783 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:49,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:49,802 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:49,812 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-23 06:47:49,812 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:47:49,813 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:47:49,813 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 06:47:49,813 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 06:47:49,813 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 06:47:49,813 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:47:49,814 INFO L87 Difference]: Start difference. First operand 138 states and 162 transitions. Second operand 5 states. [2018-11-23 06:47:49,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:49,842 INFO L93 Difference]: Finished difference Result 148 states and 171 transitions. [2018-11-23 06:47:49,842 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 06:47:49,842 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 73 [2018-11-23 06:47:49,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:49,843 INFO L225 Difference]: With dead ends: 148 [2018-11-23 06:47:49,843 INFO L226 Difference]: Without dead ends: 82 [2018-11-23 06:47:49,843 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 69 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-11-23 06:47:49,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-11-23 06:47:49,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 82. [2018-11-23 06:47:49,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2018-11-23 06:47:49,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 89 transitions. [2018-11-23 06:47:49,850 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 89 transitions. Word has length 73 [2018-11-23 06:47:49,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:49,850 INFO L480 AbstractCegarLoop]: Abstraction has 82 states and 89 transitions. [2018-11-23 06:47:49,850 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 06:47:49,850 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 89 transitions. [2018-11-23 06:47:49,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-23 06:47:49,850 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:49,851 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:49,851 INFO L423 AbstractCegarLoop]: === Iteration 42 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:49,851 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:49,851 INFO L82 PathProgramCache]: Analyzing trace with hash -1289345495, now seen corresponding path program 1 times [2018-11-23 06:47:49,851 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:49,851 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:49,866 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:49,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:49,939 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:51,502 WARN L180 SmtUtils]: Spent 1.55 s on a formula simplification that was a NOOP. DAG size: 20 [2018-11-23 06:47:53,956 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-11-23 06:47:53,957 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:47:53,958 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:47:53,958 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-23 06:47:53,958 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 06:47:53,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 06:47:53,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=109, Unknown=1, NotChecked=0, Total=132 [2018-11-23 06:47:53,959 INFO L87 Difference]: Start difference. First operand 82 states and 89 transitions. Second operand 12 states. [2018-11-23 06:47:57,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:57,013 INFO L93 Difference]: Finished difference Result 90 states and 97 transitions. [2018-11-23 06:47:57,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 06:47:57,013 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 77 [2018-11-23 06:47:57,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:57,014 INFO L225 Difference]: With dead ends: 90 [2018-11-23 06:47:57,014 INFO L226 Difference]: Without dead ends: 72 [2018-11-23 06:47:57,014 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 66 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=52, Invalid=253, Unknown=1, NotChecked=0, Total=306 [2018-11-23 06:47:57,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2018-11-23 06:47:57,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 72. [2018-11-23 06:47:57,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-11-23 06:47:57,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 77 transitions. [2018-11-23 06:47:57,022 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 77 transitions. Word has length 77 [2018-11-23 06:47:57,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:57,022 INFO L480 AbstractCegarLoop]: Abstraction has 72 states and 77 transitions. [2018-11-23 06:47:57,022 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 06:47:57,022 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 77 transitions. [2018-11-23 06:47:57,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-11-23 06:47:57,023 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:47:57,023 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:47:57,023 INFO L423 AbstractCegarLoop]: === Iteration 43 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:47:57,023 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:47:57,024 INFO L82 PathProgramCache]: Analyzing trace with hash -1480434104, now seen corresponding path program 1 times [2018-11-23 06:47:57,024 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 06:47:57,024 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/cvc4nyu Starting monitored process 54 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 06:47:57,040 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:47:57,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:47:57,115 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 06:47:57,267 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-11-23 06:47:57,267 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 06:47:57,268 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:47:57,268 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-23 06:47:57,269 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 06:47:57,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 06:47:57,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-11-23 06:47:57,269 INFO L87 Difference]: Start difference. First operand 72 states and 77 transitions. Second operand 10 states. [2018-11-23 06:47:57,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:47:57,583 INFO L93 Difference]: Finished difference Result 72 states and 77 transitions. [2018-11-23 06:47:57,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 06:47:57,584 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 78 [2018-11-23 06:47:57,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:47:57,584 INFO L225 Difference]: With dead ends: 72 [2018-11-23 06:47:57,584 INFO L226 Difference]: Without dead ends: 0 [2018-11-23 06:47:57,584 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 69 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2018-11-23 06:47:57,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-11-23 06:47:57,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-11-23 06:47:57,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-11-23 06:47:57,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-11-23 06:47:57,585 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 78 [2018-11-23 06:47:57,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:47:57,585 INFO L480 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-11-23 06:47:57,585 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 06:47:57,585 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-11-23 06:47:57,585 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 06:47:57,588 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2018-11-23 06:47:57,726 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-23 06:47:57,743 WARN L180 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 208 DAG size of output: 161 [2018-11-23 06:47:57,761 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-23 06:47:57,925 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-23 06:47:57,948 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-23 06:47:57,988 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-23 06:47:57,992 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-23 06:47:58,003 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-23 06:47:58,003 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-23 06:47:58,097 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-23 06:47:59,921 WARN L180 SmtUtils]: Spent 1.81 s on a formula simplification. DAG size of input: 157 DAG size of output: 95 [2018-11-23 06:48:11,026 WARN L180 SmtUtils]: Spent 11.10 s on a formula simplification. DAG size of input: 148 DAG size of output: 62 [2018-11-23 06:48:12,434 WARN L180 SmtUtils]: Spent 1.40 s on a formula simplification. DAG size of input: 139 DAG size of output: 54 [2018-11-23 06:48:12,655 WARN L180 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 39 [2018-11-23 06:48:41,987 WARN L180 SmtUtils]: Spent 29.32 s on a formula simplification. DAG size of input: 358 DAG size of output: 221 [2018-11-23 06:50:25,328 WARN L180 SmtUtils]: Spent 1.72 m on a formula simplification. DAG size of input: 194 DAG size of output: 139 [2018-11-23 06:50:25,331 INFO L451 ceAbstractionStarter]: At program point ULTIMATE.initFINAL(line -1) the Hoare annotation is: true [2018-11-23 06:50:25,331 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.initEXIT(line -1) no Hoare annotation was computed. [2018-11-23 06:50:25,332 INFO L448 ceAbstractionStarter]: For program point L19(lines 19 24) no Hoare annotation was computed. [2018-11-23 06:50:25,332 INFO L448 ceAbstractionStarter]: For program point L48(lines 47 62) no Hoare annotation was computed. [2018-11-23 06:50:25,332 INFO L444 ceAbstractionStarter]: At program point L69(lines 18 71) the Hoare annotation is: (or (not (= (_ bv0 32) |base2flt_#in~m|)) (and (= (_ bv0 32) base2flt_~__retres4~0) (= base2flt_~m |base2flt_#in~m|))) [2018-11-23 06:50:25,332 INFO L448 ceAbstractionStarter]: For program point L28(lines 27 42) no Hoare annotation was computed. [2018-11-23 06:50:25,332 INFO L448 ceAbstractionStarter]: For program point L49(lines 47 62) no Hoare annotation was computed. [2018-11-23 06:50:25,332 INFO L448 ceAbstractionStarter]: For program point L37(lines 37 41) no Hoare annotation was computed. [2018-11-23 06:50:25,332 INFO L444 ceAbstractionStarter]: At program point L37-1(lines 27 42) the Hoare annotation is: (not (= (_ bv0 32) |base2flt_#in~m|)) [2018-11-23 06:50:25,332 INFO L448 ceAbstractionStarter]: For program point L25(lines 25 65) no Hoare annotation was computed. [2018-11-23 06:50:25,332 INFO L451 ceAbstractionStarter]: At program point base2fltENTRY(lines 14 72) the Hoare annotation is: true [2018-11-23 06:50:25,332 INFO L448 ceAbstractionStarter]: For program point base2fltFINAL(lines 14 72) no Hoare annotation was computed. [2018-11-23 06:50:25,332 INFO L444 ceAbstractionStarter]: At program point L63(lines 25 65) the Hoare annotation is: (not (= (_ bv0 32) |base2flt_#in~m|)) [2018-11-23 06:50:25,333 INFO L448 ceAbstractionStarter]: For program point base2fltEXIT(lines 14 72) no Hoare annotation was computed. [2018-11-23 06:50:25,333 INFO L444 ceAbstractionStarter]: At program point L47-2(lines 47 62) the Hoare annotation is: (not (= (_ bv0 32) |base2flt_#in~m|)) [2018-11-23 06:50:25,333 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startEXIT(line -1) no Hoare annotation was computed. [2018-11-23 06:50:25,333 INFO L451 ceAbstractionStarter]: At program point L-1(line -1) the Hoare annotation is: true [2018-11-23 06:50:25,333 INFO L451 ceAbstractionStarter]: At program point ULTIMATE.startENTRY(line -1) the Hoare annotation is: true [2018-11-23 06:50:25,333 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startFINAL(line -1) no Hoare annotation was computed. [2018-11-23 06:50:25,333 INFO L448 ceAbstractionStarter]: For program point mainEXIT(lines 214 345) no Hoare annotation was computed. [2018-11-23 06:50:25,333 INFO L444 ceAbstractionStarter]: At program point L242(line 242) the Hoare annotation is: (= (_ bv0 32) main_~zero~0) [2018-11-23 06:50:25,333 INFO L448 ceAbstractionStarter]: For program point L242-1(line 242) no Hoare annotation was computed. [2018-11-23 06:50:25,333 INFO L448 ceAbstractionStarter]: For program point L267(lines 267 300) no Hoare annotation was computed. [2018-11-23 06:50:25,333 INFO L448 ceAbstractionStarter]: For program point L267-1(lines 238 344) no Hoare annotation was computed. [2018-11-23 06:50:25,333 INFO L448 ceAbstractionStarter]: For program point L309(lines 309 313) no Hoare annotation was computed. [2018-11-23 06:50:25,333 INFO L448 ceAbstractionStarter]: For program point L309-2(lines 309 313) no Hoare annotation was computed. [2018-11-23 06:50:25,334 INFO L448 ceAbstractionStarter]: For program point L268(lines 268 297) no Hoare annotation was computed. [2018-11-23 06:50:25,334 INFO L448 ceAbstractionStarter]: For program point L285(lines 285 289) no Hoare annotation was computed. [2018-11-23 06:50:25,334 INFO L448 ceAbstractionStarter]: For program point L285-2(lines 285 289) no Hoare annotation was computed. [2018-11-23 06:50:25,334 INFO L448 ceAbstractionStarter]: For program point L244(lines 244 253) no Hoare annotation was computed. [2018-11-23 06:50:25,334 INFO L448 ceAbstractionStarter]: For program point L244-2(lines 238 344) no Hoare annotation was computed. [2018-11-23 06:50:25,334 INFO L448 ceAbstractionStarter]: For program point L269(lines 269 278) no Hoare annotation was computed. [2018-11-23 06:50:25,334 INFO L448 ceAbstractionStarter]: For program point mainFINAL(lines 214 345) no Hoare annotation was computed. [2018-11-23 06:50:25,334 INFO L444 ceAbstractionStarter]: At program point L269-2(lines 269 278) the Hoare annotation is: (let ((.cse11 (bvult main_~a~0 main_~r_add~0)) (.cse10 (= (_ bv1 32) main_~tmp___2~0)) (.cse2 (exists ((main_~zero~0 (_ BitVec 32))) (bvugt main_~b~0 main_~zero~0))) (.cse12 (exists ((main_~zero~0 (_ BitVec 32))) (bvugt main_~a~0 main_~zero~0))) (.cse3 (= (_ bv0 32) main_~zero~0)) (.cse14 (= (bvadd main_~tmp___1~0 (_ bv4294967295 32)) (_ bv0 32)))) (let ((.cse0 (= main_~tmp___1~0 (_ bv0 32))) (.cse15 (not (bvult main_~r_add~0 main_~a~0))) (.cse1 (= main_~tmp___2~0 (_ bv0 32))) (.cse16 (and .cse11 .cse10 .cse2 .cse12 .cse3 .cse14))) (let ((.cse4 (not (bvult main_~a~0 main_~b~0))) (.cse13 (= (bvadd main_~r_add~0 (_ bv1 32)) (_ bv0 32))) (.cse5 (= (bvadd main_~tmp~2 (_ bv4294967295 32)) (_ bv0 32))) (.cse6 (= (bvadd main_~tmp___0~0 (_ bv4294967295 32)) (_ bv0 32))) (.cse7 (= (bvadd main_~sb~0 (_ bv4294967295 32)) (_ bv0 32))) (.cse8 (= (bvadd main_~sa~0 (_ bv4294967295 32)) (_ bv0 32))) (.cse9 (or (and .cse0 .cse15 .cse1 .cse2 .cse12 .cse3) .cse16))) (or (and .cse0 (= main_~a~0 main_~r_add~0) .cse1 .cse2 .cse3 .cse4) (and (not (= (bvadd (bvlshr main_~b~0 (_ bv24 32)) (_ bv4294967041 32)) (_ bv0 32))) .cse5 .cse6 .cse7 (exists ((v_addflt_~ma~0_81 (_ BitVec 32))) (= main_~r_add~0 (bvor (bvand (_ bv16777215 32) v_addflt_~ma~0_81) (bvshl (bvadd (bvlshr main_~b~0 (_ bv24 32)) (_ bv1 32)) (_ bv24 32))))) .cse8 .cse9) (and .cse10 (or (and (= main_~b~0 main_~r_add~0) .cse11 .cse12 .cse3) (and .cse12 .cse3 .cse13 (= (bvadd main_~b~0 (_ bv1 32)) (_ bv0 32)))) .cse14) (and (or (and .cse0 .cse15 .cse1 .cse2 .cse3 .cse4) (and .cse16 .cse4) (and .cse10 .cse2 .cse12 .cse3 .cse14 .cse13)) .cse5 .cse6 .cse7 .cse8) (and .cse5 .cse6 .cse7 .cse8 .cse9 (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32))) (let ((.cse19 (bvneg (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) main_~b~0))))) (let ((.cse18 (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0)) (.cse20 (bvneg .cse19))) (let ((.cse17 (bvadd .cse18 .cse20))) (and (= (_ bv0 32) (bvand (_ bv33554432 32) .cse17)) (not (= (bvadd .cse18 .cse19 .cse20) (_ bv0 32))) (= main_~r_add~0 (bvor (bvand (_ bv16777215 32) .cse17) (bvshl (bvlshr main_~b~0 (_ bv24 32)) (_ bv24 32)))))))))))))) [2018-11-23 06:50:25,335 INFO L448 ceAbstractionStarter]: For program point L319(lines 319 328) no Hoare annotation was computed. [2018-11-23 06:50:25,335 INFO L451 ceAbstractionStarter]: At program point mainENTRY(lines 214 345) the Hoare annotation is: true [2018-11-23 06:50:25,335 INFO L448 ceAbstractionStarter]: For program point L319-2(lines 318 334) no Hoare annotation was computed. [2018-11-23 06:50:25,335 INFO L444 ceAbstractionStarter]: At program point L254-1(lines 254 263) the Hoare annotation is: (let ((.cse0 (exists ((main_~zero~0 (_ BitVec 32))) (bvugt main_~a~0 main_~zero~0))) (.cse2 (exists ((main_~zero~0 (_ BitVec 32))) (bvugt main_~b~0 main_~zero~0))) (.cse1 (= (_ bv0 32) main_~zero~0))) (or (and (= main_~tmp___0~0 (_ bv0 32)) (= main_~b~0 (_ bv0 32)) (= (_ bv0 32) main_~sb~0)) (and .cse0 .cse1 (= (bvadd main_~b~0 (_ bv1 32)) (_ bv0 32))) (and (= (bvadd main_~tmp~2 (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd main_~tmp___0~0 (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd main_~sb~0 (_ bv4294967295 32)) (_ bv0 32)) .cse2 .cse0 .cse1 (= (bvadd main_~sa~0 (_ bv4294967295 32)) (_ bv0 32))) (and (= (_ bv4294967295 32) main_~a~0) .cse2 .cse1) (and (not (bvugt main_~a~0 (_ bv0 32))) (= (_ bv0 32) main_~sa~0) .cse2 .cse1 (= main_~tmp~2 (_ bv0 32))))) [2018-11-23 06:50:25,335 INFO L448 ceAbstractionStarter]: For program point L304(lines 304 340) no Hoare annotation was computed. [2018-11-23 06:50:25,335 INFO L448 ceAbstractionStarter]: For program point L304-1(lines 304 340) no Hoare annotation was computed. [2018-11-23 06:50:25,335 INFO L444 ceAbstractionStarter]: At program point L329-1(lines 316 334) the Hoare annotation is: (= (bvadd main_~tmp___9~0 (_ bv4294967295 32)) (_ bv0 32)) [2018-11-23 06:50:25,336 INFO L448 ceAbstractionStarter]: For program point L280(lines 268 295) no Hoare annotation was computed. [2018-11-23 06:50:25,336 INFO L448 ceAbstractionStarter]: For program point L247(lines 247 251) no Hoare annotation was computed. [2018-11-23 06:50:25,336 INFO L448 ceAbstractionStarter]: For program point L247-2(lines 247 251) no Hoare annotation was computed. [2018-11-23 06:50:25,336 INFO L444 ceAbstractionStarter]: At program point L305(lines 301 341) the Hoare annotation is: (or (= main_~a~0 main_~r_add~0) (and (= main_~b~0 main_~r_add~0) (exists ((main_~zero~0 (_ BitVec 32))) (bvugt main_~b~0 main_~zero~0)) (= (_ bv0 32) main_~zero~0))) [2018-11-23 06:50:25,336 INFO L448 ceAbstractionStarter]: For program point L272(lines 272 276) no Hoare annotation was computed. [2018-11-23 06:50:25,336 INFO L448 ceAbstractionStarter]: For program point L272-2(lines 272 276) no Hoare annotation was computed. [2018-11-23 06:50:25,336 INFO L448 ceAbstractionStarter]: For program point L322(lines 322 326) no Hoare annotation was computed. [2018-11-23 06:50:25,336 INFO L448 ceAbstractionStarter]: For program point L322-2(lines 322 326) no Hoare annotation was computed. [2018-11-23 06:50:25,336 INFO L448 ceAbstractionStarter]: For program point L306-1(lines 304 338) no Hoare annotation was computed. [2018-11-23 06:50:25,336 INFO L451 ceAbstractionStarter]: At program point L240(line 240) the Hoare annotation is: true [2018-11-23 06:50:25,336 INFO L448 ceAbstractionStarter]: For program point L240-1(line 240) no Hoare annotation was computed. [2018-11-23 06:50:25,337 INFO L448 ceAbstractionStarter]: For program point L265(line 265) no Hoare annotation was computed. [2018-11-23 06:50:25,337 INFO L448 ceAbstractionStarter]: For program point L257(lines 257 261) no Hoare annotation was computed. [2018-11-23 06:50:25,337 INFO L448 ceAbstractionStarter]: For program point L257-2(lines 257 261) no Hoare annotation was computed. [2018-11-23 06:50:25,337 INFO L444 ceAbstractionStarter]: At program point L282-1(lines 282 291) the Hoare annotation is: (let ((.cse6 (exists ((main_~a~0 (_ BitVec 32))) (and (not (bvult main_~r_add~0 main_~a~0)) (not (bvult main_~a~0 main_~b~0))))) (.cse7 (not (bvult main_~r_add~0 main_~a~0))) (.cse9 (exists ((main_~zero~0 (_ BitVec 32))) (bvugt main_~a~0 main_~zero~0))) (.cse8 (exists ((main_~zero~0 (_ BitVec 32))) (bvugt main_~b~0 main_~zero~0))) (.cse10 (= (_ bv0 32) main_~zero~0))) (let ((.cse2 (and .cse6 (and .cse7 (or (and (= main_~b~0 main_~r_add~0) .cse9 .cse10) (and .cse8 (and (= main_~a~0 main_~r_add~0) .cse10)))))) (.cse3 (= (bvadd main_~tmp___3~0 (_ bv4294967295 32)) (_ bv0 32))) (.cse4 (= (_ bv1 32) main_~tmp___4~0)) (.cse0 (= main_~tmp___3~0 (_ bv0 32))) (.cse1 (= main_~tmp___4~0 (_ bv0 32)))) (or (and .cse0 .cse1 .cse2) (and .cse3 .cse4 .cse2) (and (= (bvadd main_~tmp~2 (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd main_~tmp___0~0 (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd main_~sb~0 (_ bv4294967295 32)) (_ bv0 32)) (let ((.cse5 (and .cse6 (and .cse7 .cse8 .cse9 .cse10)))) (or (and .cse5 .cse3 .cse4) (and .cse5 .cse0 .cse1))) (= (bvadd main_~sa~0 (_ bv4294967295 32)) (_ bv0 32)))))) [2018-11-23 06:50:25,337 INFO L444 ceAbstractionStarter]: At program point L241(line 241) the Hoare annotation is: (= (_ bv0 32) main_~zero~0) [2018-11-23 06:50:25,337 INFO L448 ceAbstractionStarter]: For program point L241-1(line 241) no Hoare annotation was computed. [2018-11-23 06:50:25,337 INFO L448 ceAbstractionStarter]: For program point L128(line 128) no Hoare annotation was computed. [2018-11-23 06:50:25,337 INFO L451 ceAbstractionStarter]: At program point addfltENTRY(lines 73 136) the Hoare annotation is: true [2018-11-23 06:50:25,337 INFO L448 ceAbstractionStarter]: For program point addfltFINAL(lines 73 136) no Hoare annotation was computed. [2018-11-23 06:50:25,337 INFO L448 ceAbstractionStarter]: For program point L116(lines 116 121) no Hoare annotation was computed. [2018-11-23 06:50:25,338 INFO L448 ceAbstractionStarter]: For program point L108(lines 108 113) no Hoare annotation was computed. [2018-11-23 06:50:25,338 INFO L444 ceAbstractionStarter]: At program point L104(line 104) the Hoare annotation is: (and (not (= (_ bv0 32) |addflt_#in~b|)) (let ((.cse0 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|))) (.cse1 (bvadd (bvlshr |addflt_#in~b| (_ bv24 32)) (_ bv4294967168 32)))) (or (and (not (bvult (bvor (bvand (_ bv16777215 32) addflt_~ma~0) (bvshl (bvadd addflt_~ea~0 (_ bv128 32)) (_ bv24 32))) |addflt_#in~a|)) (= addflt_~b |addflt_#in~b|) (= .cse0 addflt_~mb~0) (exists ((addflt_~a (_ BitVec 32))) (= addflt_~ma~0 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a)))) (not (bvult |addflt_#in~a| |addflt_#in~b|)) (= addflt_~a |addflt_#in~a|) (= .cse1 addflt_~eb~0) (= (bvadd (bvlshr addflt_~a (_ bv24 32)) (_ bv4294967168 32)) addflt_~ea~0)) (and (= .cse0 addflt_~ma~0) (= .cse1 addflt_~ea~0) (= (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|)) addflt_~mb~0) (= addflt_~b |addflt_#in~a|) (exists ((addflt_~b (_ BitVec 32)) (addflt_~a (_ BitVec 32))) (and (= (bvadd addflt_~eb~0 (_ bv128 32)) (bvlshr addflt_~b (_ bv24 32))) (not (bvult addflt_~a addflt_~b)) (= (bvadd (bvlshr addflt_~a (_ bv24 32)) (_ bv4294967168 32)) addflt_~ea~0))) (= (bvadd (bvlshr |addflt_#in~a| (_ bv24 32)) (_ bv4294967168 32)) addflt_~eb~0) (bvult |addflt_#in~a| addflt_~a) (= addflt_~a |addflt_#in~b|)))) (bvugt |addflt_#in~a| (_ bv0 32))) [2018-11-23 06:50:25,338 INFO L448 ceAbstractionStarter]: For program point L104-1(line 104) no Hoare annotation was computed. [2018-11-23 06:50:25,339 INFO L444 ceAbstractionStarter]: At program point L133(lines 83 135) the Hoare annotation is: (let ((.cse8 (= (_ bv4294967295 32) |addflt_#in~b|)) (.cse32 (bvshl (bvadd addflt_~ea~0 (_ bv128 32)) (_ bv24 32)))) (let ((.cse1 (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32))) (= (bvadd (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0) (_ bv33554431 32)) addflt_~ma~0))) (.cse2 (let ((.cse34 (bvadd addflt_~mb~0 addflt_~ma~0))) (or (not (= (bvand (_ bv33554432 32) .cse34) (_ bv0 32))) (not (bvult (bvor (bvand (_ bv16777215 32) .cse34) .cse32) |addflt_#in~a|))))) (.cse3 (let ((.cse33 (bvadd (bvlshr addflt_~mb~0 (bvadd addflt_~ea~0 (bvneg addflt_~eb~0))) addflt_~ma~0))) (or (not (bvult (bvor (bvand (_ bv16777215 32) .cse33) .cse32) |addflt_#in~a|)) (not (= (bvand (_ bv33554432 32) .cse33) (_ bv0 32)))))) (.cse0 (= (_ bv0 32) |addflt_#in~b|)) (.cse4 (not (bvult (bvor (bvand (_ bv16777215 32) addflt_~ma~0) .cse32) |addflt_#in~a|))) (.cse27 (= addflt_~a |addflt_#in~a|)) (.cse9 (= addflt_~__retres10~0 |addflt_#in~a|)) (.cse16 (= addflt_~__retres10~0 |addflt_#in~b|)) (.cse11 (= addflt_~a |addflt_#in~b|)) (.cse7 (not .cse8)) (.cse5 (not (= (bvadd |addflt_#in~a| (_ bv1 32)) (_ bv0 32))))) (and (or .cse0 (or .cse1 (and .cse2 .cse3 .cse4)) .cse5) (let ((.cse6 (and .cse8 (= (bvadd addflt_~a (_ bv1 32)) (_ bv0 32))))) (or (or (and .cse1 (not (= (_ bv33554431 32) addflt_~ma~0)) .cse6) (and (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32))) (= (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0) addflt_~mb~0)) (= (bvadd addflt_~ma~0 (_ bv4261412865 32)) (_ bv0 32)) .cse6)) .cse7 (and .cse6 (not (bvugt addflt_~b (_ bv0 32)))))) (or (not .cse0) .cse9) (let ((.cse28 (= addflt_~b |addflt_#in~b|)) (.cse14 (= addflt_~b |addflt_#in~a|)) (.cse29 (bvlshr |addflt_#in~a| (_ bv24 32)))) (let ((.cse25 (bvadd .cse29 (_ bv4294967168 32))) (.cse24 (let ((.cse30 (let ((.cse31 (not (bvult addflt_~a addflt_~b)))) (or (and .cse31 .cse14) (and .cse31 .cse27))))) (or (and .cse30 .cse28) (and .cse30 .cse11))))) (let ((.cse10 (bvlshr |addflt_#in~b| (_ bv24 32))) (.cse12 (and .cse4 (not (bvult addflt_~__retres10~0 |addflt_#in~a|)) .cse24)) (.cse26 (= (bvadd addflt_~__retres10~0 (_ bv1 32)) (_ bv0 32))) (.cse13 (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|)) (bvadd (bvneg .cse25) addflt_~ea~0))) (.cse15 (bvult |addflt_#in~a| addflt_~a))) (or (and (exists ((v_addflt_~ma~0_81 (_ BitVec 32))) (= (bvor (bvand (_ bv16777215 32) v_addflt_~ma~0_81) (bvshl (bvadd (bvlshr |addflt_#in~b| (_ bv24 32)) (_ bv1 32)) (_ bv24 32))) addflt_~__retres10~0)) (= (bvadd .cse10 (_ bv4294967169 32)) addflt_~ea~0) (not (= (bvadd .cse10 (_ bv4294967041 32)) (_ bv0 32))) .cse11 .cse12) (and (exists ((addflt_~a (_ BitVec 32))) (and (= addflt_~ma~0 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a))) (bvult |addflt_#in~a| addflt_~a) (= (bvadd (bvlshr addflt_~a (_ bv24 32)) (_ bv4294967168 32)) addflt_~ea~0))) (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32)) (addflt_~a (_ BitVec 32))) (= (bvlshr (bvadd (bvneg (bvneg (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0))) (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a))) (_ bv1 32)) addflt_~ma~0)) (= .cse13 addflt_~mb~0) .cse14 .cse15 .cse16 .cse11) (and (= (_ bv0 32) |addflt_#in~a|) .cse14) (and (exists ((addflt_~a (_ BitVec 32))) (let ((.cse18 (bvlshr addflt_~a (_ bv24 32)))) (let ((.cse19 (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|)) (bvadd (bvneg (bvadd (bvlshr |addflt_#in~a| (_ bv24 32)) (_ bv4294967168 32))) .cse18 (_ bv4294967168 32))))) (let ((.cse17 (bvadd (bvneg (bvneg .cse19)) (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a))))) (and (= addflt_~__retres10~0 (bvor (bvand (_ bv16777215 32) .cse17) (bvshl .cse18 (_ bv24 32)))) (bvult |addflt_#in~a| addflt_~a) (= (_ bv0 32) (bvand (_ bv33554432 32) .cse17)) (not (= .cse19 (_ bv0 32)))))))) .cse2 .cse3 .cse4 (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32))) (let ((.cse20 (bvneg (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|))))) (let ((.cse22 (bvneg .cse20)) (.cse21 (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0))) (let ((.cse23 (bvadd .cse22 .cse21))) (and (not (= (bvadd .cse20 .cse21 .cse22) (_ bv0 32))) (= addflt_~__retres10~0 (bvor (bvand (_ bv16777215 32) .cse23) (bvshl (bvlshr |addflt_#in~b| (_ bv24 32)) (_ bv24 32)))) (= (_ bv0 32) (bvand (_ bv33554432 32) .cse23))))))) .cse24) (and (= (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|)) (bvadd (bvlshr addflt_~a (_ bv24 32)) (bvneg (bvadd .cse10 (_ bv4294967168 32))) (_ bv4294967168 32))) addflt_~mb~0) (= .cse25 addflt_~ea~0) (or (and .cse26 .cse27 (not (= (_ bv0 32) (bvand (_ bv33554432 32) addflt_~ma~0))) .cse24) (and .cse27 .cse12)) .cse28) (and (exists ((addflt_~a (_ BitVec 32))) (and (= (bvadd (bvneg (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|)) (bvadd (bvneg (bvadd (bvlshr |addflt_#in~a| (_ bv24 32)) (_ bv4294967168 32))) addflt_~ea~0))) addflt_~ma~0) (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a))) (bvult |addflt_#in~a| addflt_~a) (= (bvadd (bvlshr addflt_~a (_ bv24 32)) (_ bv4294967168 32)) addflt_~ea~0))) .cse26 .cse24 (not (= (_ bv0 32) .cse13)) .cse15) (and (exists ((addflt_~ma~0 (_ BitVec 32))) (= addflt_~__retres10~0 (bvor addflt_~ma~0 (bvshl (bvadd (bvlshr |addflt_#in~a| (_ bv24 32)) (_ bv1 32)) (_ bv24 32))))) (not (= (bvadd .cse29 (_ bv4294967041 32)) (_ bv0 32))) (= (bvadd .cse29 (_ bv4294967169 32)) addflt_~ea~0) .cse27 .cse28 .cse24) (and (and .cse27 .cse28) .cse0))))) (or (bvugt |addflt_#in~a| (_ bv0 32)) (and .cse27 .cse9) (and .cse16 .cse11)) (or (and (= (bvadd addflt_~ma~0 (_ bv4227858434 32)) (_ bv0 32)) (= (_ bv127 32) addflt_~eb~0)) .cse7 .cse5)))) [2018-11-23 06:50:25,339 INFO L448 ceAbstractionStarter]: For program point addfltEXIT(lines 73 136) no Hoare annotation was computed. [2018-11-23 06:50:25,339 INFO L448 ceAbstractionStarter]: For program point L84(lines 84 90) no Hoare annotation was computed. [2018-11-23 06:50:25,339 INFO L448 ceAbstractionStarter]: For program point L115(lines 115 126) no Hoare annotation was computed. [2018-11-23 06:50:25,339 INFO L448 ceAbstractionStarter]: For program point L84-2(lines 83 135) no Hoare annotation was computed. [2018-11-23 06:50:25,340 INFO L444 ceAbstractionStarter]: At program point L115-2(lines 115 126) the Hoare annotation is: (and (not (= (_ bv0 32) |addflt_#in~b|)) (let ((.cse9 (bvlshr |addflt_#in~b| (_ bv24 32))) (.cse3 (= addflt_~b |addflt_#in~b|)) (.cse10 (= addflt_~a |addflt_#in~b|)) (.cse2 (= addflt_~a |addflt_#in~a|))) (let ((.cse6 (let ((.cse15 (let ((.cse17 (not (bvult addflt_~a addflt_~b)))) (or (and .cse2 .cse17) (and (= addflt_~b |addflt_#in~a|) .cse17))))) (or (and (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32)) (addflt_~a (_ BitVec 32))) (= (bvadd (bvneg (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0)) addflt_~ma~0) (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a)))) (let ((.cse16 (= (_ bv0 32) (bvand (_ bv33554432 32) addflt_~ma~0)))) (or (and .cse15 .cse16 .cse10) (and .cse15 .cse16 .cse3)))) (and (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32)) (addflt_~a (_ BitVec 32))) (= (bvlshr (bvadd (bvneg (bvneg (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0))) (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a))) (_ bv1 32)) addflt_~ma~0)) (or (and .cse15 .cse3) (and .cse15 .cse10)))))) (.cse5 (bvlshr |addflt_#in~a| (_ bv24 32))) (.cse8 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|))) (.cse7 (bvadd .cse9 (_ bv4294967168 32)))) (let ((.cse0 (= (bvlshr .cse8 (bvadd (bvlshr addflt_~a (_ bv24 32)) (bvneg .cse7) (_ bv4294967168 32))) addflt_~mb~0)) (.cse1 (bvadd .cse5 (_ bv4294967168 32))) (.cse4 (let ((.cse13 (bvshl (bvadd addflt_~ea~0 (_ bv128 32)) (_ bv24 32)))) (let ((.cse11 (not (bvult (bvor (bvand (_ bv16777215 32) addflt_~ma~0) .cse13) |addflt_#in~a|)))) (or (and .cse2 .cse11 .cse6) (and (let ((.cse12 (bvadd addflt_~mb~0 addflt_~ma~0))) (or (not (= (bvand (_ bv33554432 32) .cse12) (_ bv0 32))) (not (bvult (bvor (bvand (_ bv16777215 32) .cse12) .cse13) |addflt_#in~a|)))) (let ((.cse14 (bvadd (bvlshr addflt_~mb~0 (bvadd addflt_~ea~0 (bvneg addflt_~eb~0))) addflt_~ma~0))) (or (not (bvult (bvor (bvand (_ bv16777215 32) .cse14) .cse13) |addflt_#in~a|)) (not (= (bvand (_ bv33554432 32) .cse14) (_ bv0 32))))) .cse11 .cse6)))))) (or (and .cse0 (= .cse1 addflt_~ea~0) .cse2 .cse3 .cse4) (and .cse0 (not (= (bvadd .cse5 (_ bv4294967041 32)) (_ bv0 32))) (= (bvadd .cse5 (_ bv4294967169 32)) addflt_~ea~0) .cse2 .cse6) (and (= .cse7 addflt_~ea~0) .cse6 (exists ((addflt_~a (_ BitVec 32))) (and (= (bvadd (bvneg (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|)) (bvadd (bvneg (bvadd (bvlshr |addflt_#in~a| (_ bv24 32)) (_ bv4294967168 32))) addflt_~ea~0))) addflt_~ma~0) (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a))) (bvult |addflt_#in~a| addflt_~a) (= (bvadd (bvlshr addflt_~a (_ bv24 32)) (_ bv4294967168 32)) addflt_~ea~0))) (not (= (_ bv0 32) (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|)) (bvadd (bvneg .cse1) addflt_~ea~0)))) (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32))) (= (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0) (bvadd (bvneg (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|))) addflt_~ma~0))) (not (= (_ bv0 32) (bvadd (bvneg .cse8) addflt_~ma~0)))) (and (= (bvadd .cse9 (_ bv4294967169 32)) addflt_~ea~0) (not (= (bvadd .cse9 (_ bv4294967041 32)) (_ bv0 32))) .cse10 .cse4))))) (bvugt |addflt_#in~a| (_ bv0 32)) (not (= (bvadd |addflt_#in~a| (_ bv1 32)) (_ bv0 32)))) [2018-11-23 06:50:25,340 INFO L451 ceAbstractionStarter]: At program point __VERIFIER_assertENTRY(lines 5 10) the Hoare annotation is: true [2018-11-23 06:50:25,340 INFO L448 ceAbstractionStarter]: For program point __VERIFIER_assertEXIT(lines 5 10) no Hoare annotation was computed. [2018-11-23 06:50:25,340 INFO L448 ceAbstractionStarter]: For program point __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION(line 7) no Hoare annotation was computed. [2018-11-23 06:50:25,340 INFO L448 ceAbstractionStarter]: For program point L7(line 7) no Hoare annotation was computed. [2018-11-23 06:50:25,340 INFO L448 ceAbstractionStarter]: For program point L6(lines 6 8) no Hoare annotation was computed. [2018-11-23 06:50:25,340 INFO L448 ceAbstractionStarter]: For program point L6-2(lines 5 10) no Hoare annotation was computed. [2018-11-23 06:50:25,353 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[main_~zero~0,QUANTIFIED] [2018-11-23 06:50:25,354 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[main_~zero~0,QUANTIFIED] [2018-11-23 06:50:25,364 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,365 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,365 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,365 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,365 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,366 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,366 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_81,QUANTIFIED] [2018-11-23 06:50:25,366 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,367 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,367 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,367 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,367 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,368 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,368 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,368 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,369 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,369 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,369 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,369 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,370 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,370 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,370 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,372 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,373 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,373 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,373 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,373 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,374 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,374 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,374 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~ma~0,QUANTIFIED] [2018-11-23 06:50:25,379 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,379 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,379 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,380 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,380 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,380 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,380 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_81,QUANTIFIED] [2018-11-23 06:50:25,380 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,381 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,381 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,381 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,381 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,382 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,382 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,382 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,382 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,382 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,383 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,383 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,383 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,383 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,384 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,384 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,384 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,384 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,384 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,385 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,385 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,385 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,385 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~ma~0,QUANTIFIED] [2018-11-23 06:50:25,390 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 06:50:25 BoogieIcfgContainer [2018-11-23 06:50:25,390 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-23 06:50:25,391 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-23 06:50:25,391 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-23 06:50:25,391 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-23 06:50:25,391 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 06:45:51" (3/4) ... [2018-11-23 06:50:25,395 INFO L144 WitnessPrinter]: Generating witness for correct program [2018-11-23 06:50:25,401 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ULTIMATE.init [2018-11-23 06:50:25,401 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure base2flt [2018-11-23 06:50:25,402 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure main [2018-11-23 06:50:25,402 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure addflt [2018-11-23 06:50:25,402 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure __VERIFIER_assert [2018-11-23 06:50:25,407 INFO L879 BoogieBacktranslator]: Reduced CFG by removing 11 nodes and edges [2018-11-23 06:50:25,408 INFO L879 BoogieBacktranslator]: Reduced CFG by removing 4 nodes and edges [2018-11-23 06:50:25,408 INFO L879 BoogieBacktranslator]: Reduced CFG by removing 1 nodes and edges [2018-11-23 06:50:25,432 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: !(0bv32 == \old(m)) || (0bv32 == __retres4 && m == \old(m)) [2018-11-23 06:50:25,432 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: !(0bv32 == \old(m)) [2018-11-23 06:50:25,432 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: !(0bv32 == \old(m)) [2018-11-23 06:50:25,432 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: !(0bv32 == \old(m)) [2018-11-23 06:50:25,433 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: a == r_add || ((b == r_add && (\exists main_~zero~0 : bv32 :: ~bvugt32(b, main_~zero~0))) && 0bv32 == zero) [2018-11-23 06:50:25,434 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((0bv32 == \old(b) || (\exists addflt_~delta~0 : bv32, addflt_~b : bv32 :: ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0), 33554431bv32) == ma) || (((!(~bvand64(33554432bv32, ~bvadd64(mb, ma)) == 0bv32) || !~bvult64(~bvor32(~bvand64(16777215bv32, ~bvadd64(mb, ma)), ~bvshl32(~bvadd64(ea, 128bv32), 24bv32)), \old(a))) && (!~bvult64(~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb))), ma)), ~bvshl32(~bvadd64(ea, 128bv32), 24bv32)), \old(a)) || !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb))), ma)) == 0bv32))) && !~bvult64(~bvor32(~bvand64(16777215bv32, ma), ~bvshl32(~bvadd64(ea, 128bv32), 24bv32)), \old(a)))) || !(~bvadd64(\old(a), 1bv32) == 0bv32)) && ((((((\exists addflt_~delta~0 : bv32, addflt_~b : bv32 :: ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0), 33554431bv32) == ma) && !(33554431bv32 == ma)) && 4294967295bv32 == \old(b) && ~bvadd64(a, 1bv32) == 0bv32) || (((\exists addflt_~delta~0 : bv32, addflt_~b : bv32 :: ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0) == mb) && ~bvadd64(ma, 4261412865bv32) == 0bv32) && 4294967295bv32 == \old(b) && ~bvadd64(a, 1bv32) == 0bv32)) || !(4294967295bv32 == \old(b))) || ((4294967295bv32 == \old(b) && ~bvadd64(a, 1bv32) == 0bv32) && !~bvugt32(b, 0bv32)))) && (!(0bv32 == \old(b)) || __retres10 == \old(a))) && ((((((((((((\exists v_addflt_~ma~0_81 : bv32 :: ~bvor32(~bvand64(16777215bv32, v_addflt_~ma~0_81), ~bvshl32(~bvadd64(~bvlshr64(\old(b), 24bv32), 1bv32), 24bv32)) == __retres10) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967169bv32) == ea) && !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)) && a == \old(b)) && (!~bvult64(~bvor32(~bvand64(16777215bv32, ma), ~bvshl32(~bvadd64(ea, 128bv32), 24bv32)), \old(a)) && !~bvult64(__retres10, \old(a))) && ((((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && b == \old(b)) || (((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && a == \old(b)))) || (((((((\exists addflt_~a : bv32 :: (ma == ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a)) && ~bvult64(\old(a), addflt_~a)) && ~bvadd64(~bvlshr64(addflt_~a, 24bv32), 4294967168bv32) == ea) && (\exists addflt_~delta~0 : bv32, addflt_~b : bv32, addflt_~a : bv32 :: ~bvlshr64(~bvadd64(~bvneg32(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0))), ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a))), 1bv32) == ma)) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea)) == mb) && b == \old(a)) && ~bvult64(\old(a), a)) && __retres10 == \old(b)) && a == \old(b))) || (0bv32 == \old(a) && b == \old(a))) || ((((((\exists addflt_~a : bv32 :: ((__retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvneg32(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ~bvlshr64(addflt_~a, 24bv32), 4294967168bv32)))), ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a)))), ~bvshl32(~bvlshr64(addflt_~a, 24bv32), 24bv32)) && ~bvult64(\old(a), addflt_~a)) && 0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvneg32(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ~bvlshr64(addflt_~a, 24bv32), 4294967168bv32)))), ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a))))) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ~bvlshr64(addflt_~a, 24bv32), 4294967168bv32)) == 0bv32)) && (!(~bvand64(33554432bv32, ~bvadd64(mb, ma)) == 0bv32) || !~bvult64(~bvor32(~bvand64(16777215bv32, ~bvadd64(mb, ma)), ~bvshl32(~bvadd64(ea, 128bv32), 24bv32)), \old(a)))) && (!~bvult64(~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb))), ma)), ~bvshl32(~bvadd64(ea, 128bv32), 24bv32)), \old(a)) || !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb))), ma)) == 0bv32))) && !~bvult64(~bvor32(~bvand64(16777215bv32, ma), ~bvshl32(~bvadd64(ea, 128bv32), 24bv32)), \old(a))) && (\exists addflt_~delta~0 : bv32, addflt_~b : bv32 :: (!(~bvadd64(~bvneg32(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b)))), ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0), ~bvneg32(~bvneg32(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b)))))) == 0bv32) && __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvneg32(~bvneg32(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0))), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32))) && 0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvneg32(~bvneg32(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0))))) && ((((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && b == \old(b)) || (((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && a == \old(b))))) || (((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea) && ((((~bvadd64(__retres10, 1bv32) == 0bv32 && a == \old(a)) && !(0bv32 == ~bvand64(33554432bv32, ma))) && ((((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && b == \old(b)) || (((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && a == \old(b)))) || (a == \old(a) && (!~bvult64(~bvor32(~bvand64(16777215bv32, ma), ~bvshl32(~bvadd64(ea, 128bv32), 24bv32)), \old(a)) && !~bvult64(__retres10, \old(a))) && ((((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && b == \old(b)) || (((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && a == \old(b)))))) && b == \old(b))) || (((((\exists addflt_~a : bv32 :: (~bvadd64(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea))), ma) == ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a)) && ~bvult64(\old(a), addflt_~a)) && ~bvadd64(~bvlshr64(addflt_~a, 24bv32), 4294967168bv32) == ea) && ~bvadd64(__retres10, 1bv32) == 0bv32) && ((((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && b == \old(b)) || (((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && a == \old(b)))) && !(0bv32 == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea)))) && ~bvult64(\old(a), a))) || ((((((\exists addflt_~ma~0 : bv32 :: __retres10 == ~bvor32(addflt_~ma~0, ~bvshl32(~bvadd64(~bvlshr64(\old(a), 24bv32), 1bv32), 24bv32))) && !(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967169bv32) == ea) && a == \old(a)) && b == \old(b)) && ((((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && b == \old(b)) || (((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && a == \old(b))))) || ((a == \old(a) && b == \old(b)) && 0bv32 == \old(b)))) && ((~bvugt32(\old(a), 0bv32) || (a == \old(a) && __retres10 == \old(a))) || (__retres10 == \old(b) && a == \old(b)))) && (((~bvadd64(ma, 4227858434bv32) == 0bv32 && 127bv32 == eb) || !(4294967295bv32 == \old(b))) || !(~bvadd64(\old(a), 1bv32) == 0bv32)) [2018-11-23 06:50:25,457 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_6460d2fb-d568-4a8a-9997-ba25e705cf32/bin-2019/utaipan/witness.graphml [2018-11-23 06:50:25,458 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 06:50:25,458 INFO L168 Benchmark]: Toolchain (without parser) took 274112.51 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 272.6 MB). Free memory was 949.7 MB in the beginning and 946.3 MB in the end (delta: 3.5 MB). Peak memory consumption was 276.1 MB. Max. memory is 11.5 GB. [2018-11-23 06:50:25,459 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 06:50:25,459 INFO L168 Benchmark]: CACSL2BoogieTranslator took 243.38 ms. Allocated memory is still 1.0 GB. Free memory was 949.7 MB in the beginning and 933.6 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-11-23 06:50:25,459 INFO L168 Benchmark]: Boogie Procedure Inliner took 19.19 ms. Allocated memory is still 1.0 GB. Free memory was 933.6 MB in the beginning and 928.3 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-11-23 06:50:25,459 INFO L168 Benchmark]: Boogie Preprocessor took 75.98 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 117.4 MB). Free memory was 928.3 MB in the beginning and 1.1 GB in the end (delta: -177.0 MB). Peak memory consumption was 15.0 MB. Max. memory is 11.5 GB. [2018-11-23 06:50:25,460 INFO L168 Benchmark]: RCFGBuilder took 309.98 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 26.1 MB). Peak memory consumption was 26.1 MB. Max. memory is 11.5 GB. [2018-11-23 06:50:25,460 INFO L168 Benchmark]: TraceAbstraction took 273393.42 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 155.2 MB). Free memory was 1.1 GB in the beginning and 955.6 MB in the end (delta: 123.6 MB). Peak memory consumption was 479.4 MB. Max. memory is 11.5 GB. [2018-11-23 06:50:25,460 INFO L168 Benchmark]: Witness Printer took 66.98 ms. Allocated memory is still 1.3 GB. Free memory was 955.6 MB in the beginning and 946.3 MB in the end (delta: 9.3 MB). Peak memory consumption was 9.3 MB. Max. memory is 11.5 GB. [2018-11-23 06:50:25,462 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 243.38 ms. Allocated memory is still 1.0 GB. Free memory was 949.7 MB in the beginning and 933.6 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 19.19 ms. Allocated memory is still 1.0 GB. Free memory was 933.6 MB in the beginning and 928.3 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 75.98 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 117.4 MB). Free memory was 928.3 MB in the beginning and 1.1 GB in the end (delta: -177.0 MB). Peak memory consumption was 15.0 MB. Max. memory is 11.5 GB. * RCFGBuilder took 309.98 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 26.1 MB). Peak memory consumption was 26.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 273393.42 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 155.2 MB). Free memory was 1.1 GB in the beginning and 955.6 MB in the end (delta: 123.6 MB). Peak memory consumption was 479.4 MB. Max. memory is 11.5 GB. * Witness Printer took 66.98 ms. Allocated memory is still 1.3 GB. Free memory was 955.6 MB in the beginning and 946.3 MB in the end (delta: 9.3 MB). Peak memory consumption was 9.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[main_~zero~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[main_~zero~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_81,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~ma~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_81,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~ma~0,QUANTIFIED] * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - PositiveResult [Line: 7]: call of __VERIFIER_error() unreachable For all program executions holds that call of __VERIFIER_error() unreachable at this location - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold - InvariantResult [Line: 25]: Loop Invariant Derived loop invariant: !(0bv32 == \old(m)) - InvariantResult [Line: 301]: Loop Invariant [2018-11-23 06:50:25,466 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[main_~zero~0,QUANTIFIED] [2018-11-23 06:50:25,466 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[main_~zero~0,QUANTIFIED] Derived loop invariant: a == r_add || ((b == r_add && (\exists main_~zero~0 : bv32 :: ~bvugt32(b, main_~zero~0))) && 0bv32 == zero) - InvariantResult [Line: 18]: Loop Invariant Derived loop invariant: !(0bv32 == \old(m)) || (0bv32 == __retres4 && m == \old(m)) - InvariantResult [Line: 83]: Loop Invariant [2018-11-23 06:50:25,467 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,467 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,467 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,467 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,467 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,467 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,467 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_81,QUANTIFIED] [2018-11-23 06:50:25,468 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,468 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,468 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,468 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,468 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,469 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,469 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,469 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,469 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,469 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,470 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,470 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,470 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,470 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,470 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,471 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,471 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,471 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,471 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,471 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,472 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,472 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,472 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~ma~0,QUANTIFIED] [2018-11-23 06:50:25,474 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,474 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,474 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,474 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,475 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,475 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,475 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_81,QUANTIFIED] [2018-11-23 06:50:25,475 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,475 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,475 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,476 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,476 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,476 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,476 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,476 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,477 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,477 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,477 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,477 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,477 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,478 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,478 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,478 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,478 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,478 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-11-23 06:50:25,479 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-11-23 06:50:25,479 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,479 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,479 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-23 06:50:25,479 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~ma~0,QUANTIFIED] Derived loop invariant: ((((((0bv32 == \old(b) || (\exists addflt_~delta~0 : bv32, addflt_~b : bv32 :: ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0), 33554431bv32) == ma) || (((!(~bvand64(33554432bv32, ~bvadd64(mb, ma)) == 0bv32) || !~bvult64(~bvor32(~bvand64(16777215bv32, ~bvadd64(mb, ma)), ~bvshl32(~bvadd64(ea, 128bv32), 24bv32)), \old(a))) && (!~bvult64(~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb))), ma)), ~bvshl32(~bvadd64(ea, 128bv32), 24bv32)), \old(a)) || !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb))), ma)) == 0bv32))) && !~bvult64(~bvor32(~bvand64(16777215bv32, ma), ~bvshl32(~bvadd64(ea, 128bv32), 24bv32)), \old(a)))) || !(~bvadd64(\old(a), 1bv32) == 0bv32)) && ((((((\exists addflt_~delta~0 : bv32, addflt_~b : bv32 :: ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0), 33554431bv32) == ma) && !(33554431bv32 == ma)) && 4294967295bv32 == \old(b) && ~bvadd64(a, 1bv32) == 0bv32) || (((\exists addflt_~delta~0 : bv32, addflt_~b : bv32 :: ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0) == mb) && ~bvadd64(ma, 4261412865bv32) == 0bv32) && 4294967295bv32 == \old(b) && ~bvadd64(a, 1bv32) == 0bv32)) || !(4294967295bv32 == \old(b))) || ((4294967295bv32 == \old(b) && ~bvadd64(a, 1bv32) == 0bv32) && !~bvugt32(b, 0bv32)))) && (!(0bv32 == \old(b)) || __retres10 == \old(a))) && ((((((((((((\exists v_addflt_~ma~0_81 : bv32 :: ~bvor32(~bvand64(16777215bv32, v_addflt_~ma~0_81), ~bvshl32(~bvadd64(~bvlshr64(\old(b), 24bv32), 1bv32), 24bv32)) == __retres10) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967169bv32) == ea) && !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)) && a == \old(b)) && (!~bvult64(~bvor32(~bvand64(16777215bv32, ma), ~bvshl32(~bvadd64(ea, 128bv32), 24bv32)), \old(a)) && !~bvult64(__retres10, \old(a))) && ((((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && b == \old(b)) || (((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && a == \old(b)))) || (((((((\exists addflt_~a : bv32 :: (ma == ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a)) && ~bvult64(\old(a), addflt_~a)) && ~bvadd64(~bvlshr64(addflt_~a, 24bv32), 4294967168bv32) == ea) && (\exists addflt_~delta~0 : bv32, addflt_~b : bv32, addflt_~a : bv32 :: ~bvlshr64(~bvadd64(~bvneg32(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0))), ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a))), 1bv32) == ma)) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea)) == mb) && b == \old(a)) && ~bvult64(\old(a), a)) && __retres10 == \old(b)) && a == \old(b))) || (0bv32 == \old(a) && b == \old(a))) || ((((((\exists addflt_~a : bv32 :: ((__retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvneg32(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ~bvlshr64(addflt_~a, 24bv32), 4294967168bv32)))), ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a)))), ~bvshl32(~bvlshr64(addflt_~a, 24bv32), 24bv32)) && ~bvult64(\old(a), addflt_~a)) && 0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvneg32(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ~bvlshr64(addflt_~a, 24bv32), 4294967168bv32)))), ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a))))) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ~bvlshr64(addflt_~a, 24bv32), 4294967168bv32)) == 0bv32)) && (!(~bvand64(33554432bv32, ~bvadd64(mb, ma)) == 0bv32) || !~bvult64(~bvor32(~bvand64(16777215bv32, ~bvadd64(mb, ma)), ~bvshl32(~bvadd64(ea, 128bv32), 24bv32)), \old(a)))) && (!~bvult64(~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb))), ma)), ~bvshl32(~bvadd64(ea, 128bv32), 24bv32)), \old(a)) || !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb))), ma)) == 0bv32))) && !~bvult64(~bvor32(~bvand64(16777215bv32, ma), ~bvshl32(~bvadd64(ea, 128bv32), 24bv32)), \old(a))) && (\exists addflt_~delta~0 : bv32, addflt_~b : bv32 :: (!(~bvadd64(~bvneg32(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b)))), ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0), ~bvneg32(~bvneg32(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b)))))) == 0bv32) && __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvneg32(~bvneg32(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0))), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32))) && 0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvneg32(~bvneg32(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0))))) && ((((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && b == \old(b)) || (((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && a == \old(b))))) || (((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea) && ((((~bvadd64(__retres10, 1bv32) == 0bv32 && a == \old(a)) && !(0bv32 == ~bvand64(33554432bv32, ma))) && ((((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && b == \old(b)) || (((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && a == \old(b)))) || (a == \old(a) && (!~bvult64(~bvor32(~bvand64(16777215bv32, ma), ~bvshl32(~bvadd64(ea, 128bv32), 24bv32)), \old(a)) && !~bvult64(__retres10, \old(a))) && ((((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && b == \old(b)) || (((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && a == \old(b)))))) && b == \old(b))) || (((((\exists addflt_~a : bv32 :: (~bvadd64(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea))), ma) == ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a)) && ~bvult64(\old(a), addflt_~a)) && ~bvadd64(~bvlshr64(addflt_~a, 24bv32), 4294967168bv32) == ea) && ~bvadd64(__retres10, 1bv32) == 0bv32) && ((((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && b == \old(b)) || (((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && a == \old(b)))) && !(0bv32 == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea)))) && ~bvult64(\old(a), a))) || ((((((\exists addflt_~ma~0 : bv32 :: __retres10 == ~bvor32(addflt_~ma~0, ~bvshl32(~bvadd64(~bvlshr64(\old(a), 24bv32), 1bv32), 24bv32))) && !(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967169bv32) == ea) && a == \old(a)) && b == \old(b)) && ((((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && b == \old(b)) || (((!~bvult64(a, b) && b == \old(a)) || (!~bvult64(a, b) && a == \old(a))) && a == \old(b))))) || ((a == \old(a) && b == \old(b)) && 0bv32 == \old(b)))) && ((~bvugt32(\old(a), 0bv32) || (a == \old(a) && __retres10 == \old(a))) || (__retres10 == \old(b) && a == \old(b)))) && (((~bvadd64(ma, 4227858434bv32) == 0bv32 && 127bv32 == eb) || !(4294967295bv32 == \old(b))) || !(~bvadd64(\old(a), 1bv32) == 0bv32)) - InvariantResult [Line: 47]: Loop Invariant Derived loop invariant: !(0bv32 == \old(m)) - InvariantResult [Line: 27]: Loop Invariant Derived loop invariant: !(0bv32 == \old(m)) - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 77 locations, 1 error locations. SAFE Result, 273.2s OverallTime, 43 OverallIterations, 4 TraceHistogramMax, 93.3s AutomataDifference, 0.0s DeadEndRemovalTime, 147.7s HoareAnnotationTime, HoareTripleCheckerStatistics: 4752 SDtfs, 2648 SDslu, 27942 SDs, 0 SdLazy, 7468 SolverSat, 424 SolverUnsat, 17 SolverUnknown, 0 SolverNotchecked, 44.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 3842 GetRequests, 3342 SyntacticMatches, 28 SemanticMatches, 472 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 809 ImplicationChecksByTransitivity, 73.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=474occurred in iteration=13, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.8s AutomataMinimizationTime, 43 MinimizatonAttempts, 1500 StatesRemovedByMinimization, 38 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 22 LocationsWithAnnotation, 450 PreInvPairs, 554 NumberOfFragments, 3014 HoareAnnotationTreeSize, 450 FomulaSimplifications, 7001492 FormulaSimplificationTreeSizeReduction, 0.5s HoareSimplificationTime, 22 FomulaSimplificationsInter, 286231 FormulaSimplificationTreeSizeReductionInter, 147.2s HoareSimplificationTimeInter, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 1.1s SatisfiabilityAnalysisTime, 28.5s InterpolantComputationTime, 3008 NumberOfCodeBlocks, 3008 NumberOfCodeBlocksAsserted, 54 NumberOfCheckSat, 3599 ConstructedInterpolants, 104 QuantifiedInterpolants, 655754 SizeOfPredicates, 269 NumberOfNonLiveVariables, 5208 ConjunctsInSsa, 493 ConjunctsInUnsatCore, 66 InterpolantComputations, 36 PerfectInterpolantSequences, 1192/1312 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be correct! Received shutdown request...