./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/thin001_power.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_b6f15951-5d86-4c81-b736-012175d45f64/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_b6f15951-5d86-4c81-b736-012175d45f64/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_b6f15951-5d86-4c81-b736-012175d45f64/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_b6f15951-5d86-4c81-b736-012175d45f64/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/thin001_power.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_b6f15951-5d86-4c81-b736-012175d45f64/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_b6f15951-5d86-4c81-b736-012175d45f64/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0565341d48a13ae8e32e38d25cc35ee0d392a001 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 06:31:33,979 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 06:31:33,980 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 06:31:33,987 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 06:31:33,987 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 06:31:33,988 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 06:31:33,989 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 06:31:33,990 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 06:31:33,991 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 06:31:33,992 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 06:31:33,992 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 06:31:33,993 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 06:31:33,993 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 06:31:33,994 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 06:31:33,995 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 06:31:33,995 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 06:31:33,996 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 06:31:33,997 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 06:31:33,999 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 06:31:34,000 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 06:31:34,001 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 06:31:34,001 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 06:31:34,003 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 06:31:34,003 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 06:31:34,003 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 06:31:34,004 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 06:31:34,005 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 06:31:34,005 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 06:31:34,006 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 06:31:34,007 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 06:31:34,007 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 06:31:34,007 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 06:31:34,007 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 06:31:34,008 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 06:31:34,008 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 06:31:34,009 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 06:31:34,009 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_b6f15951-5d86-4c81-b736-012175d45f64/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-11-23 06:31:34,020 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 06:31:34,020 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 06:31:34,020 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 06:31:34,021 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 06:31:34,021 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-23 06:31:34,021 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-23 06:31:34,021 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-23 06:31:34,021 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-23 06:31:34,021 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-23 06:31:34,021 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-23 06:31:34,022 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-23 06:31:34,022 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-23 06:31:34,022 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-23 06:31:34,023 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 06:31:34,023 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 06:31:34,023 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 06:31:34,023 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 06:31:34,023 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 06:31:34,023 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 06:31:34,023 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 06:31:34,024 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 06:31:34,024 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 06:31:34,024 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 06:31:34,024 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 06:31:34,024 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 06:31:34,025 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 06:31:34,025 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 06:31:34,025 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 06:31:34,025 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 06:31:34,025 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 06:31:34,025 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 06:31:34,026 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 06:31:34,026 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 06:31:34,026 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-23 06:31:34,026 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 06:31:34,026 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 06:31:34,026 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 06:31:34,026 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_b6f15951-5d86-4c81-b736-012175d45f64/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0565341d48a13ae8e32e38d25cc35ee0d392a001 [2018-11-23 06:31:34,051 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 06:31:34,059 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 06:31:34,062 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 06:31:34,063 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 06:31:34,063 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 06:31:34,064 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_b6f15951-5d86-4c81-b736-012175d45f64/bin-2019/utaipan/../../sv-benchmarks/c/pthread-wmm/thin001_power.opt_false-unreach-call.i [2018-11-23 06:31:34,104 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_b6f15951-5d86-4c81-b736-012175d45f64/bin-2019/utaipan/data/38e98258d/7c6c27c3b6554071a63e8b5d457454bd/FLAG985bc0ef9 [2018-11-23 06:31:34,443 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 06:31:34,443 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_b6f15951-5d86-4c81-b736-012175d45f64/sv-benchmarks/c/pthread-wmm/thin001_power.opt_false-unreach-call.i [2018-11-23 06:31:34,454 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_b6f15951-5d86-4c81-b736-012175d45f64/bin-2019/utaipan/data/38e98258d/7c6c27c3b6554071a63e8b5d457454bd/FLAG985bc0ef9 [2018-11-23 06:31:34,463 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_b6f15951-5d86-4c81-b736-012175d45f64/bin-2019/utaipan/data/38e98258d/7c6c27c3b6554071a63e8b5d457454bd [2018-11-23 06:31:34,466 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 06:31:34,466 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 06:31:34,467 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 06:31:34,467 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 06:31:34,469 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 06:31:34,469 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 06:31:34" (1/1) ... [2018-11-23 06:31:34,471 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3e1fb88e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:31:34, skipping insertion in model container [2018-11-23 06:31:34,471 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 06:31:34" (1/1) ... [2018-11-23 06:31:34,477 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 06:31:34,506 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 06:31:34,749 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 06:31:34,756 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 06:31:34,842 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 06:31:34,880 INFO L195 MainTranslator]: Completed translation [2018-11-23 06:31:34,880 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:31:34 WrapperNode [2018-11-23 06:31:34,881 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 06:31:34,881 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 06:31:34,881 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 06:31:34,881 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 06:31:34,886 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:31:34" (1/1) ... [2018-11-23 06:31:34,901 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:31:34" (1/1) ... [2018-11-23 06:31:34,921 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 06:31:34,922 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 06:31:34,922 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 06:31:34,922 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 06:31:34,929 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:31:34" (1/1) ... [2018-11-23 06:31:34,929 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:31:34" (1/1) ... [2018-11-23 06:31:34,933 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:31:34" (1/1) ... [2018-11-23 06:31:34,933 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:31:34" (1/1) ... [2018-11-23 06:31:34,943 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:31:34" (1/1) ... [2018-11-23 06:31:34,947 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:31:34" (1/1) ... [2018-11-23 06:31:34,950 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:31:34" (1/1) ... [2018-11-23 06:31:34,953 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 06:31:34,954 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 06:31:34,954 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 06:31:34,954 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 06:31:34,955 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:31:34" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b6f15951-5d86-4c81-b736-012175d45f64/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 06:31:35,007 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 06:31:35,008 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-23 06:31:35,008 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-23 06:31:35,008 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-23 06:31:35,008 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 06:31:35,008 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-23 06:31:35,008 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-23 06:31:35,008 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-23 06:31:35,008 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-23 06:31:35,009 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2018-11-23 06:31:35,009 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2018-11-23 06:31:35,009 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-11-23 06:31:35,009 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-23 06:31:35,009 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 06:31:35,009 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 06:31:35,012 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-23 06:31:35,633 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 06:31:35,633 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-23 06:31:35,634 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 06:31:35 BoogieIcfgContainer [2018-11-23 06:31:35,634 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 06:31:35,634 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 06:31:35,635 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 06:31:35,637 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 06:31:35,637 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 06:31:34" (1/3) ... [2018-11-23 06:31:35,638 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@168bbdde and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 06:31:35, skipping insertion in model container [2018-11-23 06:31:35,638 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:31:34" (2/3) ... [2018-11-23 06:31:35,638 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@168bbdde and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 06:31:35, skipping insertion in model container [2018-11-23 06:31:35,638 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 06:31:35" (3/3) ... [2018-11-23 06:31:35,640 INFO L112 eAbstractionObserver]: Analyzing ICFG thin001_power.opt_false-unreach-call.i [2018-11-23 06:31:35,673 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,674 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,674 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,674 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,674 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,674 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,674 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,675 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,675 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,675 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,675 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,675 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,675 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,675 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,675 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,675 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,676 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,676 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,676 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,676 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,676 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,677 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,677 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,677 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,677 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,677 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,677 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,678 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,678 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,678 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,678 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,678 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,678 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,679 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,679 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,679 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,679 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,680 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,680 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,680 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,680 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,680 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,680 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,680 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,681 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,681 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,681 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,681 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,681 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,681 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,682 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,682 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,682 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,682 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,682 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,683 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,683 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,683 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,683 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,683 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,683 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,683 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,683 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,683 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,683 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,683 WARN L317 ript$VariableManager]: TermVariabe Thread2_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,683 WARN L317 ript$VariableManager]: TermVariabe Thread2_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,684 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,684 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,684 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,684 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,684 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,684 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,684 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,684 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,684 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,684 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,684 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,684 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,685 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,685 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,685 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,685 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,685 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,685 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,685 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,686 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,686 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,686 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,686 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,686 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,686 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,686 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,686 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,686 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,687 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,687 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,687 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,687 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,687 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,687 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,687 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,687 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,688 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,688 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,688 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,688 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,688 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,688 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,688 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,688 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,689 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,689 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,689 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,689 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,689 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,689 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,690 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,690 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,690 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,690 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,690 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,690 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,690 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,691 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,691 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,691 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,691 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,691 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,692 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,692 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,692 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,692 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,692 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,692 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,693 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,693 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,693 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,693 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,693 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,693 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,693 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,694 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,694 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,694 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,694 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,694 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,694 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,694 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,695 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,695 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,695 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,695 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,695 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,695 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,695 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,696 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,696 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,696 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,696 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,696 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,696 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,696 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,696 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,697 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,697 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,697 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,697 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,697 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,697 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,698 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,698 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,698 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,698 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,698 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,698 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,698 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,699 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,699 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,699 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,699 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,699 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,699 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,699 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,699 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,700 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,700 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,700 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,700 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,700 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,700 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,700 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,701 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,701 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,701 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,701 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,701 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,701 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,701 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,701 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,702 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,702 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,702 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,702 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,702 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,702 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,702 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,703 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,703 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,703 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,703 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,703 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,703 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,703 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,703 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,704 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,704 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,704 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,704 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,704 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,704 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,704 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,704 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,705 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,705 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,705 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,705 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,705 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,705 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,705 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,706 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,706 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,706 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,706 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,706 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,706 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,706 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,707 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,707 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,707 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,707 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,707 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,707 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,707 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,708 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,708 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,708 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,708 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,708 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,708 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,708 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,708 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,709 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,709 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,709 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,709 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,709 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,709 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,709 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,710 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,710 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,710 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,710 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,710 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,710 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,710 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,711 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,711 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 06:31:35,724 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-23 06:31:35,724 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 06:31:35,734 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-23 06:31:35,747 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-23 06:31:35,770 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 06:31:35,770 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 06:31:35,770 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 06:31:35,770 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 06:31:35,770 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 06:31:35,770 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 06:31:35,770 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 06:31:35,770 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 06:31:35,781 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 217places, 275 transitions [2018-11-23 06:33:03,938 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 346782 states. [2018-11-23 06:33:03,940 INFO L276 IsEmpty]: Start isEmpty. Operand 346782 states. [2018-11-23 06:33:03,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-23 06:33:03,948 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:33:03,949 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:33:03,951 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:33:03,955 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:33:03,956 INFO L82 PathProgramCache]: Analyzing trace with hash -1575025892, now seen corresponding path program 1 times [2018-11-23 06:33:03,958 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:33:03,998 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:03,999 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:33:03,999 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:03,999 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:33:04,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:33:04,161 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:33:04,163 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:33:04,163 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 06:33:04,164 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:33:04,168 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 06:33:04,176 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 06:33:04,177 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:33:04,178 INFO L87 Difference]: Start difference. First operand 346782 states. Second operand 4 states. [2018-11-23 06:33:10,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:33:10,351 INFO L93 Difference]: Finished difference Result 604682 states and 2849651 transitions. [2018-11-23 06:33:10,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 06:33:10,352 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2018-11-23 06:33:10,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:33:12,125 INFO L225 Difference]: With dead ends: 604682 [2018-11-23 06:33:12,125 INFO L226 Difference]: Without dead ends: 434932 [2018-11-23 06:33:12,127 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:33:22,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434932 states. [2018-11-23 06:33:27,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434932 to 269012. [2018-11-23 06:33:27,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 269012 states. [2018-11-23 06:33:28,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269012 states to 269012 states and 1271315 transitions. [2018-11-23 06:33:28,467 INFO L78 Accepts]: Start accepts. Automaton has 269012 states and 1271315 transitions. Word has length 59 [2018-11-23 06:33:28,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:33:28,467 INFO L480 AbstractCegarLoop]: Abstraction has 269012 states and 1271315 transitions. [2018-11-23 06:33:28,467 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 06:33:28,467 INFO L276 IsEmpty]: Start isEmpty. Operand 269012 states and 1271315 transitions. [2018-11-23 06:33:28,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-11-23 06:33:28,483 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:33:28,483 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:33:28,483 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:33:28,483 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:33:28,484 INFO L82 PathProgramCache]: Analyzing trace with hash -1682673917, now seen corresponding path program 1 times [2018-11-23 06:33:28,484 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:33:28,488 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:28,488 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:33:28,488 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:28,489 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:33:28,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:33:28,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:33:28,589 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:33:28,590 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 06:33:28,590 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:33:28,591 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 06:33:28,591 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 06:33:28,591 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:33:28,592 INFO L87 Difference]: Start difference. First operand 269012 states and 1271315 transitions. Second operand 4 states. [2018-11-23 06:33:31,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:33:31,362 INFO L93 Difference]: Finished difference Result 237806 states and 1098321 transitions. [2018-11-23 06:33:31,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 06:33:31,362 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 71 [2018-11-23 06:33:31,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:33:32,012 INFO L225 Difference]: With dead ends: 237806 [2018-11-23 06:33:32,012 INFO L226 Difference]: Without dead ends: 229076 [2018-11-23 06:33:32,013 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:33:34,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229076 states. [2018-11-23 06:33:43,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229076 to 229076. [2018-11-23 06:33:43,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 229076 states. [2018-11-23 06:33:44,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 229076 states to 229076 states and 1065775 transitions. [2018-11-23 06:33:44,283 INFO L78 Accepts]: Start accepts. Automaton has 229076 states and 1065775 transitions. Word has length 71 [2018-11-23 06:33:44,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:33:44,283 INFO L480 AbstractCegarLoop]: Abstraction has 229076 states and 1065775 transitions. [2018-11-23 06:33:44,284 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 06:33:44,284 INFO L276 IsEmpty]: Start isEmpty. Operand 229076 states and 1065775 transitions. [2018-11-23 06:33:44,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-23 06:33:44,290 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:33:44,290 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:33:44,291 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:33:44,291 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:33:44,291 INFO L82 PathProgramCache]: Analyzing trace with hash 112998639, now seen corresponding path program 1 times [2018-11-23 06:33:44,291 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:33:44,293 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:44,294 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:33:44,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:44,294 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:33:44,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:33:44,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:33:44,377 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:33:44,378 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 06:33:44,378 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:33:44,378 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 06:33:44,378 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 06:33:44,378 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:33:44,378 INFO L87 Difference]: Start difference. First operand 229076 states and 1065775 transitions. Second operand 5 states. [2018-11-23 06:33:44,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:33:44,655 INFO L93 Difference]: Finished difference Result 62964 states and 259111 transitions. [2018-11-23 06:33:44,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 06:33:44,656 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2018-11-23 06:33:44,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:33:44,791 INFO L225 Difference]: With dead ends: 62964 [2018-11-23 06:33:44,791 INFO L226 Difference]: Without dead ends: 55536 [2018-11-23 06:33:44,791 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-23 06:33:45,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55536 states. [2018-11-23 06:33:46,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55536 to 54660. [2018-11-23 06:33:46,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54660 states. [2018-11-23 06:33:46,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54660 states to 54660 states and 224891 transitions. [2018-11-23 06:33:46,250 INFO L78 Accepts]: Start accepts. Automaton has 54660 states and 224891 transitions. Word has length 72 [2018-11-23 06:33:46,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:33:46,250 INFO L480 AbstractCegarLoop]: Abstraction has 54660 states and 224891 transitions. [2018-11-23 06:33:46,250 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 06:33:46,251 INFO L276 IsEmpty]: Start isEmpty. Operand 54660 states and 224891 transitions. [2018-11-23 06:33:46,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-23 06:33:46,253 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:33:46,253 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:33:46,253 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:33:46,254 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:33:46,254 INFO L82 PathProgramCache]: Analyzing trace with hash -1640714172, now seen corresponding path program 1 times [2018-11-23 06:33:46,254 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:33:46,256 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:46,256 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:33:46,256 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:46,256 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:33:46,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:33:46,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:33:46,343 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:33:46,343 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 06:33:46,344 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:33:46,344 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:33:46,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:33:46,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:33:46,344 INFO L87 Difference]: Start difference. First operand 54660 states and 224891 transitions. Second operand 6 states. [2018-11-23 06:33:47,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:33:47,097 INFO L93 Difference]: Finished difference Result 117028 states and 470836 transitions. [2018-11-23 06:33:47,097 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 06:33:47,097 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-11-23 06:33:47,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:33:47,358 INFO L225 Difference]: With dead ends: 117028 [2018-11-23 06:33:47,359 INFO L226 Difference]: Without dead ends: 116528 [2018-11-23 06:33:47,359 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-11-23 06:33:47,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116528 states. [2018-11-23 06:33:49,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116528 to 70499. [2018-11-23 06:33:49,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70499 states. [2018-11-23 06:33:49,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70499 states to 70499 states and 284728 transitions. [2018-11-23 06:33:49,487 INFO L78 Accepts]: Start accepts. Automaton has 70499 states and 284728 transitions. Word has length 72 [2018-11-23 06:33:49,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:33:49,488 INFO L480 AbstractCegarLoop]: Abstraction has 70499 states and 284728 transitions. [2018-11-23 06:33:49,488 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:33:49,488 INFO L276 IsEmpty]: Start isEmpty. Operand 70499 states and 284728 transitions. [2018-11-23 06:33:49,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-11-23 06:33:49,491 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:33:49,491 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:33:49,492 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:33:49,492 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:33:49,492 INFO L82 PathProgramCache]: Analyzing trace with hash 523567789, now seen corresponding path program 1 times [2018-11-23 06:33:49,492 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:33:49,493 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:49,493 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:33:49,493 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:49,493 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:33:49,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:33:49,541 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:33:49,541 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:33:49,541 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 06:33:49,541 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:33:49,541 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 06:33:49,541 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 06:33:49,541 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 06:33:49,541 INFO L87 Difference]: Start difference. First operand 70499 states and 284728 transitions. Second operand 3 states. [2018-11-23 06:33:49,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:33:49,937 INFO L93 Difference]: Finished difference Result 99897 states and 398052 transitions. [2018-11-23 06:33:49,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 06:33:49,938 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 74 [2018-11-23 06:33:49,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:33:50,166 INFO L225 Difference]: With dead ends: 99897 [2018-11-23 06:33:50,166 INFO L226 Difference]: Without dead ends: 99897 [2018-11-23 06:33:50,452 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 06:33:50,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99897 states. [2018-11-23 06:33:51,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99897 to 78575. [2018-11-23 06:33:51,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78575 states. [2018-11-23 06:33:51,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78575 states to 78575 states and 313492 transitions. [2018-11-23 06:33:51,584 INFO L78 Accepts]: Start accepts. Automaton has 78575 states and 313492 transitions. Word has length 74 [2018-11-23 06:33:51,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:33:51,585 INFO L480 AbstractCegarLoop]: Abstraction has 78575 states and 313492 transitions. [2018-11-23 06:33:51,585 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 06:33:51,585 INFO L276 IsEmpty]: Start isEmpty. Operand 78575 states and 313492 transitions. [2018-11-23 06:33:51,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-11-23 06:33:51,590 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:33:51,591 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:33:51,591 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:33:51,591 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:33:51,591 INFO L82 PathProgramCache]: Analyzing trace with hash -690257246, now seen corresponding path program 1 times [2018-11-23 06:33:51,591 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:33:51,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:51,592 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:33:51,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:51,593 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:33:51,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:33:51,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:33:51,676 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:33:51,676 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 06:33:51,676 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:33:51,676 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 06:33:51,676 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 06:33:51,676 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-23 06:33:51,676 INFO L87 Difference]: Start difference. First operand 78575 states and 313492 transitions. Second operand 7 states. [2018-11-23 06:33:52,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:33:52,712 INFO L93 Difference]: Finished difference Result 104973 states and 415691 transitions. [2018-11-23 06:33:52,712 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 06:33:52,712 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 78 [2018-11-23 06:33:52,712 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:33:52,920 INFO L225 Difference]: With dead ends: 104973 [2018-11-23 06:33:52,920 INFO L226 Difference]: Without dead ends: 104443 [2018-11-23 06:33:52,920 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2018-11-23 06:33:53,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104443 states. [2018-11-23 06:33:53,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104443 to 78092. [2018-11-23 06:33:53,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78092 states. [2018-11-23 06:33:54,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78092 states to 78092 states and 312344 transitions. [2018-11-23 06:33:54,150 INFO L78 Accepts]: Start accepts. Automaton has 78092 states and 312344 transitions. Word has length 78 [2018-11-23 06:33:54,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:33:54,150 INFO L480 AbstractCegarLoop]: Abstraction has 78092 states and 312344 transitions. [2018-11-23 06:33:54,150 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 06:33:54,150 INFO L276 IsEmpty]: Start isEmpty. Operand 78092 states and 312344 transitions. [2018-11-23 06:33:54,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-11-23 06:33:54,167 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:33:54,167 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:33:54,167 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:33:54,167 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:33:54,167 INFO L82 PathProgramCache]: Analyzing trace with hash 1434670274, now seen corresponding path program 1 times [2018-11-23 06:33:54,168 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:33:54,169 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:54,169 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:33:54,169 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:54,169 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:33:54,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:33:54,235 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:33:54,235 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:33:54,235 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 06:33:54,235 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:33:54,235 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 06:33:54,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 06:33:54,236 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:33:54,236 INFO L87 Difference]: Start difference. First operand 78092 states and 312344 transitions. Second operand 4 states. [2018-11-23 06:33:54,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:33:54,795 INFO L93 Difference]: Finished difference Result 85627 states and 342574 transitions. [2018-11-23 06:33:54,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 06:33:54,795 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 86 [2018-11-23 06:33:54,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:33:54,956 INFO L225 Difference]: With dead ends: 85627 [2018-11-23 06:33:54,956 INFO L226 Difference]: Without dead ends: 85627 [2018-11-23 06:33:54,957 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:33:55,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85627 states. [2018-11-23 06:33:55,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85627 to 80612. [2018-11-23 06:33:55,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80612 states. [2018-11-23 06:33:56,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80612 states to 80612 states and 322364 transitions. [2018-11-23 06:33:56,119 INFO L78 Accepts]: Start accepts. Automaton has 80612 states and 322364 transitions. Word has length 86 [2018-11-23 06:33:56,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:33:56,119 INFO L480 AbstractCegarLoop]: Abstraction has 80612 states and 322364 transitions. [2018-11-23 06:33:56,119 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 06:33:56,119 INFO L276 IsEmpty]: Start isEmpty. Operand 80612 states and 322364 transitions. [2018-11-23 06:33:56,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-11-23 06:33:56,136 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:33:56,136 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:33:56,136 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:33:56,136 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:33:56,136 INFO L82 PathProgramCache]: Analyzing trace with hash -1117486687, now seen corresponding path program 1 times [2018-11-23 06:33:56,136 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:33:56,137 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:56,137 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:33:56,138 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:56,138 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:33:56,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:33:56,311 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:33:56,311 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:33:56,311 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-23 06:33:56,311 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:33:56,312 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 06:33:56,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 06:33:56,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-11-23 06:33:56,312 INFO L87 Difference]: Start difference. First operand 80612 states and 322364 transitions. Second operand 10 states. [2018-11-23 06:33:57,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:33:57,547 INFO L93 Difference]: Finished difference Result 111736 states and 437776 transitions. [2018-11-23 06:33:57,548 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-23 06:33:57,548 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 86 [2018-11-23 06:33:57,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:33:57,770 INFO L225 Difference]: With dead ends: 111736 [2018-11-23 06:33:57,770 INFO L226 Difference]: Without dead ends: 111381 [2018-11-23 06:33:57,770 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=136, Invalid=370, Unknown=0, NotChecked=0, Total=506 [2018-11-23 06:33:58,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111381 states. [2018-11-23 06:33:59,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111381 to 91754. [2018-11-23 06:33:59,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91754 states. [2018-11-23 06:33:59,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91754 states to 91754 states and 363901 transitions. [2018-11-23 06:33:59,539 INFO L78 Accepts]: Start accepts. Automaton has 91754 states and 363901 transitions. Word has length 86 [2018-11-23 06:33:59,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:33:59,540 INFO L480 AbstractCegarLoop]: Abstraction has 91754 states and 363901 transitions. [2018-11-23 06:33:59,540 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 06:33:59,540 INFO L276 IsEmpty]: Start isEmpty. Operand 91754 states and 363901 transitions. [2018-11-23 06:33:59,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-23 06:33:59,572 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:33:59,572 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:33:59,572 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:33:59,572 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:33:59,572 INFO L82 PathProgramCache]: Analyzing trace with hash -683354241, now seen corresponding path program 1 times [2018-11-23 06:33:59,573 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:33:59,574 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:59,574 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:33:59,574 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:33:59,574 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:33:59,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:33:59,627 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:33:59,627 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:33:59,627 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 06:33:59,627 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:33:59,627 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 06:33:59,627 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 06:33:59,627 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 06:33:59,628 INFO L87 Difference]: Start difference. First operand 91754 states and 363901 transitions. Second operand 3 states. [2018-11-23 06:34:00,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:00,090 INFO L93 Difference]: Finished difference Result 110538 states and 435126 transitions. [2018-11-23 06:34:00,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 06:34:00,090 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 92 [2018-11-23 06:34:00,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:00,307 INFO L225 Difference]: With dead ends: 110538 [2018-11-23 06:34:00,307 INFO L226 Difference]: Without dead ends: 110538 [2018-11-23 06:34:00,308 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 06:34:00,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110538 states. [2018-11-23 06:34:01,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110538 to 89632. [2018-11-23 06:34:01,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89632 states. [2018-11-23 06:34:02,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89632 states to 89632 states and 351874 transitions. [2018-11-23 06:34:02,028 INFO L78 Accepts]: Start accepts. Automaton has 89632 states and 351874 transitions. Word has length 92 [2018-11-23 06:34:02,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:02,028 INFO L480 AbstractCegarLoop]: Abstraction has 89632 states and 351874 transitions. [2018-11-23 06:34:02,028 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 06:34:02,028 INFO L276 IsEmpty]: Start isEmpty. Operand 89632 states and 351874 transitions. [2018-11-23 06:34:02,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-23 06:34:02,060 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:02,060 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:02,060 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:02,060 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:02,060 INFO L82 PathProgramCache]: Analyzing trace with hash 192568783, now seen corresponding path program 1 times [2018-11-23 06:34:02,061 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:02,062 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:02,062 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:02,062 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:02,062 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:02,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:02,123 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:02,123 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:02,123 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 06:34:02,123 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:02,123 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 06:34:02,123 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 06:34:02,123 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:34:02,124 INFO L87 Difference]: Start difference. First operand 89632 states and 351874 transitions. Second operand 4 states. [2018-11-23 06:34:02,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:02,723 INFO L93 Difference]: Finished difference Result 119085 states and 458214 transitions. [2018-11-23 06:34:02,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 06:34:02,723 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2018-11-23 06:34:02,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:02,955 INFO L225 Difference]: With dead ends: 119085 [2018-11-23 06:34:02,955 INFO L226 Difference]: Without dead ends: 119085 [2018-11-23 06:34:02,955 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:34:03,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119085 states. [2018-11-23 06:34:04,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119085 to 103759. [2018-11-23 06:34:04,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103759 states. [2018-11-23 06:34:04,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103759 states to 103759 states and 402755 transitions. [2018-11-23 06:34:04,747 INFO L78 Accepts]: Start accepts. Automaton has 103759 states and 402755 transitions. Word has length 93 [2018-11-23 06:34:04,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:04,747 INFO L480 AbstractCegarLoop]: Abstraction has 103759 states and 402755 transitions. [2018-11-23 06:34:04,747 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 06:34:04,747 INFO L276 IsEmpty]: Start isEmpty. Operand 103759 states and 402755 transitions. [2018-11-23 06:34:04,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-23 06:34:04,801 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:04,801 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:04,801 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:04,801 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:04,801 INFO L82 PathProgramCache]: Analyzing trace with hash 203884910, now seen corresponding path program 1 times [2018-11-23 06:34:04,801 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:04,803 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:04,803 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:04,803 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:04,803 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:04,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:04,859 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:04,860 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:04,860 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 06:34:04,860 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:04,860 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 06:34:04,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 06:34:04,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 06:34:04,861 INFO L87 Difference]: Start difference. First operand 103759 states and 402755 transitions. Second operand 3 states. [2018-11-23 06:34:05,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:05,471 INFO L93 Difference]: Finished difference Result 107236 states and 414613 transitions. [2018-11-23 06:34:05,471 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 06:34:05,471 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 93 [2018-11-23 06:34:05,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:05,697 INFO L225 Difference]: With dead ends: 107236 [2018-11-23 06:34:05,697 INFO L226 Difference]: Without dead ends: 107236 [2018-11-23 06:34:05,698 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 06:34:05,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107236 states. [2018-11-23 06:34:07,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107236 to 106055. [2018-11-23 06:34:07,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106055 states. [2018-11-23 06:34:07,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106055 states to 106055 states and 410410 transitions. [2018-11-23 06:34:07,653 INFO L78 Accepts]: Start accepts. Automaton has 106055 states and 410410 transitions. Word has length 93 [2018-11-23 06:34:07,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:07,653 INFO L480 AbstractCegarLoop]: Abstraction has 106055 states and 410410 transitions. [2018-11-23 06:34:07,653 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 06:34:07,653 INFO L276 IsEmpty]: Start isEmpty. Operand 106055 states and 410410 transitions. [2018-11-23 06:34:07,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 06:34:07,709 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:07,709 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:07,710 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:07,710 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:07,710 INFO L82 PathProgramCache]: Analyzing trace with hash -1562608461, now seen corresponding path program 1 times [2018-11-23 06:34:07,710 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:07,711 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:07,711 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:07,711 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:07,712 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:07,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:07,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:07,797 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:07,797 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 06:34:07,797 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:07,797 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:34:07,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:34:07,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:34:07,797 INFO L87 Difference]: Start difference. First operand 106055 states and 410410 transitions. Second operand 6 states. [2018-11-23 06:34:09,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:09,014 INFO L93 Difference]: Finished difference Result 138332 states and 525656 transitions. [2018-11-23 06:34:09,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 06:34:09,015 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-11-23 06:34:09,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:09,305 INFO L225 Difference]: With dead ends: 138332 [2018-11-23 06:34:09,306 INFO L226 Difference]: Without dead ends: 137832 [2018-11-23 06:34:09,306 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-23 06:34:09,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137832 states. [2018-11-23 06:34:11,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137832 to 118845. [2018-11-23 06:34:11,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118845 states. [2018-11-23 06:34:11,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118845 states to 118845 states and 455877 transitions. [2018-11-23 06:34:11,595 INFO L78 Accepts]: Start accepts. Automaton has 118845 states and 455877 transitions. Word has length 95 [2018-11-23 06:34:11,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:11,595 INFO L480 AbstractCegarLoop]: Abstraction has 118845 states and 455877 transitions. [2018-11-23 06:34:11,596 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:34:11,596 INFO L276 IsEmpty]: Start isEmpty. Operand 118845 states and 455877 transitions. [2018-11-23 06:34:11,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 06:34:11,656 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:11,656 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:11,656 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:11,656 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:11,656 INFO L82 PathProgramCache]: Analyzing trace with hash -1551292334, now seen corresponding path program 1 times [2018-11-23 06:34:11,656 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:11,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:11,658 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:11,658 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:11,658 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:11,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:11,746 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:11,746 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:11,746 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 06:34:11,746 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:11,747 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:34:11,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:34:11,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:34:11,747 INFO L87 Difference]: Start difference. First operand 118845 states and 455877 transitions. Second operand 6 states. [2018-11-23 06:34:12,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:12,909 INFO L93 Difference]: Finished difference Result 133218 states and 498309 transitions. [2018-11-23 06:34:12,909 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 06:34:12,909 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-11-23 06:34:12,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:13,170 INFO L225 Difference]: With dead ends: 133218 [2018-11-23 06:34:13,170 INFO L226 Difference]: Without dead ends: 133218 [2018-11-23 06:34:13,170 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-23 06:34:13,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133218 states. [2018-11-23 06:34:14,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133218 to 121746. [2018-11-23 06:34:14,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121746 states. [2018-11-23 06:34:15,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121746 states to 121746 states and 460619 transitions. [2018-11-23 06:34:15,037 INFO L78 Accepts]: Start accepts. Automaton has 121746 states and 460619 transitions. Word has length 95 [2018-11-23 06:34:15,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:15,037 INFO L480 AbstractCegarLoop]: Abstraction has 121746 states and 460619 transitions. [2018-11-23 06:34:15,037 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:34:15,037 INFO L276 IsEmpty]: Start isEmpty. Operand 121746 states and 460619 transitions. [2018-11-23 06:34:15,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 06:34:15,096 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:15,097 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:15,097 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:15,097 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:15,097 INFO L82 PathProgramCache]: Analyzing trace with hash -1520272527, now seen corresponding path program 1 times [2018-11-23 06:34:15,097 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:15,098 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:15,098 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:15,098 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:15,098 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:15,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:15,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:15,669 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:15,669 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 06:34:15,669 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:15,670 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 06:34:15,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 06:34:15,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:34:15,670 INFO L87 Difference]: Start difference. First operand 121746 states and 460619 transitions. Second operand 5 states. [2018-11-23 06:34:16,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:16,466 INFO L93 Difference]: Finished difference Result 151316 states and 564452 transitions. [2018-11-23 06:34:16,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 06:34:16,466 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-11-23 06:34:16,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:16,784 INFO L225 Difference]: With dead ends: 151316 [2018-11-23 06:34:16,784 INFO L226 Difference]: Without dead ends: 151316 [2018-11-23 06:34:16,784 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 06:34:17,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151316 states. [2018-11-23 06:34:18,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151316 to 140748. [2018-11-23 06:34:18,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140748 states. [2018-11-23 06:34:19,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140748 states to 140748 states and 524720 transitions. [2018-11-23 06:34:19,270 INFO L78 Accepts]: Start accepts. Automaton has 140748 states and 524720 transitions. Word has length 95 [2018-11-23 06:34:19,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:19,270 INFO L480 AbstractCegarLoop]: Abstraction has 140748 states and 524720 transitions. [2018-11-23 06:34:19,270 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 06:34:19,270 INFO L276 IsEmpty]: Start isEmpty. Operand 140748 states and 524720 transitions. [2018-11-23 06:34:19,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 06:34:19,330 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:19,330 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:19,330 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:19,330 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:19,330 INFO L82 PathProgramCache]: Analyzing trace with hash 1777622416, now seen corresponding path program 1 times [2018-11-23 06:34:19,330 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:19,331 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:19,331 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:19,331 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:19,331 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:19,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:19,397 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:19,398 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:19,398 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 06:34:19,398 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:19,398 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 06:34:19,398 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 06:34:19,398 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:34:19,398 INFO L87 Difference]: Start difference. First operand 140748 states and 524720 transitions. Second operand 5 states. [2018-11-23 06:34:20,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:20,832 INFO L93 Difference]: Finished difference Result 206315 states and 766646 transitions. [2018-11-23 06:34:20,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 06:34:20,833 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-11-23 06:34:20,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:21,256 INFO L225 Difference]: With dead ends: 206315 [2018-11-23 06:34:21,256 INFO L226 Difference]: Without dead ends: 206315 [2018-11-23 06:34:21,256 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-23 06:34:21,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206315 states. [2018-11-23 06:34:23,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206315 to 175062. [2018-11-23 06:34:23,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175062 states. [2018-11-23 06:34:24,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175062 states to 175062 states and 650421 transitions. [2018-11-23 06:34:24,950 INFO L78 Accepts]: Start accepts. Automaton has 175062 states and 650421 transitions. Word has length 95 [2018-11-23 06:34:24,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:24,950 INFO L480 AbstractCegarLoop]: Abstraction has 175062 states and 650421 transitions. [2018-11-23 06:34:24,950 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 06:34:24,950 INFO L276 IsEmpty]: Start isEmpty. Operand 175062 states and 650421 transitions. [2018-11-23 06:34:25,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 06:34:25,020 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:25,020 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:25,020 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:25,020 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:25,020 INFO L82 PathProgramCache]: Analyzing trace with hash -19328943, now seen corresponding path program 1 times [2018-11-23 06:34:25,020 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:25,021 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:25,021 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:25,021 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:25,022 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:25,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:25,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:25,098 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:25,098 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 06:34:25,099 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:25,099 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:34:25,099 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:34:25,099 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:34:25,099 INFO L87 Difference]: Start difference. First operand 175062 states and 650421 transitions. Second operand 6 states. [2018-11-23 06:34:25,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:25,274 INFO L93 Difference]: Finished difference Result 54182 states and 168525 transitions. [2018-11-23 06:34:25,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 06:34:25,274 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-11-23 06:34:25,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:25,326 INFO L225 Difference]: With dead ends: 54182 [2018-11-23 06:34:25,326 INFO L226 Difference]: Without dead ends: 44774 [2018-11-23 06:34:25,326 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-11-23 06:34:25,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44774 states. [2018-11-23 06:34:25,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44774 to 38449. [2018-11-23 06:34:25,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38449 states. [2018-11-23 06:34:25,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38449 states to 38449 states and 117604 transitions. [2018-11-23 06:34:25,764 INFO L78 Accepts]: Start accepts. Automaton has 38449 states and 117604 transitions. Word has length 95 [2018-11-23 06:34:25,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:25,764 INFO L480 AbstractCegarLoop]: Abstraction has 38449 states and 117604 transitions. [2018-11-23 06:34:25,764 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:34:25,764 INFO L276 IsEmpty]: Start isEmpty. Operand 38449 states and 117604 transitions. [2018-11-23 06:34:25,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-23 06:34:25,789 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:25,789 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:25,789 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:25,789 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:25,789 INFO L82 PathProgramCache]: Analyzing trace with hash 3877787, now seen corresponding path program 1 times [2018-11-23 06:34:25,790 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:25,790 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:25,791 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:25,791 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:25,791 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:25,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:25,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:25,843 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:25,843 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 06:34:25,843 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:25,844 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 06:34:25,844 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 06:34:25,844 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:34:25,844 INFO L87 Difference]: Start difference. First operand 38449 states and 117604 transitions. Second operand 5 states. [2018-11-23 06:34:26,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:26,036 INFO L93 Difference]: Finished difference Result 43859 states and 134447 transitions. [2018-11-23 06:34:26,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 06:34:26,037 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-11-23 06:34:26,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:26,083 INFO L225 Difference]: With dead ends: 43859 [2018-11-23 06:34:26,083 INFO L226 Difference]: Without dead ends: 43859 [2018-11-23 06:34:26,084 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-23 06:34:26,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43859 states. [2018-11-23 06:34:26,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43859 to 38564. [2018-11-23 06:34:26,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38564 states. [2018-11-23 06:34:26,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38564 states to 38564 states and 117926 transitions. [2018-11-23 06:34:26,489 INFO L78 Accepts]: Start accepts. Automaton has 38564 states and 117926 transitions. Word has length 98 [2018-11-23 06:34:26,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:26,489 INFO L480 AbstractCegarLoop]: Abstraction has 38564 states and 117926 transitions. [2018-11-23 06:34:26,489 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 06:34:26,490 INFO L276 IsEmpty]: Start isEmpty. Operand 38564 states and 117926 transitions. [2018-11-23 06:34:26,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-23 06:34:26,515 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:26,515 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:26,515 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:26,515 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:26,515 INFO L82 PathProgramCache]: Analyzing trace with hash 1746688122, now seen corresponding path program 1 times [2018-11-23 06:34:26,515 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:26,516 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:26,517 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:26,517 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:26,517 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:26,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:26,581 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:26,581 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:26,581 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 06:34:26,581 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:26,582 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 06:34:26,582 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 06:34:26,582 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:34:26,582 INFO L87 Difference]: Start difference. First operand 38564 states and 117926 transitions. Second operand 5 states. [2018-11-23 06:34:26,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:26,873 INFO L93 Difference]: Finished difference Result 49646 states and 153106 transitions. [2018-11-23 06:34:26,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 06:34:26,873 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-11-23 06:34:26,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:26,929 INFO L225 Difference]: With dead ends: 49646 [2018-11-23 06:34:26,930 INFO L226 Difference]: Without dead ends: 49646 [2018-11-23 06:34:26,930 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:34:26,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49646 states. [2018-11-23 06:34:27,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49646 to 39434. [2018-11-23 06:34:27,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39434 states. [2018-11-23 06:34:27,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39434 states to 39434 states and 120372 transitions. [2018-11-23 06:34:27,349 INFO L78 Accepts]: Start accepts. Automaton has 39434 states and 120372 transitions. Word has length 98 [2018-11-23 06:34:27,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:27,349 INFO L480 AbstractCegarLoop]: Abstraction has 39434 states and 120372 transitions. [2018-11-23 06:34:27,349 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 06:34:27,349 INFO L276 IsEmpty]: Start isEmpty. Operand 39434 states and 120372 transitions. [2018-11-23 06:34:27,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-23 06:34:27,375 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:27,375 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:27,375 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:27,375 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:27,375 INFO L82 PathProgramCache]: Analyzing trace with hash -50263237, now seen corresponding path program 1 times [2018-11-23 06:34:27,375 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:27,376 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:27,376 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:27,376 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:27,376 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:27,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:27,451 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:27,451 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:27,451 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 06:34:27,452 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:27,452 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:34:27,452 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:34:27,452 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:34:27,452 INFO L87 Difference]: Start difference. First operand 39434 states and 120372 transitions. Second operand 6 states. [2018-11-23 06:34:28,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:28,017 INFO L93 Difference]: Finished difference Result 78743 states and 240695 transitions. [2018-11-23 06:34:28,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 06:34:28,017 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 98 [2018-11-23 06:34:28,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:28,104 INFO L225 Difference]: With dead ends: 78743 [2018-11-23 06:34:28,104 INFO L226 Difference]: Without dead ends: 78148 [2018-11-23 06:34:28,105 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-11-23 06:34:28,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78148 states. [2018-11-23 06:34:28,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78148 to 42604. [2018-11-23 06:34:28,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42604 states. [2018-11-23 06:34:28,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42604 states to 42604 states and 129633 transitions. [2018-11-23 06:34:28,705 INFO L78 Accepts]: Start accepts. Automaton has 42604 states and 129633 transitions. Word has length 98 [2018-11-23 06:34:28,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:28,706 INFO L480 AbstractCegarLoop]: Abstraction has 42604 states and 129633 transitions. [2018-11-23 06:34:28,706 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:34:28,706 INFO L276 IsEmpty]: Start isEmpty. Operand 42604 states and 129633 transitions. [2018-11-23 06:34:28,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 06:34:28,739 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:28,740 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:28,740 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:28,740 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:28,740 INFO L82 PathProgramCache]: Analyzing trace with hash -1030301258, now seen corresponding path program 1 times [2018-11-23 06:34:28,740 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:28,741 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:28,741 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:28,741 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:28,741 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:28,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:28,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:28,806 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:28,807 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 06:34:28,807 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:28,807 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 06:34:28,807 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 06:34:28,807 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:34:28,807 INFO L87 Difference]: Start difference. First operand 42604 states and 129633 transitions. Second operand 4 states. [2018-11-23 06:34:29,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:29,035 INFO L93 Difference]: Finished difference Result 47734 states and 144082 transitions. [2018-11-23 06:34:29,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 06:34:29,035 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 120 [2018-11-23 06:34:29,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:29,084 INFO L225 Difference]: With dead ends: 47734 [2018-11-23 06:34:29,084 INFO L226 Difference]: Without dead ends: 47734 [2018-11-23 06:34:29,084 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:34:29,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47734 states. [2018-11-23 06:34:29,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47734 to 44939. [2018-11-23 06:34:29,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44939 states. [2018-11-23 06:34:29,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44939 states to 44939 states and 135996 transitions. [2018-11-23 06:34:29,546 INFO L78 Accepts]: Start accepts. Automaton has 44939 states and 135996 transitions. Word has length 120 [2018-11-23 06:34:29,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:29,546 INFO L480 AbstractCegarLoop]: Abstraction has 44939 states and 135996 transitions. [2018-11-23 06:34:29,546 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 06:34:29,546 INFO L276 IsEmpty]: Start isEmpty. Operand 44939 states and 135996 transitions. [2018-11-23 06:34:29,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-11-23 06:34:29,581 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:29,581 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:29,581 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:29,582 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:29,582 INFO L82 PathProgramCache]: Analyzing trace with hash 785939968, now seen corresponding path program 1 times [2018-11-23 06:34:29,582 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:29,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:29,583 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:29,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:29,583 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:29,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:29,658 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:29,658 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:29,658 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 06:34:29,659 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:29,661 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 06:34:29,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 06:34:29,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:34:29,661 INFO L87 Difference]: Start difference. First operand 44939 states and 135996 transitions. Second operand 5 states. [2018-11-23 06:34:29,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:29,958 INFO L93 Difference]: Finished difference Result 53609 states and 161847 transitions. [2018-11-23 06:34:29,958 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 06:34:29,958 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 122 [2018-11-23 06:34:29,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:30,021 INFO L225 Difference]: With dead ends: 53609 [2018-11-23 06:34:30,021 INFO L226 Difference]: Without dead ends: 53609 [2018-11-23 06:34:30,022 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 06:34:30,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53609 states. [2018-11-23 06:34:30,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53609 to 45069. [2018-11-23 06:34:30,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45069 states. [2018-11-23 06:34:30,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45069 states to 45069 states and 136195 transitions. [2018-11-23 06:34:30,512 INFO L78 Accepts]: Start accepts. Automaton has 45069 states and 136195 transitions. Word has length 122 [2018-11-23 06:34:30,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:30,512 INFO L480 AbstractCegarLoop]: Abstraction has 45069 states and 136195 transitions. [2018-11-23 06:34:30,512 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 06:34:30,512 INFO L276 IsEmpty]: Start isEmpty. Operand 45069 states and 136195 transitions. [2018-11-23 06:34:30,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-11-23 06:34:30,547 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:30,547 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:30,547 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:30,547 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:30,547 INFO L82 PathProgramCache]: Analyzing trace with hash -2047447329, now seen corresponding path program 1 times [2018-11-23 06:34:30,547 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:30,548 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:30,548 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:30,548 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:30,548 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:30,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:30,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:30,602 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:30,602 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 06:34:30,602 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:30,602 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 06:34:30,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 06:34:30,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:34:30,603 INFO L87 Difference]: Start difference. First operand 45069 states and 136195 transitions. Second operand 5 states. [2018-11-23 06:34:31,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:31,421 INFO L93 Difference]: Finished difference Result 73185 states and 219003 transitions. [2018-11-23 06:34:31,422 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 06:34:31,423 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 122 [2018-11-23 06:34:31,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:31,531 INFO L225 Difference]: With dead ends: 73185 [2018-11-23 06:34:31,531 INFO L226 Difference]: Without dead ends: 73185 [2018-11-23 06:34:31,532 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:34:31,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73185 states. [2018-11-23 06:34:32,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73185 to 47879. [2018-11-23 06:34:32,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47879 states. [2018-11-23 06:34:32,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47879 states to 47879 states and 144868 transitions. [2018-11-23 06:34:32,168 INFO L78 Accepts]: Start accepts. Automaton has 47879 states and 144868 transitions. Word has length 122 [2018-11-23 06:34:32,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:32,169 INFO L480 AbstractCegarLoop]: Abstraction has 47879 states and 144868 transitions. [2018-11-23 06:34:32,169 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 06:34:32,169 INFO L276 IsEmpty]: Start isEmpty. Operand 47879 states and 144868 transitions. [2018-11-23 06:34:32,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-11-23 06:34:32,207 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:32,207 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:32,207 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:32,207 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:32,207 INFO L82 PathProgramCache]: Analyzing trace with hash -1696647392, now seen corresponding path program 1 times [2018-11-23 06:34:32,207 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:32,208 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:32,208 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:32,208 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:32,209 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:32,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:32,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:32,273 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:32,273 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 06:34:32,273 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:32,273 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:34:32,273 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:34:32,273 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:34:32,273 INFO L87 Difference]: Start difference. First operand 47879 states and 144868 transitions. Second operand 6 states. [2018-11-23 06:34:32,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:32,604 INFO L93 Difference]: Finished difference Result 61355 states and 184599 transitions. [2018-11-23 06:34:32,604 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 06:34:32,604 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 122 [2018-11-23 06:34:32,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:32,669 INFO L225 Difference]: With dead ends: 61355 [2018-11-23 06:34:32,669 INFO L226 Difference]: Without dead ends: 61227 [2018-11-23 06:34:32,669 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 06:34:32,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61227 states. [2018-11-23 06:34:33,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61227 to 51369. [2018-11-23 06:34:33,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51369 states. [2018-11-23 06:34:33,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51369 states to 51369 states and 155865 transitions. [2018-11-23 06:34:33,421 INFO L78 Accepts]: Start accepts. Automaton has 51369 states and 155865 transitions. Word has length 122 [2018-11-23 06:34:33,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:33,421 INFO L480 AbstractCegarLoop]: Abstraction has 51369 states and 155865 transitions. [2018-11-23 06:34:33,421 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:34:33,421 INFO L276 IsEmpty]: Start isEmpty. Operand 51369 states and 155865 transitions. [2018-11-23 06:34:33,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-11-23 06:34:33,465 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:33,466 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:33,466 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:33,466 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:33,466 INFO L82 PathProgramCache]: Analyzing trace with hash -1990050399, now seen corresponding path program 1 times [2018-11-23 06:34:33,466 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:33,467 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:33,467 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:33,467 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:33,467 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:33,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:33,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:33,564 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:33,564 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 06:34:33,564 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:33,566 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 06:34:33,566 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 06:34:33,566 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-11-23 06:34:33,566 INFO L87 Difference]: Start difference. First operand 51369 states and 155865 transitions. Second operand 8 states. [2018-11-23 06:34:34,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:34,031 INFO L93 Difference]: Finished difference Result 83081 states and 255622 transitions. [2018-11-23 06:34:34,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 06:34:34,032 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 122 [2018-11-23 06:34:34,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:34,125 INFO L225 Difference]: With dead ends: 83081 [2018-11-23 06:34:34,125 INFO L226 Difference]: Without dead ends: 83081 [2018-11-23 06:34:34,125 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-11-23 06:34:34,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83081 states. [2018-11-23 06:34:34,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83081 to 55077. [2018-11-23 06:34:34,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55077 states. [2018-11-23 06:34:34,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55077 states to 55077 states and 168055 transitions. [2018-11-23 06:34:34,879 INFO L78 Accepts]: Start accepts. Automaton has 55077 states and 168055 transitions. Word has length 122 [2018-11-23 06:34:34,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:34,880 INFO L480 AbstractCegarLoop]: Abstraction has 55077 states and 168055 transitions. [2018-11-23 06:34:34,880 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 06:34:34,880 INFO L276 IsEmpty]: Start isEmpty. Operand 55077 states and 168055 transitions. [2018-11-23 06:34:34,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-11-23 06:34:34,929 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:34,929 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:34,929 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:34,929 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:34,929 INFO L82 PathProgramCache]: Analyzing trace with hash 497462434, now seen corresponding path program 1 times [2018-11-23 06:34:34,929 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:34,930 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:34,930 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:34,930 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:34,930 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:34,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:35,014 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:35,014 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:35,014 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 06:34:35,014 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:35,015 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:34:35,015 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:34:35,015 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:34:35,015 INFO L87 Difference]: Start difference. First operand 55077 states and 168055 transitions. Second operand 6 states. [2018-11-23 06:34:35,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:35,184 INFO L93 Difference]: Finished difference Result 69153 states and 210071 transitions. [2018-11-23 06:34:35,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 06:34:35,185 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 122 [2018-11-23 06:34:35,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:35,416 INFO L225 Difference]: With dead ends: 69153 [2018-11-23 06:34:35,416 INFO L226 Difference]: Without dead ends: 69153 [2018-11-23 06:34:35,417 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:34:35,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69153 states. [2018-11-23 06:34:35,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69153 to 55867. [2018-11-23 06:34:35,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55867 states. [2018-11-23 06:34:36,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55867 states to 55867 states and 169562 transitions. [2018-11-23 06:34:36,010 INFO L78 Accepts]: Start accepts. Automaton has 55867 states and 169562 transitions. Word has length 122 [2018-11-23 06:34:36,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:36,010 INFO L480 AbstractCegarLoop]: Abstraction has 55867 states and 169562 transitions. [2018-11-23 06:34:36,010 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:34:36,010 INFO L276 IsEmpty]: Start isEmpty. Operand 55867 states and 169562 transitions. [2018-11-23 06:34:36,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-11-23 06:34:36,062 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:36,062 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:36,062 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:36,062 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:36,062 INFO L82 PathProgramCache]: Analyzing trace with hash -1083276541, now seen corresponding path program 1 times [2018-11-23 06:34:36,062 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:36,063 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:36,063 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:36,063 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:36,063 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:36,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:36,111 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:36,111 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:36,111 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 06:34:36,112 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:36,112 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 06:34:36,112 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 06:34:36,112 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 06:34:36,112 INFO L87 Difference]: Start difference. First operand 55867 states and 169562 transitions. Second operand 3 states. [2018-11-23 06:34:36,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:36,264 INFO L93 Difference]: Finished difference Result 54843 states and 165402 transitions. [2018-11-23 06:34:36,264 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 06:34:36,264 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 122 [2018-11-23 06:34:36,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:36,324 INFO L225 Difference]: With dead ends: 54843 [2018-11-23 06:34:36,324 INFO L226 Difference]: Without dead ends: 54715 [2018-11-23 06:34:36,324 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 06:34:36,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54715 states. [2018-11-23 06:34:36,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54715 to 46678. [2018-11-23 06:34:36,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46678 states. [2018-11-23 06:34:36,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46678 states to 46678 states and 139997 transitions. [2018-11-23 06:34:36,920 INFO L78 Accepts]: Start accepts. Automaton has 46678 states and 139997 transitions. Word has length 122 [2018-11-23 06:34:36,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:36,921 INFO L480 AbstractCegarLoop]: Abstraction has 46678 states and 139997 transitions. [2018-11-23 06:34:36,921 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 06:34:36,921 INFO L276 IsEmpty]: Start isEmpty. Operand 46678 states and 139997 transitions. [2018-11-23 06:34:36,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-11-23 06:34:36,967 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:36,967 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:36,968 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:36,968 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:36,968 INFO L82 PathProgramCache]: Analyzing trace with hash 424243755, now seen corresponding path program 1 times [2018-11-23 06:34:36,968 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:36,969 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:36,969 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:36,970 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:36,970 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:36,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:37,035 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:37,035 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:37,035 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 06:34:37,036 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:37,036 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 06:34:37,036 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 06:34:37,036 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:34:37,036 INFO L87 Difference]: Start difference. First operand 46678 states and 139997 transitions. Second operand 4 states. [2018-11-23 06:34:37,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:37,351 INFO L93 Difference]: Finished difference Result 49429 states and 148437 transitions. [2018-11-23 06:34:37,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 06:34:37,351 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 124 [2018-11-23 06:34:37,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:37,413 INFO L225 Difference]: With dead ends: 49429 [2018-11-23 06:34:37,413 INFO L226 Difference]: Without dead ends: 49429 [2018-11-23 06:34:37,413 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:34:37,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49429 states. [2018-11-23 06:34:37,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49429 to 47223. [2018-11-23 06:34:37,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47223 states. [2018-11-23 06:34:38,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47223 states to 47223 states and 141618 transitions. [2018-11-23 06:34:38,007 INFO L78 Accepts]: Start accepts. Automaton has 47223 states and 141618 transitions. Word has length 124 [2018-11-23 06:34:38,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:38,007 INFO L480 AbstractCegarLoop]: Abstraction has 47223 states and 141618 transitions. [2018-11-23 06:34:38,007 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 06:34:38,007 INFO L276 IsEmpty]: Start isEmpty. Operand 47223 states and 141618 transitions. [2018-11-23 06:34:38,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-11-23 06:34:38,053 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:38,053 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:38,053 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:38,053 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:38,053 INFO L82 PathProgramCache]: Analyzing trace with hash -572828598, now seen corresponding path program 1 times [2018-11-23 06:34:38,053 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:38,054 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:38,055 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:38,055 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:38,055 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:38,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:38,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:38,109 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:38,109 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 06:34:38,109 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:38,109 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 06:34:38,109 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 06:34:38,109 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:34:38,110 INFO L87 Difference]: Start difference. First operand 47223 states and 141618 transitions. Second operand 4 states. [2018-11-23 06:34:38,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:38,463 INFO L93 Difference]: Finished difference Result 58413 states and 174275 transitions. [2018-11-23 06:34:38,463 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 06:34:38,463 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 124 [2018-11-23 06:34:38,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:38,534 INFO L225 Difference]: With dead ends: 58413 [2018-11-23 06:34:38,534 INFO L226 Difference]: Without dead ends: 58038 [2018-11-23 06:34:38,534 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:34:38,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58038 states. [2018-11-23 06:34:39,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58038 to 50983. [2018-11-23 06:34:39,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50983 states. [2018-11-23 06:34:39,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50983 states to 50983 states and 152251 transitions. [2018-11-23 06:34:39,176 INFO L78 Accepts]: Start accepts. Automaton has 50983 states and 152251 transitions. Word has length 124 [2018-11-23 06:34:39,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:39,176 INFO L480 AbstractCegarLoop]: Abstraction has 50983 states and 152251 transitions. [2018-11-23 06:34:39,176 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 06:34:39,176 INFO L276 IsEmpty]: Start isEmpty. Operand 50983 states and 152251 transitions. [2018-11-23 06:34:39,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-11-23 06:34:39,227 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:39,227 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:39,227 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:39,227 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:39,227 INFO L82 PathProgramCache]: Analyzing trace with hash 1385857772, now seen corresponding path program 1 times [2018-11-23 06:34:39,227 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:39,228 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:39,228 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:39,229 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:39,229 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:39,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:39,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:39,307 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:39,307 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 06:34:39,307 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:39,307 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 06:34:39,307 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 06:34:39,307 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-23 06:34:39,307 INFO L87 Difference]: Start difference. First operand 50983 states and 152251 transitions. Second operand 7 states. [2018-11-23 06:34:39,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:39,823 INFO L93 Difference]: Finished difference Result 60459 states and 180186 transitions. [2018-11-23 06:34:39,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 06:34:39,824 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 124 [2018-11-23 06:34:39,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:39,895 INFO L225 Difference]: With dead ends: 60459 [2018-11-23 06:34:39,895 INFO L226 Difference]: Without dead ends: 60459 [2018-11-23 06:34:39,895 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-11-23 06:34:39,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60459 states. [2018-11-23 06:34:40,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60459 to 56588. [2018-11-23 06:34:40,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56588 states. [2018-11-23 06:34:40,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56588 states to 56588 states and 168755 transitions. [2018-11-23 06:34:40,586 INFO L78 Accepts]: Start accepts. Automaton has 56588 states and 168755 transitions. Word has length 124 [2018-11-23 06:34:40,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:40,587 INFO L480 AbstractCegarLoop]: Abstraction has 56588 states and 168755 transitions. [2018-11-23 06:34:40,587 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 06:34:40,587 INFO L276 IsEmpty]: Start isEmpty. Operand 56588 states and 168755 transitions. [2018-11-23 06:34:40,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-11-23 06:34:40,641 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:40,641 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:40,641 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:40,641 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:40,641 INFO L82 PathProgramCache]: Analyzing trace with hash 388785419, now seen corresponding path program 1 times [2018-11-23 06:34:40,641 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:40,642 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:40,643 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:40,643 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:40,643 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:40,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:40,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:40,694 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:40,694 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 06:34:40,694 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:40,695 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 06:34:40,695 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 06:34:40,695 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 06:34:40,695 INFO L87 Difference]: Start difference. First operand 56588 states and 168755 transitions. Second operand 4 states. [2018-11-23 06:34:40,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:40,949 INFO L93 Difference]: Finished difference Result 57164 states and 170627 transitions. [2018-11-23 06:34:40,950 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 06:34:40,950 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 124 [2018-11-23 06:34:40,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:41,015 INFO L225 Difference]: With dead ends: 57164 [2018-11-23 06:34:41,015 INFO L226 Difference]: Without dead ends: 57036 [2018-11-23 06:34:41,015 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:34:41,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57036 states. [2018-11-23 06:34:41,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57036 to 54596. [2018-11-23 06:34:41,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54596 states. [2018-11-23 06:34:41,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54596 states to 54596 states and 162867 transitions. [2018-11-23 06:34:41,831 INFO L78 Accepts]: Start accepts. Automaton has 54596 states and 162867 transitions. Word has length 124 [2018-11-23 06:34:41,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:41,831 INFO L480 AbstractCegarLoop]: Abstraction has 54596 states and 162867 transitions. [2018-11-23 06:34:41,831 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 06:34:41,831 INFO L276 IsEmpty]: Start isEmpty. Operand 54596 states and 162867 transitions. [2018-11-23 06:34:41,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-11-23 06:34:41,888 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:41,888 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:41,889 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:41,889 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:41,889 INFO L82 PathProgramCache]: Analyzing trace with hash 95382412, now seen corresponding path program 1 times [2018-11-23 06:34:41,889 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:41,890 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:41,890 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:41,890 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:41,891 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:41,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:42,002 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:42,002 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:42,002 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-23 06:34:42,002 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:42,003 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 06:34:42,003 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 06:34:42,003 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-11-23 06:34:42,003 INFO L87 Difference]: Start difference. First operand 54596 states and 162867 transitions. Second operand 10 states. [2018-11-23 06:34:42,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:42,689 INFO L93 Difference]: Finished difference Result 64859 states and 193823 transitions. [2018-11-23 06:34:42,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-23 06:34:42,690 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 124 [2018-11-23 06:34:42,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:42,767 INFO L225 Difference]: With dead ends: 64859 [2018-11-23 06:34:42,767 INFO L226 Difference]: Without dead ends: 64859 [2018-11-23 06:34:42,767 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 5 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=96, Invalid=366, Unknown=0, NotChecked=0, Total=462 [2018-11-23 06:34:42,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64859 states. [2018-11-23 06:34:43,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64859 to 58091. [2018-11-23 06:34:43,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58091 states. [2018-11-23 06:34:43,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58091 states to 58091 states and 173498 transitions. [2018-11-23 06:34:43,477 INFO L78 Accepts]: Start accepts. Automaton has 58091 states and 173498 transitions. Word has length 124 [2018-11-23 06:34:43,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:43,477 INFO L480 AbstractCegarLoop]: Abstraction has 58091 states and 173498 transitions. [2018-11-23 06:34:43,478 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 06:34:43,478 INFO L276 IsEmpty]: Start isEmpty. Operand 58091 states and 173498 transitions. [2018-11-23 06:34:43,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-11-23 06:34:43,534 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:43,534 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:43,535 INFO L423 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:43,535 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:43,535 INFO L82 PathProgramCache]: Analyzing trace with hash 1340146893, now seen corresponding path program 1 times [2018-11-23 06:34:43,535 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:43,536 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:43,536 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:43,536 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:43,536 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:43,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:43,618 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:43,618 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:43,618 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 06:34:43,618 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:43,619 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 06:34:43,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 06:34:43,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:34:43,619 INFO L87 Difference]: Start difference. First operand 58091 states and 173498 transitions. Second operand 5 states. [2018-11-23 06:34:43,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:43,816 INFO L93 Difference]: Finished difference Result 57771 states and 172266 transitions. [2018-11-23 06:34:43,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 06:34:43,817 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 124 [2018-11-23 06:34:43,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:43,888 INFO L225 Difference]: With dead ends: 57771 [2018-11-23 06:34:43,888 INFO L226 Difference]: Without dead ends: 57771 [2018-11-23 06:34:43,888 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:34:43,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57771 states. [2018-11-23 06:34:44,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57771 to 52564. [2018-11-23 06:34:44,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52564 states. [2018-11-23 06:34:44,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52564 states to 52564 states and 157066 transitions. [2018-11-23 06:34:44,633 INFO L78 Accepts]: Start accepts. Automaton has 52564 states and 157066 transitions. Word has length 124 [2018-11-23 06:34:44,634 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:44,634 INFO L480 AbstractCegarLoop]: Abstraction has 52564 states and 157066 transitions. [2018-11-23 06:34:44,634 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 06:34:44,634 INFO L276 IsEmpty]: Start isEmpty. Operand 52564 states and 157066 transitions. [2018-11-23 06:34:44,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-11-23 06:34:44,687 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:44,687 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:44,687 INFO L423 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:44,687 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:44,688 INFO L82 PathProgramCache]: Analyzing trace with hash -467307570, now seen corresponding path program 1 times [2018-11-23 06:34:44,688 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:44,689 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:44,689 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:44,689 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:44,689 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:44,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:44,731 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:44,731 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:44,731 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 06:34:44,731 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:44,732 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 06:34:44,732 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 06:34:44,732 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 06:34:44,732 INFO L87 Difference]: Start difference. First operand 52564 states and 157066 transitions. Second operand 3 states. [2018-11-23 06:34:44,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:44,862 INFO L93 Difference]: Finished difference Result 52564 states and 157002 transitions. [2018-11-23 06:34:44,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 06:34:44,863 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 124 [2018-11-23 06:34:44,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:44,926 INFO L225 Difference]: With dead ends: 52564 [2018-11-23 06:34:44,926 INFO L226 Difference]: Without dead ends: 52564 [2018-11-23 06:34:44,927 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 06:34:44,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52564 states. [2018-11-23 06:34:45,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52564 to 52564. [2018-11-23 06:34:45,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52564 states. [2018-11-23 06:34:45,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52564 states to 52564 states and 157002 transitions. [2018-11-23 06:34:45,495 INFO L78 Accepts]: Start accepts. Automaton has 52564 states and 157002 transitions. Word has length 124 [2018-11-23 06:34:45,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:45,496 INFO L480 AbstractCegarLoop]: Abstraction has 52564 states and 157002 transitions. [2018-11-23 06:34:45,496 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 06:34:45,496 INFO L276 IsEmpty]: Start isEmpty. Operand 52564 states and 157002 transitions. [2018-11-23 06:34:45,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-11-23 06:34:45,547 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:45,547 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:45,548 INFO L423 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:45,548 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:45,548 INFO L82 PathProgramCache]: Analyzing trace with hash 1639599003, now seen corresponding path program 1 times [2018-11-23 06:34:45,548 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:45,549 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:45,549 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:45,549 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:45,549 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:45,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:45,633 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:45,633 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:45,633 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-23 06:34:45,633 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:45,633 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 06:34:45,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 06:34:45,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-11-23 06:34:45,633 INFO L87 Difference]: Start difference. First operand 52564 states and 157002 transitions. Second operand 10 states. [2018-11-23 06:34:46,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:46,113 INFO L93 Difference]: Finished difference Result 70198 states and 209589 transitions. [2018-11-23 06:34:46,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 06:34:46,114 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 126 [2018-11-23 06:34:46,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:46,141 INFO L225 Difference]: With dead ends: 70198 [2018-11-23 06:34:46,141 INFO L226 Difference]: Without dead ends: 25566 [2018-11-23 06:34:46,141 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=175, Unknown=0, NotChecked=0, Total=240 [2018-11-23 06:34:46,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25566 states. [2018-11-23 06:34:46,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25566 to 24952. [2018-11-23 06:34:46,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24952 states. [2018-11-23 06:34:46,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24952 states to 24952 states and 69878 transitions. [2018-11-23 06:34:46,524 INFO L78 Accepts]: Start accepts. Automaton has 24952 states and 69878 transitions. Word has length 126 [2018-11-23 06:34:46,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:46,524 INFO L480 AbstractCegarLoop]: Abstraction has 24952 states and 69878 transitions. [2018-11-23 06:34:46,524 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 06:34:46,524 INFO L276 IsEmpty]: Start isEmpty. Operand 24952 states and 69878 transitions. [2018-11-23 06:34:46,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-11-23 06:34:46,547 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:46,547 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:46,547 INFO L423 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:46,547 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:46,547 INFO L82 PathProgramCache]: Analyzing trace with hash 936758017, now seen corresponding path program 2 times [2018-11-23 06:34:46,547 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:46,548 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:46,548 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:46,548 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:46,548 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:46,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:46,646 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:46,647 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:46,647 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-23 06:34:46,647 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:46,647 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 06:34:46,647 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 06:34:46,647 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-11-23 06:34:46,647 INFO L87 Difference]: Start difference. First operand 24952 states and 69878 transitions. Second operand 9 states. [2018-11-23 06:34:47,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:47,043 INFO L93 Difference]: Finished difference Result 36166 states and 103352 transitions. [2018-11-23 06:34:47,043 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 06:34:47,043 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 126 [2018-11-23 06:34:47,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:47,053 INFO L225 Difference]: With dead ends: 36166 [2018-11-23 06:34:47,053 INFO L226 Difference]: Without dead ends: 9759 [2018-11-23 06:34:47,053 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2018-11-23 06:34:47,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9759 states. [2018-11-23 06:34:47,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9759 to 9759. [2018-11-23 06:34:47,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9759 states. [2018-11-23 06:34:47,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9759 states to 9759 states and 29415 transitions. [2018-11-23 06:34:47,141 INFO L78 Accepts]: Start accepts. Automaton has 9759 states and 29415 transitions. Word has length 126 [2018-11-23 06:34:47,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:47,141 INFO L480 AbstractCegarLoop]: Abstraction has 9759 states and 29415 transitions. [2018-11-23 06:34:47,142 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 06:34:47,142 INFO L276 IsEmpty]: Start isEmpty. Operand 9759 states and 29415 transitions. [2018-11-23 06:34:47,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-11-23 06:34:47,151 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:47,151 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:47,151 INFO L423 AbstractCegarLoop]: === Iteration 36 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:47,151 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:47,151 INFO L82 PathProgramCache]: Analyzing trace with hash 932642473, now seen corresponding path program 1 times [2018-11-23 06:34:47,151 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:47,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:47,152 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 06:34:47,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:47,152 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:47,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:47,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:47,230 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:47,230 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 06:34:47,230 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:47,231 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 06:34:47,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 06:34:47,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:34:47,231 INFO L87 Difference]: Start difference. First operand 9759 states and 29415 transitions. Second operand 6 states. [2018-11-23 06:34:47,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:47,302 INFO L93 Difference]: Finished difference Result 10751 states and 32067 transitions. [2018-11-23 06:34:47,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 06:34:47,303 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 126 [2018-11-23 06:34:47,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:47,313 INFO L225 Difference]: With dead ends: 10751 [2018-11-23 06:34:47,313 INFO L226 Difference]: Without dead ends: 10615 [2018-11-23 06:34:47,314 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-23 06:34:47,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10615 states. [2018-11-23 06:34:47,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10615 to 9311. [2018-11-23 06:34:47,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9311 states. [2018-11-23 06:34:47,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9311 states to 9311 states and 27943 transitions. [2018-11-23 06:34:47,408 INFO L78 Accepts]: Start accepts. Automaton has 9311 states and 27943 transitions. Word has length 126 [2018-11-23 06:34:47,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:47,408 INFO L480 AbstractCegarLoop]: Abstraction has 9311 states and 27943 transitions. [2018-11-23 06:34:47,408 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 06:34:47,408 INFO L276 IsEmpty]: Start isEmpty. Operand 9311 states and 27943 transitions. [2018-11-23 06:34:47,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-11-23 06:34:47,417 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:47,418 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:47,418 INFO L423 AbstractCegarLoop]: === Iteration 37 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:47,418 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:47,418 INFO L82 PathProgramCache]: Analyzing trace with hash -1251034454, now seen corresponding path program 1 times [2018-11-23 06:34:47,418 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:47,419 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:47,419 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:47,420 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:47,420 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:47,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:47,491 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:47,491 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:47,491 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 06:34:47,491 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:47,491 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 06:34:47,491 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 06:34:47,491 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-23 06:34:47,492 INFO L87 Difference]: Start difference. First operand 9311 states and 27943 transitions. Second operand 5 states. [2018-11-23 06:34:47,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:47,566 INFO L93 Difference]: Finished difference Result 9975 states and 29573 transitions. [2018-11-23 06:34:47,566 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 06:34:47,566 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 126 [2018-11-23 06:34:47,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:47,575 INFO L225 Difference]: With dead ends: 9975 [2018-11-23 06:34:47,575 INFO L226 Difference]: Without dead ends: 9975 [2018-11-23 06:34:47,575 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 06:34:47,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9975 states. [2018-11-23 06:34:47,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9975 to 8531. [2018-11-23 06:34:47,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8531 states. [2018-11-23 06:34:47,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8531 states to 8531 states and 25486 transitions. [2018-11-23 06:34:47,660 INFO L78 Accepts]: Start accepts. Automaton has 8531 states and 25486 transitions. Word has length 126 [2018-11-23 06:34:47,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:47,660 INFO L480 AbstractCegarLoop]: Abstraction has 8531 states and 25486 transitions. [2018-11-23 06:34:47,660 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 06:34:47,660 INFO L276 IsEmpty]: Start isEmpty. Operand 8531 states and 25486 transitions. [2018-11-23 06:34:47,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-11-23 06:34:47,667 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:47,667 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:47,667 INFO L423 AbstractCegarLoop]: === Iteration 38 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:47,667 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:47,668 INFO L82 PathProgramCache]: Analyzing trace with hash 573363246, now seen corresponding path program 1 times [2018-11-23 06:34:47,668 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:47,668 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:47,668 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:47,668 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:47,669 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:47,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 06:34:47,743 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 06:34:47,743 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 06:34:47,743 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 06:34:47,743 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 06:34:47,743 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 06:34:47,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 06:34:47,743 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-23 06:34:47,743 INFO L87 Difference]: Start difference. First operand 8531 states and 25486 transitions. Second operand 7 states. [2018-11-23 06:34:47,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 06:34:47,827 INFO L93 Difference]: Finished difference Result 13092 states and 39364 transitions. [2018-11-23 06:34:47,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 06:34:47,827 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 126 [2018-11-23 06:34:47,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 06:34:47,840 INFO L225 Difference]: With dead ends: 13092 [2018-11-23 06:34:47,840 INFO L226 Difference]: Without dead ends: 13092 [2018-11-23 06:34:47,840 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-11-23 06:34:47,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13092 states. [2018-11-23 06:34:47,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13092 to 8131. [2018-11-23 06:34:47,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8131 states. [2018-11-23 06:34:47,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8131 states to 8131 states and 24250 transitions. [2018-11-23 06:34:47,941 INFO L78 Accepts]: Start accepts. Automaton has 8131 states and 24250 transitions. Word has length 126 [2018-11-23 06:34:47,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 06:34:47,941 INFO L480 AbstractCegarLoop]: Abstraction has 8131 states and 24250 transitions. [2018-11-23 06:34:47,941 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 06:34:47,941 INFO L276 IsEmpty]: Start isEmpty. Operand 8131 states and 24250 transitions. [2018-11-23 06:34:47,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-11-23 06:34:47,949 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 06:34:47,949 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 06:34:47,949 INFO L423 AbstractCegarLoop]: === Iteration 39 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 06:34:47,949 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 06:34:47,949 INFO L82 PathProgramCache]: Analyzing trace with hash -1771303795, now seen corresponding path program 3 times [2018-11-23 06:34:47,949 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 06:34:47,950 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:47,951 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 06:34:47,951 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 06:34:47,951 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 06:34:47,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 06:34:47,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 06:34:48,014 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [653] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [546] L-1-->L672: Formula: (= |v_#valid_7| (store |v_#valid_8| 0 0)) InVars {#valid=|v_#valid_8|} OutVars{#valid=|v_#valid_7|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [637] L672-->L674: Formula: (= v_~__unbuffered_cnt~0_7 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_7} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [775] L674-->L676: Formula: (= v_~__unbuffered_p0_EAX~0_2 0) InVars {} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [529] L676-->L678: Formula: (= v_~__unbuffered_p1_EAX~0_2 0) InVars {} OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 [723] L678-->L679: Formula: (= v_~__unbuffered_p2_EAX~0_2 0) InVars {} OutVars{~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_2} AuxVars[] AssignedVars[~__unbuffered_p2_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [800] L679-->L680: Formula: (= v_~__unbuffered_p2_EAX$flush_delayed~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$flush_delayed~0=v_~__unbuffered_p2_EAX$flush_delayed~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [753] L680-->L681: Formula: (= v_~__unbuffered_p2_EAX$mem_tmp~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$mem_tmp~0=v_~__unbuffered_p2_EAX$mem_tmp~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [575] L681-->L682: Formula: (= v_~__unbuffered_p2_EAX$r_buff0_thd0~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$r_buff0_thd0~0=v_~__unbuffered_p2_EAX$r_buff0_thd0~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [677] L682-->L683: Formula: (= v_~__unbuffered_p2_EAX$r_buff0_thd1~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$r_buff0_thd1~0=v_~__unbuffered_p2_EAX$r_buff0_thd1~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [636] L683-->L684: Formula: (= v_~__unbuffered_p2_EAX$r_buff0_thd2~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$r_buff0_thd2~0=v_~__unbuffered_p2_EAX$r_buff0_thd2~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [705] L684-->L685: Formula: (= v_~__unbuffered_p2_EAX$r_buff0_thd3~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$r_buff0_thd3~0=v_~__unbuffered_p2_EAX$r_buff0_thd3~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$r_buff0_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [772] L685-->L686: Formula: (= v_~__unbuffered_p2_EAX$r_buff1_thd0~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$r_buff1_thd0~0=v_~__unbuffered_p2_EAX$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [620] L686-->L687: Formula: (= v_~__unbuffered_p2_EAX$r_buff1_thd1~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$r_buff1_thd1~0=v_~__unbuffered_p2_EAX$r_buff1_thd1~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [564] L687-->L688: Formula: (= v_~__unbuffered_p2_EAX$r_buff1_thd2~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$r_buff1_thd2~0=v_~__unbuffered_p2_EAX$r_buff1_thd2~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [658] L688-->L689: Formula: (= v_~__unbuffered_p2_EAX$r_buff1_thd3~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$r_buff1_thd3~0=v_~__unbuffered_p2_EAX$r_buff1_thd3~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$r_buff1_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [722] L689-->L690: Formula: (= v_~__unbuffered_p2_EAX$read_delayed~0_2 0) InVars {} OutVars{~__unbuffered_p2_EAX$read_delayed~0=v_~__unbuffered_p2_EAX$read_delayed~0_2} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [798] L690-->L691: Formula: (and (= v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_2 0) (= v_~__unbuffered_p2_EAX$read_delayed_var~0.base_2 0)) InVars {} OutVars{~__unbuffered_p2_EAX$read_delayed_var~0.offset=v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_2, ~__unbuffered_p2_EAX$read_delayed_var~0.base=v_~__unbuffered_p2_EAX$read_delayed_var~0.base_2} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$read_delayed_var~0.offset, ~__unbuffered_p2_EAX$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [752] L691-->L692: Formula: (= v_~__unbuffered_p2_EAX$w_buff0~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$w_buff0~0=v_~__unbuffered_p2_EAX$w_buff0~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [573] L692-->L693: Formula: (= v_~__unbuffered_p2_EAX$w_buff0_used~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$w_buff0_used~0=v_~__unbuffered_p2_EAX$w_buff0_used~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [673] L693-->L694: Formula: (= v_~__unbuffered_p2_EAX$w_buff1~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$w_buff1~0=v_~__unbuffered_p2_EAX$w_buff1~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [635] L694-->L695: Formula: (= v_~__unbuffered_p2_EAX$w_buff1_used~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$w_buff1_used~0=v_~__unbuffered_p2_EAX$w_buff1_used~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [704] L695-->L696: Formula: (= v_~main$tmp_guard0~0_1 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 [771] L696-->L698: Formula: (= v_~main$tmp_guard1~0_1 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_1} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [561] L698-->L700: Formula: (= v_~x~0_3 0) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [721] L700-->L700-1: Formula: (and (= |v_~#y~0.offset_13| 0) (= (store |v_#valid_10| |v_~#y~0.base_13| 1) |v_#valid_9|) (not (= |v_~#y~0.base_13| 0)) (= (select |v_#valid_10| |v_~#y~0.base_13|) 0) (= |v_#length_1| (store |v_#length_2| |v_~#y~0.base_13| 4))) InVars {#length=|v_#length_2|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_1|, ~#y~0.offset=|v_~#y~0.offset_13|, ~#y~0.base=|v_~#y~0.base_13|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[~#y~0.offset, #valid, #length, ~#y~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [726] L700-1-->L700-2: Formula: (= 0 (select (select |v_#memory_int_17| |v_~#y~0.base_14|) |v_~#y~0.offset_14|)) InVars {#memory_int=|v_#memory_int_17|, ~#y~0.offset=|v_~#y~0.offset_14|, ~#y~0.base=|v_~#y~0.base_14|} OutVars{#memory_int=|v_#memory_int_17|, ~#y~0.offset=|v_~#y~0.offset_14|, ~#y~0.base=|v_~#y~0.base_14|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [728] L700-2-->L702: Formula: (= v_~y$flush_delayed~0_5 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_5} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0] [?] -1 [751] L702-->L703: Formula: (= v_~y$mem_tmp~0_3 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_3} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0] [?] -1 [610] L703-->L704: Formula: (= v_~y$r_buff0_thd0~0_2 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_2} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0] [?] -1 [672] L704-->L705: Formula: (= v_~y$r_buff0_thd1~0_2 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0] [?] -1 [634] L705-->L706: Formula: (= v_~y$r_buff0_thd2~0_14 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_14} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0] [?] -1 [703] L706-->L707: Formula: (= v_~y$r_buff0_thd3~0_58 0) InVars {} OutVars{~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_58} AuxVars[] AssignedVars[~y$r_buff0_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0] [?] -1 [770] L707-->L708: Formula: (= v_~y$r_buff1_thd0~0_2 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_2} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0] [?] -1 [617] L708-->L709: Formula: (= v_~y$r_buff1_thd1~0_2 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0] [?] -1 [560] L709-->L710: Formula: (= v_~y$r_buff1_thd2~0_9 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0] [?] -1 [657] L710-->L711: Formula: (= v_~y$r_buff1_thd3~0_41 0) InVars {} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_41} AuxVars[] AssignedVars[~y$r_buff1_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0] [?] -1 [720] L711-->L712: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0] [?] -1 [797] L712-->L713: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0] [?] -1 [750] L713-->L714: Formula: (= v_~y$w_buff0~0_16 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_16} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0] [?] -1 [608] L714-->L715: Formula: (= v_~y$w_buff0_used~0_83 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_83} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0] [?] -1 [671] L715-->L716: Formula: (= v_~y$w_buff1~0_13 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_13} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0] [?] -1 [632] L716-->L718: Formula: (= v_~y$w_buff1_used~0_47 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_47} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0] [?] -1 [768] L718-->L719: Formula: (= v_~z~0_3 0) InVars {} OutVars{~z~0=v_~z~0_3} AuxVars[] AssignedVars[~z~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [628] L719-->L720: Formula: (= v_~weak$$choice0~0_14 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_14} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [559] L720-->L721: Formula: (= v_~weak$$choice1~0_5 0) InVars {} OutVars{~weak$$choice1~0=v_~weak$$choice1~0_5} AuxVars[] AssignedVars[~weak$$choice1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [656] L721-->L-1-1: Formula: (= v_~weak$$choice2~0_14 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_14} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [674] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [670] L-1-2-->L813: Formula: true InVars {} OutVars{ULTIMATE.start_main_~#t2687~0.offset=|v_ULTIMATE.start_main_~#t2687~0.offset_3|, ULTIMATE.start_main_#t~nondet69=|v_ULTIMATE.start_main_#t~nondet69_1|, ULTIMATE.start_main_~#t2688~0.base=|v_ULTIMATE.start_main_~#t2688~0.base_3|, ULTIMATE.start_main_~#t2686~0.base=|v_ULTIMATE.start_main_~#t2686~0.base_3|, ULTIMATE.start_main_#t~mem72=|v_ULTIMATE.start_main_#t~mem72_1|, ULTIMATE.start_main_#t~nondet79.offset=|v_ULTIMATE.start_main_#t~nondet79.offset_1|, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_1|, ULTIMATE.start_main_~#t2686~0.offset=|v_ULTIMATE.start_main_~#t2686~0.offset_3|, ULTIMATE.start_main_#t~nondet71=|v_ULTIMATE.start_main_#t~nondet71_1|, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_1|, ULTIMATE.start_main_#t~nondet70=|v_ULTIMATE.start_main_#t~nondet70_1|, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_1|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_1|, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_1|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_1|, ULTIMATE.start_main_~#t2687~0.base=|v_ULTIMATE.start_main_~#t2687~0.base_3|, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_1|, ULTIMATE.start_main_~#t2688~0.offset=|v_ULTIMATE.start_main_~#t2688~0.offset_3|, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_1|, ULTIMATE.start_main_#t~mem80=|v_ULTIMATE.start_main_#t~mem80_1|, ULTIMATE.start_main_#t~nondet79.base=|v_ULTIMATE.start_main_#t~nondet79.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2687~0.offset, ULTIMATE.start_main_#t~nondet69, ULTIMATE.start_main_~#t2688~0.base, ULTIMATE.start_main_~#t2686~0.base, ULTIMATE.start_main_#t~mem72, ULTIMATE.start_main_#t~nondet79.offset, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_~#t2686~0.offset, ULTIMATE.start_main_#t~nondet71, ULTIMATE.start_main_#t~ite78, ULTIMATE.start_main_#t~nondet70, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ULTIMATE.start_main_#t~ite73, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_~#t2687~0.base, ULTIMATE.start_main_#t~ite82, ULTIMATE.start_main_~#t2688~0.offset, ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#t~mem80, ULTIMATE.start_main_#t~nondet79.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [600] L813-->L813-1: Formula: (and (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t2686~0.base_4| 4) |v_#length_3|) (= |v_#valid_11| (store |v_#valid_12| |v_ULTIMATE.start_main_~#t2686~0.base_4| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t2686~0.base_4|)) (= |v_ULTIMATE.start_main_~#t2686~0.offset_4| 0) (= 0 (select |v_#valid_12| |v_ULTIMATE.start_main_~#t2686~0.base_4|))) InVars {#length=|v_#length_4|, #valid=|v_#valid_12|} OutVars{#length=|v_#length_3|, ULTIMATE.start_main_~#t2686~0.offset=|v_ULTIMATE.start_main_~#t2686~0.offset_4|, ULTIMATE.start_main_~#t2686~0.base=|v_ULTIMATE.start_main_~#t2686~0.base_4|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2686~0.base, #valid, #length, ULTIMATE.start_main_~#t2686~0.offset] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [602] L813-1-->L814: Formula: (= (store |v_#memory_int_19| |v_ULTIMATE.start_main_~#t2686~0.base_5| (store (select |v_#memory_int_19| |v_ULTIMATE.start_main_~#t2686~0.base_5|) |v_ULTIMATE.start_main_~#t2686~0.offset_5| 0)) |v_#memory_int_18|) InVars {#memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t2686~0.offset=|v_ULTIMATE.start_main_~#t2686~0.offset_5|, ULTIMATE.start_main_~#t2686~0.base=|v_ULTIMATE.start_main_~#t2686~0.base_5|} OutVars{#memory_int=|v_#memory_int_18|, ULTIMATE.start_main_~#t2686~0.offset=|v_ULTIMATE.start_main_~#t2686~0.offset_5|, ULTIMATE.start_main_~#t2686~0.base=|v_ULTIMATE.start_main_~#t2686~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 [977] L814-->P0ENTRY: Formula: (and (= 0 |v_Thread0_P0_#in~arg.offset_3|) (= 0 v_Thread0_P0_thidvar0_2) (= 0 |v_Thread0_P0_#in~arg.base_3|)) InVars {} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_3|, Thread0_P0_thidvar0=v_Thread0_P0_thidvar0_2, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P0_#in~arg.base, Thread0_P0_thidvar0, Thread0_P0_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [668] L814-1-->L815: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet69=|v_ULTIMATE.start_main_#t~nondet69_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet69] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [645] L815-->L815-1: Formula: (and (= |v_ULTIMATE.start_main_~#t2687~0.offset_4| 0) (not (= |v_ULTIMATE.start_main_~#t2687~0.base_4| 0)) (= 0 (select |v_#valid_14| |v_ULTIMATE.start_main_~#t2687~0.base_4|)) (= |v_#length_5| (store |v_#length_6| |v_ULTIMATE.start_main_~#t2687~0.base_4| 4)) (= (store |v_#valid_14| |v_ULTIMATE.start_main_~#t2687~0.base_4| 1) |v_#valid_13|)) InVars {#length=|v_#length_6|, #valid=|v_#valid_14|} OutVars{ULTIMATE.start_main_~#t2687~0.base=|v_ULTIMATE.start_main_~#t2687~0.base_4|, ULTIMATE.start_main_~#t2687~0.offset=|v_ULTIMATE.start_main_~#t2687~0.offset_4|, #length=|v_#length_5|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2687~0.base, ULTIMATE.start_main_~#t2687~0.offset, #valid, #length] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [629] L815-1-->L816: Formula: (= (store |v_#memory_int_21| |v_ULTIMATE.start_main_~#t2687~0.base_5| (store (select |v_#memory_int_21| |v_ULTIMATE.start_main_~#t2687~0.base_5|) |v_ULTIMATE.start_main_~#t2687~0.offset_5| 1)) |v_#memory_int_20|) InVars {#memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t2687~0.base=|v_ULTIMATE.start_main_~#t2687~0.base_5|, ULTIMATE.start_main_~#t2687~0.offset=|v_ULTIMATE.start_main_~#t2687~0.offset_5|} OutVars{#memory_int=|v_#memory_int_20|, ULTIMATE.start_main_~#t2687~0.base=|v_ULTIMATE.start_main_~#t2687~0.base_5|, ULTIMATE.start_main_~#t2687~0.offset=|v_ULTIMATE.start_main_~#t2687~0.offset_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 [978] L816-->P1ENTRY: Formula: (and (= 0 |v_Thread1_P1_#in~arg.base_3|) (= 0 |v_Thread1_P1_#in~arg.offset_3|) (= 1 v_Thread1_P1_thidvar0_2)) InVars {} OutVars{Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_3|, Thread1_P1_thidvar0=v_Thread1_P1_thidvar0_2, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread1_P1_#in~arg.base, Thread1_P1_thidvar0, Thread1_P1_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [709] L816-1-->L817: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet70=|v_ULTIMATE.start_main_#t~nondet70_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet70] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [783] L817-->L817-1: Formula: (and (= |v_#length_7| (store |v_#length_8| |v_ULTIMATE.start_main_~#t2688~0.base_4| 4)) (= |v_#valid_15| (store |v_#valid_16| |v_ULTIMATE.start_main_~#t2688~0.base_4| 1)) (= |v_ULTIMATE.start_main_~#t2688~0.offset_4| 0) (not (= |v_ULTIMATE.start_main_~#t2688~0.base_4| 0)) (= 0 (select |v_#valid_16| |v_ULTIMATE.start_main_~#t2688~0.base_4|))) InVars {#length=|v_#length_8|, #valid=|v_#valid_16|} OutVars{#length=|v_#length_7|, ULTIMATE.start_main_~#t2688~0.offset=|v_ULTIMATE.start_main_~#t2688~0.offset_4|, ULTIMATE.start_main_~#t2688~0.base=|v_ULTIMATE.start_main_~#t2688~0.base_4|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2688~0.offset, ULTIMATE.start_main_~#t2688~0.base, #valid, #length] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [786] L817-1-->L818: Formula: (= (store |v_#memory_int_23| |v_ULTIMATE.start_main_~#t2688~0.base_5| (store (select |v_#memory_int_23| |v_ULTIMATE.start_main_~#t2688~0.base_5|) |v_ULTIMATE.start_main_~#t2688~0.offset_5| 2)) |v_#memory_int_22|) InVars {#memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t2688~0.offset=|v_ULTIMATE.start_main_~#t2688~0.offset_5|, ULTIMATE.start_main_~#t2688~0.base=|v_ULTIMATE.start_main_~#t2688~0.base_5|} OutVars{#memory_int=|v_#memory_int_22|, ULTIMATE.start_main_~#t2688~0.offset=|v_ULTIMATE.start_main_~#t2688~0.offset_5|, ULTIMATE.start_main_~#t2688~0.base=|v_ULTIMATE.start_main_~#t2688~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 [979] L818-->P2ENTRY: Formula: (and (= |v_Thread2_P2_#in~arg.base_3| 0) (= v_Thread2_P2_thidvar0_2 2) (= 0 |v_Thread2_P2_#in~arg.offset_3|)) InVars {} OutVars{Thread2_P2_#in~arg.base=|v_Thread2_P2_#in~arg.base_3|, Thread2_P2_thidvar0=v_Thread2_P2_thidvar0_2, Thread2_P2_#in~arg.offset=|v_Thread2_P2_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread2_P2_#in~arg.base, Thread2_P2_thidvar0, Thread2_P2_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [835] P2ENTRY-->L774: Formula: (and (= v_~weak$$choice0~0_3 (ite (= (+ |v_Thread2_P2_#t~nondet12.offset_1| |v_Thread2_P2_#t~nondet12.base_1|) 0) 0 1)) (= v_Thread2_P2_~arg.offset_1 |v_Thread2_P2_#in~arg.offset_1|) (= v_~y$flush_delayed~0_1 v_~weak$$choice2~0_5) (= v_~weak$$choice1~0_1 (ite (= (+ |v_Thread2_P2_#t~nondet15.offset_1| |v_Thread2_P2_#t~nondet15.base_1|) 0) 0 1)) (= v_Thread2_P2_~arg.base_1 |v_Thread2_P2_#in~arg.base_1|) (= v_~weak$$choice2~0_5 (ite (= (+ |v_Thread2_P2_#t~nondet13.base_1| |v_Thread2_P2_#t~nondet13.offset_1|) 0) 0 1)) (= (select (select |v_#memory_int_4| |v_~#y~0.base_3|) |v_~#y~0.offset_3|) v_~y$mem_tmp~0_1)) InVars {Thread2_P2_#t~nondet13.offset=|v_Thread2_P2_#t~nondet13.offset_1|, Thread2_P2_#in~arg.base=|v_Thread2_P2_#in~arg.base_1|, Thread2_P2_#t~nondet15.base=|v_Thread2_P2_#t~nondet15.base_1|, ~#y~0.offset=|v_~#y~0.offset_3|, Thread2_P2_#t~nondet13.base=|v_Thread2_P2_#t~nondet13.base_1|, Thread2_P2_#t~nondet12.offset=|v_Thread2_P2_#t~nondet12.offset_1|, Thread2_P2_#in~arg.offset=|v_Thread2_P2_#in~arg.offset_1|, #memory_int=|v_#memory_int_4|, Thread2_P2_#t~nondet12.base=|v_Thread2_P2_#t~nondet12.base_1|, ~#y~0.base=|v_~#y~0.base_3|, Thread2_P2_#t~nondet15.offset=|v_Thread2_P2_#t~nondet15.offset_1|} OutVars{Thread2_P2_#in~arg.base=|v_Thread2_P2_#in~arg.base_1|, ~#y~0.offset=|v_~#y~0.offset_3|, Thread2_P2_~arg.offset=v_Thread2_P2_~arg.offset_1, Thread2_P2_#t~nondet12.offset=|v_Thread2_P2_#t~nondet12.offset_2|, Thread2_P2_#in~arg.offset=|v_Thread2_P2_#in~arg.offset_1|, ~#y~0.base=|v_~#y~0.base_3|, Thread2_P2_#t~nondet13.offset=|v_Thread2_P2_#t~nondet13.offset_2|, Thread2_P2_#t~nondet15.base=|v_Thread2_P2_#t~nondet15.base_2|, ~weak$$choice0~0=v_~weak$$choice0~0_3, ~weak$$choice1~0=v_~weak$$choice1~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, Thread2_P2_#t~mem14=|v_Thread2_P2_#t~mem14_1|, Thread2_P2_~arg.base=v_Thread2_P2_~arg.base_1, Thread2_P2_#t~nondet13.base=|v_Thread2_P2_#t~nondet13.base_2|, #memory_int=|v_#memory_int_4|, ~y$flush_delayed~0=v_~y$flush_delayed~0_1, Thread2_P2_#t~nondet12.base=|v_Thread2_P2_#t~nondet12.base_2|, ~weak$$choice2~0=v_~weak$$choice2~0_5, Thread2_P2_#t~nondet15.offset=|v_Thread2_P2_#t~nondet15.offset_2|} AuxVars[] AssignedVars[Thread2_P2_~arg.offset, Thread2_P2_#t~nondet12.offset, Thread2_P2_#t~nondet13.offset, Thread2_P2_#t~nondet15.base, ~weak$$choice0~0, ~weak$$choice1~0, ~y$mem_tmp~0, Thread2_P2_#t~mem14, Thread2_P2_~arg.base, Thread2_P2_#t~nondet13.base, ~y$flush_delayed~0, Thread2_P2_#t~nondet12.base, ~weak$$choice2~0, Thread2_P2_#t~nondet15.offset] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [836] L774-->L774-23: Formula: (and (= |v_Thread2_P2_#t~ite26_1| |v_Thread2_P2_#t~mem16_1|) (= (mod v_~y$w_buff0_used~0_28 256) 0) (= (select (select |v_#memory_int_5| |v_~#y~0.base_4|) |v_~#y~0.offset_4|) |v_Thread2_P2_#t~mem16_1|)) InVars {#memory_int=|v_#memory_int_5|, ~#y~0.offset=|v_~#y~0.offset_4|, ~#y~0.base=|v_~#y~0.base_4|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_28} OutVars{~#y~0.offset=|v_~#y~0.offset_4|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_28, #memory_int=|v_#memory_int_5|, Thread2_P2_#t~mem16=|v_Thread2_P2_#t~mem16_1|, ~#y~0.base=|v_~#y~0.base_4|, Thread2_P2_#t~ite26=|v_Thread2_P2_#t~ite26_1|} AuxVars[] AssignedVars[Thread2_P2_#t~mem16, Thread2_P2_#t~ite26] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite26|=0, |Thread2_P2_#t~mem16|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [838] L774-23-->L775: Formula: (= (store |v_#memory_int_16| |v_~#y~0.base_12| (store (select |v_#memory_int_16| |v_~#y~0.base_12|) |v_~#y~0.offset_12| |v_Thread2_P2_#t~ite26_2|)) |v_#memory_int_15|) InVars {#memory_int=|v_#memory_int_16|, ~#y~0.offset=|v_~#y~0.offset_12|, ~#y~0.base=|v_~#y~0.base_12|, Thread2_P2_#t~ite26=|v_Thread2_P2_#t~ite26_2|} OutVars{~#y~0.offset=|v_~#y~0.offset_12|, Thread2_P2_#t~ite20=|v_Thread2_P2_#t~ite20_1|, Thread2_P2_#t~mem16=|v_Thread2_P2_#t~mem16_2|, Thread2_P2_#t~mem17=|v_Thread2_P2_#t~mem17_1|, ~#y~0.base=|v_~#y~0.base_12|, Thread2_P2_#t~mem21=|v_Thread2_P2_#t~mem21_1|, Thread2_P2_#t~ite19=|v_Thread2_P2_#t~ite19_1|, Thread2_P2_#t~ite24=|v_Thread2_P2_#t~ite24_1|, #memory_int=|v_#memory_int_15|, Thread2_P2_#t~ite25=|v_Thread2_P2_#t~ite25_1|, Thread2_P2_#t~ite22=|v_Thread2_P2_#t~ite22_1|, Thread2_P2_#t~ite23=|v_Thread2_P2_#t~ite23_1|, Thread2_P2_#t~ite18=|v_Thread2_P2_#t~ite18_1|, Thread2_P2_#t~ite26=|v_Thread2_P2_#t~ite26_3|} AuxVars[] AssignedVars[Thread2_P2_#t~mem21, Thread2_P2_#t~ite19, Thread2_P2_#t~ite20, Thread2_P2_#t~ite24, #memory_int, Thread2_P2_#t~ite25, Thread2_P2_#t~mem16, Thread2_P2_#t~ite22, Thread2_P2_#t~mem17, Thread2_P2_#t~ite23, Thread2_P2_#t~ite18, Thread2_P2_#t~ite26] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [841] L775-->L775-14: Formula: (and (= |v_Thread2_P2_#t~ite31_1| v_~y$w_buff0~0_9) (not (= (mod v_~weak$$choice2~0_6 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_6, ~y$w_buff0~0=v_~y$w_buff0~0_9} OutVars{Thread2_P2_#t~ite31=|v_Thread2_P2_#t~ite31_1|, ~weak$$choice2~0=v_~weak$$choice2~0_6, ~y$w_buff0~0=v_~y$w_buff0~0_9} AuxVars[] AssignedVars[Thread2_P2_#t~ite31] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite31|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [846] L775-14-->L776: Formula: (= v_~y$w_buff0~0_15 |v_Thread2_P2_#t~ite31_2|) InVars {Thread2_P2_#t~ite31=|v_Thread2_P2_#t~ite31_2|} OutVars{Thread2_P2_#t~ite31=|v_Thread2_P2_#t~ite31_3|, ~y$w_buff0~0=v_~y$w_buff0~0_15, Thread2_P2_#t~ite30=|v_Thread2_P2_#t~ite30_1|, Thread2_P2_#t~ite28=|v_Thread2_P2_#t~ite28_1|, Thread2_P2_#t~ite29=|v_Thread2_P2_#t~ite29_1|, Thread2_P2_#t~ite27=|v_Thread2_P2_#t~ite27_1|} AuxVars[] AssignedVars[Thread2_P2_#t~ite31, ~y$w_buff0~0, Thread2_P2_#t~ite30, Thread2_P2_#t~ite28, Thread2_P2_#t~ite29, Thread2_P2_#t~ite27] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [853] L776-->L776-14: Formula: (and (not (= (mod v_~weak$$choice2~0_8 256) 0)) (= |v_Thread2_P2_#t~ite36_1| v_~y$w_buff1~0_6)) InVars {~y$w_buff1~0=v_~y$w_buff1~0_6, ~weak$$choice2~0=v_~weak$$choice2~0_8} OutVars{Thread2_P2_#t~ite36=|v_Thread2_P2_#t~ite36_1|, ~y$w_buff1~0=v_~y$w_buff1~0_6, ~weak$$choice2~0=v_~weak$$choice2~0_8} AuxVars[] AssignedVars[Thread2_P2_#t~ite36] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite36|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [865] L776-14-->L777: Formula: (= v_~y$w_buff1~0_12 |v_Thread2_P2_#t~ite36_2|) InVars {Thread2_P2_#t~ite36=|v_Thread2_P2_#t~ite36_2|} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_12, Thread2_P2_#t~ite32=|v_Thread2_P2_#t~ite32_1|, Thread2_P2_#t~ite35=|v_Thread2_P2_#t~ite35_1|, Thread2_P2_#t~ite36=|v_Thread2_P2_#t~ite36_3|, Thread2_P2_#t~ite33=|v_Thread2_P2_#t~ite33_1|, Thread2_P2_#t~ite34=|v_Thread2_P2_#t~ite34_1|} AuxVars[] AssignedVars[~y$w_buff1~0, Thread2_P2_#t~ite32, Thread2_P2_#t~ite35, Thread2_P2_#t~ite36, Thread2_P2_#t~ite33, Thread2_P2_#t~ite34] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [875] L777-->L777-14: Formula: (and (not (= (mod v_~weak$$choice2~0_10 256) 0)) (= |v_Thread2_P2_#t~ite41_1| (mod v_~y$w_buff0_used~0_65 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_65, ~weak$$choice2~0=v_~weak$$choice2~0_10} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_65, ~weak$$choice2~0=v_~weak$$choice2~0_10, Thread2_P2_#t~ite41=|v_Thread2_P2_#t~ite41_1|} AuxVars[] AssignedVars[Thread2_P2_#t~ite41] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite41|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [884] L777-14-->L778: Formula: (= v_~y$w_buff0_used~0_74 (ite (= |v_Thread2_P2_#t~ite41_2| 0) 0 1)) InVars {Thread2_P2_#t~ite41=|v_Thread2_P2_#t~ite41_2|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_74, Thread2_P2_#t~ite40=|v_Thread2_P2_#t~ite40_1|, Thread2_P2_#t~ite41=|v_Thread2_P2_#t~ite41_3|, Thread2_P2_#t~ite39=|v_Thread2_P2_#t~ite39_1|, Thread2_P2_#t~ite37=|v_Thread2_P2_#t~ite37_1|, Thread2_P2_#t~ite38=|v_Thread2_P2_#t~ite38_1|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread2_P2_#t~ite40, Thread2_P2_#t~ite41, Thread2_P2_#t~ite39, Thread2_P2_#t~ite37, Thread2_P2_#t~ite38] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [891] L778-->L778-14: Formula: (and (= |v_Thread2_P2_#t~ite46_1| v_~y$w_buff1_used~0_41) (not (= (mod v_~weak$$choice2~0_12 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_41} OutVars{Thread2_P2_#t~ite46=|v_Thread2_P2_#t~ite46_1|, ~weak$$choice2~0=v_~weak$$choice2~0_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_41} AuxVars[] AssignedVars[Thread2_P2_#t~ite46] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite46|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [899] L778-14-->L779: Formula: (= v_~y$w_buff1_used~0_9 |v_Thread2_P2_#t~ite46_2|) InVars {Thread2_P2_#t~ite46=|v_Thread2_P2_#t~ite46_2|} OutVars{Thread2_P2_#t~ite43=|v_Thread2_P2_#t~ite43_1|, Thread2_P2_#t~ite42=|v_Thread2_P2_#t~ite42_1|, Thread2_P2_#t~ite46=|v_Thread2_P2_#t~ite46_3|, Thread2_P2_#t~ite45=|v_Thread2_P2_#t~ite45_1|, Thread2_P2_#t~ite44=|v_Thread2_P2_#t~ite44_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_9} AuxVars[] AssignedVars[Thread2_P2_#t~ite43, Thread2_P2_#t~ite42, Thread2_P2_#t~ite46, Thread2_P2_#t~ite45, Thread2_P2_#t~ite44, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [906] L779-->L779-14: Formula: (and (= |v_Thread2_P2_#t~ite51_1| v_~y$r_buff0_thd3~0_2) (not (= (mod v_~weak$$choice2~0_1 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_1, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_2} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_1, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_2, Thread2_P2_#t~ite51=|v_Thread2_P2_#t~ite51_1|} AuxVars[] AssignedVars[Thread2_P2_#t~ite51] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite51|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [914] L779-14-->L780: Formula: (= v_~y$r_buff0_thd3~0_10 |v_Thread2_P2_#t~ite51_2|) InVars {Thread2_P2_#t~ite51=|v_Thread2_P2_#t~ite51_2|} OutVars{Thread2_P2_#t~ite50=|v_Thread2_P2_#t~ite50_1|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_10, Thread2_P2_#t~ite51=|v_Thread2_P2_#t~ite51_3|, Thread2_P2_#t~ite47=|v_Thread2_P2_#t~ite47_1|, Thread2_P2_#t~ite49=|v_Thread2_P2_#t~ite49_1|, Thread2_P2_#t~ite48=|v_Thread2_P2_#t~ite48_1|} AuxVars[] AssignedVars[Thread2_P2_#t~ite50, ~y$r_buff0_thd3~0, Thread2_P2_#t~ite51, Thread2_P2_#t~ite47, Thread2_P2_#t~ite49, Thread2_P2_#t~ite48] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [921] L780-->L780-17: Formula: (and (= |v_Thread2_P2_#t~ite57_1| v_~y$r_buff1_thd3~0_6) (not (= 0 (mod v_~weak$$choice2~0_3 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_6} OutVars{Thread2_P2_#t~ite57=|v_Thread2_P2_#t~ite57_1|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_6, ~weak$$choice2~0=v_~weak$$choice2~0_3} AuxVars[] AssignedVars[Thread2_P2_#t~ite57] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite57|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [929] L780-17-->L784: Formula: (and (= v_~__unbuffered_p2_EAX$read_delayed~0_1 1) (= v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_1 |v_~#y~0.offset_6|) (= v_~y$r_buff1_thd3~0_14 |v_Thread2_P2_#t~ite57_2|) (= v_~__unbuffered_p2_EAX$read_delayed_var~0.base_1 |v_~#y~0.base_6|) (= v_~__unbuffered_p2_EAX~0_1 (select (select |v_#memory_int_7| |v_~#y~0.base_6|) |v_~#y~0.offset_6|))) InVars {#memory_int=|v_#memory_int_7|, Thread2_P2_#t~ite57=|v_Thread2_P2_#t~ite57_2|, ~#y~0.offset=|v_~#y~0.offset_6|, ~#y~0.base=|v_~#y~0.base_6|} OutVars{~#y~0.offset=|v_~#y~0.offset_6|, Thread2_P2_#t~ite54=|v_Thread2_P2_#t~ite54_1|, Thread2_P2_#t~ite53=|v_Thread2_P2_#t~ite53_1|, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_1, Thread2_P2_#t~ite52=|v_Thread2_P2_#t~ite52_1|, ~__unbuffered_p2_EAX$read_delayed_var~0.base=v_~__unbuffered_p2_EAX$read_delayed_var~0.base_1, ~#y~0.base=|v_~#y~0.base_6|, ~__unbuffered_p2_EAX$read_delayed~0=v_~__unbuffered_p2_EAX$read_delayed~0_1, Thread2_P2_#t~mem58=|v_Thread2_P2_#t~mem58_1|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_14, #memory_int=|v_#memory_int_7|, Thread2_P2_#t~ite57=|v_Thread2_P2_#t~ite57_3|, Thread2_P2_#t~ite56=|v_Thread2_P2_#t~ite56_1|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_1, Thread2_P2_#t~ite55=|v_Thread2_P2_#t~ite55_1|} AuxVars[] AssignedVars[Thread2_P2_#t~mem58, ~y$r_buff1_thd3~0, Thread2_P2_#t~ite54, Thread2_P2_#t~ite53, ~__unbuffered_p2_EAX$read_delayed_var~0.offset, Thread2_P2_#t~ite52, ~__unbuffered_p2_EAX$read_delayed_var~0.base, Thread2_P2_#t~ite57, Thread2_P2_#t~ite56, ~__unbuffered_p2_EAX~0, Thread2_P2_#t~ite55, ~__unbuffered_p2_EAX$read_delayed~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [936] L784-->L784-2: Formula: (and (= |v_Thread2_P2_#t~ite60_1| v_~y$mem_tmp~0_2) (not (= 0 (mod v_~y$flush_delayed~0_2 256)))) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_2, Thread2_P2_#t~ite60=|v_Thread2_P2_#t~ite60_1|, ~y$mem_tmp~0=v_~y$mem_tmp~0_2} AuxVars[] AssignedVars[Thread2_P2_#t~ite60] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite60|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [944] L784-2-->L791: Formula: (and (= v_~y$flush_delayed~0_4 0) (= v_~z~0_2 1) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_~#y~0.base_8| (store (select |v_#memory_int_10| |v_~#y~0.base_8|) |v_~#y~0.offset_8| |v_Thread2_P2_#t~ite60_3|)))) InVars {#memory_int=|v_#memory_int_10|, Thread2_P2_#t~ite60=|v_Thread2_P2_#t~ite60_3|, ~#y~0.offset=|v_~#y~0.offset_8|, ~#y~0.base=|v_~#y~0.base_8|} OutVars{Thread2_P2_#t~ite60=|v_Thread2_P2_#t~ite60_4|, Thread2_P2_#t~mem59=|v_Thread2_P2_#t~mem59_2|, ~#y~0.offset=|v_~#y~0.offset_8|, ~y$flush_delayed~0=v_~y$flush_delayed~0_4, #memory_int=|v_#memory_int_9|, ~z~0=v_~z~0_2, ~#y~0.base=|v_~#y~0.base_8|} AuxVars[] AssignedVars[Thread2_P2_#t~ite60, Thread2_P2_#t~mem59, ~y$flush_delayed~0, #memory_int, ~z~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 1 [804] P0ENTRY-->L735: Formula: (and (= v_Thread0_P0_~arg.base_1 |v_Thread0_P0_#in~arg.base_1|) (= v_Thread0_P0_~arg.offset_1 |v_Thread0_P0_#in~arg.offset_1|) (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~__unbuffered_p0_EAX~0_1 v_~z~0_1) (= v_~x~0_1 1)) InVars {Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2, ~z~0=v_~z~0_1, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_1, Thread0_P0_~arg.offset=v_Thread0_P0_~arg.offset_1, Thread0_P0_~arg.base=v_Thread0_P0_~arg.base_1, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, ~z~0=v_~z~0_1, ~x~0=v_~x~0_1, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, Thread0_P0_~arg.offset, Thread0_P0_~arg.base, ~__unbuffered_cnt~0, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [950] L791-->L791-2: Formula: (or (= 0 (mod v_~y$r_buff0_thd3~0_22 256)) (= 0 (mod v_~y$w_buff0_used~0_37 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_37, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_22} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_37, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_22} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [808] P1ENTRY-->L4: Formula: (and (= v_Thread1_P1_~arg.offset_1 |v_Thread1_P1_#in~arg.offset_1|) (= v_~y$w_buff1_used~0_1 v_~y$w_buff0_used~0_2) (= v_~y$w_buff0~0_1 1) (= |v_Thread1_P1___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= (mod v_~y$w_buff1_used~0_1 256) 0)) (not (= (mod v_~y$w_buff0_used~0_1 256) 0)))) 1 0)) (= v_Thread1_P1_~arg.base_1 |v_Thread1_P1_#in~arg.base_1|) (= v_~__unbuffered_p1_EAX~0_1 v_~x~0_2) (= v_~y$w_buff1~0_1 v_~y$w_buff0~0_2) (= v_~y$w_buff0_used~0_1 1) (= v_Thread1_P1___VERIFIER_assert_~expression_1 |v_Thread1_P1___VERIFIER_assert_#in~expression_1|)) InVars {Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~x~0=v_~x~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_1, Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_~arg.offset=v_Thread1_P1_~arg.offset_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_1, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|, Thread1_P1_~arg.base=v_Thread1_P1_~arg.base_1, ~y$w_buff1~0=v_~y$w_buff1~0_1, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_1, ~y$w_buff0~0=v_~y$w_buff0~0_1, Thread1_P1___VERIFIER_assert_#in~expression=|v_Thread1_P1___VERIFIER_assert_#in~expression_1|, ~x~0=v_~x~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_1} AuxVars[] AssignedVars[Thread1_P1___VERIFIER_assert_~expression, Thread1_P1_~arg.offset, ~y$w_buff0_used~0, Thread1_P1_~arg.base, ~y$w_buff1~0, ~__unbuffered_p1_EAX~0, ~y$w_buff0~0, Thread1_P1___VERIFIER_assert_#in~expression, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [810] L4-->L4-3: Formula: (not (= v_Thread1_P1___VERIFIER_assert_~expression_3 0)) InVars {Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [957] L791-2-->L791-4: Formula: (and (= (select (select |v_#memory_int_11| |v_~#y~0.base_9|) |v_~#y~0.offset_9|) |v_Thread2_P2_#t~mem61_2|) (or (= (mod v_~y$w_buff1_used~0_22 256) 0) (= 0 (mod v_~y$r_buff1_thd3~0_18 256))) (= |v_Thread2_P2_#t~ite62_3| |v_Thread2_P2_#t~mem61_2|)) InVars {#memory_int=|v_#memory_int_11|, ~#y~0.offset=|v_~#y~0.offset_9|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_18, ~#y~0.base=|v_~#y~0.base_9|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_22} OutVars{~#y~0.offset=|v_~#y~0.offset_9|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_18, Thread2_P2_#t~ite62=|v_Thread2_P2_#t~ite62_3|, #memory_int=|v_#memory_int_11|, Thread2_P2_#t~mem61=|v_Thread2_P2_#t~mem61_2|, ~#y~0.base=|v_~#y~0.base_9|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_22} AuxVars[] AssignedVars[Thread2_P2_#t~ite62, Thread2_P2_#t~mem61] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite62|=0, |Thread2_P2_#t~mem61|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [962] L791-4-->L791-5: Formula: (= |v_Thread2_P2_#t~ite63_4| |v_Thread2_P2_#t~ite62_4|) InVars {Thread2_P2_#t~ite62=|v_Thread2_P2_#t~ite62_4|} OutVars{Thread2_P2_#t~ite63=|v_Thread2_P2_#t~ite63_4|, Thread2_P2_#t~ite62=|v_Thread2_P2_#t~ite62_4|} AuxVars[] AssignedVars[Thread2_P2_#t~ite63] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite62|=0, |Thread2_P2_#t~ite63|=0, |Thread2_P2_#t~mem61|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [955] L791-5-->L792: Formula: (= (store |v_#memory_int_13| |v_~#y~0.base_10| (store (select |v_#memory_int_13| |v_~#y~0.base_10|) |v_~#y~0.offset_10| |v_Thread2_P2_#t~ite63_2|)) |v_#memory_int_12|) InVars {#memory_int=|v_#memory_int_13|, ~#y~0.offset=|v_~#y~0.offset_10|, ~#y~0.base=|v_~#y~0.base_10|, Thread2_P2_#t~ite63=|v_Thread2_P2_#t~ite63_2|} OutVars{~#y~0.offset=|v_~#y~0.offset_10|, Thread2_P2_#t~ite63=|v_Thread2_P2_#t~ite63_3|, Thread2_P2_#t~ite62=|v_Thread2_P2_#t~ite62_1|, #memory_int=|v_#memory_int_12|, Thread2_P2_#t~mem61=|v_Thread2_P2_#t~mem61_1|, ~#y~0.base=|v_~#y~0.base_10|} AuxVars[] AssignedVars[Thread2_P2_#t~ite63, Thread2_P2_#t~ite62, #memory_int, Thread2_P2_#t~mem61] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [961] L792-->L792-2: Formula: (and (= |v_Thread2_P2_#t~ite64_2| v_~y$w_buff0_used~0_41) (or (= 0 (mod v_~y$w_buff0_used~0_41 256)) (= 0 (mod v_~y$r_buff0_thd3~0_26 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_41, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_26} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_41, Thread2_P2_#t~ite64=|v_Thread2_P2_#t~ite64_2|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_26} AuxVars[] AssignedVars[Thread2_P2_#t~ite64] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite64|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [964] L792-2-->L793: Formula: (= v_~y$w_buff0_used~0_42 |v_Thread2_P2_#t~ite64_3|) InVars {Thread2_P2_#t~ite64=|v_Thread2_P2_#t~ite64_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_42, Thread2_P2_#t~ite64=|v_Thread2_P2_#t~ite64_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread2_P2_#t~ite64] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [966] L793-->L793-2: Formula: (and (or (= (mod v_~y$r_buff0_thd3~0_28 256) 0) (= 0 (mod v_~y$w_buff0_used~0_44 256))) (= |v_Thread2_P2_#t~ite65_2| v_~y$w_buff1_used~0_25) (or (= 0 (mod v_~y$w_buff1_used~0_25 256)) (= (mod v_~y$r_buff1_thd3~0_21 256) 0))) InVars {~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_21, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_44, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_28, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_25} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_21, Thread2_P2_#t~ite65=|v_Thread2_P2_#t~ite65_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_44, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_28, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_25} AuxVars[] AssignedVars[Thread2_P2_#t~ite65] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite65|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [967] L793-2-->L794: Formula: (= v_~y$w_buff1_used~0_26 |v_Thread2_P2_#t~ite65_3|) InVars {Thread2_P2_#t~ite65=|v_Thread2_P2_#t~ite65_3|} OutVars{Thread2_P2_#t~ite65=|v_Thread2_P2_#t~ite65_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_26} AuxVars[] AssignedVars[Thread2_P2_#t~ite65, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [969] L794-->L794-2: Formula: (and (or (= (mod v_~y$w_buff0_used~0_46 256) 0) (= (mod v_~y$r_buff0_thd3~0_30 256) 0)) (= |v_Thread2_P2_#t~ite66_2| v_~y$r_buff0_thd3~0_30)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_30} OutVars{Thread2_P2_#t~ite66=|v_Thread2_P2_#t~ite66_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_30} AuxVars[] AssignedVars[Thread2_P2_#t~ite66] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite66|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [970] L794-2-->L795: Formula: (= v_~y$r_buff0_thd3~0_31 |v_Thread2_P2_#t~ite66_3|) InVars {Thread2_P2_#t~ite66=|v_Thread2_P2_#t~ite66_3|} OutVars{~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_31, Thread2_P2_#t~ite66=|v_Thread2_P2_#t~ite66_4|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, Thread2_P2_#t~ite66] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [972] L795-->L795-2: Formula: (and (= |v_Thread2_P2_#t~ite67_2| v_~y$r_buff1_thd3~0_23) (or (= 0 (mod v_~y$w_buff1_used~0_28 256)) (= 0 (mod v_~y$r_buff1_thd3~0_23 256))) (or (= (mod v_~y$r_buff0_thd3~0_33 256) 0) (= 0 (mod v_~y$w_buff0_used~0_49 256)))) InVars {~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_23, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_49, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_33, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_28} OutVars{Thread2_P2_#t~ite67=|v_Thread2_P2_#t~ite67_2|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_23, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_49, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_33, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_28} AuxVars[] AssignedVars[Thread2_P2_#t~ite67] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite67|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [813] L4-3-->L755: Formula: (and (= v_~y$r_buff1_thd3~0_1 v_~y$r_buff0_thd3~0_1) (= v_~y$r_buff0_thd2~0_1 1) (= v_~y$r_buff1_thd1~0_1 v_~y$r_buff0_thd1~0_1) (= v_~y$r_buff1_thd2~0_1 v_~y$r_buff0_thd2~0_2) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1)) InVars {~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_1, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_1, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_1, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_1, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_1, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_1, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd2~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite67|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [973] L795-2-->L800: Formula: (and (= v_~y$r_buff1_thd3~0_24 |v_Thread2_P2_#t~ite67_3|) (= v_~__unbuffered_cnt~0_5 (+ v_~__unbuffered_cnt~0_6 1))) InVars {Thread2_P2_#t~ite67=|v_Thread2_P2_#t~ite67_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6} OutVars{Thread2_P2_#t~ite67=|v_Thread2_P2_#t~ite67_4|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_24} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, Thread2_P2_#t~ite67, ~__unbuffered_cnt~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [814] L755-->L755-5: Formula: (and (not (= (mod v_~y$w_buff0_used~0_3 256) 0)) (not (= (mod v_~y$r_buff0_thd2~0_3 256) 0)) (= |v_Thread1_P1_#t~ite6_1| v_~y$w_buff0~0_3)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_3, ~y$w_buff0~0=v_~y$w_buff0~0_3, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_3} OutVars{Thread1_P1_#t~ite6=|v_Thread1_P1_#t~ite6_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_3, ~y$w_buff0~0=v_~y$w_buff0~0_3, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_3} AuxVars[] AssignedVars[Thread1_P1_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite6|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [816] L755-5-->L756: Formula: (= |v_#memory_int_2| (store |v_#memory_int_3| |v_~#y~0.base_2| (store (select |v_#memory_int_3| |v_~#y~0.base_2|) |v_~#y~0.offset_2| |v_Thread1_P1_#t~ite6_2|))) InVars {#memory_int=|v_#memory_int_3|, Thread1_P1_#t~ite6=|v_Thread1_P1_#t~ite6_2|, ~#y~0.offset=|v_~#y~0.offset_2|, ~#y~0.base=|v_~#y~0.base_2|} OutVars{~#y~0.offset=|v_~#y~0.offset_2|, Thread1_P1_#t~mem4=|v_Thread1_P1_#t~mem4_1|, Thread1_P1_#t~ite6=|v_Thread1_P1_#t~ite6_3|, #memory_int=|v_#memory_int_2|, ~#y~0.base=|v_~#y~0.base_2|, Thread1_P1_#t~ite5=|v_Thread1_P1_#t~ite5_1|} AuxVars[] AssignedVars[Thread1_P1_#t~mem4, Thread1_P1_#t~ite6, #memory_int, Thread1_P1_#t~ite5] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [819] L756-->L756-2: Formula: (and (not (= 0 (mod v_~y$r_buff0_thd2~0_5 256))) (not (= (mod v_~y$w_buff0_used~0_5 256) 0)) (= |v_Thread1_P1_#t~ite7_1| 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_5, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5} OutVars{Thread1_P1_#t~ite7=|v_Thread1_P1_#t~ite7_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_5, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5} AuxVars[] AssignedVars[Thread1_P1_#t~ite7] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite7|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [822] L756-2-->L757: Formula: (= v_~y$w_buff0_used~0_7 |v_Thread1_P1_#t~ite7_3|) InVars {Thread1_P1_#t~ite7=|v_Thread1_P1_#t~ite7_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_7, Thread1_P1_#t~ite7=|v_Thread1_P1_#t~ite7_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite7] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [824] L757-->L757-2: Formula: (and (= |v_Thread1_P1_#t~ite8_2| v_~y$w_buff1_used~0_5) (or (= (mod v_~y$w_buff1_used~0_5 256) 0) (= 0 (mod v_~y$r_buff1_thd2~0_5 256))) (or (= (mod v_~y$w_buff0_used~0_9 256) 0) (= 0 (mod v_~y$r_buff0_thd2~0_8 256)))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_9, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_5, Thread1_P1_#t~ite8=|v_Thread1_P1_#t~ite8_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_9, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} AuxVars[] AssignedVars[Thread1_P1_#t~ite8] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite8|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [825] L757-2-->L758: Formula: (= v_~y$w_buff1_used~0_6 |v_Thread1_P1_#t~ite8_3|) InVars {Thread1_P1_#t~ite8=|v_Thread1_P1_#t~ite8_3|} OutVars{Thread1_P1_#t~ite8=|v_Thread1_P1_#t~ite8_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_6} AuxVars[] AssignedVars[Thread1_P1_#t~ite8, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [827] L758-->L758-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_10 256)) (= 0 (mod v_~y$w_buff0_used~0_11 256))) (= |v_Thread1_P1_#t~ite9_2| v_~y$r_buff0_thd2~0_10)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_10} OutVars{Thread1_P1_#t~ite9=|v_Thread1_P1_#t~ite9_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_10} AuxVars[] AssignedVars[Thread1_P1_#t~ite9] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite9|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [828] L758-2-->L759: Formula: (= v_~y$r_buff0_thd2~0_11 |v_Thread1_P1_#t~ite9_3|) InVars {Thread1_P1_#t~ite9=|v_Thread1_P1_#t~ite9_3|} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_11, Thread1_P1_#t~ite9=|v_Thread1_P1_#t~ite9_4|} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, Thread1_P1_#t~ite9] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [830] L759-->L759-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_13 256)) (= 0 (mod v_~y$r_buff0_thd2~0_13 256))) (= |v_Thread1_P1_#t~ite10_2| v_~y$r_buff1_thd2~0_7) (or (= 0 (mod v_~y$w_buff1_used~0_8 256)) (= (mod v_~y$r_buff1_thd2~0_7 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_13, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_8} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_13, Thread1_P1_#t~ite10=|v_Thread1_P1_#t~ite10_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_8} AuxVars[] AssignedVars[Thread1_P1_#t~ite10] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite10|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [831] L759-2-->L764: Formula: (and (= v_~y$r_buff1_thd2~0_8 |v_Thread1_P1_#t~ite10_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {Thread1_P1_#t~ite10=|v_Thread1_P1_#t~ite10_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread1_P1_#t~ite10=|v_Thread1_P1_#t~ite10_4|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, Thread1_P1_#t~ite10, ~__unbuffered_cnt~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [627] L818-1-->L822: Formula: (= v_~main$tmp_guard0~0_2 (ite (= 0 (ite (= v_~__unbuffered_cnt~0_8 3) 1 0)) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2, ULTIMATE.start_main_#t~nondet71=|v_ULTIMATE.start_main_#t~nondet71_2|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet71] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [691] L822-->L824: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_3 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [597] L824-->L824-2: Formula: (or (= (mod v_~y$r_buff0_thd0~0_4 256) 0) (= (mod v_~y$w_buff0_used~0_85 256) 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_85, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_85, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_4} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [604] L824-2-->L824-4: Formula: (and (= (select (select |v_#memory_int_24| |v_~#y~0.base_15|) |v_~#y~0.offset_15|) |v_ULTIMATE.start_main_#t~mem72_2|) (= |v_ULTIMATE.start_main_#t~ite73_3| |v_ULTIMATE.start_main_#t~mem72_2|) (or (= (mod v_~y$w_buff1_used~0_49 256) 0) (= 0 (mod v_~y$r_buff1_thd0~0_4 256)))) InVars {#memory_int=|v_#memory_int_24|, ~#y~0.offset=|v_~#y~0.offset_15|, ~#y~0.base=|v_~#y~0.base_15|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_4, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_49} OutVars{ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_3|, ~#y~0.offset=|v_~#y~0.offset_15|, ULTIMATE.start_main_#t~mem72=|v_ULTIMATE.start_main_#t~mem72_2|, #memory_int=|v_#memory_int_24|, ~#y~0.base=|v_~#y~0.base_15|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_4, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_49} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite73, ULTIMATE.start_main_#t~mem72] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite73|=1, |ULTIMATE.start_main_#t~mem72|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [574] L824-4-->L824-5: Formula: (= |v_ULTIMATE.start_main_#t~ite74_3| |v_ULTIMATE.start_main_#t~ite73_4|) InVars {ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_4|} OutVars{ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_4|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite74] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite73|=1, |ULTIMATE.start_main_#t~ite74|=1, |ULTIMATE.start_main_#t~mem72|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [579] L824-5-->L825: Formula: (= (store |v_#memory_int_26| |v_~#y~0.base_16| (store (select |v_#memory_int_26| |v_~#y~0.base_16|) |v_~#y~0.offset_16| |v_ULTIMATE.start_main_#t~ite74_5|)) |v_#memory_int_25|) InVars {#memory_int=|v_#memory_int_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_5|, ~#y~0.offset=|v_~#y~0.offset_16|, ~#y~0.base=|v_~#y~0.base_16|} OutVars{ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_5|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_4|, ~#y~0.offset=|v_~#y~0.offset_16|, ULTIMATE.start_main_#t~mem72=|v_ULTIMATE.start_main_#t~mem72_3|, #memory_int=|v_#memory_int_25|, ~#y~0.base=|v_~#y~0.base_16|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite73, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~mem72, #memory_int] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [666] L825-->L825-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_87 256)) (= (mod v_~y$r_buff0_thd0~0_6 256) 0)) (= |v_ULTIMATE.start_main_#t~ite75_3| v_~y$w_buff0_used~0_87)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_87, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_87, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_6, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite75] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite75|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [669] L825-2-->L826: Formula: (= v_~y$w_buff0_used~0_88 |v_ULTIMATE.start_main_#t~ite75_5|) InVars {ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_5|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_88, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite75] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [644] L826-->L826-2: Formula: (and (or (= (mod v_~y$w_buff1_used~0_51 256) 0) (= 0 (mod v_~y$r_buff1_thd0~0_6 256))) (or (= (mod v_~y$r_buff0_thd0~0_8 256) 0) (= (mod v_~y$w_buff0_used~0_90 256) 0)) (= |v_ULTIMATE.start_main_#t~ite76_3| v_~y$w_buff1_used~0_51)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_90, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_6, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_51} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_90, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_6, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_8, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_51} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite76] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite76|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [630] L826-2-->L827: Formula: (= v_~y$w_buff1_used~0_52 |v_ULTIMATE.start_main_#t~ite76_5|) InVars {ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_5|} OutVars{ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_52} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite76, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [707] L827-->L827-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite77_3| v_~y$r_buff0_thd0~0_10) (or (= (mod v_~y$w_buff0_used~0_92 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_10 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_92, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_92, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_3|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite77] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite77|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [701] L827-2-->L828: Formula: (= v_~y$r_buff0_thd0~0_11 |v_ULTIMATE.start_main_#t~ite77_5|) InVars {ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_5|} OutVars{ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_11} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite77] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [782] L828-->L828-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite78_3| v_~y$r_buff1_thd0~0_8) (or (= 0 (mod v_~y$w_buff0_used~0_94 256)) (= (mod v_~y$r_buff0_thd0~0_13 256) 0)) (or (= 0 (mod v_~y$r_buff1_thd0~0_8 256)) (= 0 (mod v_~y$w_buff1_used~0_54 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_94, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_54} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_94, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_3|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_54} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite78] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite78|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [787] L828-2-->L832: Formula: (and (= v_~y$r_buff1_thd0~0_9 |v_ULTIMATE.start_main_#t~ite78_5|) (= v_~weak$$choice1~0_6 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet79.offset_3| |v_ULTIMATE.start_main_#t~nondet79.base_3|)) 0 1))) InVars {ULTIMATE.start_main_#t~nondet79.offset=|v_ULTIMATE.start_main_#t~nondet79.offset_3|, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_5|, ULTIMATE.start_main_#t~nondet79.base=|v_ULTIMATE.start_main_#t~nondet79.base_3|} OutVars{ULTIMATE.start_main_#t~nondet79.offset=|v_ULTIMATE.start_main_#t~nondet79.offset_2|, ~weak$$choice1~0=v_~weak$$choice1~0_6, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_4|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_9, ULTIMATE.start_main_#t~nondet79.base=|v_ULTIMATE.start_main_#t~nondet79.base_2|} AuxVars[] AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~nondet79.offset, ULTIMATE.start_main_#t~ite78, ~y$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet79.base] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [735] L832-->L832-1: Formula: (not (= (mod v_~__unbuffered_p2_EAX$read_delayed~0_3 256) 0)) InVars {~__unbuffered_p2_EAX$read_delayed~0=v_~__unbuffered_p2_EAX$read_delayed~0_3} OutVars{~__unbuffered_p2_EAX$read_delayed~0=v_~__unbuffered_p2_EAX$read_delayed~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [737] L832-1-->L832-3: Formula: (and (not (= 0 (mod v_~weak$$choice1~0_7 256))) (= |v_ULTIMATE.start_main_#t~mem80_2| (select (select |v_#memory_int_27| v_~__unbuffered_p2_EAX$read_delayed_var~0.base_3) v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_3)) (= |v_ULTIMATE.start_main_#t~ite81_2| |v_ULTIMATE.start_main_#t~mem80_2|)) InVars {#memory_int=|v_#memory_int_27|, ~weak$$choice1~0=v_~weak$$choice1~0_7, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_3, ~__unbuffered_p2_EAX$read_delayed_var~0.base=v_~__unbuffered_p2_EAX$read_delayed_var~0.base_3} OutVars{~weak$$choice1~0=v_~weak$$choice1~0_7, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_2|, ULTIMATE.start_main_#t~mem80=|v_ULTIMATE.start_main_#t~mem80_2|, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_3, ~__unbuffered_p2_EAX$read_delayed_var~0.base=v_~__unbuffered_p2_EAX$read_delayed_var~0.base_3, #memory_int=|v_#memory_int_27|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#t~mem80] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite81|=1, |ULTIMATE.start_main_#t~mem80|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [719] L832-3-->L832-5: Formula: (= |v_ULTIMATE.start_main_#t~ite82_2| |v_ULTIMATE.start_main_#t~ite81_4|) InVars {ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_4|} OutVars{ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_4|, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite82] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite81|=1, |ULTIMATE.start_main_#t~ite82|=1, |ULTIMATE.start_main_#t~mem80|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [727] L832-5-->L835: Formula: (and (= v_~main$tmp_guard1~0_2 (ite (= 0 (ite (not (and (= v_~__unbuffered_p2_EAX~0_5 1) (= v_~__unbuffered_p0_EAX~0_3 1) (= 1 v_~__unbuffered_p1_EAX~0_3))) 1 0)) 0 1)) (= v_~__unbuffered_p2_EAX~0_5 |v_ULTIMATE.start_main_#t~ite82_5|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_3, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_5|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_3} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_3, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_4|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_3, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_5|, ULTIMATE.start_main_#t~mem80=|v_ULTIMATE.start_main_#t~mem80_3|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_5} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite82, ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#t~mem80, ~main$tmp_guard1~0, ~__unbuffered_p2_EAX~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [595] L835-->L835-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_3 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [601] L835-1-->L4: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [594] L4-->L4-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [589] L4-1-->L4-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_4 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_4} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_4} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [587] L4-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 SUMMARY for call ~#y~0.base, ~#y~0.offset := #Ultimate.alloc(4); srcloc: L700 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#y~0.base, ~#y~0.offset, 4); srcloc: L700-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0] [?] -1 ~y$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0] [?] -1 ~y$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 ~weak$$choice1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet69, main_#t~nondet70, main_#t~nondet71, main_#t~ite74, main_#t~ite73, main_#t~mem72, main_#t~ite75, main_#t~ite76, main_#t~ite77, main_#t~ite78, main_#t~nondet79.base, main_#t~nondet79.offset, main_#t~ite82, main_#t~ite81, main_#t~mem80, main_~#t2686~0.base, main_~#t2686~0.offset, main_~#t2687~0.base, main_~#t2687~0.offset, main_~#t2688~0.base, main_~#t2688~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2686~0.base, main_~#t2686~0.offset := #Ultimate.alloc(4); srcloc: L813 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t2686~0.base, main_~#t2686~0.offset, 4); srcloc: L813-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet69; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2687~0.base, main_~#t2687~0.offset := #Ultimate.alloc(4); srcloc: L815 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t2687~0.base, main_~#t2687~0.offset, 4); srcloc: L815-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet70; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2688~0.base, main_~#t2688~0.offset := #Ultimate.alloc(4); srcloc: L817 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t2688~0.base, main_~#t2688~0.offset, 4); srcloc: L817-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~weak$$choice0~0 := (if 0 == #t~nondet12.base + #t~nondet12.offset then 0 else 1);havoc #t~nondet12.base, #t~nondet12.offset;~weak$$choice2~0 := (if 0 == #t~nondet13.base + #t~nondet13.offset then 0 else 1);havoc #t~nondet13.base, #t~nondet13.offset;~y$flush_delayed~0 := ~weak$$choice2~0;call #t~mem14 := read~int(~#y~0.base, ~#y~0.offset, 4);~y$mem_tmp~0 := #t~mem14;havoc #t~mem14;~weak$$choice1~0 := (if 0 == #t~nondet15.base + #t~nondet15.offset then 0 else 1);havoc #t~nondet15.base, #t~nondet15.offset; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 == ~y$w_buff0_used~0 % 256;call #t~mem16 := read~int(~#y~0.base, ~#y~0.offset, 4);#t~ite26 := #t~mem16; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite26|=0, |P2_#t~mem16|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 call write~int(#t~ite26, ~#y~0.base, ~#y~0.offset, 4);havoc #t~mem17;havoc #t~ite19;havoc #t~ite26;havoc #t~ite23;havoc #t~mem21;havoc #t~ite24;havoc #t~ite22;havoc #t~mem16;havoc #t~ite25;havoc #t~ite18;havoc #t~ite20; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite31 := ~y$w_buff0~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite31|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$w_buff0~0 := #t~ite31;havoc #t~ite28;havoc #t~ite29;havoc #t~ite31;havoc #t~ite27;havoc #t~ite30; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite36 := ~y$w_buff1~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite36|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$w_buff1~0 := #t~ite36;havoc #t~ite33;havoc #t~ite36;havoc #t~ite34;havoc #t~ite35;havoc #t~ite32; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite41 := ~y$w_buff0_used~0 % 256; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite41|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$w_buff0_used~0 := (if 0 == #t~ite41 then 0 else 1);havoc #t~ite38;havoc #t~ite37;havoc #t~ite39;havoc #t~ite41;havoc #t~ite40; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite46 := ~y$w_buff1_used~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite46|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$w_buff1_used~0 := #t~ite46;havoc #t~ite46;havoc #t~ite44;havoc #t~ite42;havoc #t~ite45;havoc #t~ite43; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite51 := ~y$r_buff0_thd3~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite51|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$r_buff0_thd3~0 := #t~ite51;havoc #t~ite51;havoc #t~ite50;havoc #t~ite47;havoc #t~ite49;havoc #t~ite48; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite57 := ~y$r_buff1_thd3~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite57|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd3~0 := #t~ite57;havoc #t~ite55;havoc #t~ite56;havoc #t~ite54;havoc #t~ite52;havoc #t~ite53;havoc #t~ite57;~__unbuffered_p2_EAX$read_delayed~0 := 1;~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset := ~#y~0.base, ~#y~0.offset;call #t~mem58 := read~int(~#y~0.base, ~#y~0.offset, 4);~__unbuffered_p2_EAX~0 := #t~mem58;havoc #t~mem58; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~y$flush_delayed~0 % 256;#t~ite60 := ~y$mem_tmp~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite60|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 call write~int(#t~ite60, ~#y~0.base, ~#y~0.offset, 4);havoc #t~ite60;havoc #t~mem59;~y$flush_delayed~0 := 0;~z~0 := 1; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~__unbuffered_p0_EAX~0 := ~z~0;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~__unbuffered_p1_EAX~0 := ~x~0;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume !(0 == __VERIFIER_assert_~expression); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256);call #t~mem61 := read~int(~#y~0.base, ~#y~0.offset, 4);#t~ite62 := #t~mem61; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite62|=0, |P2_#t~mem61|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 #t~ite63 := #t~ite62; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite62|=0, |P2_#t~ite63|=0, |P2_#t~mem61|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 call write~int(#t~ite63, ~#y~0.base, ~#y~0.offset, 4);havoc #t~ite62;havoc #t~ite63;havoc #t~mem61; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite64 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite64|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite64;havoc #t~ite64; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite65 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite65|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite65;havoc #t~ite65; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite66 := ~y$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite66|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 ~y$r_buff0_thd3~0 := #t~ite66;havoc #t~ite66; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite67 := ~y$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite67|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0;~y$r_buff0_thd2~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite67|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 ~y$r_buff1_thd3~0 := #t~ite67;havoc #t~ite67;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite6 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=1, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 call write~int(#t~ite6, ~#y~0.base, ~#y~0.offset, 4);havoc #t~ite5;havoc #t~ite6;havoc #t~mem4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite7 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$w_buff0_used~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite8 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$w_buff1_used~0 := #t~ite8;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite9 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite9|=1, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$r_buff0_thd2~0 := #t~ite9;havoc #t~ite9; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite10 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite10|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$r_buff1_thd2~0 := #t~ite10;havoc #t~ite10;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 havoc main_#t~nondet71;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);call main_#t~mem72 := read~int(~#y~0.base, ~#y~0.offset, 4);main_#t~ite73 := main_#t~mem72; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite73|=1, |ULTIMATE.start_main_#t~mem72|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 main_#t~ite74 := main_#t~ite73; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite73|=1, |ULTIMATE.start_main_#t~ite74|=1, |ULTIMATE.start_main_#t~mem72|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 call write~int(main_#t~ite74, ~#y~0.base, ~#y~0.offset, 4);havoc main_#t~ite73;havoc main_#t~mem72;havoc main_#t~ite74; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite75 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite75|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite75;havoc main_#t~ite75; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite76 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite76|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite76;havoc main_#t~ite76; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite77 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite77|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite77;havoc main_#t~ite77; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite78 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite78|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite78;havoc main_#t~ite78;~weak$$choice1~0 := (if 0 == main_#t~nondet79.base + main_#t~nondet79.offset then 0 else 1);havoc main_#t~nondet79.base, main_#t~nondet79.offset; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume 0 != ~__unbuffered_p2_EAX$read_delayed~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume 0 != ~weak$$choice1~0 % 256;call main_#t~mem80 := read~int(~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset, 4);main_#t~ite81 := main_#t~mem80; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite81|=1, |ULTIMATE.start_main_#t~mem80|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 main_#t~ite82 := main_#t~ite81; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite81|=1, |ULTIMATE.start_main_#t~ite82|=1, |ULTIMATE.start_main_#t~mem80|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~__unbuffered_p2_EAX~0 := main_#t~ite82;havoc main_#t~ite81;havoc main_#t~mem80;havoc main_#t~ite82;~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 SUMMARY for call ~#y~0.base, ~#y~0.offset := #Ultimate.alloc(4); srcloc: L700 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#y~0.base, ~#y~0.offset, 4); srcloc: L700-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0] [?] -1 ~y$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0] [?] -1 ~y$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 ~weak$$choice1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet69, main_#t~nondet70, main_#t~nondet71, main_#t~ite74, main_#t~ite73, main_#t~mem72, main_#t~ite75, main_#t~ite76, main_#t~ite77, main_#t~ite78, main_#t~nondet79.base, main_#t~nondet79.offset, main_#t~ite82, main_#t~ite81, main_#t~mem80, main_~#t2686~0.base, main_~#t2686~0.offset, main_~#t2687~0.base, main_~#t2687~0.offset, main_~#t2688~0.base, main_~#t2688~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2686~0.base, main_~#t2686~0.offset := #Ultimate.alloc(4); srcloc: L813 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t2686~0.base, main_~#t2686~0.offset, 4); srcloc: L813-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet69; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2687~0.base, main_~#t2687~0.offset := #Ultimate.alloc(4); srcloc: L815 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t2687~0.base, main_~#t2687~0.offset, 4); srcloc: L815-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet70; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2688~0.base, main_~#t2688~0.offset := #Ultimate.alloc(4); srcloc: L817 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t2688~0.base, main_~#t2688~0.offset, 4); srcloc: L817-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~weak$$choice0~0 := (if 0 == #t~nondet12.base + #t~nondet12.offset then 0 else 1);havoc #t~nondet12.base, #t~nondet12.offset;~weak$$choice2~0 := (if 0 == #t~nondet13.base + #t~nondet13.offset then 0 else 1);havoc #t~nondet13.base, #t~nondet13.offset;~y$flush_delayed~0 := ~weak$$choice2~0;call #t~mem14 := read~int(~#y~0.base, ~#y~0.offset, 4);~y$mem_tmp~0 := #t~mem14;havoc #t~mem14;~weak$$choice1~0 := (if 0 == #t~nondet15.base + #t~nondet15.offset then 0 else 1);havoc #t~nondet15.base, #t~nondet15.offset; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 == ~y$w_buff0_used~0 % 256;call #t~mem16 := read~int(~#y~0.base, ~#y~0.offset, 4);#t~ite26 := #t~mem16; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite26|=0, |P2_#t~mem16|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 call write~int(#t~ite26, ~#y~0.base, ~#y~0.offset, 4);havoc #t~mem17;havoc #t~ite19;havoc #t~ite26;havoc #t~ite23;havoc #t~mem21;havoc #t~ite24;havoc #t~ite22;havoc #t~mem16;havoc #t~ite25;havoc #t~ite18;havoc #t~ite20; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite31 := ~y$w_buff0~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite31|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$w_buff0~0 := #t~ite31;havoc #t~ite28;havoc #t~ite29;havoc #t~ite31;havoc #t~ite27;havoc #t~ite30; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite36 := ~y$w_buff1~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite36|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$w_buff1~0 := #t~ite36;havoc #t~ite33;havoc #t~ite36;havoc #t~ite34;havoc #t~ite35;havoc #t~ite32; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite41 := ~y$w_buff0_used~0 % 256; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite41|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$w_buff0_used~0 := (if 0 == #t~ite41 then 0 else 1);havoc #t~ite38;havoc #t~ite37;havoc #t~ite39;havoc #t~ite41;havoc #t~ite40; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite46 := ~y$w_buff1_used~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite46|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$w_buff1_used~0 := #t~ite46;havoc #t~ite46;havoc #t~ite44;havoc #t~ite42;havoc #t~ite45;havoc #t~ite43; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite51 := ~y$r_buff0_thd3~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite51|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$r_buff0_thd3~0 := #t~ite51;havoc #t~ite51;havoc #t~ite50;havoc #t~ite47;havoc #t~ite49;havoc #t~ite48; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite57 := ~y$r_buff1_thd3~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite57|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd3~0 := #t~ite57;havoc #t~ite55;havoc #t~ite56;havoc #t~ite54;havoc #t~ite52;havoc #t~ite53;havoc #t~ite57;~__unbuffered_p2_EAX$read_delayed~0 := 1;~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset := ~#y~0.base, ~#y~0.offset;call #t~mem58 := read~int(~#y~0.base, ~#y~0.offset, 4);~__unbuffered_p2_EAX~0 := #t~mem58;havoc #t~mem58; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~y$flush_delayed~0 % 256;#t~ite60 := ~y$mem_tmp~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite60|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 call write~int(#t~ite60, ~#y~0.base, ~#y~0.offset, 4);havoc #t~ite60;havoc #t~mem59;~y$flush_delayed~0 := 0;~z~0 := 1; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~__unbuffered_p0_EAX~0 := ~z~0;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~__unbuffered_p1_EAX~0 := ~x~0;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume !(0 == __VERIFIER_assert_~expression); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256);call #t~mem61 := read~int(~#y~0.base, ~#y~0.offset, 4);#t~ite62 := #t~mem61; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite62|=0, |P2_#t~mem61|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 #t~ite63 := #t~ite62; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite62|=0, |P2_#t~ite63|=0, |P2_#t~mem61|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 call write~int(#t~ite63, ~#y~0.base, ~#y~0.offset, 4);havoc #t~ite62;havoc #t~ite63;havoc #t~mem61; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite64 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite64|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite64;havoc #t~ite64; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite65 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite65|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite65;havoc #t~ite65; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite66 := ~y$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite66|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 ~y$r_buff0_thd3~0 := #t~ite66;havoc #t~ite66; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite67 := ~y$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite67|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0;~y$r_buff0_thd2~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite67|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 ~y$r_buff1_thd3~0 := #t~ite67;havoc #t~ite67;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite6 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=1, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 call write~int(#t~ite6, ~#y~0.base, ~#y~0.offset, 4);havoc #t~ite5;havoc #t~ite6;havoc #t~mem4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite7 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$w_buff0_used~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite8 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$w_buff1_used~0 := #t~ite8;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite9 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite9|=1, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$r_buff0_thd2~0 := #t~ite9;havoc #t~ite9; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite10 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite10|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$r_buff1_thd2~0 := #t~ite10;havoc #t~ite10;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 havoc main_#t~nondet71;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);call main_#t~mem72 := read~int(~#y~0.base, ~#y~0.offset, 4);main_#t~ite73 := main_#t~mem72; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite73|=1, |ULTIMATE.start_main_#t~mem72|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 main_#t~ite74 := main_#t~ite73; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite73|=1, |ULTIMATE.start_main_#t~ite74|=1, |ULTIMATE.start_main_#t~mem72|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 call write~int(main_#t~ite74, ~#y~0.base, ~#y~0.offset, 4);havoc main_#t~ite73;havoc main_#t~mem72;havoc main_#t~ite74; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite75 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite75|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite75;havoc main_#t~ite75; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite76 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite76|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite76;havoc main_#t~ite76; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite77 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite77|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite77;havoc main_#t~ite77; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite78 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite78|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite78;havoc main_#t~ite78;~weak$$choice1~0 := (if 0 == main_#t~nondet79.base + main_#t~nondet79.offset then 0 else 1);havoc main_#t~nondet79.base, main_#t~nondet79.offset; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume 0 != ~__unbuffered_p2_EAX$read_delayed~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume 0 != ~weak$$choice1~0 % 256;call main_#t~mem80 := read~int(~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset, 4);main_#t~ite81 := main_#t~mem80; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite81|=1, |ULTIMATE.start_main_#t~mem80|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 main_#t~ite82 := main_#t~ite81; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite81|=1, |ULTIMATE.start_main_#t~ite82|=1, |ULTIMATE.start_main_#t~mem80|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~__unbuffered_p2_EAX~0 := main_#t~ite82;havoc main_#t~ite81;havoc main_#t~mem80;havoc main_#t~ite82;~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L679] -1 ~__unbuffered_p2_EAX$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L680] -1 ~__unbuffered_p2_EAX$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX~0=0] [L681] -1 ~__unbuffered_p2_EAX$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L682] -1 ~__unbuffered_p2_EAX$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L683] -1 ~__unbuffered_p2_EAX$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L684] -1 ~__unbuffered_p2_EAX$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L685] -1 ~__unbuffered_p2_EAX$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L686] -1 ~__unbuffered_p2_EAX$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L687] -1 ~__unbuffered_p2_EAX$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L688] -1 ~__unbuffered_p2_EAX$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L689] -1 ~__unbuffered_p2_EAX$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L690] -1 ~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L691] -1 ~__unbuffered_p2_EAX$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L692] -1 ~__unbuffered_p2_EAX$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L693] -1 ~__unbuffered_p2_EAX$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L694] -1 ~__unbuffered_p2_EAX$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L695] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L696] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L698] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] -1 call ~#y~0.base, ~#y~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] -1 call write~init~int(0, ~#y~0.base, ~#y~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0] [L702] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0] [L703] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0] [L704] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0] [L705] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0] [L706] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0] [L707] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0] [L708] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0] [L709] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0] [L710] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0] [L711] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0] [L712] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0] [L713] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0] [L714] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0] [L715] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0] [L716] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0] [L718] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L719] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L720] -1 ~weak$$choice1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L721] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet69, main_#t~nondet70, main_#t~nondet71, main_#t~ite74, main_#t~ite73, main_#t~mem72, main_#t~ite75, main_#t~ite76, main_#t~ite77, main_#t~ite78, main_#t~nondet79.base, main_#t~nondet79.offset, main_#t~ite82, main_#t~ite81, main_#t~mem80, main_~#t2686~0.base, main_~#t2686~0.offset, main_~#t2687~0.base, main_~#t2687~0.offset, main_~#t2688~0.base, main_~#t2688~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L813] -1 call main_~#t2686~0.base, main_~#t2686~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] -1 call write~int(0, main_~#t2686~0.base, main_~#t2686~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] -1 havoc main_#t~nondet69; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L815] -1 call main_~#t2687~0.base, main_~#t2687~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] -1 call write~int(1, main_~#t2687~0.base, main_~#t2687~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] -1 havoc main_#t~nondet70; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L817] -1 call main_~#t2688~0.base, main_~#t2688~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] -1 call write~int(2, main_~#t2688~0.base, main_~#t2688~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L766-L801] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L769] 0 ~weak$$choice0~0 := (if 0 == #t~nondet12.base + #t~nondet12.offset then 0 else 1); [L769] 0 havoc #t~nondet12.base, #t~nondet12.offset; [L770] 0 ~weak$$choice2~0 := (if 0 == #t~nondet13.base + #t~nondet13.offset then 0 else 1); [L770] 0 havoc #t~nondet13.base, #t~nondet13.offset; [L771] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L772] 0 call #t~mem14 := read~int(~#y~0.base, ~#y~0.offset, 4); [L772] 0 ~y$mem_tmp~0 := #t~mem14; [L772] 0 havoc #t~mem14; [L773] 0 ~weak$$choice1~0 := (if 0 == #t~nondet15.base + #t~nondet15.offset then 0 else 1); [L773] 0 havoc #t~nondet15.base, #t~nondet15.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] 0 assume 0 == ~y$w_buff0_used~0 % 256; [L774] 0 call #t~mem16 := read~int(~#y~0.base, ~#y~0.offset, 4); [L774] 0 #t~ite26 := #t~mem16; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite26=0, #t~mem16=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] 0 call write~int(#t~ite26, ~#y~0.base, ~#y~0.offset, 4); [L774] 0 havoc #t~mem17; [L774] 0 havoc #t~ite19; [L774] 0 havoc #t~ite26; [L774] 0 havoc #t~ite23; [L774] 0 havoc #t~mem21; [L774] 0 havoc #t~ite24; [L774] 0 havoc #t~ite22; [L774] 0 havoc #t~mem16; [L774] 0 havoc #t~ite25; [L774] 0 havoc #t~ite18; [L774] 0 havoc #t~ite20; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] 0 assume 0 != ~weak$$choice2~0 % 256; [L775] 0 #t~ite31 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite31=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] 0 ~y$w_buff0~0 := #t~ite31; [L775] 0 havoc #t~ite28; [L775] 0 havoc #t~ite29; [L775] 0 havoc #t~ite31; [L775] 0 havoc #t~ite27; [L775] 0 havoc #t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] 0 assume 0 != ~weak$$choice2~0 % 256; [L776] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] 0 ~y$w_buff1~0 := #t~ite36; [L776] 0 havoc #t~ite33; [L776] 0 havoc #t~ite36; [L776] 0 havoc #t~ite34; [L776] 0 havoc #t~ite35; [L776] 0 havoc #t~ite32; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] 0 assume 0 != ~weak$$choice2~0 % 256; [L777] 0 #t~ite41 := ~y$w_buff0_used~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite41=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] 0 ~y$w_buff0_used~0 := (if 0 == #t~ite41 then 0 else 1); [L777] 0 havoc #t~ite38; [L777] 0 havoc #t~ite37; [L777] 0 havoc #t~ite39; [L777] 0 havoc #t~ite41; [L777] 0 havoc #t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] 0 assume 0 != ~weak$$choice2~0 % 256; [L778] 0 #t~ite46 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite46=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] 0 ~y$w_buff1_used~0 := #t~ite46; [L778] 0 havoc #t~ite46; [L778] 0 havoc #t~ite44; [L778] 0 havoc #t~ite42; [L778] 0 havoc #t~ite45; [L778] 0 havoc #t~ite43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] 0 assume 0 != ~weak$$choice2~0 % 256; [L779] 0 #t~ite51 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] 0 ~y$r_buff0_thd3~0 := #t~ite51; [L779] 0 havoc #t~ite51; [L779] 0 havoc #t~ite50; [L779] 0 havoc #t~ite47; [L779] 0 havoc #t~ite49; [L779] 0 havoc #t~ite48; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] 0 assume 0 != ~weak$$choice2~0 % 256; [L780] 0 #t~ite57 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite57=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] 0 ~y$r_buff1_thd3~0 := #t~ite57; [L780] 0 havoc #t~ite55; [L780] 0 havoc #t~ite56; [L780] 0 havoc #t~ite54; [L780] 0 havoc #t~ite52; [L780] 0 havoc #t~ite53; [L780] 0 havoc #t~ite57; [L781] 0 ~__unbuffered_p2_EAX$read_delayed~0 := 1; [L782] 0 ~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset := ~#y~0.base, ~#y~0.offset; [L783] 0 call #t~mem58 := read~int(~#y~0.base, ~#y~0.offset, 4); [L783] 0 ~__unbuffered_p2_EAX~0 := #t~mem58; [L783] 0 havoc #t~mem58; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] 0 assume 0 != ~y$flush_delayed~0 % 256; [L784] 0 #t~ite60 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite60=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] 0 call write~int(#t~ite60, ~#y~0.base, ~#y~0.offset, 4); [L784] 0 havoc #t~ite60; [L784] 0 havoc #t~mem59; [L785] 0 ~y$flush_delayed~0 := 0; [L788] 0 ~z~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L722-L736] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L725] 1 ~__unbuffered_p0_EAX~0 := ~z~0; [L728] 1 ~x~0 := 1; [L733] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L737-L765] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L740] 2 ~__unbuffered_p1_EAX~0 := ~x~0; [L743] 2 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 2 ~y$w_buff0~0 := 1; [L745] 2 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 2 ~y$w_buff0_used~0 := 1; [L747] 2 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L747] 2 havoc __VERIFIER_assert_~expression; [L4] 2 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] WARNING: YOUR LOGFILE WAS TOO LONG, SOME LINES IN THE MIDDLE WERE REMOVED. [L778] 0 assume 0 != ~weak$$choice2~0 % 256; [L778] 0 #t~ite46 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite46=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] 0 ~y$w_buff1_used~0 := #t~ite46; [L778] 0 havoc #t~ite46; [L778] 0 havoc #t~ite44; [L778] 0 havoc #t~ite42; [L778] 0 havoc #t~ite45; [L778] 0 havoc #t~ite43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] 0 assume 0 != ~weak$$choice2~0 % 256; [L779] 0 #t~ite51 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] 0 ~y$r_buff0_thd3~0 := #t~ite51; [L779] 0 havoc #t~ite51; [L779] 0 havoc #t~ite50; [L779] 0 havoc #t~ite47; [L779] 0 havoc #t~ite49; [L779] 0 havoc #t~ite48; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] 0 assume 0 != ~weak$$choice2~0 % 256; [L780] 0 #t~ite57 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite57=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] 0 ~y$r_buff1_thd3~0 := #t~ite57; [L780] 0 havoc #t~ite55; [L780] 0 havoc #t~ite56; [L780] 0 havoc #t~ite54; [L780] 0 havoc #t~ite52; [L780] 0 havoc #t~ite53; [L780] 0 havoc #t~ite57; [L781] 0 ~__unbuffered_p2_EAX$read_delayed~0 := 1; [L782] 0 ~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset := ~#y~0.base, ~#y~0.offset; [L783] 0 call #t~mem58 := read~int(~#y~0.base, ~#y~0.offset, 4); [L783] 0 ~__unbuffered_p2_EAX~0 := #t~mem58; [L783] 0 havoc #t~mem58; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] 0 assume 0 != ~y$flush_delayed~0 % 256; [L784] 0 #t~ite60 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite60=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] 0 call write~int(#t~ite60, ~#y~0.base, ~#y~0.offset, 4); [L784] 0 havoc #t~ite60; [L784] 0 havoc #t~mem59; [L785] 0 ~y$flush_delayed~0 := 0; [L788] 0 ~z~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L722-L736] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L725] 1 ~__unbuffered_p0_EAX~0 := ~z~0; [L728] 1 ~x~0 := 1; [L733] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L737-L765] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L740] 2 ~__unbuffered_p1_EAX~0 := ~x~0; [L743] 2 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 2 ~y$w_buff0~0 := 1; [L745] 2 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 2 ~y$w_buff0_used~0 := 1; [L747] 2 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L747] 2 havoc __VERIFIER_assert_~expression; [L4] 2 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] 2 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256); [L791] 0 call #t~mem61 := read~int(~#y~0.base, ~#y~0.offset, 4); [L791] 0 #t~ite62 := #t~mem61; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite62=0, #t~mem61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 #t~ite63 := #t~ite62; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite62=0, #t~ite63=0, #t~mem61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 call write~int(#t~ite63, ~#y~0.base, ~#y~0.offset, 4); [L791] 0 havoc #t~ite62; [L791] 0 havoc #t~ite63; [L791] 0 havoc #t~mem61; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L792] 0 #t~ite64 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite64=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] 0 ~y$w_buff0_used~0 := #t~ite64; [L792] 0 havoc #t~ite64; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L793] 0 #t~ite65 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite65=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] 0 ~y$w_buff1_used~0 := #t~ite65; [L793] 0 havoc #t~ite65; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L794] 0 #t~ite66 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite66=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] 0 ~y$r_buff0_thd3~0 := #t~ite66; [L794] 0 havoc #t~ite66; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L795] 0 #t~ite67 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite67=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L748] 2 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 2 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 2 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 2 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 2 ~y$r_buff0_thd2~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite67=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] 0 ~y$r_buff1_thd3~0 := #t~ite67; [L795] 0 havoc #t~ite67; [L798] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] 2 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L755] 2 #t~ite6 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] 2 call write~int(#t~ite6, ~#y~0.base, ~#y~0.offset, 4); [L755] 2 havoc #t~ite5; [L755] 2 havoc #t~ite6; [L755] 2 havoc #t~mem4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] 2 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L756] 2 #t~ite7 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] 2 ~y$w_buff0_used~0 := #t~ite7; [L756] 2 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L757] 2 #t~ite8 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] 2 ~y$w_buff1_used~0 := #t~ite8; [L757] 2 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L758] 2 #t~ite9 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] 2 ~y$r_buff0_thd2~0 := #t~ite9; [L758] 2 havoc #t~ite9; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L759] 2 #t~ite10 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite10=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] 2 ~y$r_buff1_thd2~0 := #t~ite10; [L759] 2 havoc #t~ite10; [L762] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L818] -1 havoc main_#t~nondet71; [L820] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L822] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L824] -1 call main_#t~mem72 := read~int(~#y~0.base, ~#y~0.offset, 4); [L824] -1 main_#t~ite73 := main_#t~mem72; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite73=1, main_#t~mem72=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] -1 main_#t~ite74 := main_#t~ite73; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite73=1, main_#t~ite74=1, main_#t~mem72=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] -1 call write~int(main_#t~ite74, ~#y~0.base, ~#y~0.offset, 4); [L824] -1 havoc main_#t~ite73; [L824] -1 havoc main_#t~mem72; [L824] -1 havoc main_#t~ite74; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L825] -1 main_#t~ite75 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite75=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] -1 ~y$w_buff0_used~0 := main_#t~ite75; [L825] -1 havoc main_#t~ite75; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L826] -1 main_#t~ite76 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite76=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] -1 ~y$w_buff1_used~0 := main_#t~ite76; [L826] -1 havoc main_#t~ite76; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L827] -1 main_#t~ite77 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite77=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] -1 ~y$r_buff0_thd0~0 := main_#t~ite77; [L827] -1 havoc main_#t~ite77; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L828] -1 main_#t~ite78 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite78=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] -1 ~y$r_buff1_thd0~0 := main_#t~ite78; [L828] -1 havoc main_#t~ite78; [L831] -1 ~weak$$choice1~0 := (if 0 == main_#t~nondet79.base + main_#t~nondet79.offset then 0 else 1); [L831] -1 havoc main_#t~nondet79.base, main_#t~nondet79.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 assume 0 != ~__unbuffered_p2_EAX$read_delayed~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 assume 0 != ~weak$$choice1~0 % 256; [L832] -1 call main_#t~mem80 := read~int(~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset, 4); [L832] -1 main_#t~ite81 := main_#t~mem80; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite81=1, main_#t~mem80=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 main_#t~ite82 := main_#t~ite81; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite81=1, main_#t~ite82=1, main_#t~mem80=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 ~__unbuffered_p2_EAX~0 := main_#t~ite82; [L832] -1 havoc main_#t~ite81; [L832] -1 havoc main_#t~mem80; [L832] -1 havoc main_#t~ite82; [L833] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L835] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L835] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L679] -1 ~__unbuffered_p2_EAX$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L680] -1 ~__unbuffered_p2_EAX$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX~0=0] [L681] -1 ~__unbuffered_p2_EAX$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L682] -1 ~__unbuffered_p2_EAX$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L683] -1 ~__unbuffered_p2_EAX$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L684] -1 ~__unbuffered_p2_EAX$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L685] -1 ~__unbuffered_p2_EAX$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L686] -1 ~__unbuffered_p2_EAX$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L687] -1 ~__unbuffered_p2_EAX$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L688] -1 ~__unbuffered_p2_EAX$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L689] -1 ~__unbuffered_p2_EAX$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L690] -1 ~__unbuffered_p2_EAX$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L691] -1 ~__unbuffered_p2_EAX$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L692] -1 ~__unbuffered_p2_EAX$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L693] -1 ~__unbuffered_p2_EAX$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L694] -1 ~__unbuffered_p2_EAX$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L695] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L696] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L698] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] FCALL -1 call ~#y~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] FCALL -1 call write~init~int(0, ~#y~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0] [L702] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0] [L703] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0] [L704] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0] [L705] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0] [L706] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0] [L707] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0] [L708] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0] [L709] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0] [L710] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0] [L711] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0] [L712] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0] [L713] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0] [L714] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0] [L715] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0] [L716] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0] [L718] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L719] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L720] -1 ~weak$$choice1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L721] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet69, main_#t~nondet70, main_#t~nondet71, main_#t~ite74, main_#t~ite73, main_#t~mem72, main_#t~ite75, main_#t~ite76, main_#t~ite77, main_#t~ite78, main_#t~nondet79, main_#t~ite82, main_#t~ite81, main_#t~mem80, main_~#t2686~0, main_~#t2687~0, main_~#t2688~0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L813] FCALL -1 call main_~#t2686~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FCALL -1 call write~int(0, main_~#t2686~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] -1 havoc main_#t~nondet69; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L815] FCALL -1 call main_~#t2687~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FCALL -1 call write~int(1, main_~#t2687~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] -1 havoc main_#t~nondet70; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L817] FCALL -1 call main_~#t2688~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FCALL -1 call write~int(2, main_~#t2688~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L766-L801] 0 ~arg := #in~arg; [L769] 0 ~weak$$choice0~0 := (if 0 == #t~nondet12!base + #t~nondet12!offset then 0 else 1); [L769] 0 havoc #t~nondet12; [L770] 0 ~weak$$choice2~0 := (if 0 == #t~nondet13!base + #t~nondet13!offset then 0 else 1); [L770] 0 havoc #t~nondet13; [L771] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L772] FCALL 0 call #t~mem14 := read~int(~#y~0, 4); [L772] 0 ~y$mem_tmp~0 := #t~mem14; [L772] 0 havoc #t~mem14; [L773] 0 ~weak$$choice1~0 := (if 0 == #t~nondet15!base + #t~nondet15!offset then 0 else 1); [L773] 0 havoc #t~nondet15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] COND TRUE 0 0 == ~y$w_buff0_used~0 % 256 [L774] FCALL 0 call #t~mem16 := read~int(~#y~0, 4); [L774] 0 #t~ite26 := #t~mem16; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite26=0, #t~mem16=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] FCALL 0 call write~int(#t~ite26, ~#y~0, 4); [L774] 0 havoc #t~mem17; [L774] 0 havoc #t~ite19; [L774] 0 havoc #t~ite26; [L774] 0 havoc #t~ite23; [L774] 0 havoc #t~mem21; [L774] 0 havoc #t~ite24; [L774] 0 havoc #t~ite22; [L774] 0 havoc #t~mem16; [L774] 0 havoc #t~ite25; [L774] 0 havoc #t~ite18; [L774] 0 havoc #t~ite20; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L775] 0 #t~ite31 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] 0 ~y$w_buff0~0 := #t~ite31; [L775] 0 havoc #t~ite28; [L775] 0 havoc #t~ite29; [L775] 0 havoc #t~ite31; [L775] 0 havoc #t~ite27; [L775] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L776] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] 0 ~y$w_buff1~0 := #t~ite36; [L776] 0 havoc #t~ite33; [L776] 0 havoc #t~ite36; [L776] 0 havoc #t~ite34; [L776] 0 havoc #t~ite35; [L776] 0 havoc #t~ite32; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L777] 0 #t~ite41 := ~y$w_buff0_used~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite41=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] 0 ~y$w_buff0_used~0 := (if 0 == #t~ite41 then 0 else 1); [L777] 0 havoc #t~ite38; [L777] 0 havoc #t~ite37; [L777] 0 havoc #t~ite39; [L777] 0 havoc #t~ite41; [L777] 0 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L778] 0 #t~ite46 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite46=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] 0 ~y$w_buff1_used~0 := #t~ite46; [L778] 0 havoc #t~ite46; [L778] 0 havoc #t~ite44; [L778] 0 havoc #t~ite42; [L778] 0 havoc #t~ite45; [L778] 0 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L779] 0 #t~ite51 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] 0 ~y$r_buff0_thd3~0 := #t~ite51; [L779] 0 havoc #t~ite51; [L779] 0 havoc #t~ite50; [L779] 0 havoc #t~ite47; [L779] 0 havoc #t~ite49; [L779] 0 havoc #t~ite48; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L780] 0 #t~ite57 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite57=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] 0 ~y$r_buff1_thd3~0 := #t~ite57; [L780] 0 havoc #t~ite55; [L780] 0 havoc #t~ite56; [L780] 0 havoc #t~ite54; [L780] 0 havoc #t~ite52; [L780] 0 havoc #t~ite53; [L780] 0 havoc #t~ite57; [L781] 0 ~__unbuffered_p2_EAX$read_delayed~0 := 1; [L782] 0 ~__unbuffered_p2_EAX$read_delayed_var~0 := ~#y~0; [L783] FCALL 0 call #t~mem58 := read~int(~#y~0, 4); [L783] 0 ~__unbuffered_p2_EAX~0 := #t~mem58; [L783] 0 havoc #t~mem58; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L784] 0 #t~ite60 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite60=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] FCALL 0 call write~int(#t~ite60, ~#y~0, 4); [L784] 0 havoc #t~ite60; [L784] 0 havoc #t~mem59; [L785] 0 ~y$flush_delayed~0 := 0; [L788] 0 ~z~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L722-L736] 1 ~arg := #in~arg; [L725] 1 ~__unbuffered_p0_EAX~0 := ~z~0; [L728] 1 ~x~0 := 1; [L733] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L737-L765] 2 ~arg := #in~arg; [L740] 2 ~__unbuffered_p1_EAX~0 := ~x~0; [L743] 2 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 2 ~y$w_buff0~0 := 1; [L745] 2 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 2 ~y$w_buff0_used~0 := 1; [L747] 2 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L747] 2 havoc __VERIFIER_assert_~expression; [L4] 2 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] COND FALSE 2 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] COND FALSE 0 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256) [L791] FCALL 0 call #t~mem61 := read~int(~#y~0, 4); [L791] 0 #t~ite62 := #t~mem61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite62=0, #t~mem61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 #t~ite63 := #t~ite62; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite62=0, #t~ite63=0, #t~mem61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] FCALL 0 call write~int(#t~ite63, ~#y~0, 4); [L791] 0 havoc #t~ite62; [L791] 0 havoc #t~ite63; [L791] 0 havoc #t~mem61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L792] 0 #t~ite64 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite64=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] 0 ~y$w_buff0_used~0 := #t~ite64; [L792] 0 havoc #t~ite64; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L793] 0 #t~ite65 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite65=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] 0 ~y$w_buff1_used~0 := #t~ite65; [L793] 0 havoc #t~ite65; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L794] 0 #t~ite66 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite66=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] 0 ~y$r_buff0_thd3~0 := #t~ite66; [L794] 0 havoc #t~ite66; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L795] 0 #t~ite67 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite67=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L748] 2 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 2 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 2 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 2 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 2 ~y$r_buff0_thd2~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite67=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] 0 ~y$r_buff1_thd3~0 := #t~ite67; [L795] 0 havoc #t~ite67; [L798] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] COND TRUE 2 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L755] 2 #t~ite6 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] FCALL 2 call write~int(#t~ite6, ~#y~0, 4); [L755] 2 havoc #t~ite5; [L755] 2 havoc #t~ite6; [L755] 2 havoc #t~mem4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] COND TRUE 2 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L756] 2 #t~ite7 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] 2 ~y$w_buff0_used~0 := #t~ite7; [L756] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L757] 2 #t~ite8 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] 2 ~y$w_buff1_used~0 := #t~ite8; [L757] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L758] 2 #t~ite9 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] 2 ~y$r_buff0_thd2~0 := #t~ite9; [L758] 2 havoc #t~ite9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L759] 2 #t~ite10 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite10=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] 2 ~y$r_buff1_thd2~0 := #t~ite10; [L759] 2 havoc #t~ite10; [L762] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L818] -1 havoc main_#t~nondet71; [L820] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L822] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L824] FCALL -1 call main_#t~mem72 := read~int(~#y~0, 4); [L824] -1 main_#t~ite73 := main_#t~mem72; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite73=1, main_#t~mem72=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] -1 main_#t~ite74 := main_#t~ite73; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite73=1, main_#t~ite74=1, main_#t~mem72=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] FCALL -1 call write~int(main_#t~ite74, ~#y~0, 4); [L824] -1 havoc main_#t~ite73; [L824] -1 havoc main_#t~mem72; [L824] -1 havoc main_#t~ite74; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L825] -1 main_#t~ite75 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite75=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] -1 ~y$w_buff0_used~0 := main_#t~ite75; [L825] -1 havoc main_#t~ite75; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L826] -1 main_#t~ite76 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite76=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] -1 ~y$w_buff1_used~0 := main_#t~ite76; [L826] -1 havoc main_#t~ite76; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L827] -1 main_#t~ite77 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite77=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] -1 ~y$r_buff0_thd0~0 := main_#t~ite77; [L827] -1 havoc main_#t~ite77; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L828] -1 main_#t~ite78 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite78=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] -1 ~y$r_buff1_thd0~0 := main_#t~ite78; [L828] -1 havoc main_#t~ite78; [L831] -1 ~weak$$choice1~0 := (if 0 == main_#t~nondet79!base + main_#t~nondet79!offset then 0 else 1); [L831] -1 havoc main_#t~nondet79; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] COND TRUE -1 0 != ~__unbuffered_p2_EAX$read_delayed~0 % 256 VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] COND TRUE -1 0 != ~weak$$choice1~0 % 256 [L832] FCALL -1 call main_#t~mem80 := read~int(~__unbuffered_p2_EAX$read_delayed_var~0, 4); [L832] -1 main_#t~ite81 := main_#t~mem80; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite81=1, main_#t~mem80=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 main_#t~ite82 := main_#t~ite81; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite81=1, main_#t~ite82=1, main_#t~mem80=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 ~__unbuffered_p2_EAX~0 := main_#t~ite82; [L832] -1 havoc main_#t~ite81; [L832] -1 havoc main_#t~mem80; [L832] -1 havoc main_#t~ite82; [L833] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L835] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L835] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L679] -1 ~__unbuffered_p2_EAX$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L680] -1 ~__unbuffered_p2_EAX$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX~0=0] [L681] -1 ~__unbuffered_p2_EAX$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L682] -1 ~__unbuffered_p2_EAX$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L683] -1 ~__unbuffered_p2_EAX$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L684] -1 ~__unbuffered_p2_EAX$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L685] -1 ~__unbuffered_p2_EAX$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L686] -1 ~__unbuffered_p2_EAX$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L687] -1 ~__unbuffered_p2_EAX$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L688] -1 ~__unbuffered_p2_EAX$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L689] -1 ~__unbuffered_p2_EAX$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L690] -1 ~__unbuffered_p2_EAX$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L691] -1 ~__unbuffered_p2_EAX$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L692] -1 ~__unbuffered_p2_EAX$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L693] -1 ~__unbuffered_p2_EAX$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L694] -1 ~__unbuffered_p2_EAX$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L695] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L696] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L698] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] FCALL -1 call ~#y~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] FCALL -1 call write~init~int(0, ~#y~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0] [L702] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0] [L703] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0] [L704] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0] [L705] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0] [L706] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0] [L707] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0] [L708] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0] [L709] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0] [L710] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0] [L711] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0] [L712] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0] [L713] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0] [L714] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0] [L715] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0] [L716] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0] [L718] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L719] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L720] -1 ~weak$$choice1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L721] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet69, main_#t~nondet70, main_#t~nondet71, main_#t~ite74, main_#t~ite73, main_#t~mem72, main_#t~ite75, main_#t~ite76, main_#t~ite77, main_#t~ite78, main_#t~nondet79, main_#t~ite82, main_#t~ite81, main_#t~mem80, main_~#t2686~0, main_~#t2687~0, main_~#t2688~0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L813] FCALL -1 call main_~#t2686~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FCALL -1 call write~int(0, main_~#t2686~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] -1 havoc main_#t~nondet69; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L815] FCALL -1 call main_~#t2687~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FCALL -1 call write~int(1, main_~#t2687~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] -1 havoc main_#t~nondet70; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L817] FCALL -1 call main_~#t2688~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FCALL -1 call write~int(2, main_~#t2688~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L766-L801] 0 ~arg := #in~arg; [L769] 0 ~weak$$choice0~0 := (if 0 == #t~nondet12!base + #t~nondet12!offset then 0 else 1); [L769] 0 havoc #t~nondet12; [L770] 0 ~weak$$choice2~0 := (if 0 == #t~nondet13!base + #t~nondet13!offset then 0 else 1); [L770] 0 havoc #t~nondet13; [L771] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L772] FCALL 0 call #t~mem14 := read~int(~#y~0, 4); [L772] 0 ~y$mem_tmp~0 := #t~mem14; [L772] 0 havoc #t~mem14; [L773] 0 ~weak$$choice1~0 := (if 0 == #t~nondet15!base + #t~nondet15!offset then 0 else 1); [L773] 0 havoc #t~nondet15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] COND TRUE 0 0 == ~y$w_buff0_used~0 % 256 [L774] FCALL 0 call #t~mem16 := read~int(~#y~0, 4); [L774] 0 #t~ite26 := #t~mem16; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite26=0, #t~mem16=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] FCALL 0 call write~int(#t~ite26, ~#y~0, 4); [L774] 0 havoc #t~mem17; [L774] 0 havoc #t~ite19; [L774] 0 havoc #t~ite26; [L774] 0 havoc #t~ite23; [L774] 0 havoc #t~mem21; [L774] 0 havoc #t~ite24; [L774] 0 havoc #t~ite22; [L774] 0 havoc #t~mem16; [L774] 0 havoc #t~ite25; [L774] 0 havoc #t~ite18; [L774] 0 havoc #t~ite20; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L775] 0 #t~ite31 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] 0 ~y$w_buff0~0 := #t~ite31; [L775] 0 havoc #t~ite28; [L775] 0 havoc #t~ite29; [L775] 0 havoc #t~ite31; [L775] 0 havoc #t~ite27; [L775] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L776] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] 0 ~y$w_buff1~0 := #t~ite36; [L776] 0 havoc #t~ite33; [L776] 0 havoc #t~ite36; [L776] 0 havoc #t~ite34; [L776] 0 havoc #t~ite35; [L776] 0 havoc #t~ite32; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L777] 0 #t~ite41 := ~y$w_buff0_used~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite41=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] 0 ~y$w_buff0_used~0 := (if 0 == #t~ite41 then 0 else 1); [L777] 0 havoc #t~ite38; [L777] 0 havoc #t~ite37; [L777] 0 havoc #t~ite39; [L777] 0 havoc #t~ite41; [L777] 0 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L778] 0 #t~ite46 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite46=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] 0 ~y$w_buff1_used~0 := #t~ite46; [L778] 0 havoc #t~ite46; [L778] 0 havoc #t~ite44; [L778] 0 havoc #t~ite42; [L778] 0 havoc #t~ite45; [L778] 0 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L779] 0 #t~ite51 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] 0 ~y$r_buff0_thd3~0 := #t~ite51; [L779] 0 havoc #t~ite51; [L779] 0 havoc #t~ite50; [L779] 0 havoc #t~ite47; [L779] 0 havoc #t~ite49; [L779] 0 havoc #t~ite48; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L780] 0 #t~ite57 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite57=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] 0 ~y$r_buff1_thd3~0 := #t~ite57; [L780] 0 havoc #t~ite55; [L780] 0 havoc #t~ite56; [L780] 0 havoc #t~ite54; [L780] 0 havoc #t~ite52; [L780] 0 havoc #t~ite53; [L780] 0 havoc #t~ite57; [L781] 0 ~__unbuffered_p2_EAX$read_delayed~0 := 1; [L782] 0 ~__unbuffered_p2_EAX$read_delayed_var~0 := ~#y~0; [L783] FCALL 0 call #t~mem58 := read~int(~#y~0, 4); [L783] 0 ~__unbuffered_p2_EAX~0 := #t~mem58; [L783] 0 havoc #t~mem58; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L784] 0 #t~ite60 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite60=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] FCALL 0 call write~int(#t~ite60, ~#y~0, 4); [L784] 0 havoc #t~ite60; [L784] 0 havoc #t~mem59; [L785] 0 ~y$flush_delayed~0 := 0; [L788] 0 ~z~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L722-L736] 1 ~arg := #in~arg; [L725] 1 ~__unbuffered_p0_EAX~0 := ~z~0; [L728] 1 ~x~0 := 1; [L733] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L737-L765] 2 ~arg := #in~arg; [L740] 2 ~__unbuffered_p1_EAX~0 := ~x~0; [L743] 2 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 2 ~y$w_buff0~0 := 1; [L745] 2 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 2 ~y$w_buff0_used~0 := 1; [L747] 2 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L747] 2 havoc __VERIFIER_assert_~expression; [L4] 2 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] COND FALSE 2 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] COND FALSE 0 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256) [L791] FCALL 0 call #t~mem61 := read~int(~#y~0, 4); [L791] 0 #t~ite62 := #t~mem61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite62=0, #t~mem61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 #t~ite63 := #t~ite62; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite62=0, #t~ite63=0, #t~mem61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] FCALL 0 call write~int(#t~ite63, ~#y~0, 4); [L791] 0 havoc #t~ite62; [L791] 0 havoc #t~ite63; [L791] 0 havoc #t~mem61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L792] 0 #t~ite64 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite64=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] 0 ~y$w_buff0_used~0 := #t~ite64; [L792] 0 havoc #t~ite64; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L793] 0 #t~ite65 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite65=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] 0 ~y$w_buff1_used~0 := #t~ite65; [L793] 0 havoc #t~ite65; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L794] 0 #t~ite66 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite66=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] 0 ~y$r_buff0_thd3~0 := #t~ite66; [L794] 0 havoc #t~ite66; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L795] 0 #t~ite67 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite67=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L748] 2 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 2 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 2 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 2 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 2 ~y$r_buff0_thd2~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite67=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] 0 ~y$r_buff1_thd3~0 := #t~ite67; [L795] 0 havoc #t~ite67; [L798] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] COND TRUE 2 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L755] 2 #t~ite6 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] FCALL 2 call write~int(#t~ite6, ~#y~0, 4); [L755] 2 havoc #t~ite5; [L755] 2 havoc #t~ite6; [L755] 2 havoc #t~mem4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] COND TRUE 2 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L756] 2 #t~ite7 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] 2 ~y$w_buff0_used~0 := #t~ite7; [L756] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L757] 2 #t~ite8 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] 2 ~y$w_buff1_used~0 := #t~ite8; [L757] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L758] 2 #t~ite9 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] 2 ~y$r_buff0_thd2~0 := #t~ite9; [L758] 2 havoc #t~ite9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L759] 2 #t~ite10 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite10=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] 2 ~y$r_buff1_thd2~0 := #t~ite10; [L759] 2 havoc #t~ite10; [L762] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L818] -1 havoc main_#t~nondet71; [L820] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L822] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L824] FCALL -1 call main_#t~mem72 := read~int(~#y~0, 4); [L824] -1 main_#t~ite73 := main_#t~mem72; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite73=1, main_#t~mem72=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] -1 main_#t~ite74 := main_#t~ite73; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite73=1, main_#t~ite74=1, main_#t~mem72=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] FCALL -1 call write~int(main_#t~ite74, ~#y~0, 4); [L824] -1 havoc main_#t~ite73; [L824] -1 havoc main_#t~mem72; [L824] -1 havoc main_#t~ite74; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L825] -1 main_#t~ite75 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite75=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] -1 ~y$w_buff0_used~0 := main_#t~ite75; [L825] -1 havoc main_#t~ite75; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L826] -1 main_#t~ite76 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite76=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] -1 ~y$w_buff1_used~0 := main_#t~ite76; [L826] -1 havoc main_#t~ite76; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L827] -1 main_#t~ite77 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite77=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] -1 ~y$r_buff0_thd0~0 := main_#t~ite77; [L827] -1 havoc main_#t~ite77; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L828] -1 main_#t~ite78 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite78=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] -1 ~y$r_buff1_thd0~0 := main_#t~ite78; [L828] -1 havoc main_#t~ite78; [L831] -1 ~weak$$choice1~0 := (if 0 == main_#t~nondet79!base + main_#t~nondet79!offset then 0 else 1); [L831] -1 havoc main_#t~nondet79; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] COND TRUE -1 0 != ~__unbuffered_p2_EAX$read_delayed~0 % 256 VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] COND TRUE -1 0 != ~weak$$choice1~0 % 256 [L832] FCALL -1 call main_#t~mem80 := read~int(~__unbuffered_p2_EAX$read_delayed_var~0, 4); [L832] -1 main_#t~ite81 := main_#t~mem80; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite81=1, main_#t~mem80=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 main_#t~ite82 := main_#t~ite81; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite81=1, main_#t~ite82=1, main_#t~mem80=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 ~__unbuffered_p2_EAX~0 := main_#t~ite82; [L832] -1 havoc main_#t~ite81; [L832] -1 havoc main_#t~mem80; [L832] -1 havoc main_#t~ite82; [L833] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L835] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L835] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L679] -1 ~__unbuffered_p2_EAX$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L680] -1 ~__unbuffered_p2_EAX$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX~0=0] [L681] -1 ~__unbuffered_p2_EAX$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L682] -1 ~__unbuffered_p2_EAX$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L683] -1 ~__unbuffered_p2_EAX$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L684] -1 ~__unbuffered_p2_EAX$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L685] -1 ~__unbuffered_p2_EAX$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L686] -1 ~__unbuffered_p2_EAX$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L687] -1 ~__unbuffered_p2_EAX$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L688] -1 ~__unbuffered_p2_EAX$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L689] -1 ~__unbuffered_p2_EAX$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L690] -1 ~__unbuffered_p2_EAX$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L691] -1 ~__unbuffered_p2_EAX$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L692] -1 ~__unbuffered_p2_EAX$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L693] -1 ~__unbuffered_p2_EAX$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L694] -1 ~__unbuffered_p2_EAX$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L695] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L696] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L698] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] FCALL -1 call ~#y~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] FCALL -1 call write~init~int(0, ~#y~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0] [L702] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0] [L703] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0] [L704] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0] [L705] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0] [L706] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0] [L707] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0] [L708] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0] [L709] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0] [L710] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0] [L711] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0] [L712] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0] [L713] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0] [L714] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0] [L715] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0] [L716] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0] [L718] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L719] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L720] -1 ~weak$$choice1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L721] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L813] FCALL -1 call ~#t2686~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FCALL -1 call write~int(0, ~#t2686~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] -1 havoc #t~nondet69; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L815] FCALL -1 call ~#t2687~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FCALL -1 call write~int(1, ~#t2687~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] -1 havoc #t~nondet70; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L817] FCALL -1 call ~#t2688~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FCALL -1 call write~int(2, ~#t2688~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L766-L801] 0 ~arg := #in~arg; [L769] 0 ~weak$$choice0~0 := (if 0 == #t~nondet12!base + #t~nondet12!offset then 0 else 1); [L769] 0 havoc #t~nondet12; [L770] 0 ~weak$$choice2~0 := (if 0 == #t~nondet13!base + #t~nondet13!offset then 0 else 1); [L770] 0 havoc #t~nondet13; [L771] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L772] FCALL 0 call #t~mem14 := read~int(~#y~0, 4); [L772] 0 ~y$mem_tmp~0 := #t~mem14; [L772] 0 havoc #t~mem14; [L773] 0 ~weak$$choice1~0 := (if 0 == #t~nondet15!base + #t~nondet15!offset then 0 else 1); [L773] 0 havoc #t~nondet15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] COND TRUE 0 0 == ~y$w_buff0_used~0 % 256 [L774] FCALL 0 call #t~mem16 := read~int(~#y~0, 4); [L774] 0 #t~ite26 := #t~mem16; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite26=0, #t~mem16=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] FCALL 0 call write~int(#t~ite26, ~#y~0, 4); [L774] 0 havoc #t~mem17; [L774] 0 havoc #t~ite19; [L774] 0 havoc #t~ite26; [L774] 0 havoc #t~ite23; [L774] 0 havoc #t~mem21; [L774] 0 havoc #t~ite24; [L774] 0 havoc #t~ite22; [L774] 0 havoc #t~mem16; [L774] 0 havoc #t~ite25; [L774] 0 havoc #t~ite18; [L774] 0 havoc #t~ite20; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L775] 0 #t~ite31 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] 0 ~y$w_buff0~0 := #t~ite31; [L775] 0 havoc #t~ite28; [L775] 0 havoc #t~ite29; [L775] 0 havoc #t~ite31; [L775] 0 havoc #t~ite27; [L775] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L776] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] 0 ~y$w_buff1~0 := #t~ite36; [L776] 0 havoc #t~ite33; [L776] 0 havoc #t~ite36; [L776] 0 havoc #t~ite34; [L776] 0 havoc #t~ite35; [L776] 0 havoc #t~ite32; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L777] 0 #t~ite41 := ~y$w_buff0_used~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite41=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] 0 ~y$w_buff0_used~0 := (if 0 == #t~ite41 then 0 else 1); [L777] 0 havoc #t~ite38; [L777] 0 havoc #t~ite37; [L777] 0 havoc #t~ite39; [L777] 0 havoc #t~ite41; [L777] 0 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L778] 0 #t~ite46 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite46=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] 0 ~y$w_buff1_used~0 := #t~ite46; [L778] 0 havoc #t~ite46; [L778] 0 havoc #t~ite44; [L778] 0 havoc #t~ite42; [L778] 0 havoc #t~ite45; [L778] 0 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L779] 0 #t~ite51 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] 0 ~y$r_buff0_thd3~0 := #t~ite51; [L779] 0 havoc #t~ite51; [L779] 0 havoc #t~ite50; [L779] 0 havoc #t~ite47; [L779] 0 havoc #t~ite49; [L779] 0 havoc #t~ite48; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L780] 0 #t~ite57 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite57=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] 0 ~y$r_buff1_thd3~0 := #t~ite57; [L780] 0 havoc #t~ite55; [L780] 0 havoc #t~ite56; [L780] 0 havoc #t~ite54; [L780] 0 havoc #t~ite52; [L780] 0 havoc #t~ite53; [L780] 0 havoc #t~ite57; [L781] 0 ~__unbuffered_p2_EAX$read_delayed~0 := 1; [L782] 0 ~__unbuffered_p2_EAX$read_delayed_var~0 := ~#y~0; [L783] FCALL 0 call #t~mem58 := read~int(~#y~0, 4); [L783] 0 ~__unbuffered_p2_EAX~0 := #t~mem58; [L783] 0 havoc #t~mem58; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L784] 0 #t~ite60 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite60=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] FCALL 0 call write~int(#t~ite60, ~#y~0, 4); [L784] 0 havoc #t~ite60; [L784] 0 havoc #t~mem59; [L785] 0 ~y$flush_delayed~0 := 0; [L788] 0 ~z~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L722-L736] 1 ~arg := #in~arg; [L725] 1 ~__unbuffered_p0_EAX~0 := ~z~0; [L728] 1 ~x~0 := 1; [L733] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L737-L765] 2 ~arg := #in~arg; [L740] 2 ~__unbuffered_p1_EAX~0 := ~x~0; [L743] 2 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 2 ~y$w_buff0~0 := 1; [L745] 2 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 2 ~y$w_buff0_used~0 := 1; [L4] 2 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] COND FALSE 2 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] COND FALSE 0 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256) [L791] FCALL 0 call #t~mem61 := read~int(~#y~0, 4); [L791] 0 #t~ite62 := #t~mem61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite62=0, #t~mem61=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 #t~ite63 := #t~ite62; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite62=0, #t~ite63=0, #t~mem61=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] FCALL 0 call write~int(#t~ite63, ~#y~0, 4); [L791] 0 havoc #t~ite62; [L791] 0 havoc #t~ite63; [L791] 0 havoc #t~mem61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L792] 0 #t~ite64 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite64=1, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] 0 ~y$w_buff0_used~0 := #t~ite64; [L792] 0 havoc #t~ite64; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L793] 0 #t~ite65 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite65=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] 0 ~y$w_buff1_used~0 := #t~ite65; [L793] 0 havoc #t~ite65; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L794] 0 #t~ite66 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite66=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] 0 ~y$r_buff0_thd3~0 := #t~ite66; [L794] 0 havoc #t~ite66; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L795] 0 #t~ite67 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite67=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L748] 2 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 2 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 2 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 2 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 2 ~y$r_buff0_thd2~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite67=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] 0 ~y$r_buff1_thd3~0 := #t~ite67; [L795] 0 havoc #t~ite67; [L798] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] COND TRUE 2 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L755] 2 #t~ite6 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] FCALL 2 call write~int(#t~ite6, ~#y~0, 4); [L755] 2 havoc #t~ite5; [L755] 2 havoc #t~ite6; [L755] 2 havoc #t~mem4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] COND TRUE 2 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L756] 2 #t~ite7 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] 2 ~y$w_buff0_used~0 := #t~ite7; [L756] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L757] 2 #t~ite8 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] 2 ~y$w_buff1_used~0 := #t~ite8; [L757] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L758] 2 #t~ite9 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] 2 ~y$r_buff0_thd2~0 := #t~ite9; [L758] 2 havoc #t~ite9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L759] 2 #t~ite10 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] 2 ~y$r_buff1_thd2~0 := #t~ite10; [L759] 2 havoc #t~ite10; [L762] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L818] -1 havoc #t~nondet71; [L820] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L822] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L824] FCALL -1 call #t~mem72 := read~int(~#y~0, 4); [L824] -1 #t~ite73 := #t~mem72; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] -1 #t~ite74 := #t~ite73; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] FCALL -1 call write~int(#t~ite74, ~#y~0, 4); [L824] -1 havoc #t~ite73; [L824] -1 havoc #t~mem72; [L824] -1 havoc #t~ite74; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L825] -1 #t~ite75 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] -1 ~y$w_buff0_used~0 := #t~ite75; [L825] -1 havoc #t~ite75; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L826] -1 #t~ite76 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] -1 ~y$w_buff1_used~0 := #t~ite76; [L826] -1 havoc #t~ite76; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L827] -1 #t~ite77 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] -1 ~y$r_buff0_thd0~0 := #t~ite77; [L827] -1 havoc #t~ite77; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L828] -1 #t~ite78 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] -1 ~y$r_buff1_thd0~0 := #t~ite78; [L828] -1 havoc #t~ite78; [L831] -1 ~weak$$choice1~0 := (if 0 == #t~nondet79!base + #t~nondet79!offset then 0 else 1); [L831] -1 havoc #t~nondet79; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] COND TRUE -1 0 != ~__unbuffered_p2_EAX$read_delayed~0 % 256 VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] COND TRUE -1 0 != ~weak$$choice1~0 % 256 [L832] FCALL -1 call #t~mem80 := read~int(~__unbuffered_p2_EAX$read_delayed_var~0, 4); [L832] -1 #t~ite81 := #t~mem80; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 #t~ite82 := #t~ite81; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 ~__unbuffered_p2_EAX~0 := #t~ite82; [L832] -1 havoc #t~ite81; [L832] -1 havoc #t~mem80; [L832] -1 havoc #t~ite82; [L833] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L679] -1 ~__unbuffered_p2_EAX$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L680] -1 ~__unbuffered_p2_EAX$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX~0=0] [L681] -1 ~__unbuffered_p2_EAX$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L682] -1 ~__unbuffered_p2_EAX$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L683] -1 ~__unbuffered_p2_EAX$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L684] -1 ~__unbuffered_p2_EAX$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L685] -1 ~__unbuffered_p2_EAX$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L686] -1 ~__unbuffered_p2_EAX$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L687] -1 ~__unbuffered_p2_EAX$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L688] -1 ~__unbuffered_p2_EAX$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L689] -1 ~__unbuffered_p2_EAX$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L690] -1 ~__unbuffered_p2_EAX$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L691] -1 ~__unbuffered_p2_EAX$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L692] -1 ~__unbuffered_p2_EAX$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L693] -1 ~__unbuffered_p2_EAX$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L694] -1 ~__unbuffered_p2_EAX$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L695] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L696] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L698] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] FCALL -1 call ~#y~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] FCALL -1 call write~init~int(0, ~#y~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0] [L702] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0] [L703] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0] [L704] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0] [L705] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0] [L706] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0] [L707] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0] [L708] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0] [L709] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0] [L710] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0] [L711] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0] [L712] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0] [L713] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0] [L714] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0] [L715] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0] [L716] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0] [L718] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L719] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L720] -1 ~weak$$choice1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L721] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L813] FCALL -1 call ~#t2686~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FCALL -1 call write~int(0, ~#t2686~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] -1 havoc #t~nondet69; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L815] FCALL -1 call ~#t2687~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FCALL -1 call write~int(1, ~#t2687~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] -1 havoc #t~nondet70; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L817] FCALL -1 call ~#t2688~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FCALL -1 call write~int(2, ~#t2688~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L766-L801] 0 ~arg := #in~arg; [L769] 0 ~weak$$choice0~0 := (if 0 == #t~nondet12!base + #t~nondet12!offset then 0 else 1); [L769] 0 havoc #t~nondet12; [L770] 0 ~weak$$choice2~0 := (if 0 == #t~nondet13!base + #t~nondet13!offset then 0 else 1); [L770] 0 havoc #t~nondet13; [L771] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L772] FCALL 0 call #t~mem14 := read~int(~#y~0, 4); [L772] 0 ~y$mem_tmp~0 := #t~mem14; [L772] 0 havoc #t~mem14; [L773] 0 ~weak$$choice1~0 := (if 0 == #t~nondet15!base + #t~nondet15!offset then 0 else 1); [L773] 0 havoc #t~nondet15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] COND TRUE 0 0 == ~y$w_buff0_used~0 % 256 [L774] FCALL 0 call #t~mem16 := read~int(~#y~0, 4); [L774] 0 #t~ite26 := #t~mem16; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite26=0, #t~mem16=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] FCALL 0 call write~int(#t~ite26, ~#y~0, 4); [L774] 0 havoc #t~mem17; [L774] 0 havoc #t~ite19; [L774] 0 havoc #t~ite26; [L774] 0 havoc #t~ite23; [L774] 0 havoc #t~mem21; [L774] 0 havoc #t~ite24; [L774] 0 havoc #t~ite22; [L774] 0 havoc #t~mem16; [L774] 0 havoc #t~ite25; [L774] 0 havoc #t~ite18; [L774] 0 havoc #t~ite20; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L775] 0 #t~ite31 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] 0 ~y$w_buff0~0 := #t~ite31; [L775] 0 havoc #t~ite28; [L775] 0 havoc #t~ite29; [L775] 0 havoc #t~ite31; [L775] 0 havoc #t~ite27; [L775] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L776] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] 0 ~y$w_buff1~0 := #t~ite36; [L776] 0 havoc #t~ite33; [L776] 0 havoc #t~ite36; [L776] 0 havoc #t~ite34; [L776] 0 havoc #t~ite35; [L776] 0 havoc #t~ite32; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L777] 0 #t~ite41 := ~y$w_buff0_used~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite41=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] 0 ~y$w_buff0_used~0 := (if 0 == #t~ite41 then 0 else 1); [L777] 0 havoc #t~ite38; [L777] 0 havoc #t~ite37; [L777] 0 havoc #t~ite39; [L777] 0 havoc #t~ite41; [L777] 0 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L778] 0 #t~ite46 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite46=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] 0 ~y$w_buff1_used~0 := #t~ite46; [L778] 0 havoc #t~ite46; [L778] 0 havoc #t~ite44; [L778] 0 havoc #t~ite42; [L778] 0 havoc #t~ite45; [L778] 0 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L779] 0 #t~ite51 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] 0 ~y$r_buff0_thd3~0 := #t~ite51; [L779] 0 havoc #t~ite51; [L779] 0 havoc #t~ite50; [L779] 0 havoc #t~ite47; [L779] 0 havoc #t~ite49; [L779] 0 havoc #t~ite48; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L780] 0 #t~ite57 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite57=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] 0 ~y$r_buff1_thd3~0 := #t~ite57; [L780] 0 havoc #t~ite55; [L780] 0 havoc #t~ite56; [L780] 0 havoc #t~ite54; [L780] 0 havoc #t~ite52; [L780] 0 havoc #t~ite53; [L780] 0 havoc #t~ite57; [L781] 0 ~__unbuffered_p2_EAX$read_delayed~0 := 1; [L782] 0 ~__unbuffered_p2_EAX$read_delayed_var~0 := ~#y~0; [L783] FCALL 0 call #t~mem58 := read~int(~#y~0, 4); [L783] 0 ~__unbuffered_p2_EAX~0 := #t~mem58; [L783] 0 havoc #t~mem58; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L784] 0 #t~ite60 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite60=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] FCALL 0 call write~int(#t~ite60, ~#y~0, 4); [L784] 0 havoc #t~ite60; [L784] 0 havoc #t~mem59; [L785] 0 ~y$flush_delayed~0 := 0; [L788] 0 ~z~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L722-L736] 1 ~arg := #in~arg; [L725] 1 ~__unbuffered_p0_EAX~0 := ~z~0; [L728] 1 ~x~0 := 1; [L733] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L737-L765] 2 ~arg := #in~arg; [L740] 2 ~__unbuffered_p1_EAX~0 := ~x~0; [L743] 2 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 2 ~y$w_buff0~0 := 1; [L745] 2 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 2 ~y$w_buff0_used~0 := 1; [L4] 2 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] COND FALSE 2 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] COND FALSE 0 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256) [L791] FCALL 0 call #t~mem61 := read~int(~#y~0, 4); [L791] 0 #t~ite62 := #t~mem61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite62=0, #t~mem61=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 #t~ite63 := #t~ite62; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite62=0, #t~ite63=0, #t~mem61=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] FCALL 0 call write~int(#t~ite63, ~#y~0, 4); [L791] 0 havoc #t~ite62; [L791] 0 havoc #t~ite63; [L791] 0 havoc #t~mem61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L792] 0 #t~ite64 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite64=1, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] 0 ~y$w_buff0_used~0 := #t~ite64; [L792] 0 havoc #t~ite64; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L793] 0 #t~ite65 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite65=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] 0 ~y$w_buff1_used~0 := #t~ite65; [L793] 0 havoc #t~ite65; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L794] 0 #t~ite66 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite66=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] 0 ~y$r_buff0_thd3~0 := #t~ite66; [L794] 0 havoc #t~ite66; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L795] 0 #t~ite67 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite67=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L748] 2 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 2 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 2 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 2 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 2 ~y$r_buff0_thd2~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite67=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] 0 ~y$r_buff1_thd3~0 := #t~ite67; [L795] 0 havoc #t~ite67; [L798] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] COND TRUE 2 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L755] 2 #t~ite6 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] FCALL 2 call write~int(#t~ite6, ~#y~0, 4); [L755] 2 havoc #t~ite5; [L755] 2 havoc #t~ite6; [L755] 2 havoc #t~mem4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] COND TRUE 2 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L756] 2 #t~ite7 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] 2 ~y$w_buff0_used~0 := #t~ite7; [L756] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L757] 2 #t~ite8 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] 2 ~y$w_buff1_used~0 := #t~ite8; [L757] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L758] 2 #t~ite9 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] 2 ~y$r_buff0_thd2~0 := #t~ite9; [L758] 2 havoc #t~ite9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L759] 2 #t~ite10 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] 2 ~y$r_buff1_thd2~0 := #t~ite10; [L759] 2 havoc #t~ite10; [L762] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L818] -1 havoc #t~nondet71; [L820] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L822] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L824] FCALL -1 call #t~mem72 := read~int(~#y~0, 4); [L824] -1 #t~ite73 := #t~mem72; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] -1 #t~ite74 := #t~ite73; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] FCALL -1 call write~int(#t~ite74, ~#y~0, 4); [L824] -1 havoc #t~ite73; [L824] -1 havoc #t~mem72; [L824] -1 havoc #t~ite74; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L825] -1 #t~ite75 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] -1 ~y$w_buff0_used~0 := #t~ite75; [L825] -1 havoc #t~ite75; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L826] -1 #t~ite76 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] -1 ~y$w_buff1_used~0 := #t~ite76; [L826] -1 havoc #t~ite76; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L827] -1 #t~ite77 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] -1 ~y$r_buff0_thd0~0 := #t~ite77; [L827] -1 havoc #t~ite77; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L828] -1 #t~ite78 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] -1 ~y$r_buff1_thd0~0 := #t~ite78; [L828] -1 havoc #t~ite78; [L831] -1 ~weak$$choice1~0 := (if 0 == #t~nondet79!base + #t~nondet79!offset then 0 else 1); [L831] -1 havoc #t~nondet79; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] COND TRUE -1 0 != ~__unbuffered_p2_EAX$read_delayed~0 % 256 VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] COND TRUE -1 0 != ~weak$$choice1~0 % 256 [L832] FCALL -1 call #t~mem80 := read~int(~__unbuffered_p2_EAX$read_delayed_var~0, 4); [L832] -1 #t~ite81 := #t~mem80; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 #t~ite82 := #t~ite81; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 ~__unbuffered_p2_EAX~0 := #t~ite82; [L832] -1 havoc #t~ite81; [L832] -1 havoc #t~mem80; [L832] -1 havoc #t~ite82; [L833] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L678] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L679] -1 _Bool __unbuffered_p2_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0] [L680] -1 int __unbuffered_p2_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0] [L681] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0] [L682] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0] [L683] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0] [L684] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0] [L685] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0] [L686] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0] [L687] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0] [L688] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0] [L689] -1 _Bool __unbuffered_p2_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0] [L690] -1 int *__unbuffered_p2_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}] [L691] -1 int __unbuffered_p2_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0] [L692] -1 _Bool __unbuffered_p2_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0] [L693] -1 int __unbuffered_p2_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0] [L694] -1 _Bool __unbuffered_p2_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0] [L695] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0] [L696] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L698] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L700] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}] [L701] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0] [L702] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0] [L703] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L704] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L705] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L706] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L707] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L708] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L709] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L710] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L711] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L712] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L713] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L714] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L715] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L716] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L719] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L720] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L721] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L813] -1 pthread_t t2686; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK -1 pthread_create(&t2686, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L815] -1 pthread_t t2687; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L816] FCALL, FORK -1 pthread_create(&t2687, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L817] -1 pthread_t t2688; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L818] FCALL, FORK -1 pthread_create(&t2688, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L769] 0 weak$$choice0 = __VERIFIER_nondet_pointer() [L770] 0 weak$$choice2 = __VERIFIER_nondet_pointer() [L771] 0 y$flush_delayed = weak$$choice2 [L772] EXPR 0 \read(y) [L772] 0 y$mem_tmp = y [L773] 0 weak$$choice1 = __VERIFIER_nondet_pointer() [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L774] EXPR 0 \read(y) [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) VAL [!y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y))))=0, \read(y)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L774] 0 y = !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L775] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L775] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) [L776] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L776] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) [L777] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) [L778] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L779] EXPR 0 weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] 0 y$r_buff0_thd3 = weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L780] EXPR 0 weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] 0 y$r_buff1_thd3 = weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L781] 0 __unbuffered_p2_EAX$read_delayed = (_Bool)1 [L782] 0 __unbuffered_p2_EAX$read_delayed_var = &y [L783] EXPR 0 \read(y) [L783] 0 __unbuffered_p2_EAX = y [L784] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L784] 0 y = y$flush_delayed ? y$mem_tmp : y [L785] 0 y$flush_delayed = (_Bool)0 [L788] 0 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L725] 1 __unbuffered_p0_EAX = z [L728] 1 x = 1 [L733] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L740] 2 __unbuffered_p1_EAX = x [L743] 2 y$w_buff1 = y$w_buff0 [L744] 2 y$w_buff0 = 1 [L745] 2 y$w_buff1_used = y$w_buff0_used [L746] 2 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y [L791] EXPR 0 \read(y) [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L792] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L792] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L793] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L793] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L794] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L794] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L795] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L748] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L749] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L750] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L751] 2 y$r_buff1_thd3 = y$r_buff0_thd3 [L752] 2 y$r_buff0_thd2 = (_Bool)1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L795] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L798] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L757] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L758] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L758] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L759] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L759] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L762] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y [L824] EXPR -1 \read(y) [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L825] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L825] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L826] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L826] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L827] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L827] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L828] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L828] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L831] -1 weak$$choice1 = __VERIFIER_nondet_pointer() [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L832] EXPR -1 \read(*__unbuffered_p2_EAX$read_delayed_var) [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] -1 __unbuffered_p2_EAX = __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L833] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] ----- [2018-11-23 06:35:08,813 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_b6f15951-5d86-4c81-b736-012175d45f64/bin-2019/utaipan/witness.graphml [2018-11-23 06:35:08,813 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 06:35:08,814 INFO L168 Benchmark]: Toolchain (without parser) took 214348.15 ms. Allocated memory was 1.0 GB in the beginning and 8.6 GB in the end (delta: 7.6 GB). Free memory was 951.1 MB in the beginning and 4.3 GB in the end (delta: -3.3 GB). Peak memory consumption was 5.8 GB. Max. memory is 11.5 GB. [2018-11-23 06:35:08,815 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 980.1 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 06:35:08,815 INFO L168 Benchmark]: CACSL2BoogieTranslator took 414.01 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 156.2 MB). Free memory was 951.1 MB in the beginning and 1.1 GB in the end (delta: -178.1 MB). Peak memory consumption was 33.2 MB. Max. memory is 11.5 GB. [2018-11-23 06:35:08,815 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.28 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 06:35:08,816 INFO L168 Benchmark]: Boogie Preprocessor took 31.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2018-11-23 06:35:08,816 INFO L168 Benchmark]: RCFGBuilder took 679.95 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 68.7 MB). Peak memory consumption was 68.7 MB. Max. memory is 11.5 GB. [2018-11-23 06:35:08,816 INFO L168 Benchmark]: TraceAbstraction took 198612.02 ms. Allocated memory was 1.2 GB in the beginning and 8.6 GB in the end (delta: 7.4 GB). Free memory was 1.1 GB in the beginning and 2.9 GB in the end (delta: -1.9 GB). Peak memory consumption was 5.6 GB. Max. memory is 11.5 GB. [2018-11-23 06:35:08,816 INFO L168 Benchmark]: Witness Printer took 14566.81 ms. Allocated memory was 8.6 GB in the beginning and 8.6 GB in the end (delta: -37.2 MB). Free memory was 2.9 GB in the beginning and 4.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 215.5 MB. Max. memory is 11.5 GB. [2018-11-23 06:35:08,818 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 980.1 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 414.01 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 156.2 MB). Free memory was 951.1 MB in the beginning and 1.1 GB in the end (delta: -178.1 MB). Peak memory consumption was 33.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.28 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 31.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 679.95 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 68.7 MB). Peak memory consumption was 68.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 198612.02 ms. Allocated memory was 1.2 GB in the beginning and 8.6 GB in the end (delta: 7.4 GB). Free memory was 1.1 GB in the beginning and 2.9 GB in the end (delta: -1.9 GB). Peak memory consumption was 5.6 GB. Max. memory is 11.5 GB. * Witness Printer took 14566.81 ms. Allocated memory was 8.6 GB in the beginning and 8.6 GB in the end (delta: -37.2 MB). Free memory was 2.9 GB in the beginning and 4.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 215.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L678] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L679] -1 _Bool __unbuffered_p2_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0] [L680] -1 int __unbuffered_p2_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0] [L681] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0] [L682] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0] [L683] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0] [L684] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0] [L685] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0] [L686] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0] [L687] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0] [L688] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0] [L689] -1 _Bool __unbuffered_p2_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0] [L690] -1 int *__unbuffered_p2_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}] [L691] -1 int __unbuffered_p2_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0] [L692] -1 _Bool __unbuffered_p2_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0] [L693] -1 int __unbuffered_p2_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0] [L694] -1 _Bool __unbuffered_p2_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0] [L695] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0] [L696] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L698] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L700] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}] [L701] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0] [L702] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0] [L703] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L704] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L705] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L706] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L707] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L708] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L709] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L710] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L711] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L712] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L713] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L714] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L715] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L716] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L719] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L720] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L721] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L813] -1 pthread_t t2686; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK -1 pthread_create(&t2686, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L815] -1 pthread_t t2687; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L816] FCALL, FORK -1 pthread_create(&t2687, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L817] -1 pthread_t t2688; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L818] FCALL, FORK -1 pthread_create(&t2688, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L769] 0 weak$$choice0 = __VERIFIER_nondet_pointer() [L770] 0 weak$$choice2 = __VERIFIER_nondet_pointer() [L771] 0 y$flush_delayed = weak$$choice2 [L772] EXPR 0 \read(y) [L772] 0 y$mem_tmp = y [L773] 0 weak$$choice1 = __VERIFIER_nondet_pointer() [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L774] EXPR 0 \read(y) [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) VAL [!y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y))))=0, \read(y)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L774] 0 y = !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L775] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L775] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) [L776] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L776] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) [L777] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) [L778] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L779] EXPR 0 weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] 0 y$r_buff0_thd3 = weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L780] EXPR 0 weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] 0 y$r_buff1_thd3 = weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L781] 0 __unbuffered_p2_EAX$read_delayed = (_Bool)1 [L782] 0 __unbuffered_p2_EAX$read_delayed_var = &y [L783] EXPR 0 \read(y) [L783] 0 __unbuffered_p2_EAX = y [L784] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L784] 0 y = y$flush_delayed ? y$mem_tmp : y [L785] 0 y$flush_delayed = (_Bool)0 [L788] 0 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L725] 1 __unbuffered_p0_EAX = z [L728] 1 x = 1 [L733] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L740] 2 __unbuffered_p1_EAX = x [L743] 2 y$w_buff1 = y$w_buff0 [L744] 2 y$w_buff0 = 1 [L745] 2 y$w_buff1_used = y$w_buff0_used [L746] 2 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y [L791] EXPR 0 \read(y) [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L792] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L792] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L793] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L793] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L794] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L794] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L795] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L748] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L749] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L750] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L751] 2 y$r_buff1_thd3 = y$r_buff0_thd3 [L752] 2 y$r_buff0_thd2 = (_Bool)1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L795] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L798] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L757] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L758] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L758] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L759] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L759] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L762] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y [L824] EXPR -1 \read(y) [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L825] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L825] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L826] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L826] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L827] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L827] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L828] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L828] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L831] -1 weak$$choice1 = __VERIFIER_nondet_pointer() [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L832] EXPR -1 \read(*__unbuffered_p2_EAX$read_delayed_var) [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] -1 __unbuffered_p2_EAX = __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L833] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 340 locations, 3 error locations. UNSAFE Result, 198.4s OverallTime, 39 OverallIterations, 1 TraceHistogramMax, 34.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 12959 SDtfs, 17797 SDslu, 27533 SDs, 0 SdLazy, 9923 SolverSat, 678 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 9.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 369 GetRequests, 90 SyntacticMatches, 39 SemanticMatches, 240 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 338 ImplicationChecksByTransitivity, 2.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=346782occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 64.9s AutomataMinimizationTime, 38 MinimizatonAttempts, 583905 StatesRemovedByMinimization, 35 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.8s InterpolantComputationTime, 4121 NumberOfCodeBlocks, 4121 NumberOfCodeBlocksAsserted, 39 NumberOfCheckSat, 3957 ConstructedInterpolants, 0 QuantifiedInterpolants, 1038251 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 38 InterpolantComputations, 38 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...