./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/thin001_rmo.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_f065eacd-0ab5-4e1b-9aad-e5dd59255ffa/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_f065eacd-0ab5-4e1b-9aad-e5dd59255ffa/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_f065eacd-0ab5-4e1b-9aad-e5dd59255ffa/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_f065eacd-0ab5-4e1b-9aad-e5dd59255ffa/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/thin001_rmo.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_f065eacd-0ab5-4e1b-9aad-e5dd59255ffa/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_f065eacd-0ab5-4e1b-9aad-e5dd59255ffa/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 944012c6b738fbe32c44ac0c8b836fac7f0eea30 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 08:04:15,258 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 08:04:15,260 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 08:04:15,268 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 08:04:15,268 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 08:04:15,269 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 08:04:15,270 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 08:04:15,271 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 08:04:15,272 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 08:04:15,272 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 08:04:15,273 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 08:04:15,273 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 08:04:15,274 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 08:04:15,274 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 08:04:15,275 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 08:04:15,275 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 08:04:15,276 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 08:04:15,278 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 08:04:15,279 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 08:04:15,280 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 08:04:15,281 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 08:04:15,282 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 08:04:15,283 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 08:04:15,283 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 08:04:15,284 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 08:04:15,284 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 08:04:15,285 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 08:04:15,285 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 08:04:15,286 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 08:04:15,286 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 08:04:15,286 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 08:04:15,287 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 08:04:15,287 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 08:04:15,287 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 08:04:15,287 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 08:04:15,288 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 08:04:15,288 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_f065eacd-0ab5-4e1b-9aad-e5dd59255ffa/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-11-23 08:04:15,296 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 08:04:15,296 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 08:04:15,297 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 08:04:15,297 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 08:04:15,297 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-23 08:04:15,297 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-23 08:04:15,297 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-23 08:04:15,297 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-23 08:04:15,297 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-23 08:04:15,298 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-23 08:04:15,298 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-23 08:04:15,298 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-23 08:04:15,298 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-23 08:04:15,298 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 08:04:15,299 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 08:04:15,299 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 08:04:15,299 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 08:04:15,299 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 08:04:15,299 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 08:04:15,299 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 08:04:15,299 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 08:04:15,300 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 08:04:15,300 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 08:04:15,300 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 08:04:15,300 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 08:04:15,300 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 08:04:15,300 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 08:04:15,300 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 08:04:15,300 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 08:04:15,301 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 08:04:15,301 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 08:04:15,301 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 08:04:15,301 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 08:04:15,301 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-23 08:04:15,301 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 08:04:15,301 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 08:04:15,302 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 08:04:15,302 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_f065eacd-0ab5-4e1b-9aad-e5dd59255ffa/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 944012c6b738fbe32c44ac0c8b836fac7f0eea30 [2018-11-23 08:04:15,322 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 08:04:15,331 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 08:04:15,334 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 08:04:15,335 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 08:04:15,335 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 08:04:15,335 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_f065eacd-0ab5-4e1b-9aad-e5dd59255ffa/bin-2019/utaipan/../../sv-benchmarks/c/pthread-wmm/thin001_rmo.opt_false-unreach-call.i [2018-11-23 08:04:15,377 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_f065eacd-0ab5-4e1b-9aad-e5dd59255ffa/bin-2019/utaipan/data/439680b45/8ca4fdc014ad4f42b968afd0af127cb1/FLAG8279f2f67 [2018-11-23 08:04:15,817 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 08:04:15,818 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_f065eacd-0ab5-4e1b-9aad-e5dd59255ffa/sv-benchmarks/c/pthread-wmm/thin001_rmo.opt_false-unreach-call.i [2018-11-23 08:04:15,827 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_f065eacd-0ab5-4e1b-9aad-e5dd59255ffa/bin-2019/utaipan/data/439680b45/8ca4fdc014ad4f42b968afd0af127cb1/FLAG8279f2f67 [2018-11-23 08:04:15,835 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_f065eacd-0ab5-4e1b-9aad-e5dd59255ffa/bin-2019/utaipan/data/439680b45/8ca4fdc014ad4f42b968afd0af127cb1 [2018-11-23 08:04:15,837 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 08:04:15,838 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 08:04:15,839 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 08:04:15,839 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 08:04:15,841 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 08:04:15,842 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 08:04:15" (1/1) ... [2018-11-23 08:04:15,843 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3e1fb88e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:04:15, skipping insertion in model container [2018-11-23 08:04:15,843 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 08:04:15" (1/1) ... [2018-11-23 08:04:15,849 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 08:04:15,880 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 08:04:16,089 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 08:04:16,096 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 08:04:16,181 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 08:04:16,214 INFO L195 MainTranslator]: Completed translation [2018-11-23 08:04:16,215 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:04:16 WrapperNode [2018-11-23 08:04:16,215 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 08:04:16,215 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 08:04:16,215 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 08:04:16,215 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 08:04:16,223 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:04:16" (1/1) ... [2018-11-23 08:04:16,238 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:04:16" (1/1) ... [2018-11-23 08:04:16,257 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 08:04:16,258 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 08:04:16,258 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 08:04:16,258 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 08:04:16,266 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:04:16" (1/1) ... [2018-11-23 08:04:16,266 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:04:16" (1/1) ... [2018-11-23 08:04:16,270 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:04:16" (1/1) ... [2018-11-23 08:04:16,270 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:04:16" (1/1) ... [2018-11-23 08:04:16,277 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:04:16" (1/1) ... [2018-11-23 08:04:16,280 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:04:16" (1/1) ... [2018-11-23 08:04:16,283 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:04:16" (1/1) ... [2018-11-23 08:04:16,286 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 08:04:16,286 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 08:04:16,286 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 08:04:16,286 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 08:04:16,287 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:04:16" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f065eacd-0ab5-4e1b-9aad-e5dd59255ffa/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 08:04:16,323 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 08:04:16,323 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-23 08:04:16,324 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-23 08:04:16,324 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-23 08:04:16,324 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 08:04:16,324 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-23 08:04:16,324 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-23 08:04:16,324 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-23 08:04:16,324 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-23 08:04:16,324 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2018-11-23 08:04:16,324 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2018-11-23 08:04:16,325 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-11-23 08:04:16,325 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-23 08:04:16,325 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 08:04:16,325 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 08:04:16,326 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-23 08:04:16,767 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 08:04:16,768 INFO L280 CfgBuilder]: Removed 6 assue(true) statements. [2018-11-23 08:04:16,768 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 08:04:16 BoogieIcfgContainer [2018-11-23 08:04:16,768 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 08:04:16,769 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 08:04:16,769 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 08:04:16,771 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 08:04:16,771 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 08:04:15" (1/3) ... [2018-11-23 08:04:16,771 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b7c1610 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 08:04:16, skipping insertion in model container [2018-11-23 08:04:16,771 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:04:16" (2/3) ... [2018-11-23 08:04:16,772 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b7c1610 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 08:04:16, skipping insertion in model container [2018-11-23 08:04:16,772 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 08:04:16" (3/3) ... [2018-11-23 08:04:16,773 INFO L112 eAbstractionObserver]: Analyzing ICFG thin001_rmo.opt_false-unreach-call.i [2018-11-23 08:04:16,801 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,801 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,801 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,801 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,802 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,802 WARN L317 ript$VariableManager]: TermVariabe Thread2_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,802 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,802 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,802 WARN L317 ript$VariableManager]: TermVariabe Thread2_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,802 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,802 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,803 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,803 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,803 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,803 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,803 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,803 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,803 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,804 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,804 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,804 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,804 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,804 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,804 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,804 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,804 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,805 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,805 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,805 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,805 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,805 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,805 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,805 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,805 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,806 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,806 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,806 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,806 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,806 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,806 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,806 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,807 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,807 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,807 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,807 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,807 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,807 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,807 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,807 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,808 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,808 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,808 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,808 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,808 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,808 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,808 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,808 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,809 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,809 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,809 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,809 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,809 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,809 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,809 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,809 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,810 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,810 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,810 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,810 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,810 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,810 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,810 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,811 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,811 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,811 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,811 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,811 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,811 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,811 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,811 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~mem27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,812 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,812 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,812 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,812 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,812 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,812 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,812 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,813 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,813 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,813 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,813 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,813 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,813 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,813 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,813 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,814 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,814 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,814 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,814 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet30.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,814 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet30.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,814 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,814 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,814 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet30.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,814 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet30.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,815 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,815 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,815 WARN L317 ript$VariableManager]: TermVariabe Thread0_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,815 WARN L317 ript$VariableManager]: TermVariabe Thread0_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,815 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet31.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,815 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet31.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,815 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,816 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,816 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet31.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,816 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet31.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,816 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,816 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,816 WARN L317 ript$VariableManager]: TermVariabe Thread1_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,816 WARN L317 ript$VariableManager]: TermVariabe Thread1_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,817 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,817 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,817 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,817 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,817 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~mem32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,817 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,818 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,818 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~mem32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,818 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,818 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,818 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,818 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,818 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,818 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,819 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,819 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,819 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,819 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,819 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,819 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,819 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,819 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,820 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,820 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,820 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,820 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,820 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet39.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,820 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet39.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,820 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,821 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,821 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet39.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,821 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet39.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:04:16,829 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-23 08:04:16,830 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 08:04:16,836 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 08:04:16,849 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 08:04:16,869 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 08:04:16,869 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 08:04:16,869 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 08:04:16,870 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 08:04:16,870 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 08:04:16,870 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 08:04:16,870 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 08:04:16,870 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 08:04:16,880 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 163places, 195 transitions [2018-11-23 08:04:31,694 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 137010 states. [2018-11-23 08:04:31,695 INFO L276 IsEmpty]: Start isEmpty. Operand 137010 states. [2018-11-23 08:04:31,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-11-23 08:04:31,774 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:04:31,775 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:04:31,777 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:04:31,782 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:04:31,782 INFO L82 PathProgramCache]: Analyzing trace with hash 430587499, now seen corresponding path program 1 times [2018-11-23 08:04:31,784 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:04:31,836 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:31,836 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:04:31,836 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:31,836 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:04:31,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:04:32,025 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:04:32,027 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:04:32,027 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 08:04:32,027 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:04:32,031 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 08:04:32,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 08:04:32,044 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 08:04:32,046 INFO L87 Difference]: Start difference. First operand 137010 states. Second operand 4 states. [2018-11-23 08:04:33,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:04:33,298 INFO L93 Difference]: Finished difference Result 213428 states and 945063 transitions. [2018-11-23 08:04:33,298 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 08:04:33,299 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2018-11-23 08:04:33,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:04:33,803 INFO L225 Difference]: With dead ends: 213428 [2018-11-23 08:04:33,803 INFO L226 Difference]: Without dead ends: 144378 [2018-11-23 08:04:33,805 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:04:37,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144378 states. [2018-11-23 08:04:39,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144378 to 138333. [2018-11-23 08:04:39,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138333 states. [2018-11-23 08:04:40,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138333 states to 138333 states and 627922 transitions. [2018-11-23 08:04:40,181 INFO L78 Accepts]: Start accepts. Automaton has 138333 states and 627922 transitions. Word has length 79 [2018-11-23 08:04:40,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:04:40,183 INFO L480 AbstractCegarLoop]: Abstraction has 138333 states and 627922 transitions. [2018-11-23 08:04:40,183 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 08:04:40,183 INFO L276 IsEmpty]: Start isEmpty. Operand 138333 states and 627922 transitions. [2018-11-23 08:04:40,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-11-23 08:04:40,253 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:04:40,253 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:04:40,254 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:04:40,254 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:04:40,254 INFO L82 PathProgramCache]: Analyzing trace with hash -1091098697, now seen corresponding path program 1 times [2018-11-23 08:04:40,254 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:04:40,257 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:40,257 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:04:40,257 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:40,258 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:04:40,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:04:40,357 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:04:40,357 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:04:40,357 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 08:04:40,357 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:04:40,359 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 08:04:40,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 08:04:40,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 08:04:40,359 INFO L87 Difference]: Start difference. First operand 138333 states and 627922 transitions. Second operand 4 states. [2018-11-23 08:04:40,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:04:40,952 INFO L93 Difference]: Finished difference Result 124090 states and 551747 transitions. [2018-11-23 08:04:40,952 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 08:04:40,952 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 81 [2018-11-23 08:04:40,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:04:41,279 INFO L225 Difference]: With dead ends: 124090 [2018-11-23 08:04:41,280 INFO L226 Difference]: Without dead ends: 120375 [2018-11-23 08:04:41,280 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:04:42,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120375 states. [2018-11-23 08:04:44,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120375 to 120375. [2018-11-23 08:04:44,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120375 states. [2018-11-23 08:04:44,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120375 states to 120375 states and 538517 transitions. [2018-11-23 08:04:44,399 INFO L78 Accepts]: Start accepts. Automaton has 120375 states and 538517 transitions. Word has length 81 [2018-11-23 08:04:44,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:04:44,400 INFO L480 AbstractCegarLoop]: Abstraction has 120375 states and 538517 transitions. [2018-11-23 08:04:44,400 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 08:04:44,400 INFO L276 IsEmpty]: Start isEmpty. Operand 120375 states and 538517 transitions. [2018-11-23 08:04:44,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-23 08:04:44,430 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:04:44,430 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:04:44,431 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:04:44,431 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:04:44,431 INFO L82 PathProgramCache]: Analyzing trace with hash 753345610, now seen corresponding path program 1 times [2018-11-23 08:04:44,431 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:04:44,433 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:44,433 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:04:44,433 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:44,433 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:04:44,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:04:44,523 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:04:44,523 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:04:44,524 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 08:04:44,524 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:04:44,524 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 08:04:44,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 08:04:44,524 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:04:44,524 INFO L87 Difference]: Start difference. First operand 120375 states and 538517 transitions. Second operand 5 states. [2018-11-23 08:04:44,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:04:44,727 INFO L93 Difference]: Finished difference Result 43419 states and 175132 transitions. [2018-11-23 08:04:44,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 08:04:44,727 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2018-11-23 08:04:44,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:04:44,832 INFO L225 Difference]: With dead ends: 43419 [2018-11-23 08:04:44,832 INFO L226 Difference]: Without dead ends: 40207 [2018-11-23 08:04:44,833 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-23 08:04:44,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40207 states. [2018-11-23 08:04:45,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40207 to 40207. [2018-11-23 08:04:45,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40207 states. [2018-11-23 08:04:48,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40207 states to 40207 states and 162099 transitions. [2018-11-23 08:04:48,218 INFO L78 Accepts]: Start accepts. Automaton has 40207 states and 162099 transitions. Word has length 82 [2018-11-23 08:04:48,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:04:48,218 INFO L480 AbstractCegarLoop]: Abstraction has 40207 states and 162099 transitions. [2018-11-23 08:04:48,218 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 08:04:48,218 INFO L276 IsEmpty]: Start isEmpty. Operand 40207 states and 162099 transitions. [2018-11-23 08:04:48,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-23 08:04:48,242 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:04:48,242 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:04:48,242 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:04:48,242 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:04:48,243 INFO L82 PathProgramCache]: Analyzing trace with hash 1150338573, now seen corresponding path program 1 times [2018-11-23 08:04:48,243 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:04:48,245 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:48,245 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:04:48,245 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:48,245 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:04:48,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:04:48,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:04:48,344 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:04:48,344 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 08:04:48,344 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:04:48,344 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 08:04:48,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 08:04:48,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 08:04:48,345 INFO L87 Difference]: Start difference. First operand 40207 states and 162099 transitions. Second operand 4 states. [2018-11-23 08:04:48,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:04:48,618 INFO L93 Difference]: Finished difference Result 41223 states and 163379 transitions. [2018-11-23 08:04:48,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 08:04:48,619 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2018-11-23 08:04:48,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:04:48,691 INFO L225 Difference]: With dead ends: 41223 [2018-11-23 08:04:48,691 INFO L226 Difference]: Without dead ends: 41223 [2018-11-23 08:04:48,692 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:04:48,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41223 states. [2018-11-23 08:04:49,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41223 to 38343. [2018-11-23 08:04:49,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38343 states. [2018-11-23 08:04:49,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38343 states to 38343 states and 152547 transitions. [2018-11-23 08:04:49,226 INFO L78 Accepts]: Start accepts. Automaton has 38343 states and 152547 transitions. Word has length 93 [2018-11-23 08:04:49,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:04:49,227 INFO L480 AbstractCegarLoop]: Abstraction has 38343 states and 152547 transitions. [2018-11-23 08:04:49,227 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 08:04:49,227 INFO L276 IsEmpty]: Start isEmpty. Operand 38343 states and 152547 transitions. [2018-11-23 08:04:49,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 08:04:49,250 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:04:49,251 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:04:49,251 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:04:49,251 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:04:49,251 INFO L82 PathProgramCache]: Analyzing trace with hash -886906216, now seen corresponding path program 1 times [2018-11-23 08:04:49,251 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:04:49,252 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:49,253 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:04:49,253 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:49,253 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:04:49,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:04:49,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:04:49,306 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:04:49,307 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 08:04:49,307 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:04:49,307 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 08:04:49,307 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 08:04:49,307 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 08:04:49,308 INFO L87 Difference]: Start difference. First operand 38343 states and 152547 transitions. Second operand 4 states. [2018-11-23 08:04:49,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:04:49,599 INFO L93 Difference]: Finished difference Result 49659 states and 195684 transitions. [2018-11-23 08:04:49,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 08:04:49,600 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2018-11-23 08:04:49,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:04:49,696 INFO L225 Difference]: With dead ends: 49659 [2018-11-23 08:04:49,696 INFO L226 Difference]: Without dead ends: 49659 [2018-11-23 08:04:49,696 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:04:49,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49659 states. [2018-11-23 08:04:50,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49659 to 42267. [2018-11-23 08:04:50,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42267 states. [2018-11-23 08:04:50,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42267 states to 42267 states and 166772 transitions. [2018-11-23 08:04:50,321 INFO L78 Accepts]: Start accepts. Automaton has 42267 states and 166772 transitions. Word has length 95 [2018-11-23 08:04:50,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:04:50,321 INFO L480 AbstractCegarLoop]: Abstraction has 42267 states and 166772 transitions. [2018-11-23 08:04:50,321 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 08:04:50,321 INFO L276 IsEmpty]: Start isEmpty. Operand 42267 states and 166772 transitions. [2018-11-23 08:04:50,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 08:04:50,362 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:04:50,362 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:04:50,362 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:04:50,362 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:04:50,362 INFO L82 PathProgramCache]: Analyzing trace with hash 227311800, now seen corresponding path program 1 times [2018-11-23 08:04:50,362 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:04:50,364 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:50,364 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:04:50,364 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:50,364 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:04:50,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:04:50,440 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:04:50,440 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:04:50,440 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 08:04:50,440 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:04:50,440 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 08:04:50,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 08:04:50,441 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:04:50,441 INFO L87 Difference]: Start difference. First operand 42267 states and 166772 transitions. Second operand 5 states. [2018-11-23 08:04:51,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:04:51,021 INFO L93 Difference]: Finished difference Result 88070 states and 341366 transitions. [2018-11-23 08:04:51,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 08:04:51,021 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-11-23 08:04:51,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:04:51,201 INFO L225 Difference]: With dead ends: 88070 [2018-11-23 08:04:51,201 INFO L226 Difference]: Without dead ends: 88070 [2018-11-23 08:04:51,201 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-23 08:04:51,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88070 states. [2018-11-23 08:04:52,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88070 to 32997. [2018-11-23 08:04:52,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32997 states. [2018-11-23 08:04:52,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32997 states to 32997 states and 128800 transitions. [2018-11-23 08:04:52,181 INFO L78 Accepts]: Start accepts. Automaton has 32997 states and 128800 transitions. Word has length 95 [2018-11-23 08:04:52,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:04:52,182 INFO L480 AbstractCegarLoop]: Abstraction has 32997 states and 128800 transitions. [2018-11-23 08:04:52,182 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 08:04:52,182 INFO L276 IsEmpty]: Start isEmpty. Operand 32997 states and 128800 transitions. [2018-11-23 08:04:52,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 08:04:52,205 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:04:52,206 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:04:52,206 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:04:52,206 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:04:52,206 INFO L82 PathProgramCache]: Analyzing trace with hash -1569639559, now seen corresponding path program 1 times [2018-11-23 08:04:52,206 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:04:52,207 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:52,207 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:04:52,208 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:52,208 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:04:52,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:04:52,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:04:52,267 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:04:52,267 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 08:04:52,267 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:04:52,268 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 08:04:52,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 08:04:52,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 08:04:52,268 INFO L87 Difference]: Start difference. First operand 32997 states and 128800 transitions. Second operand 4 states. [2018-11-23 08:04:52,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:04:52,635 INFO L93 Difference]: Finished difference Result 42976 states and 164960 transitions. [2018-11-23 08:04:52,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 08:04:52,635 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2018-11-23 08:04:52,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:04:52,713 INFO L225 Difference]: With dead ends: 42976 [2018-11-23 08:04:52,713 INFO L226 Difference]: Without dead ends: 42976 [2018-11-23 08:04:52,713 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:04:52,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42976 states. [2018-11-23 08:04:53,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42976 to 39537. [2018-11-23 08:04:53,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39537 states. [2018-11-23 08:04:53,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39537 states to 39537 states and 152763 transitions. [2018-11-23 08:04:53,269 INFO L78 Accepts]: Start accepts. Automaton has 39537 states and 152763 transitions. Word has length 95 [2018-11-23 08:04:53,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:04:53,269 INFO L480 AbstractCegarLoop]: Abstraction has 39537 states and 152763 transitions. [2018-11-23 08:04:53,269 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 08:04:53,269 INFO L276 IsEmpty]: Start isEmpty. Operand 39537 states and 152763 transitions. [2018-11-23 08:04:53,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 08:04:53,296 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:04:53,297 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:04:53,297 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:04:53,297 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:04:53,297 INFO L82 PathProgramCache]: Analyzing trace with hash -1824376104, now seen corresponding path program 1 times [2018-11-23 08:04:53,297 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:04:53,299 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:53,299 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:04:53,299 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:53,299 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:04:53,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:04:53,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:04:53,379 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:04:53,380 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 08:04:53,380 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:04:53,380 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 08:04:53,380 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 08:04:53,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 08:04:53,381 INFO L87 Difference]: Start difference. First operand 39537 states and 152763 transitions. Second operand 4 states. [2018-11-23 08:04:53,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:04:53,795 INFO L93 Difference]: Finished difference Result 48833 states and 187891 transitions. [2018-11-23 08:04:53,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 08:04:53,795 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2018-11-23 08:04:53,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:04:53,883 INFO L225 Difference]: With dead ends: 48833 [2018-11-23 08:04:53,883 INFO L226 Difference]: Without dead ends: 47233 [2018-11-23 08:04:53,883 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:04:53,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47233 states. [2018-11-23 08:04:54,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47233 to 45201. [2018-11-23 08:04:54,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45201 states. [2018-11-23 08:04:54,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45201 states to 45201 states and 173947 transitions. [2018-11-23 08:04:54,537 INFO L78 Accepts]: Start accepts. Automaton has 45201 states and 173947 transitions. Word has length 95 [2018-11-23 08:04:54,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:04:54,537 INFO L480 AbstractCegarLoop]: Abstraction has 45201 states and 173947 transitions. [2018-11-23 08:04:54,538 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 08:04:54,538 INFO L276 IsEmpty]: Start isEmpty. Operand 45201 states and 173947 transitions. [2018-11-23 08:04:54,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 08:04:54,574 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:04:54,574 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:04:54,574 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:04:54,574 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:04:54,574 INFO L82 PathProgramCache]: Analyzing trace with hash -2117779111, now seen corresponding path program 1 times [2018-11-23 08:04:54,574 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:04:54,576 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:54,576 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:04:54,576 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:54,576 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:04:54,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:04:54,686 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:04:54,686 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:04:54,686 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 08:04:54,686 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:04:54,686 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 08:04:54,687 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 08:04:54,687 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 08:04:54,687 INFO L87 Difference]: Start difference. First operand 45201 states and 173947 transitions. Second operand 6 states. [2018-11-23 08:04:55,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:04:55,109 INFO L93 Difference]: Finished difference Result 53895 states and 205519 transitions. [2018-11-23 08:04:55,110 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 08:04:55,110 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-11-23 08:04:55,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:04:55,421 INFO L225 Difference]: With dead ends: 53895 [2018-11-23 08:04:55,422 INFO L226 Difference]: Without dead ends: 53895 [2018-11-23 08:04:55,422 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 5 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-23 08:04:55,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53895 states. [2018-11-23 08:04:56,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53895 to 46461. [2018-11-23 08:04:56,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46461 states. [2018-11-23 08:04:56,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46461 states to 46461 states and 178434 transitions. [2018-11-23 08:04:56,116 INFO L78 Accepts]: Start accepts. Automaton has 46461 states and 178434 transitions. Word has length 95 [2018-11-23 08:04:56,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:04:56,117 INFO L480 AbstractCegarLoop]: Abstraction has 46461 states and 178434 transitions. [2018-11-23 08:04:56,117 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 08:04:56,117 INFO L276 IsEmpty]: Start isEmpty. Operand 46461 states and 178434 transitions. [2018-11-23 08:04:56,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 08:04:56,153 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:04:56,153 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:04:56,153 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:04:56,154 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:04:56,154 INFO L82 PathProgramCache]: Analyzing trace with hash -873014630, now seen corresponding path program 1 times [2018-11-23 08:04:56,154 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:04:56,155 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:56,156 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:04:56,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:56,156 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:04:56,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:04:56,262 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:04:56,262 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:04:56,262 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 08:04:56,263 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:04:56,263 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 08:04:56,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 08:04:56,263 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-23 08:04:56,263 INFO L87 Difference]: Start difference. First operand 46461 states and 178434 transitions. Second operand 8 states. [2018-11-23 08:04:56,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:04:56,791 INFO L93 Difference]: Finished difference Result 61671 states and 232239 transitions. [2018-11-23 08:04:56,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 08:04:56,791 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 95 [2018-11-23 08:04:56,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:04:56,903 INFO L225 Difference]: With dead ends: 61671 [2018-11-23 08:04:56,903 INFO L226 Difference]: Without dead ends: 61671 [2018-11-23 08:04:56,903 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2018-11-23 08:04:57,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61671 states. [2018-11-23 08:04:57,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61671 to 51841. [2018-11-23 08:04:57,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51841 states. [2018-11-23 08:04:57,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51841 states to 51841 states and 196217 transitions. [2018-11-23 08:04:57,672 INFO L78 Accepts]: Start accepts. Automaton has 51841 states and 196217 transitions. Word has length 95 [2018-11-23 08:04:57,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:04:57,673 INFO L480 AbstractCegarLoop]: Abstraction has 51841 states and 196217 transitions. [2018-11-23 08:04:57,673 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 08:04:57,673 INFO L276 IsEmpty]: Start isEmpty. Operand 51841 states and 196217 transitions. [2018-11-23 08:04:57,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 08:04:57,706 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:04:57,706 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:04:57,706 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:04:57,706 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:04:57,706 INFO L82 PathProgramCache]: Analyzing trace with hash 1614498203, now seen corresponding path program 1 times [2018-11-23 08:04:57,706 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:04:57,708 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:57,708 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:04:57,708 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:57,708 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:04:57,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:04:57,772 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:04:57,772 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:04:57,772 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 08:04:57,772 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:04:57,772 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 08:04:57,772 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 08:04:57,773 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 08:04:57,773 INFO L87 Difference]: Start difference. First operand 51841 states and 196217 transitions. Second operand 6 states. [2018-11-23 08:04:57,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:04:57,855 INFO L93 Difference]: Finished difference Result 14289 states and 46769 transitions. [2018-11-23 08:04:57,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 08:04:57,856 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-11-23 08:04:57,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:04:57,871 INFO L225 Difference]: With dead ends: 14289 [2018-11-23 08:04:57,871 INFO L226 Difference]: Without dead ends: 11595 [2018-11-23 08:04:57,871 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-11-23 08:04:57,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11595 states. [2018-11-23 08:04:57,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11595 to 11445. [2018-11-23 08:04:57,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11445 states. [2018-11-23 08:04:57,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11445 states to 11445 states and 36772 transitions. [2018-11-23 08:04:57,993 INFO L78 Accepts]: Start accepts. Automaton has 11445 states and 36772 transitions. Word has length 95 [2018-11-23 08:04:57,993 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:04:57,993 INFO L480 AbstractCegarLoop]: Abstraction has 11445 states and 36772 transitions. [2018-11-23 08:04:57,993 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 08:04:57,993 INFO L276 IsEmpty]: Start isEmpty. Operand 11445 states and 36772 transitions. [2018-11-23 08:04:58,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-11-23 08:04:58,005 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:04:58,005 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:04:58,005 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:04:58,005 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:04:58,005 INFO L82 PathProgramCache]: Analyzing trace with hash -1089374863, now seen corresponding path program 1 times [2018-11-23 08:04:58,005 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:04:58,006 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:58,007 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:04:58,007 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:58,007 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:04:58,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:04:58,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:04:58,068 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:04:58,068 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 08:04:58,068 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:04:58,069 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 08:04:58,069 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 08:04:58,069 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 08:04:58,069 INFO L87 Difference]: Start difference. First operand 11445 states and 36772 transitions. Second operand 4 states. [2018-11-23 08:04:58,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:04:58,194 INFO L93 Difference]: Finished difference Result 15662 states and 49621 transitions. [2018-11-23 08:04:58,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 08:04:58,195 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 110 [2018-11-23 08:04:58,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:04:58,214 INFO L225 Difference]: With dead ends: 15662 [2018-11-23 08:04:58,214 INFO L226 Difference]: Without dead ends: 15412 [2018-11-23 08:04:58,214 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:04:58,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15412 states. [2018-11-23 08:04:58,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15412 to 12866. [2018-11-23 08:04:58,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12866 states. [2018-11-23 08:04:58,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12866 states to 12866 states and 40987 transitions. [2018-11-23 08:04:58,365 INFO L78 Accepts]: Start accepts. Automaton has 12866 states and 40987 transitions. Word has length 110 [2018-11-23 08:04:58,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:04:58,365 INFO L480 AbstractCegarLoop]: Abstraction has 12866 states and 40987 transitions. [2018-11-23 08:04:58,365 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 08:04:58,365 INFO L276 IsEmpty]: Start isEmpty. Operand 12866 states and 40987 transitions. [2018-11-23 08:04:58,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-11-23 08:04:58,377 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:04:58,377 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:04:58,377 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:04:58,377 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:04:58,377 INFO L82 PathProgramCache]: Analyzing trace with hash -818933337, now seen corresponding path program 1 times [2018-11-23 08:04:58,377 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:04:58,379 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:58,379 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:04:58,379 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:58,379 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:04:58,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:04:58,451 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:04:58,451 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:04:58,452 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 08:04:58,452 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:04:58,452 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 08:04:58,452 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 08:04:58,452 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:04:58,453 INFO L87 Difference]: Start difference. First operand 12866 states and 40987 transitions. Second operand 5 states. [2018-11-23 08:04:58,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:04:58,607 INFO L93 Difference]: Finished difference Result 15852 states and 50228 transitions. [2018-11-23 08:04:58,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 08:04:58,608 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 112 [2018-11-23 08:04:58,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:04:58,633 INFO L225 Difference]: With dead ends: 15852 [2018-11-23 08:04:58,633 INFO L226 Difference]: Without dead ends: 15602 [2018-11-23 08:04:58,634 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-23 08:04:58,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15602 states. [2018-11-23 08:04:58,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15602 to 12836. [2018-11-23 08:04:58,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12836 states. [2018-11-23 08:04:58,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12836 states to 12836 states and 40893 transitions. [2018-11-23 08:04:58,855 INFO L78 Accepts]: Start accepts. Automaton has 12836 states and 40893 transitions. Word has length 112 [2018-11-23 08:04:58,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:04:58,855 INFO L480 AbstractCegarLoop]: Abstraction has 12836 states and 40893 transitions. [2018-11-23 08:04:58,855 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 08:04:58,855 INFO L276 IsEmpty]: Start isEmpty. Operand 12836 states and 40893 transitions. [2018-11-23 08:04:58,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-11-23 08:04:58,868 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:04:58,868 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:04:58,868 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:04:58,868 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:04:58,869 INFO L82 PathProgramCache]: Analyzing trace with hash 1188365408, now seen corresponding path program 1 times [2018-11-23 08:04:58,869 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:04:58,870 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:58,870 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:04:58,870 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:58,870 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:04:58,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:04:58,936 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:04:58,936 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:04:58,937 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 08:04:58,937 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:04:58,937 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 08:04:58,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 08:04:58,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:04:58,937 INFO L87 Difference]: Start difference. First operand 12836 states and 40893 transitions. Second operand 5 states. [2018-11-23 08:04:59,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:04:59,124 INFO L93 Difference]: Finished difference Result 18663 states and 59455 transitions. [2018-11-23 08:04:59,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 08:04:59,124 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 112 [2018-11-23 08:04:59,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:04:59,147 INFO L225 Difference]: With dead ends: 18663 [2018-11-23 08:04:59,147 INFO L226 Difference]: Without dead ends: 18663 [2018-11-23 08:04:59,147 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-23 08:04:59,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18663 states. [2018-11-23 08:04:59,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18663 to 16352. [2018-11-23 08:04:59,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16352 states. [2018-11-23 08:04:59,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16352 states to 16352 states and 52101 transitions. [2018-11-23 08:04:59,343 INFO L78 Accepts]: Start accepts. Automaton has 16352 states and 52101 transitions. Word has length 112 [2018-11-23 08:04:59,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:04:59,343 INFO L480 AbstractCegarLoop]: Abstraction has 16352 states and 52101 transitions. [2018-11-23 08:04:59,343 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 08:04:59,343 INFO L276 IsEmpty]: Start isEmpty. Operand 16352 states and 52101 transitions. [2018-11-23 08:04:59,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-11-23 08:04:59,359 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:04:59,359 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:04:59,359 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:04:59,359 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:04:59,359 INFO L82 PathProgramCache]: Analyzing trace with hash -102109952, now seen corresponding path program 1 times [2018-11-23 08:04:59,359 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:04:59,360 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:59,360 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:04:59,360 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:04:59,360 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:04:59,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:04:59,509 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:04:59,509 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:04:59,510 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 08:04:59,510 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:04:59,510 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 08:04:59,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 08:04:59,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-23 08:04:59,510 INFO L87 Difference]: Start difference. First operand 16352 states and 52101 transitions. Second operand 8 states. [2018-11-23 08:04:59,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:04:59,803 INFO L93 Difference]: Finished difference Result 20516 states and 64961 transitions. [2018-11-23 08:04:59,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 08:04:59,803 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 112 [2018-11-23 08:04:59,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:04:59,826 INFO L225 Difference]: With dead ends: 20516 [2018-11-23 08:04:59,827 INFO L226 Difference]: Without dead ends: 20516 [2018-11-23 08:04:59,827 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 4 SyntacticMatches, 6 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=68, Invalid=172, Unknown=0, NotChecked=0, Total=240 [2018-11-23 08:04:59,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20516 states. [2018-11-23 08:04:59,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20516 to 16647. [2018-11-23 08:04:59,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16647 states. [2018-11-23 08:05:00,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16647 states to 16647 states and 53027 transitions. [2018-11-23 08:05:00,017 INFO L78 Accepts]: Start accepts. Automaton has 16647 states and 53027 transitions. Word has length 112 [2018-11-23 08:05:00,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:05:00,018 INFO L480 AbstractCegarLoop]: Abstraction has 16647 states and 53027 transitions. [2018-11-23 08:05:00,018 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 08:05:00,018 INFO L276 IsEmpty]: Start isEmpty. Operand 16647 states and 53027 transitions. [2018-11-23 08:05:00,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-11-23 08:05:00,031 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:05:00,032 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:05:00,032 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:05:00,032 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:05:00,032 INFO L82 PathProgramCache]: Analyzing trace with hash 1142654529, now seen corresponding path program 1 times [2018-11-23 08:05:00,032 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:05:00,033 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:05:00,033 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:05:00,033 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:05:00,033 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:05:00,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:05:00,200 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:05:00,201 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:05:00,201 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-23 08:05:00,201 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:05:00,201 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 08:05:00,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 08:05:00,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-11-23 08:05:00,202 INFO L87 Difference]: Start difference. First operand 16647 states and 53027 transitions. Second operand 10 states. [2018-11-23 08:05:00,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:05:00,566 INFO L93 Difference]: Finished difference Result 21045 states and 66892 transitions. [2018-11-23 08:05:00,566 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-23 08:05:00,566 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 112 [2018-11-23 08:05:00,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:05:00,590 INFO L225 Difference]: With dead ends: 21045 [2018-11-23 08:05:00,590 INFO L226 Difference]: Without dead ends: 21045 [2018-11-23 08:05:00,590 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=83, Invalid=297, Unknown=0, NotChecked=0, Total=380 [2018-11-23 08:05:00,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21045 states. [2018-11-23 08:05:00,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21045 to 16272. [2018-11-23 08:05:00,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16272 states. [2018-11-23 08:05:00,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16272 states to 16272 states and 51857 transitions. [2018-11-23 08:05:00,776 INFO L78 Accepts]: Start accepts. Automaton has 16272 states and 51857 transitions. Word has length 112 [2018-11-23 08:05:00,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:05:00,776 INFO L480 AbstractCegarLoop]: Abstraction has 16272 states and 51857 transitions. [2018-11-23 08:05:00,776 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 08:05:00,776 INFO L276 IsEmpty]: Start isEmpty. Operand 16272 states and 51857 transitions. [2018-11-23 08:05:00,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-11-23 08:05:00,790 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:05:00,790 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:05:00,790 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:05:00,790 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:05:00,790 INFO L82 PathProgramCache]: Analyzing trace with hash -664799934, now seen corresponding path program 1 times [2018-11-23 08:05:00,790 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:05:00,791 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:05:00,791 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:05:00,791 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:05:00,791 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:05:00,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:05:00,834 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:05:00,834 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:05:00,834 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:05:00,834 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:05:00,835 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 08:05:00,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:05:00,835 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:05:00,835 INFO L87 Difference]: Start difference. First operand 16272 states and 51857 transitions. Second operand 3 states. [2018-11-23 08:05:00,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:05:00,890 INFO L93 Difference]: Finished difference Result 16272 states and 51793 transitions. [2018-11-23 08:05:00,890 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:05:00,890 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 112 [2018-11-23 08:05:00,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:05:00,908 INFO L225 Difference]: With dead ends: 16272 [2018-11-23 08:05:00,908 INFO L226 Difference]: Without dead ends: 16272 [2018-11-23 08:05:00,909 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:05:00,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16272 states. [2018-11-23 08:05:01,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16272 to 16272. [2018-11-23 08:05:01,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16272 states. [2018-11-23 08:05:01,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16272 states to 16272 states and 51793 transitions. [2018-11-23 08:05:01,069 INFO L78 Accepts]: Start accepts. Automaton has 16272 states and 51793 transitions. Word has length 112 [2018-11-23 08:05:01,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:05:01,069 INFO L480 AbstractCegarLoop]: Abstraction has 16272 states and 51793 transitions. [2018-11-23 08:05:01,069 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 08:05:01,069 INFO L276 IsEmpty]: Start isEmpty. Operand 16272 states and 51793 transitions. [2018-11-23 08:05:01,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-11-23 08:05:01,084 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:05:01,084 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:05:01,084 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:05:01,084 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:05:01,084 INFO L82 PathProgramCache]: Analyzing trace with hash -927056763, now seen corresponding path program 1 times [2018-11-23 08:05:01,084 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:05:01,085 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:05:01,086 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:05:01,086 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:05:01,086 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:05:01,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:05:01,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:05:01,183 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:05:01,183 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 08:05:01,183 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:05:01,183 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 08:05:01,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 08:05:01,183 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-23 08:05:01,184 INFO L87 Difference]: Start difference. First operand 16272 states and 51793 transitions. Second operand 7 states. [2018-11-23 08:05:01,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:05:01,277 INFO L93 Difference]: Finished difference Result 27536 states and 87929 transitions. [2018-11-23 08:05:01,278 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 08:05:01,278 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 114 [2018-11-23 08:05:01,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:05:01,293 INFO L225 Difference]: With dead ends: 27536 [2018-11-23 08:05:01,293 INFO L226 Difference]: Without dead ends: 14112 [2018-11-23 08:05:01,293 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-11-23 08:05:01,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14112 states. [2018-11-23 08:05:01,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14112 to 14112. [2018-11-23 08:05:01,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14112 states. [2018-11-23 08:05:01,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14112 states to 14112 states and 44355 transitions. [2018-11-23 08:05:01,421 INFO L78 Accepts]: Start accepts. Automaton has 14112 states and 44355 transitions. Word has length 114 [2018-11-23 08:05:01,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:05:01,422 INFO L480 AbstractCegarLoop]: Abstraction has 14112 states and 44355 transitions. [2018-11-23 08:05:01,422 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 08:05:01,422 INFO L276 IsEmpty]: Start isEmpty. Operand 14112 states and 44355 transitions. [2018-11-23 08:05:01,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-11-23 08:05:01,434 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:05:01,434 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:05:01,435 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:05:01,435 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:05:01,435 INFO L82 PathProgramCache]: Analyzing trace with hash -357414417, now seen corresponding path program 2 times [2018-11-23 08:05:01,435 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:05:01,436 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:05:01,436 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:05:01,436 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:05:01,436 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:05:01,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:05:01,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:05:01,515 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:05:01,516 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 08:05:01,516 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:05:01,516 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 08:05:01,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 08:05:01,516 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-11-23 08:05:01,516 INFO L87 Difference]: Start difference. First operand 14112 states and 44355 transitions. Second operand 8 states. [2018-11-23 08:05:01,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:05:01,613 INFO L93 Difference]: Finished difference Result 18320 states and 57435 transitions. [2018-11-23 08:05:01,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 08:05:01,613 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 114 [2018-11-23 08:05:01,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:05:01,619 INFO L225 Difference]: With dead ends: 18320 [2018-11-23 08:05:01,619 INFO L226 Difference]: Without dead ends: 5216 [2018-11-23 08:05:01,619 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-11-23 08:05:01,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5216 states. [2018-11-23 08:05:01,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5216 to 5216. [2018-11-23 08:05:01,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5216 states. [2018-11-23 08:05:01,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5216 states to 5216 states and 15399 transitions. [2018-11-23 08:05:01,667 INFO L78 Accepts]: Start accepts. Automaton has 5216 states and 15399 transitions. Word has length 114 [2018-11-23 08:05:01,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:05:01,668 INFO L480 AbstractCegarLoop]: Abstraction has 5216 states and 15399 transitions. [2018-11-23 08:05:01,668 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 08:05:01,668 INFO L276 IsEmpty]: Start isEmpty. Operand 5216 states and 15399 transitions. [2018-11-23 08:05:01,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-11-23 08:05:01,672 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:05:01,672 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:05:01,672 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:05:01,673 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:05:01,673 INFO L82 PathProgramCache]: Analyzing trace with hash -1118510685, now seen corresponding path program 1 times [2018-11-23 08:05:01,673 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:05:01,674 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:05:01,674 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 08:05:01,674 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:05:01,674 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:05:01,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:05:01,696 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:05:01,696 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:05:01,696 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:05:01,696 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 08:05:01,696 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 08:05:01,697 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:05:01,697 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:05:01,697 INFO L87 Difference]: Start difference. First operand 5216 states and 15399 transitions. Second operand 3 states. [2018-11-23 08:05:01,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:05:01,731 INFO L93 Difference]: Finished difference Result 7600 states and 23284 transitions. [2018-11-23 08:05:01,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:05:01,732 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 114 [2018-11-23 08:05:01,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:05:01,740 INFO L225 Difference]: With dead ends: 7600 [2018-11-23 08:05:01,740 INFO L226 Difference]: Without dead ends: 7600 [2018-11-23 08:05:01,740 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:05:01,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7600 states. [2018-11-23 08:05:01,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7600 to 4801. [2018-11-23 08:05:01,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4801 states. [2018-11-23 08:05:01,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4801 states to 4801 states and 14353 transitions. [2018-11-23 08:05:01,797 INFO L78 Accepts]: Start accepts. Automaton has 4801 states and 14353 transitions. Word has length 114 [2018-11-23 08:05:01,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:05:01,797 INFO L480 AbstractCegarLoop]: Abstraction has 4801 states and 14353 transitions. [2018-11-23 08:05:01,797 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 08:05:01,797 INFO L276 IsEmpty]: Start isEmpty. Operand 4801 states and 14353 transitions. [2018-11-23 08:05:01,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-11-23 08:05:01,802 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:05:01,802 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:05:01,802 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:05:01,802 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:05:01,802 INFO L82 PathProgramCache]: Analyzing trace with hash 1100656581, now seen corresponding path program 3 times [2018-11-23 08:05:01,803 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 08:05:01,804 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:05:01,804 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:05:01,804 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:05:01,804 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 08:05:01,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:05:01,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:05:01,860 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [478] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [361] L-1-->L673: Formula: (= |v_#valid_9| (store |v_#valid_10| 0 0)) InVars {#valid=|v_#valid_10|} OutVars{#valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [373] L673-->L675: Formula: (= v_~__unbuffered_cnt~0_8 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [424] L675-->L676: Formula: (= v_~__unbuffered_p0_EAX~0_5 0) InVars {} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_5} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [344] L676-->L677: Formula: (= v_~__unbuffered_p0_EAX$flush_delayed~0_1 0) InVars {} OutVars{~__unbuffered_p0_EAX$flush_delayed~0=v_~__unbuffered_p0_EAX$flush_delayed~0_1} AuxVars[] AssignedVars[~__unbuffered_p0_EAX$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [488] L677-->L678: Formula: (= v_~__unbuffered_p0_EAX$mem_tmp~0_1 0) InVars {} OutVars{~__unbuffered_p0_EAX$mem_tmp~0=v_~__unbuffered_p0_EAX$mem_tmp~0_1} AuxVars[] AssignedVars[~__unbuffered_p0_EAX$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [415] L678-->L679: Formula: (= v_~__unbuffered_p0_EAX$r_buff0_thd0~0_1 0) InVars {} OutVars{~__unbuffered_p0_EAX$r_buff0_thd0~0=v_~__unbuffered_p0_EAX$r_buff0_thd0~0_1} AuxVars[] AssignedVars[~__unbuffered_p0_EAX$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [530] L679-->L680: Formula: (= v_~__unbuffered_p0_EAX$r_buff0_thd1~0_1 0) InVars {} OutVars{~__unbuffered_p0_EAX$r_buff0_thd1~0=v_~__unbuffered_p0_EAX$r_buff0_thd1~0_1} AuxVars[] AssignedVars[~__unbuffered_p0_EAX$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [458] L680-->L681: Formula: (= v_~__unbuffered_p0_EAX$r_buff0_thd2~0_1 0) InVars {} OutVars{~__unbuffered_p0_EAX$r_buff0_thd2~0=v_~__unbuffered_p0_EAX$r_buff0_thd2~0_1} AuxVars[] AssignedVars[~__unbuffered_p0_EAX$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [375] L681-->L682: Formula: (= v_~__unbuffered_p0_EAX$r_buff0_thd3~0_1 0) InVars {} OutVars{~__unbuffered_p0_EAX$r_buff0_thd3~0=v_~__unbuffered_p0_EAX$r_buff0_thd3~0_1} AuxVars[] AssignedVars[~__unbuffered_p0_EAX$r_buff0_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [519] L682-->L683: Formula: (= v_~__unbuffered_p0_EAX$r_buff1_thd0~0_1 0) InVars {} OutVars{~__unbuffered_p0_EAX$r_buff1_thd0~0=v_~__unbuffered_p0_EAX$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~__unbuffered_p0_EAX$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [449] L683-->L684: Formula: (= v_~__unbuffered_p0_EAX$r_buff1_thd1~0_1 0) InVars {} OutVars{~__unbuffered_p0_EAX$r_buff1_thd1~0=v_~__unbuffered_p0_EAX$r_buff1_thd1~0_1} AuxVars[] AssignedVars[~__unbuffered_p0_EAX$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [372] L684-->L685: Formula: (= v_~__unbuffered_p0_EAX$r_buff1_thd2~0_1 0) InVars {} OutVars{~__unbuffered_p0_EAX$r_buff1_thd2~0=v_~__unbuffered_p0_EAX$r_buff1_thd2~0_1} AuxVars[] AssignedVars[~__unbuffered_p0_EAX$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [494] L685-->L686: Formula: (= v_~__unbuffered_p0_EAX$r_buff1_thd3~0_1 0) InVars {} OutVars{~__unbuffered_p0_EAX$r_buff1_thd3~0=v_~__unbuffered_p0_EAX$r_buff1_thd3~0_1} AuxVars[] AssignedVars[~__unbuffered_p0_EAX$r_buff1_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [423] L686-->L687: Formula: (= v_~__unbuffered_p0_EAX$read_delayed~0_4 0) InVars {} OutVars{~__unbuffered_p0_EAX$read_delayed~0=v_~__unbuffered_p0_EAX$read_delayed~0_4} AuxVars[] AssignedVars[~__unbuffered_p0_EAX$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [368] L687-->L688: Formula: (and (= v_~__unbuffered_p0_EAX$read_delayed_var~0.base_3 0) (= v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_3 0)) InVars {} OutVars{~__unbuffered_p0_EAX$read_delayed_var~0.offset=v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_3, ~__unbuffered_p0_EAX$read_delayed_var~0.base=v_~__unbuffered_p0_EAX$read_delayed_var~0.base_3} AuxVars[] AssignedVars[~__unbuffered_p0_EAX$read_delayed_var~0.offset, ~__unbuffered_p0_EAX$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [487] L688-->L689: Formula: (= v_~__unbuffered_p0_EAX$w_buff0~0_1 0) InVars {} OutVars{~__unbuffered_p0_EAX$w_buff0~0=v_~__unbuffered_p0_EAX$w_buff0~0_1} AuxVars[] AssignedVars[~__unbuffered_p0_EAX$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [414] L689-->L690: Formula: (= v_~__unbuffered_p0_EAX$w_buff0_used~0_1 0) InVars {} OutVars{~__unbuffered_p0_EAX$w_buff0_used~0=v_~__unbuffered_p0_EAX$w_buff0_used~0_1} AuxVars[] AssignedVars[~__unbuffered_p0_EAX$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [529] L690-->L691: Formula: (= v_~__unbuffered_p0_EAX$w_buff1~0_1 0) InVars {} OutVars{~__unbuffered_p0_EAX$w_buff1~0=v_~__unbuffered_p0_EAX$w_buff1~0_1} AuxVars[] AssignedVars[~__unbuffered_p0_EAX$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [455] L691-->L693: Formula: (= v_~__unbuffered_p0_EAX$w_buff1_used~0_1 0) InVars {} OutVars{~__unbuffered_p0_EAX$w_buff1_used~0=v_~__unbuffered_p0_EAX$w_buff1_used~0_1} AuxVars[] AssignedVars[~__unbuffered_p0_EAX$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [517] L693-->L695: Formula: (= v_~__unbuffered_p1_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 [371] L695-->L696: Formula: (= v_~__unbuffered_p2_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p2_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [493] L696-->L697: Formula: (= v_~main$tmp_guard0~0_3 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 [422] L697-->L699: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [486] L699-->L701: Formula: (= v_~x~0_3 0) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [528] L701-->L703: Formula: (= v_~y~0_3 0) InVars {} OutVars{~y~0=v_~y~0_3} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [402] L703-->L703-1: Formula: (and (not (= 0 |v_~#z~0.base_12|)) (= (store |v_#length_4| |v_~#z~0.base_12| 4) |v_#length_3|) (= |v_#valid_11| (store |v_#valid_12| |v_~#z~0.base_12| 1)) (= 0 (select |v_#valid_12| |v_~#z~0.base_12|)) (= |v_~#z~0.offset_12| 0)) InVars {#length=|v_#length_4|, #valid=|v_#valid_12|} OutVars{~#z~0.base=|v_~#z~0.base_12|, #length=|v_#length_3|, ~#z~0.offset=|v_~#z~0.offset_12|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[~#z~0.base, #valid, #length, ~#z~0.offset] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [376] L703-1-->L703-2: Formula: (= 0 (select (select |v_#memory_int_22| |v_~#z~0.base_13|) |v_~#z~0.offset_13|)) InVars {#memory_int=|v_#memory_int_22|, ~#z~0.base=|v_~#z~0.base_13|, ~#z~0.offset=|v_~#z~0.offset_13|} OutVars{#memory_int=|v_#memory_int_22|, ~#z~0.base=|v_~#z~0.base_13|, ~#z~0.offset=|v_~#z~0.offset_13|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [380] L703-2-->L705: Formula: (= v_~z$flush_delayed~0_5 0) InVars {} OutVars{~z$flush_delayed~0=v_~z$flush_delayed~0_5} AuxVars[] AssignedVars[~z$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0] [?] -1 [448] L705-->L706: Formula: (= v_~z$mem_tmp~0_3 0) InVars {} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_3} AuxVars[] AssignedVars[~z$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0] [?] -1 [370] L706-->L707: Formula: (= v_~z$r_buff0_thd0~0_12 0) InVars {} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_12} AuxVars[] AssignedVars[~z$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0] [?] -1 [492] L707-->L708: Formula: (= v_~z$r_buff0_thd1~0_31 0) InVars {} OutVars{~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_31} AuxVars[] AssignedVars[~z$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0] [?] -1 [421] L708-->L709: Formula: (= v_~z$r_buff0_thd2~0_1 0) InVars {} OutVars{~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_1} AuxVars[] AssignedVars[~z$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0] [?] -1 [367] L709-->L710: Formula: (= v_~z$r_buff0_thd3~0_12 0) InVars {} OutVars{~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_12} AuxVars[] AssignedVars[~z$r_buff0_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0] [?] -1 [485] L710-->L711: Formula: (= v_~z$r_buff1_thd0~0_8 0) InVars {} OutVars{~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_8} AuxVars[] AssignedVars[~z$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0] [?] -1 [412] L711-->L712: Formula: (= v_~z$r_buff1_thd1~0_17 0) InVars {} OutVars{~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_17} AuxVars[] AssignedVars[~z$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0] [?] -1 [527] L712-->L713: Formula: (= v_~z$r_buff1_thd2~0_1 0) InVars {} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_1} AuxVars[] AssignedVars[~z$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0] [?] -1 [453] L713-->L714: Formula: (= v_~z$r_buff1_thd3~0_8 0) InVars {} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_8} AuxVars[] AssignedVars[~z$r_buff1_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0] [?] -1 [401] L714-->L715: Formula: (= v_~z$read_delayed~0_1 0) InVars {} OutVars{~z$read_delayed~0=v_~z$read_delayed~0_1} AuxVars[] AssignedVars[~z$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed~0=0] [?] -1 [513] L715-->L716: Formula: (and (= v_~z$read_delayed_var~0.offset_1 0) (= v_~z$read_delayed_var~0.base_1 0)) InVars {} OutVars{~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_1, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~z$read_delayed_var~0.base, ~z$read_delayed_var~0.offset] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0] [?] -1 [447] L716-->L717: Formula: (= v_~z$w_buff0~0_9 0) InVars {} OutVars{~z$w_buff0~0=v_~z$w_buff0~0_9} AuxVars[] AssignedVars[~z$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0~0=0] [?] -1 [369] L717-->L718: Formula: (= v_~z$w_buff0_used~0_53 0) InVars {} OutVars{~z$w_buff0_used~0=v_~z$w_buff0_used~0_53} AuxVars[] AssignedVars[~z$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0] [?] -1 [490] L718-->L719: Formula: (= v_~z$w_buff1~0_9 0) InVars {} OutVars{~z$w_buff1~0=v_~z$w_buff1~0_9} AuxVars[] AssignedVars[~z$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1~0=0] [?] -1 [443] L719-->L720: Formula: (= v_~z$w_buff1_used~0_31 0) InVars {} OutVars{~z$w_buff1_used~0=v_~z$w_buff1_used~0_31} AuxVars[] AssignedVars[~z$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [366] L720-->L721: Formula: (= v_~weak$$choice0~0_2 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_2} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [483] L721-->L722: Formula: (= v_~weak$$choice1~0_4 0) InVars {} OutVars{~weak$$choice1~0=v_~weak$$choice1~0_4} AuxVars[] AssignedVars[~weak$$choice1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [411] L722-->L-1-1: Formula: (= v_~weak$$choice2~0_14 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_14} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [518] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [512] L-1-2-->L799: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet42=|v_ULTIMATE.start_main_#t~nondet42_2|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_1|, ULTIMATE.start_main_#t~mem43=|v_ULTIMATE.start_main_#t~mem43_3|, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_2|, ULTIMATE.start_main_~#t2700~0.base=|v_ULTIMATE.start_main_~#t2700~0.base_5|, ULTIMATE.start_main_~#t2699~0.offset=|v_ULTIMATE.start_main_~#t2699~0.offset_4|, ULTIMATE.start_main_#t~mem51=|v_ULTIMATE.start_main_#t~mem51_3|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_5|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_5|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_5|, ULTIMATE.start_main_~#t2700~0.offset=|v_ULTIMATE.start_main_~#t2700~0.offset_5|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_5|, ULTIMATE.start_main_#t~nondet50=|v_ULTIMATE.start_main_#t~nondet50_3|, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_5|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_5|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_5|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_5|, ULTIMATE.start_main_~#t2698~0.offset=|v_ULTIMATE.start_main_~#t2698~0.offset_3|, ULTIMATE.start_main_~#t2699~0.base=|v_ULTIMATE.start_main_~#t2699~0.base_4|, ULTIMATE.start_main_~#t2698~0.base=|v_ULTIMATE.start_main_~#t2698~0.base_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet42, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_#t~mem43, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t2700~0.base, ULTIMATE.start_main_~#t2699~0.offset, ULTIMATE.start_main_#t~mem51, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t2700~0.offset, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~nondet50, ULTIMATE.start_main_#t~ite53, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t2698~0.offset, ULTIMATE.start_main_~#t2699~0.base, ULTIMATE.start_main_~#t2698~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [433] L799-->L799-1: Formula: (and (= |v_ULTIMATE.start_main_~#t2698~0.offset_4| 0) (not (= |v_ULTIMATE.start_main_~#t2698~0.base_4| 0)) (= 0 (select |v_#valid_14| |v_ULTIMATE.start_main_~#t2698~0.base_4|)) (= |v_#length_5| (store |v_#length_6| |v_ULTIMATE.start_main_~#t2698~0.base_4| 4)) (= (store |v_#valid_14| |v_ULTIMATE.start_main_~#t2698~0.base_4| 1) |v_#valid_13|)) InVars {#length=|v_#length_6|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_5|, ULTIMATE.start_main_~#t2698~0.offset=|v_ULTIMATE.start_main_~#t2698~0.offset_4|, #valid=|v_#valid_13|, ULTIMATE.start_main_~#t2698~0.base=|v_ULTIMATE.start_main_~#t2698~0.base_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2698~0.offset, #valid, #length, ULTIMATE.start_main_~#t2698~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [404] L799-1-->L800: Formula: (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2698~0.base_5| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2698~0.base_5|) |v_ULTIMATE.start_main_~#t2698~0.offset_5| 0)) |v_#memory_int_23|) InVars {#memory_int=|v_#memory_int_24|, ULTIMATE.start_main_~#t2698~0.offset=|v_ULTIMATE.start_main_~#t2698~0.offset_5|, ULTIMATE.start_main_~#t2698~0.base=|v_ULTIMATE.start_main_~#t2698~0.base_5|} OutVars{#memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t2698~0.offset=|v_ULTIMATE.start_main_~#t2698~0.offset_5|, ULTIMATE.start_main_~#t2698~0.base=|v_ULTIMATE.start_main_~#t2698~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] FORK -1 [633] L800-->P0ENTRY: Formula: (and (= 0 |v_Thread2_P0_#in~arg.base_3|) (= |v_Thread2_P0_#in~arg.offset_3| 0) (= v_Thread2_P0_thidvar0_2 0)) InVars {} OutVars{Thread2_P0_#in~arg.base=|v_Thread2_P0_#in~arg.base_3|, Thread2_P0_thidvar0=v_Thread2_P0_thidvar0_2, Thread2_P0_#in~arg.offset=|v_Thread2_P0_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread2_P0_#in~arg.base, Thread2_P0_thidvar0, Thread2_P0_#in~arg.offset] VAL [Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [360] L800-1-->L801: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40] VAL [Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [470] L801-->L801-1: Formula: (and (= |v_#valid_15| (store |v_#valid_16| |v_ULTIMATE.start_main_~#t2699~0.base_5| 1)) (= |v_ULTIMATE.start_main_~#t2699~0.offset_5| 0) (= |v_#length_7| (store |v_#length_8| |v_ULTIMATE.start_main_~#t2699~0.base_5| 4)) (= (select |v_#valid_16| |v_ULTIMATE.start_main_~#t2699~0.base_5|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t2699~0.base_5|))) InVars {#length=|v_#length_8|, #valid=|v_#valid_16|} OutVars{#length=|v_#length_7|, ULTIMATE.start_main_~#t2699~0.offset=|v_ULTIMATE.start_main_~#t2699~0.offset_5|, ULTIMATE.start_main_~#t2699~0.base=|v_ULTIMATE.start_main_~#t2699~0.base_5|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2699~0.offset, ULTIMATE.start_main_~#t2699~0.base, #valid, #length] VAL [Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [471] L801-1-->L802: Formula: (= (store |v_#memory_int_15| |v_ULTIMATE.start_main_~#t2699~0.base_1| (store (select |v_#memory_int_15| |v_ULTIMATE.start_main_~#t2699~0.base_1|) |v_ULTIMATE.start_main_~#t2699~0.offset_1| 1)) |v_#memory_int_14|) InVars {#memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t2699~0.offset=|v_ULTIMATE.start_main_~#t2699~0.offset_1|, ULTIMATE.start_main_~#t2699~0.base=|v_ULTIMATE.start_main_~#t2699~0.base_1|} OutVars{#memory_int=|v_#memory_int_14|, ULTIMATE.start_main_~#t2699~0.offset=|v_ULTIMATE.start_main_~#t2699~0.offset_1|, ULTIMATE.start_main_~#t2699~0.base=|v_ULTIMATE.start_main_~#t2699~0.base_1|} AuxVars[] AssignedVars[#memory_int] VAL [Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] FORK -1 [631] L802-->P1ENTRY: Formula: (and (= 0 |v_Thread0_P1_#in~arg.offset_3|) (= 1 v_Thread0_P1_thidvar0_2) (= 0 |v_Thread0_P1_#in~arg.base_3|)) InVars {} OutVars{Thread0_P1_thidvar0=v_Thread0_P1_thidvar0_2, Thread0_P1_#in~arg.base=|v_Thread0_P1_#in~arg.base_3|, Thread0_P1_#in~arg.offset=|v_Thread0_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P1_thidvar0, Thread0_P1_#in~arg.base, Thread0_P1_#in~arg.offset] VAL [Thread0_P1_thidvar0=1, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [394] L802-1-->L803: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41] VAL [Thread0_P1_thidvar0=1, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [538] P0ENTRY-->L730: Formula: (and (= v_Thread2_P0_~arg.base_1 |v_Thread2_P0_#in~arg.base_1|) (= v_Thread2_P0_~arg.offset_1 |v_Thread2_P0_#in~arg.offset_1|) (= v_~weak$$choice0~0_1 |v_Thread2_P0_#t~nondet3_1|) (= v_~weak$$choice2~0_1 |v_Thread2_P0_#t~nondet4_1|) (= (select (select |v_#memory_int_1| |v_~#z~0.base_1|) |v_~#z~0.offset_1|) v_~z$mem_tmp~0_1) (= v_~z$flush_delayed~0_1 v_~weak$$choice2~0_1)) InVars {~#z~0.base=|v_~#z~0.base_1|, Thread2_P0_#t~nondet4=|v_Thread2_P0_#t~nondet4_1|, Thread2_P0_#t~nondet3=|v_Thread2_P0_#t~nondet3_1|, Thread2_P0_#in~arg.base=|v_Thread2_P0_#in~arg.base_1|, #memory_int=|v_#memory_int_1|, Thread2_P0_#in~arg.offset=|v_Thread2_P0_#in~arg.offset_1|, ~#z~0.offset=|v_~#z~0.offset_1|} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_1, ~#z~0.base=|v_~#z~0.base_1|, Thread2_P0_#in~arg.base=|v_Thread2_P0_#in~arg.base_1|, Thread2_P0_~arg.offset=v_Thread2_P0_~arg.offset_1, ~z$flush_delayed~0=v_~z$flush_delayed~0_1, Thread2_P0_#in~arg.offset=|v_Thread2_P0_#in~arg.offset_1|, ~#z~0.offset=|v_~#z~0.offset_1|, ~weak$$choice0~0=v_~weak$$choice0~0_1, Thread2_P0_#t~nondet4=|v_Thread2_P0_#t~nondet4_2|, Thread2_P0_#t~nondet3=|v_Thread2_P0_#t~nondet3_2|, Thread2_P0_#t~mem5=|v_Thread2_P0_#t~mem5_1|, Thread2_P0_~arg.base=v_Thread2_P0_~arg.base_1, #memory_int=|v_#memory_int_1|, ~weak$$choice2~0=v_~weak$$choice2~0_1} AuxVars[] AssignedVars[~z$mem_tmp~0, ~weak$$choice0~0, Thread2_P0_#t~nondet4, Thread2_P0_#t~nondet3, Thread2_P0_~arg.offset, Thread2_P0_#t~mem5, Thread2_P0_~arg.base, ~z$flush_delayed~0, ~weak$$choice2~0] VAL [Thread0_P1_thidvar0=1, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [507] L803-->L803-1: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t2700~0.offset_1|) (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t2700~0.base_1| 1) |v_#valid_1|) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t2700~0.base_1|) 0) (= |v_#length_1| (store |v_#length_2| |v_ULTIMATE.start_main_~#t2700~0.base_1| 4)) (not (= |v_ULTIMATE.start_main_~#t2700~0.base_1| 0))) InVars {#length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{ULTIMATE.start_main_~#t2700~0.offset=|v_ULTIMATE.start_main_~#t2700~0.offset_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t2700~0.base=|v_ULTIMATE.start_main_~#t2700~0.base_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2700~0.base, #valid, ULTIMATE.start_main_~#t2700~0.offset, #length] VAL [Thread0_P1_thidvar0=1, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [539] L730-->L730-5: Formula: (and (= (select (select |v_#memory_int_2| |v_~#z~0.base_2|) |v_~#z~0.offset_2|) |v_Thread2_P0_#t~mem6_1|) (= |v_Thread2_P0_#t~ite8_1| |v_Thread2_P0_#t~mem6_1|) (let ((.cse0 (= (mod v_~z$r_buff0_thd1~0_2 256) 0))) (or (and .cse0 (= (mod v_~z$w_buff1_used~0_2 256) 0)) (= (mod v_~z$w_buff0_used~0_2 256) 0) (and .cse0 (= 0 (mod v_~z$r_buff1_thd1~0_2 256)))))) InVars {~#z~0.base=|v_~#z~0.base_2|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_2, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_2, #memory_int=|v_#memory_int_2|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_2, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_2, ~#z~0.offset=|v_~#z~0.offset_2|} OutVars{~#z~0.base=|v_~#z~0.base_2|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_2, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_2, Thread2_P0_#t~mem6=|v_Thread2_P0_#t~mem6_1|, Thread2_P0_#t~ite8=|v_Thread2_P0_#t~ite8_1|, #memory_int=|v_#memory_int_2|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_2, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_2, ~#z~0.offset=|v_~#z~0.offset_2|} AuxVars[] AssignedVars[Thread2_P0_#t~mem6, Thread2_P0_#t~ite8] VAL [Thread0_P1_thidvar0=1, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |Thread2_P0_#t~ite8|=0, |Thread2_P0_#t~mem6|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [509] L803-1-->L804: Formula: (= (store |v_#memory_int_17| |v_ULTIMATE.start_main_~#t2700~0.base_2| (store (select |v_#memory_int_17| |v_ULTIMATE.start_main_~#t2700~0.base_2|) |v_ULTIMATE.start_main_~#t2700~0.offset_2| 2)) |v_#memory_int_16|) InVars {#memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t2700~0.offset=|v_ULTIMATE.start_main_~#t2700~0.offset_2|, ULTIMATE.start_main_~#t2700~0.base=|v_ULTIMATE.start_main_~#t2700~0.base_2|} OutVars{#memory_int=|v_#memory_int_16|, ULTIMATE.start_main_~#t2700~0.offset=|v_ULTIMATE.start_main_~#t2700~0.offset_2|, ULTIMATE.start_main_~#t2700~0.base=|v_ULTIMATE.start_main_~#t2700~0.base_2|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P1_thidvar0=1, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |Thread2_P0_#t~ite8|=0, |Thread2_P0_#t~mem6|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] FORK -1 [632] L804-->P2ENTRY: Formula: (and (= |v_Thread1_P2_#in~arg.offset_3| 0) (= 2 v_Thread1_P2_thidvar0_2) (= 0 |v_Thread1_P2_#in~arg.base_3|)) InVars {} OutVars{Thread1_P2_#in~arg.base=|v_Thread1_P2_#in~arg.base_3|, Thread1_P2_thidvar0=v_Thread1_P2_thidvar0_2, Thread1_P2_#in~arg.offset=|v_Thread1_P2_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread1_P2_#in~arg.base, Thread1_P2_thidvar0, Thread1_P2_#in~arg.offset] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |Thread2_P0_#t~ite8|=0, |Thread2_P0_#t~mem6|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [541] L730-5-->L731: Formula: (= |v_#memory_int_4| (store |v_#memory_int_5| |v_~#z~0.base_4| (store (select |v_#memory_int_5| |v_~#z~0.base_4|) |v_~#z~0.offset_4| |v_Thread2_P0_#t~ite8_2|))) InVars {#memory_int=|v_#memory_int_5|, Thread2_P0_#t~ite8=|v_Thread2_P0_#t~ite8_2|, ~#z~0.base=|v_~#z~0.base_4|, ~#z~0.offset=|v_~#z~0.offset_4|} OutVars{~#z~0.base=|v_~#z~0.base_4|, Thread2_P0_#t~mem6=|v_Thread2_P0_#t~mem6_2|, Thread2_P0_#t~ite8=|v_Thread2_P0_#t~ite8_3|, #memory_int=|v_#memory_int_4|, ~#z~0.offset=|v_~#z~0.offset_4|, Thread2_P0_#t~ite7=|v_Thread2_P0_#t~ite7_1|} AuxVars[] AssignedVars[Thread2_P0_#t~mem6, Thread2_P0_#t~ite8, #memory_int, Thread2_P0_#t~ite7] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [544] L731-->L731-8: Formula: (and (not (= (mod v_~weak$$choice2~0_2 256) 0)) (= |v_Thread2_P0_#t~ite11_1| v_~z$w_buff0~0_2)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_2, ~z$w_buff0~0=v_~z$w_buff0~0_2} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_2, ~z$w_buff0~0=v_~z$w_buff0~0_2, Thread2_P0_#t~ite11=|v_Thread2_P0_#t~ite11_1|} AuxVars[] AssignedVars[Thread2_P0_#t~ite11] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |Thread2_P0_#t~ite11|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [547] L731-8-->L732: Formula: (= v_~z$w_buff0~0_6 |v_Thread2_P0_#t~ite11_2|) InVars {Thread2_P0_#t~ite11=|v_Thread2_P0_#t~ite11_2|} OutVars{Thread2_P0_#t~ite9=|v_Thread2_P0_#t~ite9_1|, Thread2_P0_#t~ite10=|v_Thread2_P0_#t~ite10_1|, ~z$w_buff0~0=v_~z$w_buff0~0_6, Thread2_P0_#t~ite11=|v_Thread2_P0_#t~ite11_3|} AuxVars[] AssignedVars[Thread2_P0_#t~ite10, ~z$w_buff0~0, Thread2_P0_#t~ite11, Thread2_P0_#t~ite9] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [550] L732-->L732-8: Formula: (and (= |v_Thread2_P0_#t~ite14_1| v_~z$w_buff1~0_2) (not (= 0 (mod v_~weak$$choice2~0_4 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_4, ~z$w_buff1~0=v_~z$w_buff1~0_2} OutVars{Thread2_P0_#t~ite14=|v_Thread2_P0_#t~ite14_1|, ~z$w_buff1~0=v_~z$w_buff1~0_2, ~weak$$choice2~0=v_~weak$$choice2~0_4} AuxVars[] AssignedVars[Thread2_P0_#t~ite14] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |Thread2_P0_#t~ite14|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [555] L732-8-->L733: Formula: (= v_~z$w_buff1~0_6 |v_Thread2_P0_#t~ite14_2|) InVars {Thread2_P0_#t~ite14=|v_Thread2_P0_#t~ite14_2|} OutVars{Thread2_P0_#t~ite14=|v_Thread2_P0_#t~ite14_3|, Thread2_P0_#t~ite13=|v_Thread2_P0_#t~ite13_1|, ~z$w_buff1~0=v_~z$w_buff1~0_6, Thread2_P0_#t~ite12=|v_Thread2_P0_#t~ite12_1|} AuxVars[] AssignedVars[Thread2_P0_#t~ite12, Thread2_P0_#t~ite14, Thread2_P0_#t~ite13, ~z$w_buff1~0] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [559] L733-->L733-8: Formula: (and (= |v_Thread2_P0_#t~ite17_1| v_~z$w_buff0_used~0_16) (not (= (mod v_~weak$$choice2~0_6 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_6, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_16} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_6, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_16, Thread2_P0_#t~ite17=|v_Thread2_P0_#t~ite17_1|} AuxVars[] AssignedVars[Thread2_P0_#t~ite17] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |Thread2_P0_#t~ite17|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [564] L733-8-->L734: Formula: (= v_~z$w_buff0_used~0_21 |v_Thread2_P0_#t~ite17_2|) InVars {Thread2_P0_#t~ite17=|v_Thread2_P0_#t~ite17_2|} OutVars{Thread2_P0_#t~ite16=|v_Thread2_P0_#t~ite16_1|, Thread2_P0_#t~ite15=|v_Thread2_P0_#t~ite15_1|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_21, Thread2_P0_#t~ite17=|v_Thread2_P0_#t~ite17_3|} AuxVars[] AssignedVars[~z$w_buff0_used~0, Thread2_P0_#t~ite16, Thread2_P0_#t~ite15, Thread2_P0_#t~ite17] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [568] L734-->L734-8: Formula: (and (not (= (mod v_~weak$$choice2~0_8 256) 0)) (= |v_Thread2_P0_#t~ite20_1| v_~z$w_buff1_used~0_10)) InVars {~z$w_buff1_used~0=v_~z$w_buff1_used~0_10, ~weak$$choice2~0=v_~weak$$choice2~0_8} OutVars{~z$w_buff1_used~0=v_~z$w_buff1_used~0_10, ~weak$$choice2~0=v_~weak$$choice2~0_8, Thread2_P0_#t~ite20=|v_Thread2_P0_#t~ite20_1|} AuxVars[] AssignedVars[Thread2_P0_#t~ite20] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |Thread2_P0_#t~ite20|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [573] L734-8-->L735: Formula: (= v_~z$w_buff1_used~0_13 |v_Thread2_P0_#t~ite20_2|) InVars {Thread2_P0_#t~ite20=|v_Thread2_P0_#t~ite20_2|} OutVars{~z$w_buff1_used~0=v_~z$w_buff1_used~0_13, Thread2_P0_#t~ite18=|v_Thread2_P0_#t~ite18_1|, Thread2_P0_#t~ite20=|v_Thread2_P0_#t~ite20_3|, Thread2_P0_#t~ite19=|v_Thread2_P0_#t~ite19_1|} AuxVars[] AssignedVars[Thread2_P0_#t~ite20, ~z$w_buff1_used~0, Thread2_P0_#t~ite18, Thread2_P0_#t~ite19] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [577] L735-->L735-8: Formula: (and (not (= (mod v_~weak$$choice2~0_10 256) 0)) (= |v_Thread2_P0_#t~ite23_1| v_~z$r_buff0_thd1~0_24)) InVars {~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_24, ~weak$$choice2~0=v_~weak$$choice2~0_10} OutVars{~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_24, ~weak$$choice2~0=v_~weak$$choice2~0_10, Thread2_P0_#t~ite23=|v_Thread2_P0_#t~ite23_1|} AuxVars[] AssignedVars[Thread2_P0_#t~ite23] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |Thread2_P0_#t~ite23|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [582] L735-8-->L736: Formula: (= v_~z$r_buff0_thd1~0_29 |v_Thread2_P0_#t~ite23_2|) InVars {Thread2_P0_#t~ite23=|v_Thread2_P0_#t~ite23_2|} OutVars{Thread2_P0_#t~ite22=|v_Thread2_P0_#t~ite22_1|, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_29, Thread2_P0_#t~ite23=|v_Thread2_P0_#t~ite23_3|, Thread2_P0_#t~ite21=|v_Thread2_P0_#t~ite21_1|} AuxVars[] AssignedVars[Thread2_P0_#t~ite22, Thread2_P0_#t~ite23, Thread2_P0_#t~ite21, ~z$r_buff0_thd1~0] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [586] L736-->L736-8: Formula: (and (not (= (mod v_~weak$$choice2~0_12 256) 0)) (= |v_Thread2_P0_#t~ite26_1| v_~z$r_buff1_thd1~0_15)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_12, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15} OutVars{Thread2_P0_#t~ite26=|v_Thread2_P0_#t~ite26_1|, ~weak$$choice2~0=v_~weak$$choice2~0_12, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15} AuxVars[] AssignedVars[Thread2_P0_#t~ite26] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |Thread2_P0_#t~ite26|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [591] L736-8-->L740: Formula: (and (= v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_1 |v_~#z~0.offset_3|) (= v_~__unbuffered_p0_EAX$read_delayed~0_1 1) (= v_~__unbuffered_p0_EAX~0_1 (select (select |v_#memory_int_3| |v_~#z~0.base_3|) |v_~#z~0.offset_3|)) (= v_~z$r_buff1_thd1~0_4 |v_Thread2_P0_#t~ite26_2|) (= v_~__unbuffered_p0_EAX$read_delayed_var~0.base_1 |v_~#z~0.base_3|)) InVars {#memory_int=|v_#memory_int_3|, Thread2_P0_#t~ite26=|v_Thread2_P0_#t~ite26_2|, ~#z~0.base=|v_~#z~0.base_3|, ~#z~0.offset=|v_~#z~0.offset_3|} OutVars{~#z~0.base=|v_~#z~0.base_3|, ~#z~0.offset=|v_~#z~0.offset_3|, ~__unbuffered_p0_EAX$read_delayed_var~0.base=v_~__unbuffered_p0_EAX$read_delayed_var~0.base_1, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_1, Thread2_P0_#t~mem27=|v_Thread2_P0_#t~mem27_1|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_4, Thread2_P0_#t~ite26=|v_Thread2_P0_#t~ite26_3|, #memory_int=|v_#memory_int_3|, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_1, Thread2_P0_#t~ite24=|v_Thread2_P0_#t~ite24_1|, Thread2_P0_#t~ite25=|v_Thread2_P0_#t~ite25_1|, ~__unbuffered_p0_EAX$read_delayed~0=v_~__unbuffered_p0_EAX$read_delayed~0_1} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, Thread2_P0_#t~mem27, ~z$r_buff1_thd1~0, Thread2_P0_#t~ite26, ~__unbuffered_p0_EAX$read_delayed_var~0.offset, Thread2_P0_#t~ite24, Thread2_P0_#t~ite25, ~__unbuffered_p0_EAX$read_delayed~0, ~__unbuffered_p0_EAX$read_delayed_var~0.base] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [595] L740-->L740-2: Formula: (and (= |v_Thread2_P0_#t~ite29_1| v_~z$mem_tmp~0_2) (not (= (mod v_~z$flush_delayed~0_2 256) 0))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_2, ~z$flush_delayed~0=v_~z$flush_delayed~0_2} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_2, ~z$flush_delayed~0=v_~z$flush_delayed~0_2, Thread2_P0_#t~ite29=|v_Thread2_P0_#t~ite29_1|} AuxVars[] AssignedVars[Thread2_P0_#t~ite29] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |Thread2_P0_#t~ite29|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 [600] L740-2-->L751: Formula: (and (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~z$flush_delayed~0_4 0) (= v_~x~0_1 1) (= (store |v_#memory_int_8| |v_~#z~0.base_6| (store (select |v_#memory_int_8| |v_~#z~0.base_6|) |v_~#z~0.offset_6| |v_Thread2_P0_#t~ite29_3|)) |v_#memory_int_7|)) InVars {#memory_int=|v_#memory_int_8|, ~#z~0.base=|v_~#z~0.base_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2, ~#z~0.offset=|v_~#z~0.offset_6|, Thread2_P0_#t~ite29=|v_Thread2_P0_#t~ite29_3|} OutVars{~#z~0.base=|v_~#z~0.base_6|, Thread2_P0_#t~mem28=|v_Thread2_P0_#t~mem28_2|, #memory_int=|v_#memory_int_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, ~z$flush_delayed~0=v_~z$flush_delayed~0_4, ~x~0=v_~x~0_1, ~#z~0.offset=|v_~#z~0.offset_6|, Thread2_P0_#t~ite29=|v_Thread2_P0_#t~ite29_4|} AuxVars[] AssignedVars[Thread2_P0_#t~mem28, #memory_int, ~__unbuffered_cnt~0, ~z$flush_delayed~0, ~x~0, Thread2_P0_#t~ite29] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 1 [605] P1ENTRY-->L766: Formula: (and (= v_Thread0_P1_~arg.offset_1 |v_Thread0_P1_#in~arg.offset_1|) (= v_Thread0_P1_~arg.base_1 |v_Thread0_P1_#in~arg.base_1|) (= v_~__unbuffered_p1_EAX~0_1 v_~x~0_2) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1)) (= v_~y~0_1 1)) InVars {Thread0_P1_#in~arg.base=|v_Thread0_P1_#in~arg.base_1|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4, ~x~0=v_~x~0_2, Thread0_P1_#in~arg.offset=|v_Thread0_P1_#in~arg.offset_1|} OutVars{Thread0_P1_#in~arg.base=|v_Thread0_P1_#in~arg.base_1|, Thread0_P1_~arg.offset=v_Thread0_P1_~arg.offset_1, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_1, Thread0_P1_~arg.base=v_Thread0_P1_~arg.base_1, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, ~y~0=v_~y~0_1, ~x~0=v_~x~0_2, Thread0_P1_#in~arg.offset=|v_Thread0_P1_#in~arg.offset_1|} AuxVars[] AssignedVars[Thread0_P1_~arg.offset, ~__unbuffered_p1_EAX~0, Thread0_P1_~arg.base, ~__unbuffered_cnt~0, ~y~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 [609] P2ENTRY-->L777: Formula: (and (= v_~__unbuffered_p2_EAX~0_1 v_~y~0_2) (= v_Thread1_P2_~arg.offset_1 |v_Thread1_P2_#in~arg.offset_1|) (= v_Thread1_P2_~arg.base_1 |v_Thread1_P2_#in~arg.base_1|) (= (store |v_#memory_int_13| |v_~#z~0.base_9| (store (select |v_#memory_int_13| |v_~#z~0.base_9|) |v_~#z~0.offset_9| 1)) |v_#memory_int_12|)) InVars {Thread1_P2_#in~arg.base=|v_Thread1_P2_#in~arg.base_1|, ~#z~0.base=|v_~#z~0.base_9|, #memory_int=|v_#memory_int_13|, ~y~0=v_~y~0_2, Thread1_P2_#in~arg.offset=|v_Thread1_P2_#in~arg.offset_1|, ~#z~0.offset=|v_~#z~0.offset_9|} OutVars{Thread1_P2_#in~arg.base=|v_Thread1_P2_#in~arg.base_1|, ~#z~0.base=|v_~#z~0.base_9|, Thread1_P2_~arg.offset=v_Thread1_P2_~arg.offset_1, Thread1_P2_~arg.base=v_Thread1_P2_~arg.base_1, #memory_int=|v_#memory_int_12|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_1, ~y~0=v_~y~0_2, Thread1_P2_#in~arg.offset=|v_Thread1_P2_#in~arg.offset_1|, ~#z~0.offset=|v_~#z~0.offset_9|} AuxVars[] AssignedVars[Thread1_P2_~arg.offset, Thread1_P2_~arg.base, #memory_int, ~__unbuffered_p2_EAX~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 [611] L777-->L777-2: Formula: (or (= 0 (mod v_~z$r_buff0_thd3~0_1 256)) (= 0 (mod v_~z$w_buff0_used~0_31 256))) InVars {~z$w_buff0_used~0=v_~z$w_buff0_used~0_31, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_1} OutVars{~z$w_buff0_used~0=v_~z$w_buff0_used~0_31, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_1} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 [614] L777-2-->L777-4: Formula: (and (or (= (mod v_~z$w_buff1_used~0_20 256) 0) (= 0 (mod v_~z$r_buff1_thd3~0_4 256))) (= |v_Thread1_P2_#t~ite33_3| |v_Thread1_P2_#t~mem32_2|) (= (select (select |v_#memory_int_9| |v_~#z~0.base_7|) |v_~#z~0.offset_7|) |v_Thread1_P2_#t~mem32_2|)) InVars {#memory_int=|v_#memory_int_9|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_20, ~#z~0.base=|v_~#z~0.base_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_4, ~#z~0.offset=|v_~#z~0.offset_7|} OutVars{Thread1_P2_#t~mem32=|v_Thread1_P2_#t~mem32_2|, ~#z~0.base=|v_~#z~0.base_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_4, #memory_int=|v_#memory_int_9|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_20, Thread1_P2_#t~ite33=|v_Thread1_P2_#t~ite33_3|, ~#z~0.offset=|v_~#z~0.offset_7|} AuxVars[] AssignedVars[Thread1_P2_#t~mem32, Thread1_P2_#t~ite33] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite33|=1, |Thread1_P2_#t~mem32|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 [617] L777-4-->L777-5: Formula: (= |v_Thread1_P2_#t~ite34_4| |v_Thread1_P2_#t~ite33_4|) InVars {Thread1_P2_#t~ite33=|v_Thread1_P2_#t~ite33_4|} OutVars{Thread1_P2_#t~ite34=|v_Thread1_P2_#t~ite34_4|, Thread1_P2_#t~ite33=|v_Thread1_P2_#t~ite33_4|} AuxVars[] AssignedVars[Thread1_P2_#t~ite34] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite33|=1, |Thread1_P2_#t~ite34|=1, |Thread1_P2_#t~mem32|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 [612] L777-5-->L778: Formula: (= (store |v_#memory_int_11| |v_~#z~0.base_8| (store (select |v_#memory_int_11| |v_~#z~0.base_8|) |v_~#z~0.offset_8| |v_Thread1_P2_#t~ite34_2|)) |v_#memory_int_10|) InVars {#memory_int=|v_#memory_int_11|, Thread1_P2_#t~ite34=|v_Thread1_P2_#t~ite34_2|, ~#z~0.base=|v_~#z~0.base_8|, ~#z~0.offset=|v_~#z~0.offset_8|} OutVars{Thread1_P2_#t~mem32=|v_Thread1_P2_#t~mem32_1|, ~#z~0.base=|v_~#z~0.base_8|, Thread1_P2_#t~ite34=|v_Thread1_P2_#t~ite34_3|, #memory_int=|v_#memory_int_10|, Thread1_P2_#t~ite33=|v_Thread1_P2_#t~ite33_1|, ~#z~0.offset=|v_~#z~0.offset_8|} AuxVars[] AssignedVars[Thread1_P2_#t~mem32, Thread1_P2_#t~ite34, #memory_int, Thread1_P2_#t~ite33] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 [616] L778-->L778-2: Formula: (and (or (= 0 (mod v_~z$r_buff0_thd3~0_5 256)) (= (mod v_~z$w_buff0_used~0_35 256) 0)) (= |v_Thread1_P2_#t~ite35_2| v_~z$w_buff0_used~0_35)) InVars {~z$w_buff0_used~0=v_~z$w_buff0_used~0_35, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_5} OutVars{~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_5, Thread1_P2_#t~ite35=|v_Thread1_P2_#t~ite35_2|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_35} AuxVars[] AssignedVars[Thread1_P2_#t~ite35] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite35|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 [618] L778-2-->L779: Formula: (= v_~z$w_buff0_used~0_36 |v_Thread1_P2_#t~ite35_3|) InVars {Thread1_P2_#t~ite35=|v_Thread1_P2_#t~ite35_3|} OutVars{~z$w_buff0_used~0=v_~z$w_buff0_used~0_36, Thread1_P2_#t~ite35=|v_Thread1_P2_#t~ite35_4|} AuxVars[] AssignedVars[~z$w_buff0_used~0, Thread1_P2_#t~ite35] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 [620] L779-->L779-2: Formula: (and (= |v_Thread1_P2_#t~ite36_2| v_~z$w_buff1_used~0_22) (or (= 0 (mod v_~z$r_buff1_thd3~0_7 256)) (= 0 (mod v_~z$w_buff1_used~0_22 256))) (or (= (mod v_~z$r_buff0_thd3~0_7 256) 0) (= (mod v_~z$w_buff0_used~0_38 256) 0))) InVars {~z$w_buff1_used~0=v_~z$w_buff1_used~0_22, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_7, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_38, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_7} OutVars{~z$w_buff1_used~0=v_~z$w_buff1_used~0_22, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_7, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_38, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_7, Thread1_P2_#t~ite36=|v_Thread1_P2_#t~ite36_2|} AuxVars[] AssignedVars[Thread1_P2_#t~ite36] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite36|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 [621] L779-2-->L780: Formula: (= v_~z$w_buff1_used~0_23 |v_Thread1_P2_#t~ite36_3|) InVars {Thread1_P2_#t~ite36=|v_Thread1_P2_#t~ite36_3|} OutVars{~z$w_buff1_used~0=v_~z$w_buff1_used~0_23, Thread1_P2_#t~ite36=|v_Thread1_P2_#t~ite36_4|} AuxVars[] AssignedVars[~z$w_buff1_used~0, Thread1_P2_#t~ite36] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 [623] L780-->L780-2: Formula: (and (= |v_Thread1_P2_#t~ite37_2| v_~z$r_buff0_thd3~0_9) (or (= 0 (mod v_~z$r_buff0_thd3~0_9 256)) (= 0 (mod v_~z$w_buff0_used~0_40 256)))) InVars {~z$w_buff0_used~0=v_~z$w_buff0_used~0_40, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_9} OutVars{~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_9, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_40, Thread1_P2_#t~ite37=|v_Thread1_P2_#t~ite37_2|} AuxVars[] AssignedVars[Thread1_P2_#t~ite37] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite37|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 [624] L780-2-->L781: Formula: (= v_~z$r_buff0_thd3~0_11 |v_Thread1_P2_#t~ite37_3|) InVars {Thread1_P2_#t~ite37=|v_Thread1_P2_#t~ite37_3|} OutVars{~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_11, Thread1_P2_#t~ite37=|v_Thread1_P2_#t~ite37_4|} AuxVars[] AssignedVars[~z$r_buff0_thd3~0, Thread1_P2_#t~ite37] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 [626] L781-->L781-2: Formula: (and (or (= (mod v_~z$r_buff1_thd3~0_3 256) 0) (= 0 (mod v_~z$w_buff1_used~0_19 256))) (or (= 0 (mod v_~z$r_buff0_thd3~0_3 256)) (= (mod v_~z$w_buff0_used~0_33 256) 0)) (= |v_Thread1_P2_#t~ite38_2| v_~z$r_buff1_thd3~0_3)) InVars {~z$w_buff1_used~0=v_~z$w_buff1_used~0_19, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_3, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_33, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_3} OutVars{~z$w_buff1_used~0=v_~z$w_buff1_used~0_19, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_3, Thread1_P2_#t~ite38=|v_Thread1_P2_#t~ite38_2|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_33, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_3} AuxVars[] AssignedVars[Thread1_P2_#t~ite38] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite38|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 [627] L781-2-->L786: Formula: (and (= v_~z$r_buff1_thd3~0_5 |v_Thread1_P2_#t~ite38_3|) (= v_~__unbuffered_cnt~0_5 (+ v_~__unbuffered_cnt~0_6 1))) InVars {Thread1_P2_#t~ite38=|v_Thread1_P2_#t~ite38_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5, Thread1_P2_#t~ite38=|v_Thread1_P2_#t~ite38_4|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_5} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, Thread1_P2_#t~ite38] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [446] L804-1-->L808: Formula: (= v_~main$tmp_guard0~0_1 (ite (= (ite (= v_~__unbuffered_cnt~0_7 3) 1 0) 0) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_7} OutVars{ULTIMATE.start_main_#t~nondet42=|v_ULTIMATE.start_main_#t~nondet42_1|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_7, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_1} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet42, ~main$tmp_guard0~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [363] L808-->L810: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_2 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [432] L810-->L810-2: Formula: (or (= 0 (mod v_~z$w_buff0_used~0_43 256)) (= (mod v_~z$r_buff0_thd0~0_2 256) 0)) InVars {~z$w_buff0_used~0=v_~z$w_buff0_used~0_43, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_2} OutVars{~z$w_buff0_used~0=v_~z$w_buff0_used~0_43, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_2} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [409] L810-2-->L810-4: Formula: (and (or (= 0 (mod v_~z$r_buff1_thd0~0_2 256)) (= 0 (mod v_~z$w_buff1_used~0_25 256))) (= |v_ULTIMATE.start_main_#t~ite44_2| |v_ULTIMATE.start_main_#t~mem43_1|) (= |v_ULTIMATE.start_main_#t~mem43_1| (select (select |v_#memory_int_18| |v_~#z~0.base_10|) |v_~#z~0.offset_10|))) InVars {#memory_int=|v_#memory_int_18|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_25, ~#z~0.base=|v_~#z~0.base_10|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_2, ~#z~0.offset=|v_~#z~0.offset_10|} OutVars{~#z~0.base=|v_~#z~0.base_10|, ULTIMATE.start_main_#t~mem43=|v_ULTIMATE.start_main_#t~mem43_1|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_2, #memory_int=|v_#memory_int_18|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_25, ~#z~0.offset=|v_~#z~0.offset_10|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem43, ULTIMATE.start_main_#t~ite44] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite44|=1, |ULTIMATE.start_main_#t~mem43|=1, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [417] L810-4-->L810-5: Formula: (= |v_ULTIMATE.start_main_#t~ite45_2| |v_ULTIMATE.start_main_#t~ite44_3|) InVars {ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_3|} OutVars{ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_2|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite44|=1, |ULTIMATE.start_main_#t~ite45|=1, |ULTIMATE.start_main_#t~mem43|=1, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [418] L810-5-->L811: Formula: (= (store |v_#memory_int_20| |v_~#z~0.base_11| (store (select |v_#memory_int_20| |v_~#z~0.base_11|) |v_~#z~0.offset_11| |v_ULTIMATE.start_main_#t~ite45_4|)) |v_#memory_int_19|) InVars {#memory_int=|v_#memory_int_20|, ~#z~0.base=|v_~#z~0.base_11|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_4|, ~#z~0.offset=|v_~#z~0.offset_11|} OutVars{~#z~0.base=|v_~#z~0.base_11|, ULTIMATE.start_main_#t~mem43=|v_ULTIMATE.start_main_#t~mem43_2|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_3|, ~#z~0.offset=|v_~#z~0.offset_11|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem43, #memory_int, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [355] L811-->L811-2: Formula: (and (or (= 0 (mod v_~z$w_buff0_used~0_45 256)) (= (mod v_~z$r_buff0_thd0~0_4 256) 0)) (= |v_ULTIMATE.start_main_#t~ite46_2| v_~z$w_buff0_used~0_45)) InVars {~z$w_buff0_used~0=v_~z$w_buff0_used~0_45, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_4} OutVars{ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_2|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_4, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_45} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite46|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [522] L811-2-->L812: Formula: (= v_~z$w_buff0_used~0_46 |v_ULTIMATE.start_main_#t~ite46_4|) InVars {ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_4|} OutVars{~z$w_buff0_used~0=v_~z$w_buff0_used~0_46, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_3|} AuxVars[] AssignedVars[~z$w_buff0_used~0, ULTIMATE.start_main_#t~ite46] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [469] L812-->L812-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite47_2| v_~z$w_buff1_used~0_27) (or (= (mod v_~z$r_buff1_thd0~0_4 256) 0) (= (mod v_~z$w_buff1_used~0_27 256) 0)) (or (= 0 (mod v_~z$r_buff0_thd0~0_6 256)) (= 0 (mod v_~z$w_buff0_used~0_48 256)))) InVars {~z$w_buff1_used~0=v_~z$w_buff1_used~0_27, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_6, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_48, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_4} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_2|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_27, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_6, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_48, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_4} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite47|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [476] L812-2-->L813: Formula: (= v_~z$w_buff1_used~0_28 |v_ULTIMATE.start_main_#t~ite47_4|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_4|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_3|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_28} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ~z$w_buff1_used~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [389] L813-->L813-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite48_2| v_~z$r_buff0_thd0~0_8) (or (= 0 (mod v_~z$w_buff0_used~0_50 256)) (= 0 (mod v_~z$r_buff0_thd0~0_8 256)))) InVars {~z$w_buff0_used~0=v_~z$w_buff0_used~0_50, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_8} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_8, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_2|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_50} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite48] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [396] L813-2-->L814: Formula: (= v_~z$r_buff0_thd0~0_9 |v_ULTIMATE.start_main_#t~ite48_4|) InVars {ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_4|} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_9, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_3|} AuxVars[] AssignedVars[~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite48] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [506] L814-->L814-2: Formula: (and (or (= 0 (mod v_~z$w_buff0_used~0_52 256)) (= (mod v_~z$r_buff0_thd0~0_11 256) 0)) (or (= (mod v_~z$w_buff1_used~0_30 256) 0) (= 0 (mod v_~z$r_buff1_thd0~0_6 256))) (= |v_ULTIMATE.start_main_#t~ite49_2| v_~z$r_buff1_thd0~0_6)) InVars {~z$w_buff1_used~0=v_~z$w_buff1_used~0_30, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_11, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_52, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_6} OutVars{~z$w_buff1_used~0=v_~z$w_buff1_used~0_30, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_11, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_2|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_52, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite49|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [510] L814-2-->L818: Formula: (and (= v_~z$r_buff1_thd0~0_7 |v_ULTIMATE.start_main_#t~ite49_4|) (= v_~weak$$choice1~0_1 |v_ULTIMATE.start_main_#t~nondet50_2|)) InVars {ULTIMATE.start_main_#t~nondet50=|v_ULTIMATE.start_main_#t~nondet50_2|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_4|} OutVars{~weak$$choice1~0=v_~weak$$choice1~0_1, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_3|, ULTIMATE.start_main_#t~nondet50=|v_ULTIMATE.start_main_#t~nondet50_1|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_7} AuxVars[] AssignedVars[~weak$$choice1~0, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~nondet50] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [436] L818-->L818-1: Formula: (not (= (mod v_~__unbuffered_p0_EAX$read_delayed~0_2 256) 0)) InVars {~__unbuffered_p0_EAX$read_delayed~0=v_~__unbuffered_p0_EAX$read_delayed~0_2} OutVars{~__unbuffered_p0_EAX$read_delayed~0=v_~__unbuffered_p0_EAX$read_delayed~0_2} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [440] L818-1-->L818-3: Formula: (and (= |v_ULTIMATE.start_main_#t~ite52_1| |v_ULTIMATE.start_main_#t~mem51_1|) (not (= 0 (mod v_~weak$$choice1~0_2 256))) (= |v_ULTIMATE.start_main_#t~mem51_1| (select (select |v_#memory_int_21| v_~__unbuffered_p0_EAX$read_delayed_var~0.base_2) v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_2))) InVars {~__unbuffered_p0_EAX$read_delayed_var~0.offset=v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_2, #memory_int=|v_#memory_int_21|, ~weak$$choice1~0=v_~weak$$choice1~0_2, ~__unbuffered_p0_EAX$read_delayed_var~0.base=v_~__unbuffered_p0_EAX$read_delayed_var~0.base_2} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_1|, ~weak$$choice1~0=v_~weak$$choice1~0_2, ULTIMATE.start_main_#t~mem51=|v_ULTIMATE.start_main_#t~mem51_1|, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_2, #memory_int=|v_#memory_int_21|, ~__unbuffered_p0_EAX$read_delayed_var~0.base=v_~__unbuffered_p0_EAX$read_delayed_var~0.base_2} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_#t~mem51] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite52|=1, |ULTIMATE.start_main_#t~mem51|=1, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [444] L818-3-->L818-5: Formula: (= |v_ULTIMATE.start_main_#t~ite53_1| |v_ULTIMATE.start_main_#t~ite52_3|) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_3|} OutVars{ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_1|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite53] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite52|=1, |ULTIMATE.start_main_#t~ite53|=1, |ULTIMATE.start_main_#t~mem51|=1, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [425] L818-5-->L821: Formula: (and (= v_~main$tmp_guard1~0_1 (ite (= (ite (not (and (= v_~__unbuffered_p0_EAX~0_4 1) (= 1 v_~__unbuffered_p1_EAX~0_2) (= v_~__unbuffered_p2_EAX~0_2 1))) 1 0) 0) 0 1)) (= v_~__unbuffered_p0_EAX~0_4 |v_ULTIMATE.start_main_#t~ite53_4|)) InVars {~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_4|} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_4, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_4|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ULTIMATE.start_main_#t~mem51=|v_ULTIMATE.start_main_#t~mem51_2|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_2, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_3|} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_#t~mem51, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite53] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [430] L821-->L821-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [403] L821-1-->L5: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [491] L5-->L5-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [502] L5-1-->L5-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 [500] L5-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call ~#z~0.base, ~#z~0.offset := #Ultimate.alloc(4); srcloc: L703 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#z~0.base, ~#z~0.offset, 4); srcloc: L703-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~z$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0] [?] -1 ~z$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0] [?] -1 ~z$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0] [?] -1 ~z$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0] [?] -1 ~z$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0] [?] -1 ~z$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0] [?] -1 ~z$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0] [?] -1 ~z$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0] [?] -1 ~z$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0] [?] -1 ~z$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0] [?] -1 ~z$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed~0=0] [?] -1 ~z$read_delayed_var~0.base, ~z$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0] [?] -1 ~z$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0~0=0] [?] -1 ~z$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0] [?] -1 ~z$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1~0=0] [?] -1 ~z$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 ~weak$$choice1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~nondet42, main_#t~ite45, main_#t~ite44, main_#t~mem43, main_#t~ite46, main_#t~ite47, main_#t~ite48, main_#t~ite49, main_#t~nondet50, main_#t~ite53, main_#t~ite52, main_#t~mem51, main_~#t2698~0.base, main_~#t2698~0.offset, main_~#t2699~0.base, main_~#t2699~0.offset, main_~#t2700~0.base, main_~#t2700~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 SUMMARY for call main_~#t2698~0.base, main_~#t2698~0.offset := #Ultimate.alloc(4); srcloc: L799 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t2698~0.base, main_~#t2698~0.offset, 4); srcloc: L799-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#t~nondet40; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 SUMMARY for call main_~#t2699~0.base, main_~#t2699~0.offset := #Ultimate.alloc(4); srcloc: L801 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t2699~0.base, main_~#t2699~0.offset, 4); srcloc: L801-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#t~nondet41; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~weak$$choice0~0 := #t~nondet3;havoc #t~nondet3;~weak$$choice2~0 := #t~nondet4;havoc #t~nondet4;~z$flush_delayed~0 := ~weak$$choice2~0;call #t~mem5 := read~int(~#z~0.base, ~#z~0.offset, 4);~z$mem_tmp~0 := #t~mem5;havoc #t~mem5; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 SUMMARY for call main_~#t2700~0.base, main_~#t2700~0.offset := #Ultimate.alloc(4); srcloc: L803 VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 assume (0 == ~z$w_buff0_used~0 % 256 || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$w_buff1_used~0 % 256)) || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$r_buff1_thd1~0 % 256);call #t~mem6 := read~int(~#z~0.base, ~#z~0.offset, 4);#t~ite8 := #t~mem6; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P0_#t~mem6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t2700~0.base, main_~#t2700~0.offset, 4); srcloc: L803-1 VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P0_#t~mem6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P0_#t~mem6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 call write~int(#t~ite8, ~#z~0.base, ~#z~0.offset, 4);havoc #t~ite8;havoc #t~ite7;havoc #t~mem6; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite11 := ~z$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite11|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 ~z$w_buff0~0 := #t~ite11;havoc #t~ite9;havoc #t~ite11;havoc #t~ite10; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite14 := ~z$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite14|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 ~z$w_buff1~0 := #t~ite14;havoc #t~ite13;havoc #t~ite12;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite17 := ~z$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite17|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 ~z$w_buff0_used~0 := #t~ite17;havoc #t~ite15;havoc #t~ite16;havoc #t~ite17; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite20 := ~z$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite20|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 ~z$w_buff1_used~0 := #t~ite20;havoc #t~ite19;havoc #t~ite20;havoc #t~ite18; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite23 := ~z$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite23|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 ~z$r_buff0_thd1~0 := #t~ite23;havoc #t~ite23;havoc #t~ite22;havoc #t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite26 := ~z$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite26|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 ~z$r_buff1_thd1~0 := #t~ite26;havoc #t~ite24;havoc #t~ite25;havoc #t~ite26;~__unbuffered_p0_EAX$read_delayed~0 := 1;~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$read_delayed_var~0.offset := ~#z~0.base, ~#z~0.offset;call #t~mem27 := read~int(~#z~0.base, ~#z~0.offset, 4);~__unbuffered_p0_EAX~0 := #t~mem27;havoc #t~mem27; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 assume 0 != ~z$flush_delayed~0 % 256;#t~ite29 := ~z$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite29|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 call write~int(#t~ite29, ~#z~0.base, ~#z~0.offset, 4);havoc #t~mem28;havoc #t~ite29;~z$flush_delayed~0 := 0;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~__unbuffered_p1_EAX~0 := ~x~0;~y~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~__unbuffered_p2_EAX~0 := ~y~0;call write~int(1, ~#z~0.base, ~#z~0.offset, 4); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 assume !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256);call #t~mem32 := read~int(~#z~0.base, ~#z~0.offset, 4);#t~ite33 := #t~mem32; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite33|=1, |P2_#t~mem32|=1, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 #t~ite34 := #t~ite33; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite33|=1, |P2_#t~ite34|=1, |P2_#t~mem32|=1, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 call write~int(#t~ite34, ~#z~0.base, ~#z~0.offset, 4);havoc #t~ite34;havoc #t~ite33;havoc #t~mem32; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256);#t~ite35 := ~z$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite35|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 ~z$w_buff0_used~0 := #t~ite35;havoc #t~ite35; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256));#t~ite36 := ~z$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite36|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 ~z$w_buff1_used~0 := #t~ite36;havoc #t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256);#t~ite37 := ~z$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite37|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 ~z$r_buff0_thd3~0 := #t~ite37;havoc #t~ite37; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256));#t~ite38 := ~z$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite38|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 ~z$r_buff1_thd3~0 := #t~ite38;havoc #t~ite38;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#t~nondet42;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256);call main_#t~mem43 := read~int(~#z~0.base, ~#z~0.offset, 4);main_#t~ite44 := main_#t~mem43; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite44|=1, |ULTIMATE.start_main_#t~mem43|=1, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 main_#t~ite45 := main_#t~ite44; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite44|=1, |ULTIMATE.start_main_#t~ite45|=1, |ULTIMATE.start_main_#t~mem43|=1, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 call write~int(main_#t~ite45, ~#z~0.base, ~#z~0.offset, 4);havoc main_#t~ite45;havoc main_#t~mem43;havoc main_#t~ite44; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256);main_#t~ite46 := ~z$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite46|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 ~z$w_buff0_used~0 := main_#t~ite46;havoc main_#t~ite46; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256));main_#t~ite47 := ~z$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite47|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 ~z$w_buff1_used~0 := main_#t~ite47;havoc main_#t~ite47; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256);main_#t~ite48 := ~z$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 ~z$r_buff0_thd0~0 := main_#t~ite48;havoc main_#t~ite48; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256));main_#t~ite49 := ~z$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite49|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 ~z$r_buff1_thd0~0 := main_#t~ite49;havoc main_#t~ite49;~weak$$choice1~0 := main_#t~nondet50;havoc main_#t~nondet50; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume 0 != ~__unbuffered_p0_EAX$read_delayed~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume 0 != ~weak$$choice1~0 % 256;call main_#t~mem51 := read~int(~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$read_delayed_var~0.offset, 4);main_#t~ite52 := main_#t~mem51; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite52|=1, |ULTIMATE.start_main_#t~mem51|=1, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 main_#t~ite53 := main_#t~ite52; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite52|=1, |ULTIMATE.start_main_#t~ite53|=1, |ULTIMATE.start_main_#t~mem51|=1, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := main_#t~ite53;havoc main_#t~ite52;havoc main_#t~mem51;havoc main_#t~ite53;~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EAX$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call ~#z~0.base, ~#z~0.offset := #Ultimate.alloc(4); srcloc: L703 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#z~0.base, ~#z~0.offset, 4); srcloc: L703-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~z$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0] [?] -1 ~z$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0] [?] -1 ~z$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0] [?] -1 ~z$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0] [?] -1 ~z$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0] [?] -1 ~z$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0] [?] -1 ~z$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0] [?] -1 ~z$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0] [?] -1 ~z$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0] [?] -1 ~z$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0] [?] -1 ~z$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed~0=0] [?] -1 ~z$read_delayed_var~0.base, ~z$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0] [?] -1 ~z$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0~0=0] [?] -1 ~z$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0] [?] -1 ~z$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1~0=0] [?] -1 ~z$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 ~weak$$choice1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~nondet42, main_#t~ite45, main_#t~ite44, main_#t~mem43, main_#t~ite46, main_#t~ite47, main_#t~ite48, main_#t~ite49, main_#t~nondet50, main_#t~ite53, main_#t~ite52, main_#t~mem51, main_~#t2698~0.base, main_~#t2698~0.offset, main_~#t2699~0.base, main_~#t2699~0.offset, main_~#t2700~0.base, main_~#t2700~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 SUMMARY for call main_~#t2698~0.base, main_~#t2698~0.offset := #Ultimate.alloc(4); srcloc: L799 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t2698~0.base, main_~#t2698~0.offset, 4); srcloc: L799-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#t~nondet40; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 SUMMARY for call main_~#t2699~0.base, main_~#t2699~0.offset := #Ultimate.alloc(4); srcloc: L801 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t2699~0.base, main_~#t2699~0.offset, 4); srcloc: L801-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#t~nondet41; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~weak$$choice0~0 := #t~nondet3;havoc #t~nondet3;~weak$$choice2~0 := #t~nondet4;havoc #t~nondet4;~z$flush_delayed~0 := ~weak$$choice2~0;call #t~mem5 := read~int(~#z~0.base, ~#z~0.offset, 4);~z$mem_tmp~0 := #t~mem5;havoc #t~mem5; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 SUMMARY for call main_~#t2700~0.base, main_~#t2700~0.offset := #Ultimate.alloc(4); srcloc: L803 VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 assume (0 == ~z$w_buff0_used~0 % 256 || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$w_buff1_used~0 % 256)) || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$r_buff1_thd1~0 % 256);call #t~mem6 := read~int(~#z~0.base, ~#z~0.offset, 4);#t~ite8 := #t~mem6; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P0_#t~mem6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t2700~0.base, main_~#t2700~0.offset, 4); srcloc: L803-1 VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P0_#t~mem6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P0_#t~mem6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 call write~int(#t~ite8, ~#z~0.base, ~#z~0.offset, 4);havoc #t~ite8;havoc #t~ite7;havoc #t~mem6; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite11 := ~z$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite11|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 ~z$w_buff0~0 := #t~ite11;havoc #t~ite9;havoc #t~ite11;havoc #t~ite10; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite14 := ~z$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite14|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 ~z$w_buff1~0 := #t~ite14;havoc #t~ite13;havoc #t~ite12;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite17 := ~z$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite17|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 ~z$w_buff0_used~0 := #t~ite17;havoc #t~ite15;havoc #t~ite16;havoc #t~ite17; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite20 := ~z$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite20|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 ~z$w_buff1_used~0 := #t~ite20;havoc #t~ite19;havoc #t~ite20;havoc #t~ite18; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite23 := ~z$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite23|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 ~z$r_buff0_thd1~0 := #t~ite23;havoc #t~ite23;havoc #t~ite22;havoc #t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite26 := ~z$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite26|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 ~z$r_buff1_thd1~0 := #t~ite26;havoc #t~ite24;havoc #t~ite25;havoc #t~ite26;~__unbuffered_p0_EAX$read_delayed~0 := 1;~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$read_delayed_var~0.offset := ~#z~0.base, ~#z~0.offset;call #t~mem27 := read~int(~#z~0.base, ~#z~0.offset, 4);~__unbuffered_p0_EAX~0 := #t~mem27;havoc #t~mem27; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 assume 0 != ~z$flush_delayed~0 % 256;#t~ite29 := ~z$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite29|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 0 call write~int(#t~ite29, ~#z~0.base, ~#z~0.offset, 4);havoc #t~mem28;havoc #t~ite29;~z$flush_delayed~0 := 0;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~__unbuffered_p1_EAX~0 := ~x~0;~y~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~__unbuffered_p2_EAX~0 := ~y~0;call write~int(1, ~#z~0.base, ~#z~0.offset, 4); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 assume !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256);call #t~mem32 := read~int(~#z~0.base, ~#z~0.offset, 4);#t~ite33 := #t~mem32; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite33|=1, |P2_#t~mem32|=1, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 #t~ite34 := #t~ite33; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite33|=1, |P2_#t~ite34|=1, |P2_#t~mem32|=1, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 call write~int(#t~ite34, ~#z~0.base, ~#z~0.offset, 4);havoc #t~ite34;havoc #t~ite33;havoc #t~mem32; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256);#t~ite35 := ~z$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite35|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 ~z$w_buff0_used~0 := #t~ite35;havoc #t~ite35; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256));#t~ite36 := ~z$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite36|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 ~z$w_buff1_used~0 := #t~ite36;havoc #t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256);#t~ite37 := ~z$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite37|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 ~z$r_buff0_thd3~0 := #t~ite37;havoc #t~ite37; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256));#t~ite38 := ~z$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite38|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] 2 ~z$r_buff1_thd3~0 := #t~ite38;havoc #t~ite38;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#t~nondet42;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256);call main_#t~mem43 := read~int(~#z~0.base, ~#z~0.offset, 4);main_#t~ite44 := main_#t~mem43; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite44|=1, |ULTIMATE.start_main_#t~mem43|=1, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 main_#t~ite45 := main_#t~ite44; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite44|=1, |ULTIMATE.start_main_#t~ite45|=1, |ULTIMATE.start_main_#t~mem43|=1, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 call write~int(main_#t~ite45, ~#z~0.base, ~#z~0.offset, 4);havoc main_#t~ite45;havoc main_#t~mem43;havoc main_#t~ite44; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256);main_#t~ite46 := ~z$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite46|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 ~z$w_buff0_used~0 := main_#t~ite46;havoc main_#t~ite46; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256));main_#t~ite47 := ~z$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite47|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 ~z$w_buff1_used~0 := main_#t~ite47;havoc main_#t~ite47; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256);main_#t~ite48 := ~z$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 ~z$r_buff0_thd0~0 := main_#t~ite48;havoc main_#t~ite48; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256));main_#t~ite49 := ~z$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite49|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 ~z$r_buff1_thd0~0 := main_#t~ite49;havoc main_#t~ite49;~weak$$choice1~0 := main_#t~nondet50;havoc main_#t~nondet50; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume 0 != ~__unbuffered_p0_EAX$read_delayed~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume 0 != ~weak$$choice1~0 % 256;call main_#t~mem51 := read~int(~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$read_delayed_var~0.offset, 4);main_#t~ite52 := main_#t~mem51; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite52|=1, |ULTIMATE.start_main_#t~mem51|=1, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 main_#t~ite53 := main_#t~ite52; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite52|=1, |ULTIMATE.start_main_#t~ite53|=1, |ULTIMATE.start_main_#t~mem51|=1, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := main_#t~ite53;havoc main_#t~ite52;havoc main_#t~mem51;havoc main_#t~ite53;~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2698~0.base|=260, |ULTIMATE.start_main_~#t2698~0.offset|=0, |ULTIMATE.start_main_~#t2699~0.base|=261, |ULTIMATE.start_main_~#t2699~0.offset|=0, |ULTIMATE.start_main_~#t2700~0.base|=259, |ULTIMATE.start_main_~#t2700~0.offset|=0, |~#z~0.base|=262, |~#z~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L673] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L675] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EAX$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L677] -1 ~__unbuffered_p0_EAX$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX~0=0] [L678] -1 ~__unbuffered_p0_EAX$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [L679] -1 ~__unbuffered_p0_EAX$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [L680] -1 ~__unbuffered_p0_EAX$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [L681] -1 ~__unbuffered_p0_EAX$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [L682] -1 ~__unbuffered_p0_EAX$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [L683] -1 ~__unbuffered_p0_EAX$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [L684] -1 ~__unbuffered_p0_EAX$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [L685] -1 ~__unbuffered_p0_EAX$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [L686] -1 ~__unbuffered_p0_EAX$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L687] -1 ~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L688] -1 ~__unbuffered_p0_EAX$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [L689] -1 ~__unbuffered_p0_EAX$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [L690] -1 ~__unbuffered_p0_EAX$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [L691] -1 ~__unbuffered_p0_EAX$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [L693] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L695] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L696] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L697] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L699] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L703] -1 call ~#z~0.base, ~#z~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L703] -1 call write~init~int(0, ~#z~0.base, ~#z~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L704] -1 ~z$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0] [L705] -1 ~z$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0] [L706] -1 ~z$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0] [L707] -1 ~z$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0] [L708] -1 ~z$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0] [L709] -1 ~z$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0] [L710] -1 ~z$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0] [L711] -1 ~z$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0] [L712] -1 ~z$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0] [L713] -1 ~z$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0] [L714] -1 ~z$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed~0=0] [L715] -1 ~z$read_delayed_var~0.base, ~z$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0] [L716] -1 ~z$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0~0=0] [L717] -1 ~z$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0] [L718] -1 ~z$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1~0=0] [L719] -1 ~z$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L720] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L721] -1 ~weak$$choice1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L722] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~nondet42, main_#t~ite45, main_#t~ite44, main_#t~mem43, main_#t~ite46, main_#t~ite47, main_#t~ite48, main_#t~ite49, main_#t~nondet50, main_#t~ite53, main_#t~ite52, main_#t~mem51, main_~#t2698~0.base, main_~#t2698~0.offset, main_~#t2699~0.base, main_~#t2699~0.offset, main_~#t2700~0.base, main_~#t2700~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L799] -1 call main_~#t2698~0.base, main_~#t2698~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] -1 call write~int(0, main_~#t2698~0.base, main_~#t2698~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] -1 havoc main_#t~nondet40; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L801] -1 call main_~#t2699~0.base, main_~#t2699~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] -1 call write~int(1, main_~#t2699~0.base, main_~#t2699~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] -1 havoc main_#t~nondet41; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L723-L752] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L726] 0 ~weak$$choice0~0 := #t~nondet3; [L726] 0 havoc #t~nondet3; [L727] 0 ~weak$$choice2~0 := #t~nondet4; [L727] 0 havoc #t~nondet4; [L728] 0 ~z$flush_delayed~0 := ~weak$$choice2~0; [L729] 0 call #t~mem5 := read~int(~#z~0.base, ~#z~0.offset, 4); [L729] 0 ~z$mem_tmp~0 := #t~mem5; [L729] 0 havoc #t~mem5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L803] -1 call main_~#t2700~0.base, main_~#t2700~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L730] 0 assume (0 == ~z$w_buff0_used~0 % 256 || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$w_buff1_used~0 % 256)) || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$r_buff1_thd1~0 % 256); [L730] 0 call #t~mem6 := read~int(~#z~0.base, ~#z~0.offset, 4); [L730] 0 #t~ite8 := #t~mem6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, #t~mem6=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] -1 call write~int(2, main_~#t2700~0.base, main_~#t2700~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, #t~mem6=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, #t~mem6=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L730] 0 call write~int(#t~ite8, ~#z~0.base, ~#z~0.offset, 4); [L730] 0 havoc #t~ite8; [L730] 0 havoc #t~ite7; [L730] 0 havoc #t~mem6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L731] 0 assume 0 != ~weak$$choice2~0 % 256; [L731] 0 #t~ite11 := ~z$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite11=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L731] 0 ~z$w_buff0~0 := #t~ite11; [L731] 0 havoc #t~ite9; [L731] 0 havoc #t~ite11; [L731] 0 havoc #t~ite10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L732] 0 assume 0 != ~weak$$choice2~0 % 256; [L732] 0 #t~ite14 := ~z$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L732] 0 ~z$w_buff1~0 := #t~ite14; [L732] 0 havoc #t~ite13; [L732] 0 havoc #t~ite12; [L732] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L733] 0 assume 0 != ~weak$$choice2~0 % 256; [L733] 0 #t~ite17 := ~z$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite17=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L733] 0 ~z$w_buff0_used~0 := #t~ite17; [L733] 0 havoc #t~ite15; [L733] 0 havoc #t~ite16; [L733] 0 havoc #t~ite17; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L734] 0 assume 0 != ~weak$$choice2~0 % 256; [L734] 0 #t~ite20 := ~z$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite20=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L734] 0 ~z$w_buff1_used~0 := #t~ite20; [L734] 0 havoc #t~ite19; [L734] 0 havoc #t~ite20; [L734] 0 havoc #t~ite18; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L735] 0 assume 0 != ~weak$$choice2~0 % 256; [L735] 0 #t~ite23 := ~z$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite23=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L735] 0 ~z$r_buff0_thd1~0 := #t~ite23; [L735] 0 havoc #t~ite23; [L735] 0 havoc #t~ite22; [L735] 0 havoc #t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L736] 0 assume 0 != ~weak$$choice2~0 % 256; [L736] 0 #t~ite26 := ~z$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite26=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L736] 0 ~z$r_buff1_thd1~0 := #t~ite26; [L736] 0 havoc #t~ite24; [L736] 0 havoc #t~ite25; [L736] 0 havoc #t~ite26; [L737] 0 ~__unbuffered_p0_EAX$read_delayed~0 := 1; [L738] 0 ~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$read_delayed_var~0.offset := ~#z~0.base, ~#z~0.offset; [L739] 0 call #t~mem27 := read~int(~#z~0.base, ~#z~0.offset, 4); [L739] 0 ~__unbuffered_p0_EAX~0 := #t~mem27; [L739] 0 havoc #t~mem27; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L740] 0 assume 0 != ~z$flush_delayed~0 % 256; [L740] 0 #t~ite29 := ~z$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L740] 0 call write~int(#t~ite29, ~#z~0.base, ~#z~0.offset, 4); [L740] 0 havoc #t~mem28; [L740] 0 havoc #t~ite29; [L741] 0 ~z$flush_delayed~0 := 0; [L744] 0 ~x~0 := 1; [L749] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L753-L767] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L756] 1 ~__unbuffered_p1_EAX~0 := ~x~0; [L759] 1 ~y~0 := 1; [L764] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L768-L787] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L771] 2 ~__unbuffered_p2_EAX~0 := ~y~0; [L774] 2 call write~int(1, ~#z~0.base, ~#z~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] 2 assume !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256); [L777] 2 call #t~mem32 := read~int(~#z~0.base, ~#z~0.offset, 4); [L777] 2 #t~ite33 := #t~mem32; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=1, #t~mem32=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] 2 #t~ite34 := #t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=1, #t~ite34=1, #t~mem32=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] 2 call write~int(#t~ite34, ~#z~0.base, ~#z~0.offset, 4); [L777] 2 havoc #t~ite34; [L777] 2 havoc #t~ite33; [L777] 2 havoc #t~mem32; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L778] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256); [L778] 2 #t~ite35 := ~z$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite35=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L778] 2 ~z$w_buff0_used~0 := #t~ite35; [L778] 2 havoc #t~ite35; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L779] 2 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256)); [L779] 2 #t~ite36 := ~z$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L779] 2 ~z$w_buff1_used~0 := #t~ite36; [L779] 2 havoc #t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L780] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256); [L780] 2 #t~ite37 := ~z$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite37=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L780] 2 ~z$r_buff0_thd3~0 := #t~ite37; [L780] 2 havoc #t~ite37; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L781] 2 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256)); [L781] 2 #t~ite38 := ~z$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite38=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L781] 2 ~z$r_buff1_thd3~0 := #t~ite38; [L781] 2 havoc #t~ite38; [L784] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] -1 havoc main_#t~nondet42; [L806] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L808] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 assume !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256); [L810] -1 call main_#t~mem43 := read~int(~#z~0.base, ~#z~0.offset, 4); [L810] -1 main_#t~ite44 := main_#t~mem43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite44=1, main_#t~mem43=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 main_#t~ite45 := main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite44=1, main_#t~ite45=1, main_#t~mem43=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 call write~int(main_#t~ite45, ~#z~0.base, ~#z~0.offset, 4); [L810] -1 havoc main_#t~ite45; [L810] -1 havoc main_#t~mem43; [L810] -1 havoc main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L811] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256); [L811] -1 main_#t~ite46 := ~z$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite46=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L811] -1 ~z$w_buff0_used~0 := main_#t~ite46; [L811] -1 havoc main_#t~ite46; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L812] -1 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256)); [L812] -1 main_#t~ite47 := ~z$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite47=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L812] -1 ~z$w_buff1_used~0 := main_#t~ite47; [L812] -1 havoc main_#t~ite47; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L813] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256); [L813] -1 main_#t~ite48 := ~z$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite48=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L813] -1 ~z$r_buff0_thd0~0 := main_#t~ite48; [L813] -1 havoc main_#t~ite48; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L814] -1 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256)); [L814] -1 main_#t~ite49 := ~z$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite49=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L814] -1 ~z$r_buff1_thd0~0 := main_#t~ite49; [L814] -1 havoc main_#t~ite49; [L817] -1 ~weak$$choice1~0 := main_#t~nondet50; [L817] -1 havoc main_#t~nondet50; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 assume 0 != ~__unbuffered_p0_EAX$read_delayed~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 assume 0 != ~weak$$choice1~0 % 256; [L818] -1 call main_#t~mem51 := read~int(~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$read_delayed_var~0.offset, 4); [L818] -1 main_#t~ite52 := main_#t~mem51; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite52=1, main_#t~mem51=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 main_#t~ite53 := main_#t~ite52; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite52=1, main_#t~ite53=1, main_#t~mem51=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 ~__unbuffered_p0_EAX~0 := main_#t~ite53; [L818] -1 havoc main_#t~ite52; [L818] -1 havoc main_#t~mem51; [L818] -1 havoc main_#t~ite53; [L819] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L821] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L821] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L673] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L675] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EAX$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L677] -1 ~__unbuffered_p0_EAX$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX~0=0] [L678] -1 ~__unbuffered_p0_EAX$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [L679] -1 ~__unbuffered_p0_EAX$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [L680] -1 ~__unbuffered_p0_EAX$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [L681] -1 ~__unbuffered_p0_EAX$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [L682] -1 ~__unbuffered_p0_EAX$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [L683] -1 ~__unbuffered_p0_EAX$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [L684] -1 ~__unbuffered_p0_EAX$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [L685] -1 ~__unbuffered_p0_EAX$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [L686] -1 ~__unbuffered_p0_EAX$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L687] -1 ~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L688] -1 ~__unbuffered_p0_EAX$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [L689] -1 ~__unbuffered_p0_EAX$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [L690] -1 ~__unbuffered_p0_EAX$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [L691] -1 ~__unbuffered_p0_EAX$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [L693] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L695] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L696] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L697] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L699] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L703] -1 call ~#z~0.base, ~#z~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L703] -1 call write~init~int(0, ~#z~0.base, ~#z~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L704] -1 ~z$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0] [L705] -1 ~z$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0] [L706] -1 ~z$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0] [L707] -1 ~z$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0] [L708] -1 ~z$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0] [L709] -1 ~z$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0] [L710] -1 ~z$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0] [L711] -1 ~z$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0] [L712] -1 ~z$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0] [L713] -1 ~z$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0] [L714] -1 ~z$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed~0=0] [L715] -1 ~z$read_delayed_var~0.base, ~z$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0] [L716] -1 ~z$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0~0=0] [L717] -1 ~z$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0] [L718] -1 ~z$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1~0=0] [L719] -1 ~z$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L720] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L721] -1 ~weak$$choice1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L722] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~nondet42, main_#t~ite45, main_#t~ite44, main_#t~mem43, main_#t~ite46, main_#t~ite47, main_#t~ite48, main_#t~ite49, main_#t~nondet50, main_#t~ite53, main_#t~ite52, main_#t~mem51, main_~#t2698~0.base, main_~#t2698~0.offset, main_~#t2699~0.base, main_~#t2699~0.offset, main_~#t2700~0.base, main_~#t2700~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L799] -1 call main_~#t2698~0.base, main_~#t2698~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] -1 call write~int(0, main_~#t2698~0.base, main_~#t2698~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] -1 havoc main_#t~nondet40; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L801] -1 call main_~#t2699~0.base, main_~#t2699~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] -1 call write~int(1, main_~#t2699~0.base, main_~#t2699~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] -1 havoc main_#t~nondet41; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L723-L752] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L726] 0 ~weak$$choice0~0 := #t~nondet3; [L726] 0 havoc #t~nondet3; [L727] 0 ~weak$$choice2~0 := #t~nondet4; [L727] 0 havoc #t~nondet4; [L728] 0 ~z$flush_delayed~0 := ~weak$$choice2~0; [L729] 0 call #t~mem5 := read~int(~#z~0.base, ~#z~0.offset, 4); [L729] 0 ~z$mem_tmp~0 := #t~mem5; [L729] 0 havoc #t~mem5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L803] -1 call main_~#t2700~0.base, main_~#t2700~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L730] 0 assume (0 == ~z$w_buff0_used~0 % 256 || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$w_buff1_used~0 % 256)) || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$r_buff1_thd1~0 % 256); [L730] 0 call #t~mem6 := read~int(~#z~0.base, ~#z~0.offset, 4); [L730] 0 #t~ite8 := #t~mem6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, #t~mem6=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] -1 call write~int(2, main_~#t2700~0.base, main_~#t2700~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, #t~mem6=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, #t~mem6=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L730] 0 call write~int(#t~ite8, ~#z~0.base, ~#z~0.offset, 4); [L730] 0 havoc #t~ite8; [L730] 0 havoc #t~ite7; [L730] 0 havoc #t~mem6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L731] 0 assume 0 != ~weak$$choice2~0 % 256; [L731] 0 #t~ite11 := ~z$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite11=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L731] 0 ~z$w_buff0~0 := #t~ite11; [L731] 0 havoc #t~ite9; [L731] 0 havoc #t~ite11; [L731] 0 havoc #t~ite10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L732] 0 assume 0 != ~weak$$choice2~0 % 256; [L732] 0 #t~ite14 := ~z$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L732] 0 ~z$w_buff1~0 := #t~ite14; [L732] 0 havoc #t~ite13; [L732] 0 havoc #t~ite12; [L732] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L733] 0 assume 0 != ~weak$$choice2~0 % 256; [L733] 0 #t~ite17 := ~z$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite17=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L733] 0 ~z$w_buff0_used~0 := #t~ite17; [L733] 0 havoc #t~ite15; [L733] 0 havoc #t~ite16; [L733] 0 havoc #t~ite17; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L734] 0 assume 0 != ~weak$$choice2~0 % 256; [L734] 0 #t~ite20 := ~z$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite20=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L734] 0 ~z$w_buff1_used~0 := #t~ite20; [L734] 0 havoc #t~ite19; [L734] 0 havoc #t~ite20; [L734] 0 havoc #t~ite18; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L735] 0 assume 0 != ~weak$$choice2~0 % 256; [L735] 0 #t~ite23 := ~z$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite23=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L735] 0 ~z$r_buff0_thd1~0 := #t~ite23; [L735] 0 havoc #t~ite23; [L735] 0 havoc #t~ite22; [L735] 0 havoc #t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L736] 0 assume 0 != ~weak$$choice2~0 % 256; [L736] 0 #t~ite26 := ~z$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite26=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L736] 0 ~z$r_buff1_thd1~0 := #t~ite26; [L736] 0 havoc #t~ite24; [L736] 0 havoc #t~ite25; [L736] 0 havoc #t~ite26; [L737] 0 ~__unbuffered_p0_EAX$read_delayed~0 := 1; [L738] 0 ~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$read_delayed_var~0.offset := ~#z~0.base, ~#z~0.offset; [L739] 0 call #t~mem27 := read~int(~#z~0.base, ~#z~0.offset, 4); [L739] 0 ~__unbuffered_p0_EAX~0 := #t~mem27; [L739] 0 havoc #t~mem27; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L740] 0 assume 0 != ~z$flush_delayed~0 % 256; [L740] 0 #t~ite29 := ~z$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L740] 0 call write~int(#t~ite29, ~#z~0.base, ~#z~0.offset, 4); [L740] 0 havoc #t~mem28; [L740] 0 havoc #t~ite29; [L741] 0 ~z$flush_delayed~0 := 0; [L744] 0 ~x~0 := 1; [L749] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L753-L767] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L756] 1 ~__unbuffered_p1_EAX~0 := ~x~0; [L759] 1 ~y~0 := 1; [L764] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L768-L787] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L771] 2 ~__unbuffered_p2_EAX~0 := ~y~0; [L774] 2 call write~int(1, ~#z~0.base, ~#z~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] 2 assume !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256); [L777] 2 call #t~mem32 := read~int(~#z~0.base, ~#z~0.offset, 4); [L777] 2 #t~ite33 := #t~mem32; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=1, #t~mem32=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] 2 #t~ite34 := #t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=1, #t~ite34=1, #t~mem32=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] 2 call write~int(#t~ite34, ~#z~0.base, ~#z~0.offset, 4); [L777] 2 havoc #t~ite34; [L777] 2 havoc #t~ite33; [L777] 2 havoc #t~mem32; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L778] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256); [L778] 2 #t~ite35 := ~z$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite35=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L778] 2 ~z$w_buff0_used~0 := #t~ite35; [L778] 2 havoc #t~ite35; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L779] 2 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256)); [L779] 2 #t~ite36 := ~z$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L779] 2 ~z$w_buff1_used~0 := #t~ite36; [L779] 2 havoc #t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L780] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256); [L780] 2 #t~ite37 := ~z$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite37=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L780] 2 ~z$r_buff0_thd3~0 := #t~ite37; [L780] 2 havoc #t~ite37; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L781] 2 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256)); [L781] 2 #t~ite38 := ~z$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite38=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L781] 2 ~z$r_buff1_thd3~0 := #t~ite38; [L781] 2 havoc #t~ite38; [L784] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] -1 havoc main_#t~nondet42; [L806] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L808] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 assume !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256); [L810] -1 call main_#t~mem43 := read~int(~#z~0.base, ~#z~0.offset, 4); [L810] -1 main_#t~ite44 := main_#t~mem43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite44=1, main_#t~mem43=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 main_#t~ite45 := main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite44=1, main_#t~ite45=1, main_#t~mem43=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 call write~int(main_#t~ite45, ~#z~0.base, ~#z~0.offset, 4); [L810] -1 havoc main_#t~ite45; [L810] -1 havoc main_#t~mem43; [L810] -1 havoc main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L811] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256); [L811] -1 main_#t~ite46 := ~z$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite46=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L811] -1 ~z$w_buff0_used~0 := main_#t~ite46; [L811] -1 havoc main_#t~ite46; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L812] -1 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256)); [L812] -1 main_#t~ite47 := ~z$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite47=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L812] -1 ~z$w_buff1_used~0 := main_#t~ite47; [L812] -1 havoc main_#t~ite47; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L813] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256); [L813] -1 main_#t~ite48 := ~z$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite48=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L813] -1 ~z$r_buff0_thd0~0 := main_#t~ite48; [L813] -1 havoc main_#t~ite48; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L814] -1 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256)); [L814] -1 main_#t~ite49 := ~z$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite49=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L814] -1 ~z$r_buff1_thd0~0 := main_#t~ite49; [L814] -1 havoc main_#t~ite49; [L817] -1 ~weak$$choice1~0 := main_#t~nondet50; [L817] -1 havoc main_#t~nondet50; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 assume 0 != ~__unbuffered_p0_EAX$read_delayed~0 % 256; WARNING: YOUR LOGFILE WAS TOO LONG, SOME LINES IN THE MIDDLE WERE REMOVED. [L777] 2 call write~int(#t~ite34, ~#z~0.base, ~#z~0.offset, 4); [L777] 2 havoc #t~ite34; [L777] 2 havoc #t~ite33; [L777] 2 havoc #t~mem32; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L778] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256); [L778] 2 #t~ite35 := ~z$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite35=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L778] 2 ~z$w_buff0_used~0 := #t~ite35; [L778] 2 havoc #t~ite35; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L779] 2 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256)); [L779] 2 #t~ite36 := ~z$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L779] 2 ~z$w_buff1_used~0 := #t~ite36; [L779] 2 havoc #t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L780] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256); [L780] 2 #t~ite37 := ~z$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite37=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L780] 2 ~z$r_buff0_thd3~0 := #t~ite37; [L780] 2 havoc #t~ite37; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L781] 2 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256)); [L781] 2 #t~ite38 := ~z$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite38=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L781] 2 ~z$r_buff1_thd3~0 := #t~ite38; [L781] 2 havoc #t~ite38; [L784] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] -1 havoc main_#t~nondet42; [L806] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L808] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 assume !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256); [L810] -1 call main_#t~mem43 := read~int(~#z~0.base, ~#z~0.offset, 4); [L810] -1 main_#t~ite44 := main_#t~mem43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite44=1, main_#t~mem43=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 main_#t~ite45 := main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite44=1, main_#t~ite45=1, main_#t~mem43=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 call write~int(main_#t~ite45, ~#z~0.base, ~#z~0.offset, 4); [L810] -1 havoc main_#t~ite45; [L810] -1 havoc main_#t~mem43; [L810] -1 havoc main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L811] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256); [L811] -1 main_#t~ite46 := ~z$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite46=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L811] -1 ~z$w_buff0_used~0 := main_#t~ite46; [L811] -1 havoc main_#t~ite46; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L812] -1 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256)); [L812] -1 main_#t~ite47 := ~z$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite47=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L812] -1 ~z$w_buff1_used~0 := main_#t~ite47; [L812] -1 havoc main_#t~ite47; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L813] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256); [L813] -1 main_#t~ite48 := ~z$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite48=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L813] -1 ~z$r_buff0_thd0~0 := main_#t~ite48; [L813] -1 havoc main_#t~ite48; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L814] -1 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256)); [L814] -1 main_#t~ite49 := ~z$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite49=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L814] -1 ~z$r_buff1_thd0~0 := main_#t~ite49; [L814] -1 havoc main_#t~ite49; [L817] -1 ~weak$$choice1~0 := main_#t~nondet50; [L817] -1 havoc main_#t~nondet50; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 assume 0 != ~__unbuffered_p0_EAX$read_delayed~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 assume 0 != ~weak$$choice1~0 % 256; [L818] -1 call main_#t~mem51 := read~int(~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$read_delayed_var~0.offset, 4); [L818] -1 main_#t~ite52 := main_#t~mem51; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite52=1, main_#t~mem51=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 main_#t~ite53 := main_#t~ite52; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite52=1, main_#t~ite53=1, main_#t~mem51=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 ~__unbuffered_p0_EAX~0 := main_#t~ite53; [L818] -1 havoc main_#t~ite52; [L818] -1 havoc main_#t~mem51; [L818] -1 havoc main_#t~ite53; [L819] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L821] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L821] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L673] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L675] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EAX$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L677] -1 ~__unbuffered_p0_EAX$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX~0=0] [L678] -1 ~__unbuffered_p0_EAX$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [L679] -1 ~__unbuffered_p0_EAX$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [L680] -1 ~__unbuffered_p0_EAX$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [L681] -1 ~__unbuffered_p0_EAX$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [L682] -1 ~__unbuffered_p0_EAX$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [L683] -1 ~__unbuffered_p0_EAX$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [L684] -1 ~__unbuffered_p0_EAX$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [L685] -1 ~__unbuffered_p0_EAX$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [L686] -1 ~__unbuffered_p0_EAX$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L687] -1 ~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L688] -1 ~__unbuffered_p0_EAX$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [L689] -1 ~__unbuffered_p0_EAX$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [L690] -1 ~__unbuffered_p0_EAX$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [L691] -1 ~__unbuffered_p0_EAX$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [L693] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L695] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L696] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L697] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L699] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L703] -1 call ~#z~0.base, ~#z~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L703] -1 call write~init~int(0, ~#z~0.base, ~#z~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L704] -1 ~z$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0] [L705] -1 ~z$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0] [L706] -1 ~z$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0] [L707] -1 ~z$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0] [L708] -1 ~z$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0] [L709] -1 ~z$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0] [L710] -1 ~z$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0] [L711] -1 ~z$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0] [L712] -1 ~z$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0] [L713] -1 ~z$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0] [L714] -1 ~z$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed~0=0] [L715] -1 ~z$read_delayed_var~0.base, ~z$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0] [L716] -1 ~z$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0~0=0] [L717] -1 ~z$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0] [L718] -1 ~z$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1~0=0] [L719] -1 ~z$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L720] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L721] -1 ~weak$$choice1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L722] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~nondet42, main_#t~ite45, main_#t~ite44, main_#t~mem43, main_#t~ite46, main_#t~ite47, main_#t~ite48, main_#t~ite49, main_#t~nondet50, main_#t~ite53, main_#t~ite52, main_#t~mem51, main_~#t2698~0.base, main_~#t2698~0.offset, main_~#t2699~0.base, main_~#t2699~0.offset, main_~#t2700~0.base, main_~#t2700~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L799] -1 call main_~#t2698~0.base, main_~#t2698~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] -1 call write~int(0, main_~#t2698~0.base, main_~#t2698~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] -1 havoc main_#t~nondet40; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L801] -1 call main_~#t2699~0.base, main_~#t2699~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] -1 call write~int(1, main_~#t2699~0.base, main_~#t2699~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] -1 havoc main_#t~nondet41; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L723-L752] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L726] 0 ~weak$$choice0~0 := #t~nondet3; [L726] 0 havoc #t~nondet3; [L727] 0 ~weak$$choice2~0 := #t~nondet4; [L727] 0 havoc #t~nondet4; [L728] 0 ~z$flush_delayed~0 := ~weak$$choice2~0; [L729] 0 call #t~mem5 := read~int(~#z~0.base, ~#z~0.offset, 4); [L729] 0 ~z$mem_tmp~0 := #t~mem5; [L729] 0 havoc #t~mem5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L803] -1 call main_~#t2700~0.base, main_~#t2700~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L730] 0 assume (0 == ~z$w_buff0_used~0 % 256 || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$w_buff1_used~0 % 256)) || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$r_buff1_thd1~0 % 256); [L730] 0 call #t~mem6 := read~int(~#z~0.base, ~#z~0.offset, 4); [L730] 0 #t~ite8 := #t~mem6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, #t~mem6=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] -1 call write~int(2, main_~#t2700~0.base, main_~#t2700~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, #t~mem6=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, #t~mem6=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L730] 0 call write~int(#t~ite8, ~#z~0.base, ~#z~0.offset, 4); [L730] 0 havoc #t~ite8; [L730] 0 havoc #t~ite7; [L730] 0 havoc #t~mem6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L731] 0 assume 0 != ~weak$$choice2~0 % 256; [L731] 0 #t~ite11 := ~z$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite11=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L731] 0 ~z$w_buff0~0 := #t~ite11; [L731] 0 havoc #t~ite9; [L731] 0 havoc #t~ite11; [L731] 0 havoc #t~ite10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L732] 0 assume 0 != ~weak$$choice2~0 % 256; [L732] 0 #t~ite14 := ~z$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L732] 0 ~z$w_buff1~0 := #t~ite14; [L732] 0 havoc #t~ite13; [L732] 0 havoc #t~ite12; [L732] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L733] 0 assume 0 != ~weak$$choice2~0 % 256; [L733] 0 #t~ite17 := ~z$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite17=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L733] 0 ~z$w_buff0_used~0 := #t~ite17; [L733] 0 havoc #t~ite15; [L733] 0 havoc #t~ite16; [L733] 0 havoc #t~ite17; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L734] 0 assume 0 != ~weak$$choice2~0 % 256; [L734] 0 #t~ite20 := ~z$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite20=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L734] 0 ~z$w_buff1_used~0 := #t~ite20; [L734] 0 havoc #t~ite19; [L734] 0 havoc #t~ite20; [L734] 0 havoc #t~ite18; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L735] 0 assume 0 != ~weak$$choice2~0 % 256; [L735] 0 #t~ite23 := ~z$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite23=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L735] 0 ~z$r_buff0_thd1~0 := #t~ite23; [L735] 0 havoc #t~ite23; [L735] 0 havoc #t~ite22; [L735] 0 havoc #t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L736] 0 assume 0 != ~weak$$choice2~0 % 256; [L736] 0 #t~ite26 := ~z$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite26=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L736] 0 ~z$r_buff1_thd1~0 := #t~ite26; [L736] 0 havoc #t~ite24; [L736] 0 havoc #t~ite25; [L736] 0 havoc #t~ite26; [L737] 0 ~__unbuffered_p0_EAX$read_delayed~0 := 1; [L738] 0 ~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$read_delayed_var~0.offset := ~#z~0.base, ~#z~0.offset; [L739] 0 call #t~mem27 := read~int(~#z~0.base, ~#z~0.offset, 4); [L739] 0 ~__unbuffered_p0_EAX~0 := #t~mem27; [L739] 0 havoc #t~mem27; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L740] 0 assume 0 != ~z$flush_delayed~0 % 256; [L740] 0 #t~ite29 := ~z$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L740] 0 call write~int(#t~ite29, ~#z~0.base, ~#z~0.offset, 4); [L740] 0 havoc #t~mem28; [L740] 0 havoc #t~ite29; [L741] 0 ~z$flush_delayed~0 := 0; [L744] 0 ~x~0 := 1; [L749] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L753-L767] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L756] 1 ~__unbuffered_p1_EAX~0 := ~x~0; [L759] 1 ~y~0 := 1; [L764] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L768-L787] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L771] 2 ~__unbuffered_p2_EAX~0 := ~y~0; [L774] 2 call write~int(1, ~#z~0.base, ~#z~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] 2 assume !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256); [L777] 2 call #t~mem32 := read~int(~#z~0.base, ~#z~0.offset, 4); [L777] 2 #t~ite33 := #t~mem32; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=1, #t~mem32=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] 2 #t~ite34 := #t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=1, #t~ite34=1, #t~mem32=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] 2 call write~int(#t~ite34, ~#z~0.base, ~#z~0.offset, 4); [L777] 2 havoc #t~ite34; [L777] 2 havoc #t~ite33; [L777] 2 havoc #t~mem32; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L778] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256); [L778] 2 #t~ite35 := ~z$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite35=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L778] 2 ~z$w_buff0_used~0 := #t~ite35; [L778] 2 havoc #t~ite35; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L779] 2 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256)); [L779] 2 #t~ite36 := ~z$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L779] 2 ~z$w_buff1_used~0 := #t~ite36; [L779] 2 havoc #t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L780] 2 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256); [L780] 2 #t~ite37 := ~z$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite37=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L780] 2 ~z$r_buff0_thd3~0 := #t~ite37; [L780] 2 havoc #t~ite37; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L781] 2 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256)); [L781] 2 #t~ite38 := ~z$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite38=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L781] 2 ~z$r_buff1_thd3~0 := #t~ite38; [L781] 2 havoc #t~ite38; [L784] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] -1 havoc main_#t~nondet42; [L806] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L808] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 assume !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256); [L810] -1 call main_#t~mem43 := read~int(~#z~0.base, ~#z~0.offset, 4); [L810] -1 main_#t~ite44 := main_#t~mem43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite44=1, main_#t~mem43=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 main_#t~ite45 := main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite44=1, main_#t~ite45=1, main_#t~mem43=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 call write~int(main_#t~ite45, ~#z~0.base, ~#z~0.offset, 4); [L810] -1 havoc main_#t~ite45; [L810] -1 havoc main_#t~mem43; [L810] -1 havoc main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L811] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256); [L811] -1 main_#t~ite46 := ~z$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite46=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L811] -1 ~z$w_buff0_used~0 := main_#t~ite46; [L811] -1 havoc main_#t~ite46; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L812] -1 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256)); [L812] -1 main_#t~ite47 := ~z$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite47=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L812] -1 ~z$w_buff1_used~0 := main_#t~ite47; [L812] -1 havoc main_#t~ite47; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L813] -1 assume !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256); [L813] -1 main_#t~ite48 := ~z$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite48=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L813] -1 ~z$r_buff0_thd0~0 := main_#t~ite48; [L813] -1 havoc main_#t~ite48; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L814] -1 assume !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256)); [L814] -1 main_#t~ite49 := ~z$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite49=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L814] -1 ~z$r_buff1_thd0~0 := main_#t~ite49; [L814] -1 havoc main_#t~ite49; [L817] -1 ~weak$$choice1~0 := main_#t~nondet50; [L817] -1 havoc main_#t~nondet50; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 assume 0 != ~__unbuffered_p0_EAX$read_delayed~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 assume 0 != ~weak$$choice1~0 % 256; [L818] -1 call main_#t~mem51 := read~int(~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$read_delayed_var~0.offset, 4); [L818] -1 main_#t~ite52 := main_#t~mem51; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite52=1, main_#t~mem51=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 main_#t~ite53 := main_#t~ite52; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_#t~ite52=1, main_#t~ite53=1, main_#t~mem51=1, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 ~__unbuffered_p0_EAX~0 := main_#t~ite53; [L818] -1 havoc main_#t~ite52; [L818] -1 havoc main_#t~mem51; [L818] -1 havoc main_#t~ite53; [L819] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L821] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L821] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_~#t2698~0.base=260, main_~#t2698~0.offset=0, main_~#t2699~0.base=261, main_~#t2699~0.offset=0, main_~#t2700~0.base=259, main_~#t2700~0.offset=0, ~#z~0.base=262, ~#z~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0.base=262, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0.base=0, ~z$read_delayed_var~0.offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L673] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L675] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EAX$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L677] -1 ~__unbuffered_p0_EAX$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX~0=0] [L678] -1 ~__unbuffered_p0_EAX$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [L679] -1 ~__unbuffered_p0_EAX$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [L680] -1 ~__unbuffered_p0_EAX$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [L681] -1 ~__unbuffered_p0_EAX$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [L682] -1 ~__unbuffered_p0_EAX$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [L683] -1 ~__unbuffered_p0_EAX$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [L684] -1 ~__unbuffered_p0_EAX$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [L685] -1 ~__unbuffered_p0_EAX$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [L686] -1 ~__unbuffered_p0_EAX$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L687] -1 ~__unbuffered_p0_EAX$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L688] -1 ~__unbuffered_p0_EAX$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [L689] -1 ~__unbuffered_p0_EAX$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [L690] -1 ~__unbuffered_p0_EAX$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [L691] -1 ~__unbuffered_p0_EAX$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [L693] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L695] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L696] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L697] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L699] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L703] FCALL -1 call ~#z~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L703] FCALL -1 call write~init~int(0, ~#z~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L704] -1 ~z$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0] [L705] -1 ~z$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0] [L706] -1 ~z$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0] [L707] -1 ~z$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0] [L708] -1 ~z$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0] [L709] -1 ~z$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0] [L710] -1 ~z$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0] [L711] -1 ~z$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0] [L712] -1 ~z$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0] [L713] -1 ~z$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0] [L714] -1 ~z$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed~0=0] [L715] -1 ~z$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0] [L716] -1 ~z$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0~0=0] [L717] -1 ~z$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0] [L718] -1 ~z$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1~0=0] [L719] -1 ~z$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L720] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L721] -1 ~weak$$choice1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L722] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~nondet42, main_#t~ite45, main_#t~ite44, main_#t~mem43, main_#t~ite46, main_#t~ite47, main_#t~ite48, main_#t~ite49, main_#t~nondet50, main_#t~ite53, main_#t~ite52, main_#t~mem51, main_~#t2698~0, main_~#t2699~0, main_~#t2700~0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L799] FCALL -1 call main_~#t2698~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] FCALL -1 call write~int(0, main_~#t2698~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] -1 havoc main_#t~nondet40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L801] FCALL -1 call main_~#t2699~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] FCALL -1 call write~int(1, main_~#t2699~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] -1 havoc main_#t~nondet41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L723-L752] 0 ~arg := #in~arg; [L726] 0 ~weak$$choice0~0 := #t~nondet3; [L726] 0 havoc #t~nondet3; [L727] 0 ~weak$$choice2~0 := #t~nondet4; [L727] 0 havoc #t~nondet4; [L728] 0 ~z$flush_delayed~0 := ~weak$$choice2~0; [L729] FCALL 0 call #t~mem5 := read~int(~#z~0, 4); [L729] 0 ~z$mem_tmp~0 := #t~mem5; [L729] 0 havoc #t~mem5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L803] FCALL -1 call main_~#t2700~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L730] COND TRUE 0 (0 == ~z$w_buff0_used~0 % 256 || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$w_buff1_used~0 % 256)) || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$r_buff1_thd1~0 % 256) [L730] FCALL 0 call #t~mem6 := read~int(~#z~0, 4); [L730] 0 #t~ite8 := #t~mem6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, #t~mem6=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] FCALL -1 call write~int(2, main_~#t2700~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, #t~mem6=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, #t~mem6=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L730] FCALL 0 call write~int(#t~ite8, ~#z~0, 4); [L730] 0 havoc #t~ite8; [L730] 0 havoc #t~ite7; [L730] 0 havoc #t~mem6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L731] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L731] 0 #t~ite11 := ~z$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite11=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L731] 0 ~z$w_buff0~0 := #t~ite11; [L731] 0 havoc #t~ite9; [L731] 0 havoc #t~ite11; [L731] 0 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L732] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L732] 0 #t~ite14 := ~z$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L732] 0 ~z$w_buff1~0 := #t~ite14; [L732] 0 havoc #t~ite13; [L732] 0 havoc #t~ite12; [L732] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L733] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L733] 0 #t~ite17 := ~z$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite17=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L733] 0 ~z$w_buff0_used~0 := #t~ite17; [L733] 0 havoc #t~ite15; [L733] 0 havoc #t~ite16; [L733] 0 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L734] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L734] 0 #t~ite20 := ~z$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite20=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L734] 0 ~z$w_buff1_used~0 := #t~ite20; [L734] 0 havoc #t~ite19; [L734] 0 havoc #t~ite20; [L734] 0 havoc #t~ite18; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L735] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L735] 0 #t~ite23 := ~z$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite23=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L735] 0 ~z$r_buff0_thd1~0 := #t~ite23; [L735] 0 havoc #t~ite23; [L735] 0 havoc #t~ite22; [L735] 0 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L736] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L736] 0 #t~ite26 := ~z$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite26=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L736] 0 ~z$r_buff1_thd1~0 := #t~ite26; [L736] 0 havoc #t~ite24; [L736] 0 havoc #t~ite25; [L736] 0 havoc #t~ite26; [L737] 0 ~__unbuffered_p0_EAX$read_delayed~0 := 1; [L738] 0 ~__unbuffered_p0_EAX$read_delayed_var~0 := ~#z~0; [L739] FCALL 0 call #t~mem27 := read~int(~#z~0, 4); [L739] 0 ~__unbuffered_p0_EAX~0 := #t~mem27; [L739] 0 havoc #t~mem27; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L740] COND TRUE 0 0 != ~z$flush_delayed~0 % 256 [L740] 0 #t~ite29 := ~z$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L740] FCALL 0 call write~int(#t~ite29, ~#z~0, 4); [L740] 0 havoc #t~mem28; [L740] 0 havoc #t~ite29; [L741] 0 ~z$flush_delayed~0 := 0; [L744] 0 ~x~0 := 1; [L749] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L753-L767] 1 ~arg := #in~arg; [L756] 1 ~__unbuffered_p1_EAX~0 := ~x~0; [L759] 1 ~y~0 := 1; [L764] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L768-L787] 2 ~arg := #in~arg; [L771] 2 ~__unbuffered_p2_EAX~0 := ~y~0; [L774] FCALL 2 call write~int(1, ~#z~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] COND FALSE 2 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] COND FALSE 2 !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256) [L777] FCALL 2 call #t~mem32 := read~int(~#z~0, 4); [L777] 2 #t~ite33 := #t~mem32; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=1, #t~mem32=1, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] 2 #t~ite34 := #t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=1, #t~ite34=1, #t~mem32=1, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] FCALL 2 call write~int(#t~ite34, ~#z~0, 4); [L777] 2 havoc #t~ite34; [L777] 2 havoc #t~ite33; [L777] 2 havoc #t~mem32; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L778] COND FALSE 2 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) [L778] 2 #t~ite35 := ~z$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite35=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L778] 2 ~z$w_buff0_used~0 := #t~ite35; [L778] 2 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L779] COND FALSE 2 !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256)) [L779] 2 #t~ite36 := ~z$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L779] 2 ~z$w_buff1_used~0 := #t~ite36; [L779] 2 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L780] COND FALSE 2 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) [L780] 2 #t~ite37 := ~z$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite37=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L780] 2 ~z$r_buff0_thd3~0 := #t~ite37; [L780] 2 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L781] COND FALSE 2 !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256)) [L781] 2 #t~ite38 := ~z$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite38=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L781] 2 ~z$r_buff1_thd3~0 := #t~ite38; [L781] 2 havoc #t~ite38; [L784] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] -1 havoc main_#t~nondet42; [L806] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L808] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] COND FALSE -1 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] COND FALSE -1 !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256) [L810] FCALL -1 call main_#t~mem43 := read~int(~#z~0, 4); [L810] -1 main_#t~ite44 := main_#t~mem43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_#t~ite44=1, main_#t~mem43=1, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 main_#t~ite45 := main_#t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_#t~ite44=1, main_#t~ite45=1, main_#t~mem43=1, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] FCALL -1 call write~int(main_#t~ite45, ~#z~0, 4); [L810] -1 havoc main_#t~ite45; [L810] -1 havoc main_#t~mem43; [L810] -1 havoc main_#t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L811] COND FALSE -1 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) [L811] -1 main_#t~ite46 := ~z$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_#t~ite46=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L811] -1 ~z$w_buff0_used~0 := main_#t~ite46; [L811] -1 havoc main_#t~ite46; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L812] COND FALSE -1 !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256)) [L812] -1 main_#t~ite47 := ~z$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_#t~ite47=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L812] -1 ~z$w_buff1_used~0 := main_#t~ite47; [L812] -1 havoc main_#t~ite47; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L813] COND FALSE -1 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) [L813] -1 main_#t~ite48 := ~z$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_#t~ite48=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L813] -1 ~z$r_buff0_thd0~0 := main_#t~ite48; [L813] -1 havoc main_#t~ite48; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L814] COND FALSE -1 !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256)) [L814] -1 main_#t~ite49 := ~z$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_#t~ite49=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L814] -1 ~z$r_buff1_thd0~0 := main_#t~ite49; [L814] -1 havoc main_#t~ite49; [L817] -1 ~weak$$choice1~0 := main_#t~nondet50; [L817] -1 havoc main_#t~nondet50; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] COND TRUE -1 0 != ~__unbuffered_p0_EAX$read_delayed~0 % 256 VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] COND TRUE -1 0 != ~weak$$choice1~0 % 256 [L818] FCALL -1 call main_#t~mem51 := read~int(~__unbuffered_p0_EAX$read_delayed_var~0, 4); [L818] -1 main_#t~ite52 := main_#t~mem51; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_#t~ite52=1, main_#t~mem51=1, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 main_#t~ite53 := main_#t~ite52; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_#t~ite52=1, main_#t~ite53=1, main_#t~mem51=1, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 ~__unbuffered_p0_EAX~0 := main_#t~ite53; [L818] -1 havoc main_#t~ite52; [L818] -1 havoc main_#t~mem51; [L818] -1 havoc main_#t~ite53; [L819] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L821] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L821] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L673] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L675] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EAX$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L677] -1 ~__unbuffered_p0_EAX$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX~0=0] [L678] -1 ~__unbuffered_p0_EAX$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [L679] -1 ~__unbuffered_p0_EAX$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [L680] -1 ~__unbuffered_p0_EAX$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [L681] -1 ~__unbuffered_p0_EAX$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [L682] -1 ~__unbuffered_p0_EAX$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [L683] -1 ~__unbuffered_p0_EAX$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [L684] -1 ~__unbuffered_p0_EAX$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [L685] -1 ~__unbuffered_p0_EAX$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [L686] -1 ~__unbuffered_p0_EAX$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L687] -1 ~__unbuffered_p0_EAX$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L688] -1 ~__unbuffered_p0_EAX$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [L689] -1 ~__unbuffered_p0_EAX$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [L690] -1 ~__unbuffered_p0_EAX$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [L691] -1 ~__unbuffered_p0_EAX$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [L693] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L695] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L696] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L697] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L699] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L703] FCALL -1 call ~#z~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L703] FCALL -1 call write~init~int(0, ~#z~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L704] -1 ~z$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0] [L705] -1 ~z$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0] [L706] -1 ~z$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0] [L707] -1 ~z$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0] [L708] -1 ~z$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0] [L709] -1 ~z$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0] [L710] -1 ~z$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0] [L711] -1 ~z$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0] [L712] -1 ~z$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0] [L713] -1 ~z$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0] [L714] -1 ~z$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed~0=0] [L715] -1 ~z$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0] [L716] -1 ~z$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0~0=0] [L717] -1 ~z$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0] [L718] -1 ~z$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1~0=0] [L719] -1 ~z$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L720] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L721] -1 ~weak$$choice1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L722] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~nondet42, main_#t~ite45, main_#t~ite44, main_#t~mem43, main_#t~ite46, main_#t~ite47, main_#t~ite48, main_#t~ite49, main_#t~nondet50, main_#t~ite53, main_#t~ite52, main_#t~mem51, main_~#t2698~0, main_~#t2699~0, main_~#t2700~0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L799] FCALL -1 call main_~#t2698~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] FCALL -1 call write~int(0, main_~#t2698~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] -1 havoc main_#t~nondet40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L801] FCALL -1 call main_~#t2699~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] FCALL -1 call write~int(1, main_~#t2699~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] -1 havoc main_#t~nondet41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L723-L752] 0 ~arg := #in~arg; [L726] 0 ~weak$$choice0~0 := #t~nondet3; [L726] 0 havoc #t~nondet3; [L727] 0 ~weak$$choice2~0 := #t~nondet4; [L727] 0 havoc #t~nondet4; [L728] 0 ~z$flush_delayed~0 := ~weak$$choice2~0; [L729] FCALL 0 call #t~mem5 := read~int(~#z~0, 4); [L729] 0 ~z$mem_tmp~0 := #t~mem5; [L729] 0 havoc #t~mem5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L803] FCALL -1 call main_~#t2700~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L730] COND TRUE 0 (0 == ~z$w_buff0_used~0 % 256 || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$w_buff1_used~0 % 256)) || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$r_buff1_thd1~0 % 256) [L730] FCALL 0 call #t~mem6 := read~int(~#z~0, 4); [L730] 0 #t~ite8 := #t~mem6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, #t~mem6=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] FCALL -1 call write~int(2, main_~#t2700~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, #t~mem6=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, #t~mem6=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L730] FCALL 0 call write~int(#t~ite8, ~#z~0, 4); [L730] 0 havoc #t~ite8; [L730] 0 havoc #t~ite7; [L730] 0 havoc #t~mem6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L731] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L731] 0 #t~ite11 := ~z$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite11=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L731] 0 ~z$w_buff0~0 := #t~ite11; [L731] 0 havoc #t~ite9; [L731] 0 havoc #t~ite11; [L731] 0 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L732] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L732] 0 #t~ite14 := ~z$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L732] 0 ~z$w_buff1~0 := #t~ite14; [L732] 0 havoc #t~ite13; [L732] 0 havoc #t~ite12; [L732] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L733] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L733] 0 #t~ite17 := ~z$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite17=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L733] 0 ~z$w_buff0_used~0 := #t~ite17; [L733] 0 havoc #t~ite15; [L733] 0 havoc #t~ite16; [L733] 0 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L734] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L734] 0 #t~ite20 := ~z$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite20=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L734] 0 ~z$w_buff1_used~0 := #t~ite20; [L734] 0 havoc #t~ite19; [L734] 0 havoc #t~ite20; [L734] 0 havoc #t~ite18; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L735] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L735] 0 #t~ite23 := ~z$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite23=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L735] 0 ~z$r_buff0_thd1~0 := #t~ite23; [L735] 0 havoc #t~ite23; [L735] 0 havoc #t~ite22; [L735] 0 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L736] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L736] 0 #t~ite26 := ~z$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite26=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L736] 0 ~z$r_buff1_thd1~0 := #t~ite26; [L736] 0 havoc #t~ite24; [L736] 0 havoc #t~ite25; [L736] 0 havoc #t~ite26; [L737] 0 ~__unbuffered_p0_EAX$read_delayed~0 := 1; [L738] 0 ~__unbuffered_p0_EAX$read_delayed_var~0 := ~#z~0; [L739] FCALL 0 call #t~mem27 := read~int(~#z~0, 4); [L739] 0 ~__unbuffered_p0_EAX~0 := #t~mem27; [L739] 0 havoc #t~mem27; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L740] COND TRUE 0 0 != ~z$flush_delayed~0 % 256 [L740] 0 #t~ite29 := ~z$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L740] FCALL 0 call write~int(#t~ite29, ~#z~0, 4); [L740] 0 havoc #t~mem28; [L740] 0 havoc #t~ite29; [L741] 0 ~z$flush_delayed~0 := 0; [L744] 0 ~x~0 := 1; [L749] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L753-L767] 1 ~arg := #in~arg; [L756] 1 ~__unbuffered_p1_EAX~0 := ~x~0; [L759] 1 ~y~0 := 1; [L764] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L768-L787] 2 ~arg := #in~arg; [L771] 2 ~__unbuffered_p2_EAX~0 := ~y~0; [L774] FCALL 2 call write~int(1, ~#z~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] COND FALSE 2 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] COND FALSE 2 !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256) [L777] FCALL 2 call #t~mem32 := read~int(~#z~0, 4); [L777] 2 #t~ite33 := #t~mem32; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=1, #t~mem32=1, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] 2 #t~ite34 := #t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=1, #t~ite34=1, #t~mem32=1, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] FCALL 2 call write~int(#t~ite34, ~#z~0, 4); [L777] 2 havoc #t~ite34; [L777] 2 havoc #t~ite33; [L777] 2 havoc #t~mem32; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L778] COND FALSE 2 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) [L778] 2 #t~ite35 := ~z$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite35=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L778] 2 ~z$w_buff0_used~0 := #t~ite35; [L778] 2 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L779] COND FALSE 2 !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256)) [L779] 2 #t~ite36 := ~z$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L779] 2 ~z$w_buff1_used~0 := #t~ite36; [L779] 2 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L780] COND FALSE 2 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) [L780] 2 #t~ite37 := ~z$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite37=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L780] 2 ~z$r_buff0_thd3~0 := #t~ite37; [L780] 2 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L781] COND FALSE 2 !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256)) [L781] 2 #t~ite38 := ~z$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite38=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L781] 2 ~z$r_buff1_thd3~0 := #t~ite38; [L781] 2 havoc #t~ite38; [L784] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] -1 havoc main_#t~nondet42; [L806] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L808] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] COND FALSE -1 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] COND FALSE -1 !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256) [L810] FCALL -1 call main_#t~mem43 := read~int(~#z~0, 4); [L810] -1 main_#t~ite44 := main_#t~mem43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_#t~ite44=1, main_#t~mem43=1, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 main_#t~ite45 := main_#t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_#t~ite44=1, main_#t~ite45=1, main_#t~mem43=1, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] FCALL -1 call write~int(main_#t~ite45, ~#z~0, 4); [L810] -1 havoc main_#t~ite45; [L810] -1 havoc main_#t~mem43; [L810] -1 havoc main_#t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L811] COND FALSE -1 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) [L811] -1 main_#t~ite46 := ~z$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_#t~ite46=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L811] -1 ~z$w_buff0_used~0 := main_#t~ite46; [L811] -1 havoc main_#t~ite46; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L812] COND FALSE -1 !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256)) [L812] -1 main_#t~ite47 := ~z$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_#t~ite47=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L812] -1 ~z$w_buff1_used~0 := main_#t~ite47; [L812] -1 havoc main_#t~ite47; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L813] COND FALSE -1 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) [L813] -1 main_#t~ite48 := ~z$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_#t~ite48=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L813] -1 ~z$r_buff0_thd0~0 := main_#t~ite48; [L813] -1 havoc main_#t~ite48; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L814] COND FALSE -1 !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256)) [L814] -1 main_#t~ite49 := ~z$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_#t~ite49=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L814] -1 ~z$r_buff1_thd0~0 := main_#t~ite49; [L814] -1 havoc main_#t~ite49; [L817] -1 ~weak$$choice1~0 := main_#t~nondet50; [L817] -1 havoc main_#t~nondet50; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] COND TRUE -1 0 != ~__unbuffered_p0_EAX$read_delayed~0 % 256 VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] COND TRUE -1 0 != ~weak$$choice1~0 % 256 [L818] FCALL -1 call main_#t~mem51 := read~int(~__unbuffered_p0_EAX$read_delayed_var~0, 4); [L818] -1 main_#t~ite52 := main_#t~mem51; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_#t~ite52=1, main_#t~mem51=1, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 main_#t~ite53 := main_#t~ite52; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_#t~ite52=1, main_#t~ite53=1, main_#t~mem51=1, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 ~__unbuffered_p0_EAX~0 := main_#t~ite53; [L818] -1 havoc main_#t~ite52; [L818] -1 havoc main_#t~mem51; [L818] -1 havoc main_#t~ite53; [L819] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L821] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L821] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_~#t2698~0!base=260, main_~#t2698~0!offset=0, main_~#t2699~0!base=261, main_~#t2699~0!offset=0, main_~#t2700~0!base=259, main_~#t2700~0!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L673] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L675] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EAX$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L677] -1 ~__unbuffered_p0_EAX$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX~0=0] [L678] -1 ~__unbuffered_p0_EAX$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [L679] -1 ~__unbuffered_p0_EAX$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [L680] -1 ~__unbuffered_p0_EAX$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [L681] -1 ~__unbuffered_p0_EAX$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [L682] -1 ~__unbuffered_p0_EAX$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [L683] -1 ~__unbuffered_p0_EAX$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [L684] -1 ~__unbuffered_p0_EAX$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [L685] -1 ~__unbuffered_p0_EAX$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [L686] -1 ~__unbuffered_p0_EAX$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L687] -1 ~__unbuffered_p0_EAX$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L688] -1 ~__unbuffered_p0_EAX$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [L689] -1 ~__unbuffered_p0_EAX$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [L690] -1 ~__unbuffered_p0_EAX$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [L691] -1 ~__unbuffered_p0_EAX$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [L693] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L695] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L696] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L697] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L699] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L703] FCALL -1 call ~#z~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L703] FCALL -1 call write~init~int(0, ~#z~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L704] -1 ~z$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0] [L705] -1 ~z$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0] [L706] -1 ~z$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0] [L707] -1 ~z$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0] [L708] -1 ~z$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0] [L709] -1 ~z$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0] [L710] -1 ~z$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0] [L711] -1 ~z$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0] [L712] -1 ~z$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0] [L713] -1 ~z$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0] [L714] -1 ~z$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed~0=0] [L715] -1 ~z$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0] [L716] -1 ~z$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0~0=0] [L717] -1 ~z$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0] [L718] -1 ~z$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1~0=0] [L719] -1 ~z$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L720] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L721] -1 ~weak$$choice1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L722] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L799] FCALL -1 call ~#t2698~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] FCALL -1 call write~int(0, ~#t2698~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] -1 havoc #t~nondet40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L801] FCALL -1 call ~#t2699~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] FCALL -1 call write~int(1, ~#t2699~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] -1 havoc #t~nondet41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L723-L752] 0 ~arg := #in~arg; [L726] 0 ~weak$$choice0~0 := #t~nondet3; [L726] 0 havoc #t~nondet3; [L727] 0 ~weak$$choice2~0 := #t~nondet4; [L727] 0 havoc #t~nondet4; [L728] 0 ~z$flush_delayed~0 := ~weak$$choice2~0; [L729] FCALL 0 call #t~mem5 := read~int(~#z~0, 4); [L729] 0 ~z$mem_tmp~0 := #t~mem5; [L729] 0 havoc #t~mem5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L803] FCALL -1 call ~#t2700~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L730] COND TRUE 0 (0 == ~z$w_buff0_used~0 % 256 || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$w_buff1_used~0 % 256)) || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$r_buff1_thd1~0 % 256) [L730] FCALL 0 call #t~mem6 := read~int(~#z~0, 4); [L730] 0 #t~ite8 := #t~mem6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, #t~mem6=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] FCALL -1 call write~int(2, ~#t2700~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, #t~mem6=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, #t~mem6=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L730] FCALL 0 call write~int(#t~ite8, ~#z~0, 4); [L730] 0 havoc #t~ite8; [L730] 0 havoc #t~ite7; [L730] 0 havoc #t~mem6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L731] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L731] 0 #t~ite11 := ~z$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite11=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L731] 0 ~z$w_buff0~0 := #t~ite11; [L731] 0 havoc #t~ite9; [L731] 0 havoc #t~ite11; [L731] 0 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L732] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L732] 0 #t~ite14 := ~z$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L732] 0 ~z$w_buff1~0 := #t~ite14; [L732] 0 havoc #t~ite13; [L732] 0 havoc #t~ite12; [L732] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L733] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L733] 0 #t~ite17 := ~z$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite17=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L733] 0 ~z$w_buff0_used~0 := #t~ite17; [L733] 0 havoc #t~ite15; [L733] 0 havoc #t~ite16; [L733] 0 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L734] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L734] 0 #t~ite20 := ~z$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite20=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L734] 0 ~z$w_buff1_used~0 := #t~ite20; [L734] 0 havoc #t~ite19; [L734] 0 havoc #t~ite20; [L734] 0 havoc #t~ite18; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L735] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L735] 0 #t~ite23 := ~z$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite23=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L735] 0 ~z$r_buff0_thd1~0 := #t~ite23; [L735] 0 havoc #t~ite23; [L735] 0 havoc #t~ite22; [L735] 0 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L736] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L736] 0 #t~ite26 := ~z$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite26=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L736] 0 ~z$r_buff1_thd1~0 := #t~ite26; [L736] 0 havoc #t~ite24; [L736] 0 havoc #t~ite25; [L736] 0 havoc #t~ite26; [L737] 0 ~__unbuffered_p0_EAX$read_delayed~0 := 1; [L738] 0 ~__unbuffered_p0_EAX$read_delayed_var~0 := ~#z~0; [L739] FCALL 0 call #t~mem27 := read~int(~#z~0, 4); [L739] 0 ~__unbuffered_p0_EAX~0 := #t~mem27; [L739] 0 havoc #t~mem27; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L740] COND TRUE 0 0 != ~z$flush_delayed~0 % 256 [L740] 0 #t~ite29 := ~z$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L740] FCALL 0 call write~int(#t~ite29, ~#z~0, 4); [L740] 0 havoc #t~mem28; [L740] 0 havoc #t~ite29; [L741] 0 ~z$flush_delayed~0 := 0; [L744] 0 ~x~0 := 1; [L749] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L753-L767] 1 ~arg := #in~arg; [L756] 1 ~__unbuffered_p1_EAX~0 := ~x~0; [L759] 1 ~y~0 := 1; [L764] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L768-L787] 2 ~arg := #in~arg; [L771] 2 ~__unbuffered_p2_EAX~0 := ~y~0; [L774] FCALL 2 call write~int(1, ~#z~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] COND FALSE 2 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] COND FALSE 2 !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256) [L777] FCALL 2 call #t~mem32 := read~int(~#z~0, 4); [L777] 2 #t~ite33 := #t~mem32; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=1, #t~mem32=1, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] 2 #t~ite34 := #t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=1, #t~ite34=1, #t~mem32=1, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] FCALL 2 call write~int(#t~ite34, ~#z~0, 4); [L777] 2 havoc #t~ite34; [L777] 2 havoc #t~ite33; [L777] 2 havoc #t~mem32; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L778] COND FALSE 2 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) [L778] 2 #t~ite35 := ~z$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite35=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L778] 2 ~z$w_buff0_used~0 := #t~ite35; [L778] 2 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L779] COND FALSE 2 !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256)) [L779] 2 #t~ite36 := ~z$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L779] 2 ~z$w_buff1_used~0 := #t~ite36; [L779] 2 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L780] COND FALSE 2 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) [L780] 2 #t~ite37 := ~z$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite37=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L780] 2 ~z$r_buff0_thd3~0 := #t~ite37; [L780] 2 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L781] COND FALSE 2 !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256)) [L781] 2 #t~ite38 := ~z$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite38=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L781] 2 ~z$r_buff1_thd3~0 := #t~ite38; [L781] 2 havoc #t~ite38; [L784] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] -1 havoc #t~nondet42; [L806] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L808] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] COND FALSE -1 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] COND FALSE -1 !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256) [L810] FCALL -1 call #t~mem43 := read~int(~#z~0, 4); [L810] -1 #t~ite44 := #t~mem43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 #t~ite45 := #t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] FCALL -1 call write~int(#t~ite45, ~#z~0, 4); [L810] -1 havoc #t~ite45; [L810] -1 havoc #t~mem43; [L810] -1 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L811] COND FALSE -1 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) [L811] -1 #t~ite46 := ~z$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L811] -1 ~z$w_buff0_used~0 := #t~ite46; [L811] -1 havoc #t~ite46; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L812] COND FALSE -1 !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256)) [L812] -1 #t~ite47 := ~z$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L812] -1 ~z$w_buff1_used~0 := #t~ite47; [L812] -1 havoc #t~ite47; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L813] COND FALSE -1 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) [L813] -1 #t~ite48 := ~z$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L813] -1 ~z$r_buff0_thd0~0 := #t~ite48; [L813] -1 havoc #t~ite48; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L814] COND FALSE -1 !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256)) [L814] -1 #t~ite49 := ~z$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L814] -1 ~z$r_buff1_thd0~0 := #t~ite49; [L814] -1 havoc #t~ite49; [L817] -1 ~weak$$choice1~0 := #t~nondet50; [L817] -1 havoc #t~nondet50; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] COND TRUE -1 0 != ~__unbuffered_p0_EAX$read_delayed~0 % 256 VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] COND TRUE -1 0 != ~weak$$choice1~0 % 256 [L818] FCALL -1 call #t~mem51 := read~int(~__unbuffered_p0_EAX$read_delayed_var~0, 4); [L818] -1 #t~ite52 := #t~mem51; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 #t~ite53 := #t~ite52; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 ~__unbuffered_p0_EAX~0 := #t~ite53; [L818] -1 havoc #t~ite52; [L818] -1 havoc #t~mem51; [L818] -1 havoc #t~ite53; [L819] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L673] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L675] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EAX$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L677] -1 ~__unbuffered_p0_EAX$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX~0=0] [L678] -1 ~__unbuffered_p0_EAX$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [L679] -1 ~__unbuffered_p0_EAX$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [L680] -1 ~__unbuffered_p0_EAX$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [L681] -1 ~__unbuffered_p0_EAX$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [L682] -1 ~__unbuffered_p0_EAX$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX~0=0] [L683] -1 ~__unbuffered_p0_EAX$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX~0=0] [L684] -1 ~__unbuffered_p0_EAX$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX~0=0] [L685] -1 ~__unbuffered_p0_EAX$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX~0=0] [L686] -1 ~__unbuffered_p0_EAX$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L687] -1 ~__unbuffered_p0_EAX$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX~0=0] [L688] -1 ~__unbuffered_p0_EAX$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [L689] -1 ~__unbuffered_p0_EAX$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX~0=0] [L690] -1 ~__unbuffered_p0_EAX$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [L691] -1 ~__unbuffered_p0_EAX$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0] [L693] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L695] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L696] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L697] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L699] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L703] FCALL -1 call ~#z~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L703] FCALL -1 call write~init~int(0, ~#z~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L704] -1 ~z$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0] [L705] -1 ~z$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0] [L706] -1 ~z$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0] [L707] -1 ~z$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0] [L708] -1 ~z$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0] [L709] -1 ~z$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0] [L710] -1 ~z$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0] [L711] -1 ~z$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0] [L712] -1 ~z$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0] [L713] -1 ~z$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0] [L714] -1 ~z$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed~0=0] [L715] -1 ~z$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0] [L716] -1 ~z$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0~0=0] [L717] -1 ~z$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0] [L718] -1 ~z$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1~0=0] [L719] -1 ~z$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L720] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L721] -1 ~weak$$choice1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L722] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L799] FCALL -1 call ~#t2698~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] FCALL -1 call write~int(0, ~#t2698~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L800] -1 havoc #t~nondet40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L801] FCALL -1 call ~#t2699~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] FCALL -1 call write~int(1, ~#t2699~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L802] -1 havoc #t~nondet41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L723-L752] 0 ~arg := #in~arg; [L726] 0 ~weak$$choice0~0 := #t~nondet3; [L726] 0 havoc #t~nondet3; [L727] 0 ~weak$$choice2~0 := #t~nondet4; [L727] 0 havoc #t~nondet4; [L728] 0 ~z$flush_delayed~0 := ~weak$$choice2~0; [L729] FCALL 0 call #t~mem5 := read~int(~#z~0, 4); [L729] 0 ~z$mem_tmp~0 := #t~mem5; [L729] 0 havoc #t~mem5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L803] FCALL -1 call ~#t2700~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L730] COND TRUE 0 (0 == ~z$w_buff0_used~0 % 256 || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$w_buff1_used~0 % 256)) || (0 == ~z$r_buff0_thd1~0 % 256 && 0 == ~z$r_buff1_thd1~0 % 256) [L730] FCALL 0 call #t~mem6 := read~int(~#z~0, 4); [L730] 0 #t~ite8 := #t~mem6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, #t~mem6=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] FCALL -1 call write~int(2, ~#t2700~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, #t~mem6=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, #t~mem6=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L730] FCALL 0 call write~int(#t~ite8, ~#z~0, 4); [L730] 0 havoc #t~ite8; [L730] 0 havoc #t~ite7; [L730] 0 havoc #t~mem6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L731] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L731] 0 #t~ite11 := ~z$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite11=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L731] 0 ~z$w_buff0~0 := #t~ite11; [L731] 0 havoc #t~ite9; [L731] 0 havoc #t~ite11; [L731] 0 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L732] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L732] 0 #t~ite14 := ~z$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L732] 0 ~z$w_buff1~0 := #t~ite14; [L732] 0 havoc #t~ite13; [L732] 0 havoc #t~ite12; [L732] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L733] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L733] 0 #t~ite17 := ~z$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite17=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L733] 0 ~z$w_buff0_used~0 := #t~ite17; [L733] 0 havoc #t~ite15; [L733] 0 havoc #t~ite16; [L733] 0 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L734] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L734] 0 #t~ite20 := ~z$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite20=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L734] 0 ~z$w_buff1_used~0 := #t~ite20; [L734] 0 havoc #t~ite19; [L734] 0 havoc #t~ite20; [L734] 0 havoc #t~ite18; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L735] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L735] 0 #t~ite23 := ~z$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite23=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L735] 0 ~z$r_buff0_thd1~0 := #t~ite23; [L735] 0 havoc #t~ite23; [L735] 0 havoc #t~ite22; [L735] 0 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L736] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L736] 0 #t~ite26 := ~z$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite26=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=0, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=0, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L736] 0 ~z$r_buff1_thd1~0 := #t~ite26; [L736] 0 havoc #t~ite24; [L736] 0 havoc #t~ite25; [L736] 0 havoc #t~ite26; [L737] 0 ~__unbuffered_p0_EAX$read_delayed~0 := 1; [L738] 0 ~__unbuffered_p0_EAX$read_delayed_var~0 := ~#z~0; [L739] FCALL 0 call #t~mem27 := read~int(~#z~0, 4); [L739] 0 ~__unbuffered_p0_EAX~0 := #t~mem27; [L739] 0 havoc #t~mem27; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L740] COND TRUE 0 0 != ~z$flush_delayed~0 % 256 [L740] 0 #t~ite29 := ~z$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=0, ~y~0=0, ~z$flush_delayed~0=1, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L740] FCALL 0 call write~int(#t~ite29, ~#z~0, 4); [L740] 0 havoc #t~mem28; [L740] 0 havoc #t~ite29; [L741] 0 ~z$flush_delayed~0 := 0; [L744] 0 ~x~0 := 1; [L749] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=0, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L753-L767] 1 ~arg := #in~arg; [L756] 1 ~__unbuffered_p1_EAX~0 := ~x~0; [L759] 1 ~y~0 := 1; [L764] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L768-L787] 2 ~arg := #in~arg; [L771] 2 ~__unbuffered_p2_EAX~0 := ~y~0; [L774] FCALL 2 call write~int(1, ~#z~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] COND FALSE 2 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] COND FALSE 2 !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256) [L777] FCALL 2 call #t~mem32 := read~int(~#z~0, 4); [L777] 2 #t~ite33 := #t~mem32; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=1, #t~mem32=1, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] 2 #t~ite34 := #t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=1, #t~ite34=1, #t~mem32=1, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L777] FCALL 2 call write~int(#t~ite34, ~#z~0, 4); [L777] 2 havoc #t~ite34; [L777] 2 havoc #t~ite33; [L777] 2 havoc #t~mem32; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L778] COND FALSE 2 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) [L778] 2 #t~ite35 := ~z$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite35=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L778] 2 ~z$w_buff0_used~0 := #t~ite35; [L778] 2 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L779] COND FALSE 2 !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256)) [L779] 2 #t~ite36 := ~z$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L779] 2 ~z$w_buff1_used~0 := #t~ite36; [L779] 2 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L780] COND FALSE 2 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) [L780] 2 #t~ite37 := ~z$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite37=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L780] 2 ~z$r_buff0_thd3~0 := #t~ite37; [L780] 2 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L781] COND FALSE 2 !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd3~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd3~0 % 256)) [L781] 2 #t~ite38 := ~z$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite38=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L781] 2 ~z$r_buff1_thd3~0 := #t~ite38; [L781] 2 havoc #t~ite38; [L784] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L804] -1 havoc #t~nondet42; [L806] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L808] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] COND FALSE -1 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] COND FALSE -1 !(0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256) [L810] FCALL -1 call #t~mem43 := read~int(~#z~0, 4); [L810] -1 #t~ite44 := #t~mem43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] -1 #t~ite45 := #t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L810] FCALL -1 call write~int(#t~ite45, ~#z~0, 4); [L810] -1 havoc #t~ite45; [L810] -1 havoc #t~mem43; [L810] -1 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L811] COND FALSE -1 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) [L811] -1 #t~ite46 := ~z$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L811] -1 ~z$w_buff0_used~0 := #t~ite46; [L811] -1 havoc #t~ite46; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L812] COND FALSE -1 !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256)) [L812] -1 #t~ite47 := ~z$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L812] -1 ~z$w_buff1_used~0 := #t~ite47; [L812] -1 havoc #t~ite47; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L813] COND FALSE -1 !(0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) [L813] -1 #t~ite48 := ~z$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L813] -1 ~z$r_buff0_thd0~0 := #t~ite48; [L813] -1 havoc #t~ite48; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L814] COND FALSE -1 !((0 != ~z$w_buff0_used~0 % 256 && 0 != ~z$r_buff0_thd0~0 % 256) || (0 != ~z$w_buff1_used~0 % 256 && 0 != ~z$r_buff1_thd0~0 % 256)) [L814] -1 #t~ite49 := ~z$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=0, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L814] -1 ~z$r_buff1_thd0~0 := #t~ite49; [L814] -1 havoc #t~ite49; [L817] -1 ~weak$$choice1~0 := #t~nondet50; [L817] -1 havoc #t~nondet50; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] COND TRUE -1 0 != ~__unbuffered_p0_EAX$read_delayed~0 % 256 VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] COND TRUE -1 0 != ~weak$$choice1~0 % 256 [L818] FCALL -1 call #t~mem51 := read~int(~__unbuffered_p0_EAX$read_delayed_var~0, 4); [L818] -1 #t~ite52 := #t~mem51; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 #t~ite53 := #t~ite52; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L818] -1 ~__unbuffered_p0_EAX~0 := #t~ite53; [L818] -1 havoc #t~ite52; [L818] -1 havoc #t~mem51; [L818] -1 havoc #t~ite53; [L819] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#z~0!base=262, ~#z~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX$flush_delayed~0=0, ~__unbuffered_p0_EAX$mem_tmp~0=0, ~__unbuffered_p0_EAX$r_buff0_thd0~0=0, ~__unbuffered_p0_EAX$r_buff0_thd1~0=0, ~__unbuffered_p0_EAX$r_buff0_thd2~0=0, ~__unbuffered_p0_EAX$r_buff0_thd3~0=0, ~__unbuffered_p0_EAX$r_buff1_thd0~0=0, ~__unbuffered_p0_EAX$r_buff1_thd1~0=0, ~__unbuffered_p0_EAX$r_buff1_thd2~0=0, ~__unbuffered_p0_EAX$r_buff1_thd3~0=0, ~__unbuffered_p0_EAX$read_delayed_var~0!base=262, ~__unbuffered_p0_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p0_EAX$read_delayed~0=1, ~__unbuffered_p0_EAX$w_buff0_used~0=0, ~__unbuffered_p0_EAX$w_buff0~0=0, ~__unbuffered_p0_EAX$w_buff1_used~0=0, ~__unbuffered_p0_EAX$w_buff1~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=258, ~weak$$choice1~0=257, ~weak$$choice2~0=1, ~x~0=1, ~y~0=1, ~z$flush_delayed~0=0, ~z$mem_tmp~0=0, ~z$r_buff0_thd0~0=0, ~z$r_buff0_thd1~0=0, ~z$r_buff0_thd2~0=0, ~z$r_buff0_thd3~0=0, ~z$r_buff1_thd0~0=0, ~z$r_buff1_thd1~0=0, ~z$r_buff1_thd2~0=0, ~z$r_buff1_thd3~0=0, ~z$read_delayed_var~0!base=0, ~z$read_delayed_var~0!offset=0, ~z$read_delayed~0=0, ~z$w_buff0_used~0=0, ~z$w_buff0~0=0, ~z$w_buff1_used~0=0, ~z$w_buff1~0=0] [L673] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L675] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 _Bool __unbuffered_p0_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0] [L677] -1 int __unbuffered_p0_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0] [L678] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0] [L679] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0] [L680] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0] [L681] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0] [L682] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0] [L683] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0] [L684] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0] [L685] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0] [L686] -1 _Bool __unbuffered_p0_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0] [L687] -1 int *__unbuffered_p0_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}] [L688] -1 int __unbuffered_p0_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0] [L689] -1 _Bool __unbuffered_p0_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0] [L690] -1 int __unbuffered_p0_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0] [L691] -1 _Bool __unbuffered_p0_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0] [L693] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0] [L695] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L696] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L697] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L699] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L701] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L703] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}] [L704] -1 _Bool z$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0] [L705] -1 int z$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0] [L706] -1 _Bool z$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0] [L707] -1 _Bool z$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0] [L708] -1 _Bool z$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0] [L709] -1 _Bool z$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0] [L710] -1 _Bool z$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0] [L711] -1 _Bool z$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0] [L712] -1 _Bool z$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0] [L713] -1 _Bool z$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0] [L714] -1 _Bool z$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0] [L715] -1 int *z$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}] [L716] -1 int z$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0] [L717] -1 _Bool z$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0] [L718] -1 int z$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0] [L719] -1 _Bool z$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L720] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L721] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L722] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L799] -1 pthread_t t2698; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] FCALL, FORK -1 pthread_create(&t2698, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L801] -1 pthread_t t2699; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L802] FCALL, FORK -1 pthread_create(&t2699, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L726] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L727] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L728] 0 z$flush_delayed = weak$$choice2 [L729] EXPR 0 \read(z) [L729] 0 z$mem_tmp = z [L803] -1 pthread_t t2700; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L730] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) [L730] EXPR 0 \read(z) [L730] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1)=0, \read(z)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L804] FCALL, FORK -1 pthread_create(&t2700, ((void *)0), P2, ((void *)0)) VAL [!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1)=0, \read(z)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L730] 0 z = !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) [L731] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0)) [L732] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L732] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1)) [L733] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L733] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used)) [L734] EXPR 0 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L734] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L735] EXPR 0 weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L735] 0 z$r_buff0_thd1 = weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1)) [L736] EXPR 0 weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L736] 0 z$r_buff1_thd1 = weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L737] 0 __unbuffered_p0_EAX$read_delayed = (_Bool)1 [L738] 0 __unbuffered_p0_EAX$read_delayed_var = &z [L739] EXPR 0 \read(z) [L739] 0 __unbuffered_p0_EAX = z [L740] EXPR 0 z$flush_delayed ? z$mem_tmp : z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={262:0}, z$flush_delayed=1, z$flush_delayed ? z$mem_tmp : z=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L740] 0 z = z$flush_delayed ? z$mem_tmp : z [L741] 0 z$flush_delayed = (_Bool)0 [L744] 0 x = 1 [L749] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L756] 1 __unbuffered_p1_EAX = x [L759] 1 y = 1 [L764] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L771] 2 __unbuffered_p2_EAX = y [L774] 2 z = 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L777] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L777] EXPR 2 z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z [L777] EXPR 2 \read(z) [L777] EXPR 2 z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z VAL [\read(z)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z=1] [L777] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\read(z)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z)=1, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z=1] [L777] 2 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L778] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L778] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L779] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L779] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L780] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3=0, z$w_buff1=0, z$w_buff1_used=0] [L780] 2 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L781] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3=0, z$w_buff1=0, z$w_buff1_used=0] [L781] 2 z$r_buff1_thd3 = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 [L784] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L806] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] EXPR -1 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z [L810] EXPR -1 \read(z) [L810] EXPR -1 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] -1 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L811] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L811] -1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L812] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L812] -1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L813] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L813] -1 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L814] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L814] -1 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L817] -1 weak$$choice1 = __VERIFIER_nondet_bool() [L818] EXPR -1 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L818] EXPR -1 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX [L818] EXPR -1 \read(*__unbuffered_p0_EAX$read_delayed_var) [L818] EXPR -1 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L818] EXPR -1 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L818] -1 __unbuffered_p0_EAX = __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L819] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L5] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L5] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] ----- [2018-11-23 08:05:16,404 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_f065eacd-0ab5-4e1b-9aad-e5dd59255ffa/bin-2019/utaipan/witness.graphml [2018-11-23 08:05:16,404 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 08:05:16,404 INFO L168 Benchmark]: Toolchain (without parser) took 60566.56 ms. Allocated memory was 1.0 GB in the beginning and 6.3 GB in the end (delta: 5.2 GB). Free memory was 956.4 MB in the beginning and 5.0 GB in the end (delta: -4.0 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. [2018-11-23 08:05:16,405 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 08:05:16,406 INFO L168 Benchmark]: CACSL2BoogieTranslator took 376.41 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 136.8 MB). Free memory was 956.4 MB in the beginning and 1.1 GB in the end (delta: -156.4 MB). Peak memory consumption was 38.3 MB. Max. memory is 11.5 GB. [2018-11-23 08:05:16,406 INFO L168 Benchmark]: Boogie Procedure Inliner took 42.21 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2018-11-23 08:05:16,406 INFO L168 Benchmark]: Boogie Preprocessor took 27.99 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2018-11-23 08:05:16,406 INFO L168 Benchmark]: RCFGBuilder took 482.10 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.5 MB). Peak memory consumption was 56.5 MB. Max. memory is 11.5 GB. [2018-11-23 08:05:16,407 INFO L168 Benchmark]: TraceAbstraction took 49198.77 ms. Allocated memory was 1.2 GB in the beginning and 6.2 GB in the end (delta: 5.0 GB). Free memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: -1.6 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. [2018-11-23 08:05:16,407 INFO L168 Benchmark]: Witness Printer took 10436.08 ms. Allocated memory was 6.2 GB in the beginning and 6.3 GB in the end (delta: 104.9 MB). Free memory was 2.7 GB in the beginning and 5.0 GB in the end (delta: -2.3 GB). Peak memory consumption was 198.0 MB. Max. memory is 11.5 GB. [2018-11-23 08:05:16,408 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 376.41 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 136.8 MB). Free memory was 956.4 MB in the beginning and 1.1 GB in the end (delta: -156.4 MB). Peak memory consumption was 38.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 42.21 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 27.99 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 482.10 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.5 MB). Peak memory consumption was 56.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 49198.77 ms. Allocated memory was 1.2 GB in the beginning and 6.2 GB in the end (delta: 5.0 GB). Free memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: -1.6 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. * Witness Printer took 10436.08 ms. Allocated memory was 6.2 GB in the beginning and 6.3 GB in the end (delta: 104.9 MB). Free memory was 2.7 GB in the beginning and 5.0 GB in the end (delta: -2.3 GB). Peak memory consumption was 198.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L673] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L675] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 _Bool __unbuffered_p0_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0] [L677] -1 int __unbuffered_p0_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0] [L678] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0] [L679] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0] [L680] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0] [L681] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0] [L682] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0] [L683] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0] [L684] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0] [L685] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0] [L686] -1 _Bool __unbuffered_p0_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0] [L687] -1 int *__unbuffered_p0_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}] [L688] -1 int __unbuffered_p0_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0] [L689] -1 _Bool __unbuffered_p0_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0] [L690] -1 int __unbuffered_p0_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0] [L691] -1 _Bool __unbuffered_p0_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0] [L693] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0] [L695] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L696] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L697] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L699] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L701] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L703] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}] [L704] -1 _Bool z$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0] [L705] -1 int z$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0] [L706] -1 _Bool z$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0] [L707] -1 _Bool z$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0] [L708] -1 _Bool z$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0] [L709] -1 _Bool z$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0] [L710] -1 _Bool z$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0] [L711] -1 _Bool z$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0] [L712] -1 _Bool z$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0] [L713] -1 _Bool z$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0] [L714] -1 _Bool z$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0] [L715] -1 int *z$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}] [L716] -1 int z$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0] [L717] -1 _Bool z$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0] [L718] -1 int z$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0] [L719] -1 _Bool z$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L720] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L721] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L722] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L799] -1 pthread_t t2698; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] FCALL, FORK -1 pthread_create(&t2698, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L801] -1 pthread_t t2699; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L802] FCALL, FORK -1 pthread_create(&t2699, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L726] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L727] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L728] 0 z$flush_delayed = weak$$choice2 [L729] EXPR 0 \read(z) [L729] 0 z$mem_tmp = z [L803] -1 pthread_t t2700; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L730] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) [L730] EXPR 0 \read(z) [L730] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1)=0, \read(z)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L804] FCALL, FORK -1 pthread_create(&t2700, ((void *)0), P2, ((void *)0)) VAL [!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1)=0, \read(z)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L730] 0 z = !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) [L731] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0)) [L732] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L732] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1)) [L733] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L733] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used)) [L734] EXPR 0 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L734] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L735] EXPR 0 weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L735] 0 z$r_buff0_thd1 = weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1)) [L736] EXPR 0 weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L736] 0 z$r_buff1_thd1 = weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L737] 0 __unbuffered_p0_EAX$read_delayed = (_Bool)1 [L738] 0 __unbuffered_p0_EAX$read_delayed_var = &z [L739] EXPR 0 \read(z) [L739] 0 __unbuffered_p0_EAX = z [L740] EXPR 0 z$flush_delayed ? z$mem_tmp : z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={262:0}, z$flush_delayed=1, z$flush_delayed ? z$mem_tmp : z=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L740] 0 z = z$flush_delayed ? z$mem_tmp : z [L741] 0 z$flush_delayed = (_Bool)0 [L744] 0 x = 1 [L749] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L756] 1 __unbuffered_p1_EAX = x [L759] 1 y = 1 [L764] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L771] 2 __unbuffered_p2_EAX = y [L774] 2 z = 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L777] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L777] EXPR 2 z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z [L777] EXPR 2 \read(z) [L777] EXPR 2 z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z VAL [\read(z)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z=1] [L777] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\read(z)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z)=1, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z=1] [L777] 2 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L778] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L778] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L779] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L779] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L780] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3=0, z$w_buff1=0, z$w_buff1_used=0] [L780] 2 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L781] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3=0, z$w_buff1=0, z$w_buff1_used=0] [L781] 2 z$r_buff1_thd3 = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 [L784] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L806] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] EXPR -1 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z [L810] EXPR -1 \read(z) [L810] EXPR -1 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] -1 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L811] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L811] -1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L812] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L812] -1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L813] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L813] -1 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L814] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L814] -1 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L817] -1 weak$$choice1 = __VERIFIER_nondet_bool() [L818] EXPR -1 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L818] EXPR -1 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX [L818] EXPR -1 \read(*__unbuffered_p0_EAX$read_delayed_var) [L818] EXPR -1 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L818] EXPR -1 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L818] -1 __unbuffered_p0_EAX = __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L819] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L5] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L5] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 232 locations, 1 error locations. UNSAFE Result, 49.0s OverallTime, 21 OverallIterations, 1 TraceHistogramMax, 8.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4759 SDtfs, 5850 SDslu, 10686 SDs, 0 SdLazy, 3240 SolverSat, 220 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 206 GetRequests, 55 SyntacticMatches, 30 SemanticMatches, 121 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 1.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=138333occurred in iteration=1, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 19.1s AutomataMinimizationTime, 20 MinimizatonAttempts, 113339 StatesRemovedByMinimization, 15 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 2126 NumberOfCodeBlocks, 2126 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 1992 ConstructedInterpolants, 0 QuantifiedInterpolants, 476918 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 20 InterpolantComputations, 20 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...