./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/memsafety-ext3/getNumbers4_false-valid-deref.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/memsafety-ext3/getNumbers4_false-valid-deref.c -s /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 440325a953e10d2173456ab8f8c8fc1313a6b958 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(valid-deref) --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-03 04:41:49,708 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-03 04:41:49,709 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-03 04:41:49,715 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-03 04:41:49,715 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-03 04:41:49,716 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-03 04:41:49,716 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-03 04:41:49,717 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-03 04:41:49,718 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-03 04:41:49,718 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-03 04:41:49,718 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-03 04:41:49,719 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-03 04:41:49,719 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-03 04:41:49,720 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-03 04:41:49,720 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-03 04:41:49,721 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-03 04:41:49,721 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-03 04:41:49,722 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-03 04:41:49,723 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-03 04:41:49,723 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-03 04:41:49,724 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-03 04:41:49,724 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-03 04:41:49,725 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-03 04:41:49,725 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-03 04:41:49,726 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-03 04:41:49,726 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-03 04:41:49,726 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-03 04:41:49,727 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-03 04:41:49,727 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-03 04:41:49,728 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-03 04:41:49,728 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-03 04:41:49,728 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-03 04:41:49,728 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-03 04:41:49,728 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-03 04:41:49,729 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-03 04:41:49,729 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-03 04:41:49,729 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf [2018-12-03 04:41:49,736 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-03 04:41:49,736 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-03 04:41:49,737 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-03 04:41:49,737 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-03 04:41:49,737 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-03 04:41:49,737 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-03 04:41:49,737 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-03 04:41:49,737 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-03 04:41:49,737 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-03 04:41:49,737 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-03 04:41:49,738 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-03 04:41:49,738 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-03 04:41:49,738 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-03 04:41:49,738 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-03 04:41:49,738 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-03 04:41:49,738 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-03 04:41:49,738 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-03 04:41:49,738 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-03 04:41:49,739 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-03 04:41:49,739 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-03 04:41:49,739 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-03 04:41:49,739 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-03 04:41:49,739 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-03 04:41:49,739 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-03 04:41:49,739 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-03 04:41:49,739 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-03 04:41:49,739 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-03 04:41:49,739 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-03 04:41:49,739 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-03 04:41:49,740 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-03 04:41:49,740 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-03 04:41:49,740 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-03 04:41:49,740 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-03 04:41:49,740 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-03 04:41:49,740 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-03 04:41:49,740 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-03 04:41:49,740 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 440325a953e10d2173456ab8f8c8fc1313a6b958 [2018-12-03 04:41:49,758 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-03 04:41:49,764 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-03 04:41:49,766 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-03 04:41:49,767 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-03 04:41:49,767 INFO L276 PluginConnector]: CDTParser initialized [2018-12-03 04:41:49,768 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/../../sv-benchmarks/c/memsafety-ext3/getNumbers4_false-valid-deref.c [2018-12-03 04:41:49,803 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/data/7dd098a2c/b810a7571c29443fa9da6d3ec191ca94/FLAG900cd231e [2018-12-03 04:41:50,222 INFO L307 CDTParser]: Found 1 translation units. [2018-12-03 04:41:50,222 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/sv-benchmarks/c/memsafety-ext3/getNumbers4_false-valid-deref.c [2018-12-03 04:41:50,226 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/data/7dd098a2c/b810a7571c29443fa9da6d3ec191ca94/FLAG900cd231e [2018-12-03 04:41:50,236 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/data/7dd098a2c/b810a7571c29443fa9da6d3ec191ca94 [2018-12-03 04:41:50,237 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-03 04:41:50,238 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-03 04:41:50,239 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-03 04:41:50,239 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-03 04:41:50,241 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-03 04:41:50,241 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.12 04:41:50" (1/1) ... [2018-12-03 04:41:50,243 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@56acabfb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 04:41:50, skipping insertion in model container [2018-12-03 04:41:50,243 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.12 04:41:50" (1/1) ... [2018-12-03 04:41:50,247 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-03 04:41:50,260 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-03 04:41:50,355 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-03 04:41:50,363 INFO L191 MainTranslator]: Completed pre-run [2018-12-03 04:41:50,375 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-03 04:41:50,388 INFO L195 MainTranslator]: Completed translation [2018-12-03 04:41:50,389 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 04:41:50 WrapperNode [2018-12-03 04:41:50,389 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-03 04:41:50,389 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-03 04:41:50,389 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-03 04:41:50,389 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-03 04:41:50,394 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 04:41:50" (1/1) ... [2018-12-03 04:41:50,399 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 04:41:50" (1/1) ... [2018-12-03 04:41:50,403 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-03 04:41:50,404 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-03 04:41:50,404 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-03 04:41:50,404 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-03 04:41:50,439 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 04:41:50" (1/1) ... [2018-12-03 04:41:50,439 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 04:41:50" (1/1) ... [2018-12-03 04:41:50,441 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 04:41:50" (1/1) ... [2018-12-03 04:41:50,441 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 04:41:50" (1/1) ... [2018-12-03 04:41:50,447 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 04:41:50" (1/1) ... [2018-12-03 04:41:50,450 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 04:41:50" (1/1) ... [2018-12-03 04:41:50,451 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 04:41:50" (1/1) ... [2018-12-03 04:41:50,452 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-03 04:41:50,452 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-03 04:41:50,452 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-03 04:41:50,453 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-03 04:41:50,453 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 04:41:50" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-03 04:41:50,485 INFO L130 BoogieDeclarations]: Found specification of procedure getNumbers4 [2018-12-03 04:41:50,485 INFO L138 BoogieDeclarations]: Found implementation of procedure getNumbers4 [2018-12-03 04:41:50,485 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-03 04:41:50,485 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-03 04:41:50,485 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-03 04:41:50,485 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-03 04:41:50,485 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-03 04:41:50,485 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-03 04:41:50,485 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-03 04:41:50,486 INFO L130 BoogieDeclarations]: Found specification of procedure getNumbers3 [2018-12-03 04:41:50,486 INFO L138 BoogieDeclarations]: Found implementation of procedure getNumbers3 [2018-12-03 04:41:50,486 INFO L130 BoogieDeclarations]: Found specification of procedure getNumbers2 [2018-12-03 04:41:50,486 INFO L138 BoogieDeclarations]: Found implementation of procedure getNumbers2 [2018-12-03 04:41:50,486 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-03 04:41:50,486 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-03 04:41:50,486 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-03 04:41:50,486 INFO L130 BoogieDeclarations]: Found specification of procedure getNumbers [2018-12-03 04:41:50,486 INFO L138 BoogieDeclarations]: Found implementation of procedure getNumbers [2018-12-03 04:41:50,486 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-03 04:41:50,659 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-03 04:41:50,659 INFO L280 CfgBuilder]: Removed 5 assue(true) statements. [2018-12-03 04:41:50,659 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 04:41:50 BoogieIcfgContainer [2018-12-03 04:41:50,659 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-03 04:41:50,660 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-03 04:41:50,660 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-03 04:41:50,662 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-03 04:41:50,662 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.12 04:41:50" (1/3) ... [2018-12-03 04:41:50,662 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7d1e7cb7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.12 04:41:50, skipping insertion in model container [2018-12-03 04:41:50,662 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 04:41:50" (2/3) ... [2018-12-03 04:41:50,663 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7d1e7cb7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.12 04:41:50, skipping insertion in model container [2018-12-03 04:41:50,663 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 04:41:50" (3/3) ... [2018-12-03 04:41:50,664 INFO L112 eAbstractionObserver]: Analyzing ICFG getNumbers4_false-valid-deref.c [2018-12-03 04:41:50,669 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-03 04:41:50,674 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 17 error locations. [2018-12-03 04:41:50,683 INFO L257 AbstractCegarLoop]: Starting to check reachability of 17 error locations. [2018-12-03 04:41:50,697 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-03 04:41:50,698 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-03 04:41:50,698 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-03 04:41:50,698 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-03 04:41:50,698 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-03 04:41:50,698 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-03 04:41:50,698 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-03 04:41:50,698 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-03 04:41:50,708 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states. [2018-12-03 04:41:50,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-03 04:41:50,713 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:41:50,713 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:41:50,714 INFO L423 AbstractCegarLoop]: === Iteration 1 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:41:50,717 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:50,718 INFO L82 PathProgramCache]: Analyzing trace with hash 1830459948, now seen corresponding path program 1 times [2018-12-03 04:41:50,719 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:41:50,746 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:50,746 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:41:50,746 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:50,746 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:41:50,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:50,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:50,842 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 04:41:50,842 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-03 04:41:50,842 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 04:41:50,845 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 04:41:50,853 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 04:41:50,853 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 04:41:50,855 INFO L87 Difference]: Start difference. First operand 70 states. Second operand 3 states. [2018-12-03 04:41:50,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:41:50,908 INFO L93 Difference]: Finished difference Result 69 states and 73 transitions. [2018-12-03 04:41:50,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 04:41:50,909 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-12-03 04:41:50,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:41:50,915 INFO L225 Difference]: With dead ends: 69 [2018-12-03 04:41:50,916 INFO L226 Difference]: Without dead ends: 66 [2018-12-03 04:41:50,917 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 04:41:50,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-12-03 04:41:50,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2018-12-03 04:41:50,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-12-03 04:41:50,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 70 transitions. [2018-12-03 04:41:50,944 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 70 transitions. Word has length 12 [2018-12-03 04:41:50,944 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:41:50,944 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 70 transitions. [2018-12-03 04:41:50,944 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 04:41:50,944 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 70 transitions. [2018-12-03 04:41:50,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-03 04:41:50,944 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:41:50,945 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:41:50,945 INFO L423 AbstractCegarLoop]: === Iteration 2 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:41:50,945 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:50,945 INFO L82 PathProgramCache]: Analyzing trace with hash 1830459949, now seen corresponding path program 1 times [2018-12-03 04:41:50,945 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:41:50,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:50,946 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:41:50,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:50,946 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:41:50,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:51,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:51,060 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 04:41:51,060 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-03 04:41:51,060 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 04:41:51,061 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 04:41:51,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 04:41:51,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-03 04:41:51,061 INFO L87 Difference]: Start difference. First operand 66 states and 70 transitions. Second operand 4 states. [2018-12-03 04:41:51,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:41:51,124 INFO L93 Difference]: Finished difference Result 69 states and 73 transitions. [2018-12-03 04:41:51,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-03 04:41:51,125 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2018-12-03 04:41:51,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:41:51,125 INFO L225 Difference]: With dead ends: 69 [2018-12-03 04:41:51,126 INFO L226 Difference]: Without dead ends: 69 [2018-12-03 04:41:51,126 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-03 04:41:51,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-12-03 04:41:51,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 68. [2018-12-03 04:41:51,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-12-03 04:41:51,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 72 transitions. [2018-12-03 04:41:51,132 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 72 transitions. Word has length 12 [2018-12-03 04:41:51,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:41:51,132 INFO L480 AbstractCegarLoop]: Abstraction has 68 states and 72 transitions. [2018-12-03 04:41:51,132 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 04:41:51,132 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 72 transitions. [2018-12-03 04:41:51,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-12-03 04:41:51,133 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:41:51,133 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:41:51,133 INFO L423 AbstractCegarLoop]: === Iteration 3 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:41:51,134 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:51,134 INFO L82 PathProgramCache]: Analyzing trace with hash -1967365176, now seen corresponding path program 1 times [2018-12-03 04:41:51,134 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:41:51,135 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:51,135 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:41:51,135 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:51,135 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:41:51,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:51,228 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:51,228 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:51,228 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:41:51,229 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 16 with the following transitions: [2018-12-03 04:41:51,230 INFO L205 CegarAbsIntRunner]: [0], [1], [99], [107], [108], [110], [112], [118], [120], [122], [124], [125], [126], [128] [2018-12-03 04:41:51,249 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 04:41:51,249 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 04:41:51,369 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 04:41:51,370 INFO L272 AbstractInterpreter]: Visited 14 different actions 30 times. Merged at 4 different actions 16 times. Never widened. Performed 382 root evaluator evaluations with a maximum evaluation depth of 4. Performed 382 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 1 fixpoints after 1 different actions. Largest state had 28 variables. [2018-12-03 04:41:51,376 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:51,376 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 04:41:51,376 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:51,377 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:41:51,383 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:41:51,383 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 04:41:51,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:51,408 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:41:51,437 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-03 04:41:51,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,443 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 24 [2018-12-03 04:41:51,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,448 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 34 [2018-12-03 04:41:51,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,455 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 51 [2018-12-03 04:41:51,456 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:51,471 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:51,480 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:51,491 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:51,505 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2018-12-03 04:41:51,517 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,523 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 49 [2018-12-03 04:41:51,563 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,569 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,571 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,577 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 57 [2018-12-03 04:41:51,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,627 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,629 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 36 [2018-12-03 04:41:51,629 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:51,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,650 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,657 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,657 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,658 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 33 [2018-12-03 04:41:51,658 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:51,668 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:51,681 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,682 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,683 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-12-03 04:41:51,712 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,713 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,714 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,714 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,715 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:51,715 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-12-03 04:41:51,716 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:51,722 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:51,734 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:51,738 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:51,746 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-12-03 04:41:51,747 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 5 variables, input treesize:61, output treesize:36 [2018-12-03 04:41:51,824 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:51,824 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:41:51,918 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:51,932 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:41:51,933 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4, 4] total 12 [2018-12-03 04:41:51,933 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:41:51,933 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-03 04:41:51,933 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-03 04:41:51,933 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=110, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:41:51,933 INFO L87 Difference]: Start difference. First operand 68 states and 72 transitions. Second operand 10 states. [2018-12-03 04:41:52,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:41:52,089 INFO L93 Difference]: Finished difference Result 72 states and 76 transitions. [2018-12-03 04:41:52,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-03 04:41:52,089 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 15 [2018-12-03 04:41:52,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:41:52,090 INFO L225 Difference]: With dead ends: 72 [2018-12-03 04:41:52,090 INFO L226 Difference]: Without dead ends: 72 [2018-12-03 04:41:52,090 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 26 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=143, Unknown=0, NotChecked=0, Total=210 [2018-12-03 04:41:52,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2018-12-03 04:41:52,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 72. [2018-12-03 04:41:52,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-12-03 04:41:52,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 76 transitions. [2018-12-03 04:41:52,094 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 76 transitions. Word has length 15 [2018-12-03 04:41:52,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:41:52,094 INFO L480 AbstractCegarLoop]: Abstraction has 72 states and 76 transitions. [2018-12-03 04:41:52,094 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-03 04:41:52,094 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 76 transitions. [2018-12-03 04:41:52,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-03 04:41:52,095 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:41:52,095 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:41:52,095 INFO L423 AbstractCegarLoop]: === Iteration 4 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:41:52,095 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:52,096 INFO L82 PathProgramCache]: Analyzing trace with hash 189347113, now seen corresponding path program 1 times [2018-12-03 04:41:52,096 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:41:52,096 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:52,096 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:41:52,096 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:52,097 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:41:52,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:52,132 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-12-03 04:41:52,132 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 04:41:52,132 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-03 04:41:52,132 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 04:41:52,132 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 04:41:52,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 04:41:52,133 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-03 04:41:52,133 INFO L87 Difference]: Start difference. First operand 72 states and 76 transitions. Second operand 6 states. [2018-12-03 04:41:52,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:41:52,198 INFO L93 Difference]: Finished difference Result 71 states and 75 transitions. [2018-12-03 04:41:52,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-03 04:41:52,198 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-12-03 04:41:52,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:41:52,199 INFO L225 Difference]: With dead ends: 71 [2018-12-03 04:41:52,199 INFO L226 Difference]: Without dead ends: 71 [2018-12-03 04:41:52,199 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-12-03 04:41:52,199 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-12-03 04:41:52,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 71. [2018-12-03 04:41:52,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-12-03 04:41:52,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 75 transitions. [2018-12-03 04:41:52,202 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 75 transitions. Word has length 26 [2018-12-03 04:41:52,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:41:52,203 INFO L480 AbstractCegarLoop]: Abstraction has 71 states and 75 transitions. [2018-12-03 04:41:52,203 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 04:41:52,203 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 75 transitions. [2018-12-03 04:41:52,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-03 04:41:52,203 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:41:52,203 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:41:52,203 INFO L423 AbstractCegarLoop]: === Iteration 5 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:41:52,203 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:52,204 INFO L82 PathProgramCache]: Analyzing trace with hash 189347114, now seen corresponding path program 1 times [2018-12-03 04:41:52,204 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:41:52,204 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:52,204 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:41:52,204 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:52,204 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:41:52,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:52,245 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:52,246 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:52,246 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:41:52,246 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 27 with the following transitions: [2018-12-03 04:41:52,246 INFO L205 CegarAbsIntRunner]: [0], [1], [27], [35], [38], [99], [105], [107], [108], [112], [116], [117], [118], [120], [121], [122], [124], [125], [126], [128] [2018-12-03 04:41:52,247 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 04:41:52,247 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 04:41:52,303 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 04:41:52,304 INFO L272 AbstractInterpreter]: Visited 20 different actions 32 times. Merged at 3 different actions 9 times. Never widened. Performed 353 root evaluator evaluations with a maximum evaluation depth of 4. Performed 353 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 2 fixpoints after 2 different actions. Largest state had 31 variables. [2018-12-03 04:41:52,305 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:52,305 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 04:41:52,305 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:52,305 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:41:52,311 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:41:52,311 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 04:41:52,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:52,330 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:41:52,336 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:52,336 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:41:52,370 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:52,384 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:41:52,384 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 11 [2018-12-03 04:41:52,384 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:41:52,385 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-03 04:41:52,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-03 04:41:52,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-03 04:41:52,385 INFO L87 Difference]: Start difference. First operand 71 states and 75 transitions. Second operand 7 states. [2018-12-03 04:41:52,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:41:52,400 INFO L93 Difference]: Finished difference Result 76 states and 80 transitions. [2018-12-03 04:41:52,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-03 04:41:52,401 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 26 [2018-12-03 04:41:52,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:41:52,402 INFO L225 Difference]: With dead ends: 76 [2018-12-03 04:41:52,402 INFO L226 Difference]: Without dead ends: 76 [2018-12-03 04:41:52,402 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 48 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-03 04:41:52,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-12-03 04:41:52,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 74. [2018-12-03 04:41:52,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-12-03 04:41:52,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 78 transitions. [2018-12-03 04:41:52,406 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 78 transitions. Word has length 26 [2018-12-03 04:41:52,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:41:52,407 INFO L480 AbstractCegarLoop]: Abstraction has 74 states and 78 transitions. [2018-12-03 04:41:52,407 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-03 04:41:52,407 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 78 transitions. [2018-12-03 04:41:52,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-03 04:41:52,407 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:41:52,407 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:41:52,408 INFO L423 AbstractCegarLoop]: === Iteration 6 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:41:52,408 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:52,408 INFO L82 PathProgramCache]: Analyzing trace with hash -378498171, now seen corresponding path program 2 times [2018-12-03 04:41:52,408 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:41:52,408 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:52,409 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:41:52,409 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:52,409 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:41:52,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:52,443 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:52,444 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:52,444 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:41:52,444 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:41:52,444 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:41:52,444 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:52,445 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:41:52,450 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 04:41:52,451 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 04:41:52,467 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-03 04:41:52,467 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:41:52,469 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:41:52,472 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-03 04:41:52,477 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,478 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 24 [2018-12-03 04:41:52,481 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,485 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,486 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 34 [2018-12-03 04:41:52,490 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,493 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,495 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 51 [2018-12-03 04:41:52,495 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:52,517 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:52,522 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:52,527 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:52,541 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2018-12-03 04:41:52,551 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,555 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 49 [2018-12-03 04:41:52,590 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,592 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,596 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 57 [2018-12-03 04:41:52,633 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,634 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,636 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,637 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,638 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,639 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,639 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-12-03 04:41:52,640 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:52,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,657 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,658 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,658 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,659 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,660 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 8 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 29 [2018-12-03 04:41:52,660 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:52,668 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:52,680 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,681 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,682 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-12-03 04:41:52,696 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,696 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,701 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,702 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,702 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:52,703 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-12-03 04:41:52,703 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:52,708 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:52,714 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:52,719 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:52,726 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-12-03 04:41:52,726 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 5 variables, input treesize:61, output treesize:36 [2018-12-03 04:41:52,814 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-03 04:41:52,814 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:41:52,913 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 18 [2018-12-03 04:41:52,954 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-12-03 04:41:52,985 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 18 [2018-12-03 04:41:53,035 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-03 04:41:53,053 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-03 04:41:53,053 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6, 6] imperfect sequences [7] total 17 [2018-12-03 04:41:53,053 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 04:41:53,053 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-03 04:41:53,053 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-03 04:41:53,053 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2018-12-03 04:41:53,053 INFO L87 Difference]: Start difference. First operand 74 states and 78 transitions. Second operand 7 states. [2018-12-03 04:41:53,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:41:53,219 INFO L93 Difference]: Finished difference Result 74 states and 78 transitions. [2018-12-03 04:41:53,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 04:41:53,220 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-12-03 04:41:53,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:41:53,220 INFO L225 Difference]: With dead ends: 74 [2018-12-03 04:41:53,221 INFO L226 Difference]: Without dead ends: 74 [2018-12-03 04:41:53,221 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 47 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=72, Invalid=308, Unknown=0, NotChecked=0, Total=380 [2018-12-03 04:41:53,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-12-03 04:41:53,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 74. [2018-12-03 04:41:53,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-12-03 04:41:53,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 78 transitions. [2018-12-03 04:41:53,224 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 78 transitions. Word has length 29 [2018-12-03 04:41:53,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:41:53,224 INFO L480 AbstractCegarLoop]: Abstraction has 74 states and 78 transitions. [2018-12-03 04:41:53,224 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-03 04:41:53,224 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 78 transitions. [2018-12-03 04:41:53,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-12-03 04:41:53,224 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:41:53,225 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:41:53,225 INFO L423 AbstractCegarLoop]: === Iteration 7 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:41:53,225 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:53,225 INFO L82 PathProgramCache]: Analyzing trace with hash 1151458565, now seen corresponding path program 1 times [2018-12-03 04:41:53,225 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:41:53,226 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:53,226 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:41:53,226 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:53,226 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:41:53,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:53,250 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:53,251 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:53,251 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:41:53,251 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 31 with the following transitions: [2018-12-03 04:41:53,251 INFO L205 CegarAbsIntRunner]: [0], [1], [27], [35], [36], [40], [99], [105], [107], [108], [112], [116], [117], [118], [120], [121], [122], [124], [125], [126], [128] [2018-12-03 04:41:53,252 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 04:41:53,252 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 04:41:53,279 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 04:41:53,279 INFO L272 AbstractInterpreter]: Visited 21 different actions 33 times. Merged at 3 different actions 9 times. Never widened. Performed 360 root evaluator evaluations with a maximum evaluation depth of 4. Performed 360 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 2 fixpoints after 2 different actions. Largest state had 32 variables. [2018-12-03 04:41:53,280 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:53,280 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 04:41:53,280 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:53,280 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:41:53,286 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:41:53,286 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 04:41:53,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:53,303 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:41:53,310 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:53,310 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:41:53,361 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:53,381 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:41:53,381 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2018-12-03 04:41:53,381 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:41:53,381 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-03 04:41:53,381 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-03 04:41:53,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:41:53,382 INFO L87 Difference]: Start difference. First operand 74 states and 78 transitions. Second operand 8 states. [2018-12-03 04:41:53,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:41:53,399 INFO L93 Difference]: Finished difference Result 79 states and 83 transitions. [2018-12-03 04:41:53,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 04:41:53,399 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 30 [2018-12-03 04:41:53,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:41:53,400 INFO L225 Difference]: With dead ends: 79 [2018-12-03 04:41:53,400 INFO L226 Difference]: Without dead ends: 79 [2018-12-03 04:41:53,400 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:41:53,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-12-03 04:41:53,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 77. [2018-12-03 04:41:53,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-12-03 04:41:53,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 81 transitions. [2018-12-03 04:41:53,403 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 81 transitions. Word has length 30 [2018-12-03 04:41:53,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:41:53,403 INFO L480 AbstractCegarLoop]: Abstraction has 77 states and 81 transitions. [2018-12-03 04:41:53,403 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-03 04:41:53,403 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 81 transitions. [2018-12-03 04:41:53,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-03 04:41:53,403 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:41:53,403 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:41:53,403 INFO L423 AbstractCegarLoop]: === Iteration 8 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:41:53,404 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:53,404 INFO L82 PathProgramCache]: Analyzing trace with hash -387148320, now seen corresponding path program 2 times [2018-12-03 04:41:53,404 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:41:53,404 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:53,404 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:41:53,404 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:53,404 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:41:53,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:53,432 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:53,432 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:53,433 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:41:53,433 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:41:53,433 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:41:53,433 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:53,433 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:41:53,439 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 04:41:53,439 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 04:41:53,453 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-03 04:41:53,453 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:41:53,454 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:41:53,457 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 54 [2018-12-03 04:41:53,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,482 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 51 treesize of output 61 [2018-12-03 04:41:53,532 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,534 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,536 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,541 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 66 [2018-12-03 04:41:53,588 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,588 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,590 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,591 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 64 [2018-12-03 04:41:53,593 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 54 [2018-12-03 04:41:53,594 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:53,613 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:53,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,636 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,637 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,638 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,639 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,647 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 39 treesize of output 74 [2018-12-03 04:41:53,650 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 62 [2018-12-03 04:41:53,651 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:53,691 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,691 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,692 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,693 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,694 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,695 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,696 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,700 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 10 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 40 treesize of output 72 [2018-12-03 04:41:53,701 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-12-03 04:41:53,758 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-03 04:41:53,798 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-12-03 04:41:53,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,871 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 56 [2018-12-03 04:41:53,892 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,893 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,893 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,894 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:53,896 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 60 [2018-12-03 04:41:53,899 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 54 [2018-12-03 04:41:53,899 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:53,910 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:53,918 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:53,968 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-03 04:41:54,026 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-03 04:41:54,113 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 12 dim-0 vars, and 5 xjuncts. [2018-12-03 04:41:54,113 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 4 variables, input treesize:61, output treesize:234 [2018-12-03 04:41:54,267 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2018-12-03 04:41:54,267 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:41:54,309 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2018-12-03 04:41:54,329 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-03 04:41:54,329 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2, 2] imperfect sequences [8] total 10 [2018-12-03 04:41:54,329 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 04:41:54,330 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 04:41:54,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 04:41:54,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-12-03 04:41:54,330 INFO L87 Difference]: Start difference. First operand 77 states and 81 transitions. Second operand 3 states. [2018-12-03 04:41:54,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:41:54,369 INFO L93 Difference]: Finished difference Result 76 states and 80 transitions. [2018-12-03 04:41:54,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 04:41:54,369 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2018-12-03 04:41:54,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:41:54,370 INFO L225 Difference]: With dead ends: 76 [2018-12-03 04:41:54,370 INFO L226 Difference]: Without dead ends: 76 [2018-12-03 04:41:54,370 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 62 SyntacticMatches, 3 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-12-03 04:41:54,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-12-03 04:41:54,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2018-12-03 04:41:54,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-12-03 04:41:54,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 80 transitions. [2018-12-03 04:41:54,373 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 80 transitions. Word has length 33 [2018-12-03 04:41:54,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:41:54,373 INFO L480 AbstractCegarLoop]: Abstraction has 76 states and 80 transitions. [2018-12-03 04:41:54,373 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 04:41:54,373 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 80 transitions. [2018-12-03 04:41:54,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-03 04:41:54,374 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:41:54,374 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:41:54,374 INFO L423 AbstractCegarLoop]: === Iteration 9 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:41:54,374 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:54,374 INFO L82 PathProgramCache]: Analyzing trace with hash -387148319, now seen corresponding path program 1 times [2018-12-03 04:41:54,374 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:41:54,375 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:54,375 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:41:54,375 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:54,375 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:41:54,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:54,415 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:54,415 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:54,415 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:41:54,416 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 34 with the following transitions: [2018-12-03 04:41:54,416 INFO L205 CegarAbsIntRunner]: [0], [1], [27], [35], [36], [41], [99], [105], [107], [108], [112], [116], [117], [118], [120], [121], [122], [124], [125], [126], [128] [2018-12-03 04:41:54,417 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 04:41:54,417 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 04:41:54,453 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 04:41:54,453 INFO L272 AbstractInterpreter]: Visited 21 different actions 33 times. Merged at 3 different actions 9 times. Never widened. Performed 361 root evaluator evaluations with a maximum evaluation depth of 4. Performed 361 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 2 fixpoints after 2 different actions. Largest state had 32 variables. [2018-12-03 04:41:54,455 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:54,455 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 04:41:54,455 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:54,455 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:41:54,463 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:41:54,464 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 04:41:54,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:54,488 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:41:54,499 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:54,499 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:41:54,536 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:54,551 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:41:54,551 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 13 [2018-12-03 04:41:54,551 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:41:54,551 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-03 04:41:54,552 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-03 04:41:54,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:41:54,552 INFO L87 Difference]: Start difference. First operand 76 states and 80 transitions. Second operand 9 states. [2018-12-03 04:41:54,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:41:54,570 INFO L93 Difference]: Finished difference Result 81 states and 85 transitions. [2018-12-03 04:41:54,570 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-03 04:41:54,570 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33 [2018-12-03 04:41:54,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:41:54,571 INFO L225 Difference]: With dead ends: 81 [2018-12-03 04:41:54,571 INFO L226 Difference]: Without dead ends: 81 [2018-12-03 04:41:54,571 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 60 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:41:54,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-12-03 04:41:54,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 79. [2018-12-03 04:41:54,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-12-03 04:41:54,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 83 transitions. [2018-12-03 04:41:54,573 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 83 transitions. Word has length 33 [2018-12-03 04:41:54,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:41:54,573 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 83 transitions. [2018-12-03 04:41:54,573 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-03 04:41:54,573 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 83 transitions. [2018-12-03 04:41:54,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-03 04:41:54,574 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:41:54,574 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:41:54,574 INFO L423 AbstractCegarLoop]: === Iteration 10 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:41:54,574 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:54,574 INFO L82 PathProgramCache]: Analyzing trace with hash -1133876442, now seen corresponding path program 2 times [2018-12-03 04:41:54,574 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:41:54,574 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:54,574 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:41:54,575 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:54,575 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:41:54,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:54,608 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 04:41:54,608 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:54,608 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:41:54,608 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:41:54,608 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:41:54,608 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:54,608 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:41:54,615 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 04:41:54,615 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 04:41:54,628 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-03 04:41:54,629 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:41:54,630 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:41:54,633 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2018-12-03 04:41:54,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,646 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 49 [2018-12-03 04:41:54,681 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,683 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,684 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,691 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 57 [2018-12-03 04:41:54,731 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,732 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,733 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,734 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,734 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,735 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 36 [2018-12-03 04:41:54,735 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:54,758 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,761 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,766 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,767 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,769 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,770 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,771 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,771 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 33 [2018-12-03 04:41:54,771 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:54,784 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:54,800 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,801 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-12-03 04:41:54,814 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,815 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,816 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,816 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,818 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-12-03 04:41:54,818 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:54,824 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:54,833 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:54,838 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:54,848 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-03 04:41:54,849 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 5 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 24 [2018-12-03 04:41:54,851 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 34 [2018-12-03 04:41:54,853 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:54,854 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 51 [2018-12-03 04:41:54,854 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:54,863 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:54,867 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:54,871 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:54,880 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-12-03 04:41:54,880 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 5 variables, input treesize:61, output treesize:36 [2018-12-03 04:41:54,939 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-12-03 04:41:54,939 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:41:55,033 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-12-03 04:41:55,049 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-03 04:41:55,049 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [9] total 15 [2018-12-03 04:41:55,049 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 04:41:55,049 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 04:41:55,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 04:41:55,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2018-12-03 04:41:55,050 INFO L87 Difference]: Start difference. First operand 79 states and 83 transitions. Second operand 5 states. [2018-12-03 04:41:55,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:41:55,115 INFO L93 Difference]: Finished difference Result 78 states and 82 transitions. [2018-12-03 04:41:55,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 04:41:55,115 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2018-12-03 04:41:55,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:41:55,116 INFO L225 Difference]: With dead ends: 78 [2018-12-03 04:41:55,116 INFO L226 Difference]: Without dead ends: 78 [2018-12-03 04:41:55,117 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2018-12-03 04:41:55,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-12-03 04:41:55,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2018-12-03 04:41:55,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-12-03 04:41:55,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 82 transitions. [2018-12-03 04:41:55,120 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 82 transitions. Word has length 36 [2018-12-03 04:41:55,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:41:55,121 INFO L480 AbstractCegarLoop]: Abstraction has 78 states and 82 transitions. [2018-12-03 04:41:55,121 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 04:41:55,121 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 82 transitions. [2018-12-03 04:41:55,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-12-03 04:41:55,122 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:41:55,122 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:41:55,122 INFO L423 AbstractCegarLoop]: === Iteration 11 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:41:55,122 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:55,122 INFO L82 PathProgramCache]: Analyzing trace with hash -69292150, now seen corresponding path program 1 times [2018-12-03 04:41:55,122 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:41:55,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:55,123 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:41:55,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:55,123 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:41:55,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:55,167 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 04:41:55,167 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:55,167 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:41:55,167 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 46 with the following transitions: [2018-12-03 04:41:55,167 INFO L205 CegarAbsIntRunner]: [0], [1], [3], [11], [13], [27], [33], [35], [36], [39], [42], [44], [48], [49], [99], [105], [107], [108], [112], [116], [117], [118], [119], [120], [121], [122], [124], [125], [126], [128] [2018-12-03 04:41:55,168 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 04:41:55,169 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 04:41:55,233 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 04:41:55,233 INFO L272 AbstractInterpreter]: Visited 30 different actions 76 times. Merged at 14 different actions 38 times. Widened at 2 different actions 2 times. Performed 588 root evaluator evaluations with a maximum evaluation depth of 4. Performed 588 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 6 fixpoints after 6 different actions. Largest state had 35 variables. [2018-12-03 04:41:55,235 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:55,235 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 04:41:55,235 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:55,235 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:41:55,243 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:41:55,244 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 04:41:55,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:55,267 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:41:55,274 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 04:41:55,274 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:41:55,332 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 04:41:55,346 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:41:55,346 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 13 [2018-12-03 04:41:55,346 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:41:55,347 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-03 04:41:55,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-03 04:41:55,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:41:55,347 INFO L87 Difference]: Start difference. First operand 78 states and 82 transitions. Second operand 10 states. [2018-12-03 04:41:55,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:41:55,371 INFO L93 Difference]: Finished difference Result 83 states and 87 transitions. [2018-12-03 04:41:55,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 04:41:55,371 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 45 [2018-12-03 04:41:55,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:41:55,371 INFO L225 Difference]: With dead ends: 83 [2018-12-03 04:41:55,371 INFO L226 Difference]: Without dead ends: 83 [2018-12-03 04:41:55,372 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 4 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:41:55,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-12-03 04:41:55,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 81. [2018-12-03 04:41:55,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-12-03 04:41:55,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 85 transitions. [2018-12-03 04:41:55,374 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 85 transitions. Word has length 45 [2018-12-03 04:41:55,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:41:55,374 INFO L480 AbstractCegarLoop]: Abstraction has 81 states and 85 transitions. [2018-12-03 04:41:55,374 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-03 04:41:55,374 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 85 transitions. [2018-12-03 04:41:55,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-03 04:41:55,374 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:41:55,374 INFO L402 BasicCegarLoop]: trace histogram [7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:41:55,375 INFO L423 AbstractCegarLoop]: === Iteration 12 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:41:55,375 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:55,375 INFO L82 PathProgramCache]: Analyzing trace with hash -912931505, now seen corresponding path program 2 times [2018-12-03 04:41:55,375 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:41:55,375 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:55,375 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:41:55,375 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:55,375 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:41:55,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:55,413 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 04:41:55,413 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:55,413 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:41:55,413 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:41:55,413 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:41:55,413 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:55,413 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:41:55,419 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 04:41:55,419 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 04:41:55,433 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-03 04:41:55,434 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:41:55,435 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:41:55,438 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 54 [2018-12-03 04:41:55,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,457 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 51 treesize of output 61 [2018-12-03 04:41:55,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,506 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,507 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 56 [2018-12-03 04:41:55,526 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,528 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,528 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,529 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,530 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 60 [2018-12-03 04:41:55,532 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 54 [2018-12-03 04:41:55,532 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:55,541 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:55,553 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:55,576 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,578 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,580 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,584 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 66 [2018-12-03 04:41:55,637 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,638 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,639 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,641 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 64 [2018-12-03 04:41:55,643 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 54 [2018-12-03 04:41:55,643 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:55,654 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:55,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,673 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,675 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,676 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,677 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,681 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 39 treesize of output 74 [2018-12-03 04:41:55,685 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 62 [2018-12-03 04:41:55,685 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:55,718 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,718 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,719 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,719 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,721 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,721 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,722 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:55,727 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 10 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 40 treesize of output 72 [2018-12-03 04:41:55,727 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 2 xjuncts. [2018-12-03 04:41:55,768 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-03 04:41:55,808 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-12-03 04:41:55,856 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-03 04:41:55,912 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-03 04:41:55,967 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 12 dim-0 vars, and 5 xjuncts. [2018-12-03 04:41:55,967 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 4 variables, input treesize:61, output treesize:234 [2018-12-03 04:41:56,358 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 57 [2018-12-03 04:41:56,358 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:56,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:56,398 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:56,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:56,400 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:56,402 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:56,406 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 11 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 83 [2018-12-03 04:41:56,406 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-12-03 04:41:56,486 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 50 [2018-12-03 04:41:56,486 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:56,548 INFO L267 ElimStorePlain]: Start of recursive call 1: 11 dim-0 vars, 3 dim-1 vars, End of recursive call: 14 dim-0 vars, and 4 xjuncts. [2018-12-03 04:41:56,548 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 14 variables, input treesize:162, output treesize:225 [2018-12-03 04:41:56,760 WARN L180 SmtUtils]: Spent 187.00 ms on a formula simplification. DAG size of input: 121 DAG size of output: 79 [2018-12-03 04:41:56,811 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2018-12-03 04:41:56,811 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:41:56,936 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2018-12-03 04:41:56,955 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-03 04:41:56,955 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [10] total 18 [2018-12-03 04:41:56,956 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 04:41:56,956 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 04:41:56,956 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 04:41:56,956 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=239, Unknown=0, NotChecked=0, Total=306 [2018-12-03 04:41:56,956 INFO L87 Difference]: Start difference. First operand 81 states and 85 transitions. Second operand 6 states. [2018-12-03 04:41:57,281 WARN L180 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 129 DAG size of output: 83 [2018-12-03 04:41:57,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:41:57,421 INFO L93 Difference]: Finished difference Result 80 states and 84 transitions. [2018-12-03 04:41:57,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-03 04:41:57,421 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 48 [2018-12-03 04:41:57,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:41:57,422 INFO L225 Difference]: With dead ends: 80 [2018-12-03 04:41:57,422 INFO L226 Difference]: Without dead ends: 80 [2018-12-03 04:41:57,422 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 85 SyntacticMatches, 4 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=79, Invalid=301, Unknown=0, NotChecked=0, Total=380 [2018-12-03 04:41:57,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-12-03 04:41:57,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 80. [2018-12-03 04:41:57,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-12-03 04:41:57,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 84 transitions. [2018-12-03 04:41:57,427 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 84 transitions. Word has length 48 [2018-12-03 04:41:57,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:41:57,427 INFO L480 AbstractCegarLoop]: Abstraction has 80 states and 84 transitions. [2018-12-03 04:41:57,427 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 04:41:57,427 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 84 transitions. [2018-12-03 04:41:57,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-03 04:41:57,428 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:41:57,428 INFO L402 BasicCegarLoop]: trace histogram [7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:41:57,428 INFO L423 AbstractCegarLoop]: === Iteration 13 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:41:57,429 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:57,429 INFO L82 PathProgramCache]: Analyzing trace with hash -912931504, now seen corresponding path program 1 times [2018-12-03 04:41:57,429 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:41:57,429 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:57,430 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:41:57,430 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:57,430 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:41:57,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:57,490 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 04:41:57,490 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:57,490 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:41:57,491 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 49 with the following transitions: [2018-12-03 04:41:57,491 INFO L205 CegarAbsIntRunner]: [0], [1], [3], [11], [14], [27], [33], [35], [36], [39], [42], [44], [48], [49], [99], [105], [107], [108], [112], [116], [117], [118], [119], [120], [121], [122], [124], [125], [126], [128] [2018-12-03 04:41:57,492 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 04:41:57,492 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 04:41:57,524 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 04:41:57,524 INFO L272 AbstractInterpreter]: Visited 30 different actions 60 times. Merged at 8 different actions 24 times. Never widened. Performed 501 root evaluator evaluations with a maximum evaluation depth of 4. Performed 501 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 4 fixpoints after 4 different actions. Largest state had 35 variables. [2018-12-03 04:41:57,525 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:57,525 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 04:41:57,525 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:57,525 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:41:57,534 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:41:57,534 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 04:41:57,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:57,561 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:41:57,567 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 04:41:57,567 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:41:57,610 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 04:41:57,635 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:41:57,635 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 13 [2018-12-03 04:41:57,635 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:41:57,635 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-03 04:41:57,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-03 04:41:57,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:41:57,636 INFO L87 Difference]: Start difference. First operand 80 states and 84 transitions. Second operand 11 states. [2018-12-03 04:41:57,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:41:57,657 INFO L93 Difference]: Finished difference Result 85 states and 89 transitions. [2018-12-03 04:41:57,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-03 04:41:57,658 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 48 [2018-12-03 04:41:57,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:41:57,658 INFO L225 Difference]: With dead ends: 85 [2018-12-03 04:41:57,658 INFO L226 Difference]: Without dead ends: 85 [2018-12-03 04:41:57,659 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 88 SyntacticMatches, 6 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:41:57,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-12-03 04:41:57,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 83. [2018-12-03 04:41:57,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2018-12-03 04:41:57,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 87 transitions. [2018-12-03 04:41:57,661 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 87 transitions. Word has length 48 [2018-12-03 04:41:57,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:41:57,661 INFO L480 AbstractCegarLoop]: Abstraction has 83 states and 87 transitions. [2018-12-03 04:41:57,661 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-03 04:41:57,661 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 87 transitions. [2018-12-03 04:41:57,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-03 04:41:57,662 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:41:57,662 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:41:57,662 INFO L423 AbstractCegarLoop]: === Iteration 14 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:41:57,662 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:41:57,663 INFO L82 PathProgramCache]: Analyzing trace with hash 375659883, now seen corresponding path program 2 times [2018-12-03 04:41:57,663 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:41:57,663 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:57,663 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:41:57,663 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:41:57,663 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:41:57,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:41:57,712 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 04:41:57,712 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:57,712 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:41:57,712 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:41:57,713 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:41:57,713 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:41:57,713 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:41:57,719 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 04:41:57,719 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 04:41:57,733 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-03 04:41:57,733 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:41:57,735 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:41:57,738 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-03 04:41:57,740 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,740 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 24 [2018-12-03 04:41:57,743 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,743 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,744 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 34 [2018-12-03 04:41:57,746 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,746 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,747 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,748 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,748 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 51 [2018-12-03 04:41:57,749 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:57,762 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:57,767 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:57,772 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:57,782 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2018-12-03 04:41:57,790 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,797 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 49 [2018-12-03 04:41:57,829 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,831 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,832 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,837 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 57 [2018-12-03 04:41:57,874 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,874 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,876 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,877 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,878 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,879 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,879 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,880 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-12-03 04:41:57,880 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:57,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,898 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,898 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,899 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,899 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 8 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 29 [2018-12-03 04:41:57,900 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:57,908 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:57,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,920 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,920 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-12-03 04:41:57,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,935 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,935 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:57,936 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-12-03 04:41:57,936 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-03 04:41:57,941 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:57,945 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:57,948 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:41:57,954 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-12-03 04:41:57,954 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 5 variables, input treesize:61, output treesize:36 [2018-12-03 04:41:58,032 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:58,033 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:58,034 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:58,036 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 04:41:58,040 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 54 [2018-12-03 04:41:58,041 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-12-03 04:41:58,073 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, End of recursive call: 7 dim-0 vars, and 2 xjuncts. [2018-12-03 04:41:58,073 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:45, output treesize:96 [2018-12-03 04:42:01,980 WARN L180 SmtUtils]: Spent 3.89 s on a formula simplification. DAG size of input: 59 DAG size of output: 55 [2018-12-03 04:42:02,039 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2018-12-03 04:42:02,039 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:06,198 WARN L180 SmtUtils]: Spent 944.00 ms on a formula simplification that was a NOOP. DAG size: 27 [2018-12-03 04:42:06,201 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 18 [2018-12-03 04:42:07,242 WARN L180 SmtUtils]: Spent 1.01 s on a formula simplification that was a NOOP. DAG size: 49 [2018-12-03 04:42:07,244 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-12-03 04:42:10,394 WARN L180 SmtUtils]: Spent 2.51 s on a formula simplification that was a NOOP. DAG size: 50 [2018-12-03 04:42:10,397 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 18 [2018-12-03 04:42:10,453 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2018-12-03 04:42:10,468 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-03 04:42:10,468 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6, 7] imperfect sequences [11] total 22 [2018-12-03 04:42:10,468 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 04:42:10,469 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-03 04:42:10,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-03 04:42:10,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=372, Unknown=1, NotChecked=0, Total=462 [2018-12-03 04:42:10,469 INFO L87 Difference]: Start difference. First operand 83 states and 87 transitions. Second operand 7 states. [2018-12-03 04:42:10,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:10,588 INFO L93 Difference]: Finished difference Result 83 states and 87 transitions. [2018-12-03 04:42:10,588 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 04:42:10,588 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 51 [2018-12-03 04:42:10,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:10,588 INFO L225 Difference]: With dead ends: 83 [2018-12-03 04:42:10,589 INFO L226 Difference]: Without dead ends: 83 [2018-12-03 04:42:10,589 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 91 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 12.4s TimeCoverageRelationStatistics Valid=95, Invalid=410, Unknown=1, NotChecked=0, Total=506 [2018-12-03 04:42:10,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-12-03 04:42:10,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2018-12-03 04:42:10,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2018-12-03 04:42:10,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 87 transitions. [2018-12-03 04:42:10,590 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 87 transitions. Word has length 51 [2018-12-03 04:42:10,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:10,591 INFO L480 AbstractCegarLoop]: Abstraction has 83 states and 87 transitions. [2018-12-03 04:42:10,591 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-03 04:42:10,591 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 87 transitions. [2018-12-03 04:42:10,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-12-03 04:42:10,591 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:10,591 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:10,592 INFO L423 AbstractCegarLoop]: === Iteration 15 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:10,592 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:10,592 INFO L82 PathProgramCache]: Analyzing trace with hash -1239445561, now seen corresponding path program 1 times [2018-12-03 04:42:10,592 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:10,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:10,592 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:42:10,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:10,592 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:10,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:10,613 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2018-12-03 04:42:10,613 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 04:42:10,613 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-03 04:42:10,613 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 04:42:10,614 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 04:42:10,614 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 04:42:10,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 04:42:10,614 INFO L87 Difference]: Start difference. First operand 83 states and 87 transitions. Second operand 3 states. [2018-12-03 04:42:10,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:10,629 INFO L93 Difference]: Finished difference Result 82 states and 86 transitions. [2018-12-03 04:42:10,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 04:42:10,629 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2018-12-03 04:42:10,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:10,630 INFO L225 Difference]: With dead ends: 82 [2018-12-03 04:42:10,630 INFO L226 Difference]: Without dead ends: 82 [2018-12-03 04:42:10,630 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 04:42:10,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-12-03 04:42:10,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 82. [2018-12-03 04:42:10,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2018-12-03 04:42:10,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 86 transitions. [2018-12-03 04:42:10,632 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 86 transitions. Word has length 52 [2018-12-03 04:42:10,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:10,632 INFO L480 AbstractCegarLoop]: Abstraction has 82 states and 86 transitions. [2018-12-03 04:42:10,633 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 04:42:10,633 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 86 transitions. [2018-12-03 04:42:10,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-12-03 04:42:10,633 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:10,633 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:10,634 INFO L423 AbstractCegarLoop]: === Iteration 16 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:10,634 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:10,634 INFO L82 PathProgramCache]: Analyzing trace with hash -1239445560, now seen corresponding path program 1 times [2018-12-03 04:42:10,634 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:10,634 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:10,635 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:42:10,635 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:10,635 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:10,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:10,687 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 04:42:10,688 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:10,688 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:10,688 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 53 with the following transitions: [2018-12-03 04:42:10,688 INFO L205 CegarAbsIntRunner]: [0], [1], [3], [11], [12], [17], [27], [33], [35], [36], [39], [42], [44], [48], [49], [99], [105], [107], [108], [112], [116], [117], [118], [119], [120], [121], [122], [124], [125], [126], [128] [2018-12-03 04:42:10,689 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 04:42:10,690 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 04:42:10,742 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 04:42:10,743 INFO L272 AbstractInterpreter]: Visited 31 different actions 77 times. Merged at 14 different actions 38 times. Widened at 2 different actions 2 times. Performed 597 root evaluator evaluations with a maximum evaluation depth of 4. Performed 597 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 6 fixpoints after 6 different actions. Largest state had 35 variables. [2018-12-03 04:42:10,744 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:10,744 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 04:42:10,744 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:10,744 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:10,759 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:42:10,759 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 04:42:10,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:10,784 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:10,790 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 04:42:10,790 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:10,840 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 04:42:10,857 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:10,857 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 13 [2018-12-03 04:42:10,857 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:10,857 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-03 04:42:10,857 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-03 04:42:10,857 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:10,857 INFO L87 Difference]: Start difference. First operand 82 states and 86 transitions. Second operand 12 states. [2018-12-03 04:42:10,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:10,884 INFO L93 Difference]: Finished difference Result 87 states and 91 transitions. [2018-12-03 04:42:10,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-03 04:42:10,884 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 52 [2018-12-03 04:42:10,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:10,885 INFO L225 Difference]: With dead ends: 87 [2018-12-03 04:42:10,885 INFO L226 Difference]: Without dead ends: 87 [2018-12-03 04:42:10,885 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 95 SyntacticMatches, 8 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:10,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-12-03 04:42:10,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 85. [2018-12-03 04:42:10,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-12-03 04:42:10,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 89 transitions. [2018-12-03 04:42:10,886 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 89 transitions. Word has length 52 [2018-12-03 04:42:10,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:10,887 INFO L480 AbstractCegarLoop]: Abstraction has 85 states and 89 transitions. [2018-12-03 04:42:10,887 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-03 04:42:10,887 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 89 transitions. [2018-12-03 04:42:10,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-12-03 04:42:10,887 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:10,887 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:10,887 INFO L423 AbstractCegarLoop]: === Iteration 17 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:10,887 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:10,887 INFO L82 PathProgramCache]: Analyzing trace with hash -981573021, now seen corresponding path program 2 times [2018-12-03 04:42:10,887 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:10,888 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:10,888 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:42:10,888 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:10,888 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:10,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:10,940 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 04:42:10,940 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:10,940 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:10,940 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:10,941 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:10,941 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:10,941 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:10,947 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 04:42:10,947 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 04:42:10,965 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-03 04:42:10,966 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:42:10,967 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:10,970 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-03 04:42:10,970 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-03 04:42:10,974 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 04:42:10,974 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-12-03 04:42:10,992 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 118 trivial. 0 not checked. [2018-12-03 04:42:10,993 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:11,016 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 118 trivial. 0 not checked. [2018-12-03 04:42:11,030 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-03 04:42:11,030 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [12] total 16 [2018-12-03 04:42:11,030 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 04:42:11,030 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 04:42:11,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 04:42:11,031 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=161, Unknown=0, NotChecked=0, Total=240 [2018-12-03 04:42:11,031 INFO L87 Difference]: Start difference. First operand 85 states and 89 transitions. Second operand 4 states. [2018-12-03 04:42:11,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:11,046 INFO L93 Difference]: Finished difference Result 84 states and 88 transitions. [2018-12-03 04:42:11,046 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-03 04:42:11,046 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 55 [2018-12-03 04:42:11,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:11,047 INFO L225 Difference]: With dead ends: 84 [2018-12-03 04:42:11,047 INFO L226 Difference]: Without dead ends: 84 [2018-12-03 04:42:11,047 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=79, Invalid=161, Unknown=0, NotChecked=0, Total=240 [2018-12-03 04:42:11,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2018-12-03 04:42:11,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 84. [2018-12-03 04:42:11,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-12-03 04:42:11,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 88 transitions. [2018-12-03 04:42:11,049 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 88 transitions. Word has length 55 [2018-12-03 04:42:11,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:11,049 INFO L480 AbstractCegarLoop]: Abstraction has 84 states and 88 transitions. [2018-12-03 04:42:11,049 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 04:42:11,049 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 88 transitions. [2018-12-03 04:42:11,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-03 04:42:11,050 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:11,050 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:11,050 INFO L423 AbstractCegarLoop]: === Iteration 18 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:11,050 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:11,050 INFO L82 PathProgramCache]: Analyzing trace with hash -965711231, now seen corresponding path program 1 times [2018-12-03 04:42:11,050 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:11,051 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:11,051 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:42:11,051 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:11,051 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:11,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:11,121 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-03 04:42:11,122 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:11,122 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:11,122 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 65 with the following transitions: [2018-12-03 04:42:11,122 INFO L205 CegarAbsIntRunner]: [0], [1], [3], [9], [11], [12], [15], [18], [20], [24], [25], [27], [33], [35], [36], [39], [42], [44], [48], [49], [51], [59], [61], [99], [105], [107], [108], [112], [116], [117], [118], [119], [120], [121], [122], [123], [124], [125], [126], [128] [2018-12-03 04:42:11,123 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 04:42:11,123 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 04:42:11,186 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 04:42:11,186 INFO L272 AbstractInterpreter]: Visited 40 different actions 104 times. Merged at 19 different actions 53 times. Widened at 2 different actions 2 times. Performed 728 root evaluator evaluations with a maximum evaluation depth of 4. Performed 728 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 8 fixpoints after 8 different actions. Largest state had 37 variables. [2018-12-03 04:42:11,187 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:11,187 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 04:42:11,187 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:11,187 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:11,196 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:42:11,196 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 04:42:11,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:11,222 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:11,240 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-03 04:42:11,240 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:11,319 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-03 04:42:11,346 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:11,346 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 13 [2018-12-03 04:42:11,346 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:11,346 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-03 04:42:11,346 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-03 04:42:11,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:11,347 INFO L87 Difference]: Start difference. First operand 84 states and 88 transitions. Second operand 13 states. [2018-12-03 04:42:11,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:11,376 INFO L93 Difference]: Finished difference Result 87 states and 91 transitions. [2018-12-03 04:42:11,377 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-03 04:42:11,377 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 64 [2018-12-03 04:42:11,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:11,377 INFO L225 Difference]: With dead ends: 87 [2018-12-03 04:42:11,377 INFO L226 Difference]: Without dead ends: 87 [2018-12-03 04:42:11,378 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 118 SyntacticMatches, 10 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:11,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-12-03 04:42:11,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 87. [2018-12-03 04:42:11,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-12-03 04:42:11,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 91 transitions. [2018-12-03 04:42:11,380 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 91 transitions. Word has length 64 [2018-12-03 04:42:11,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:11,380 INFO L480 AbstractCegarLoop]: Abstraction has 87 states and 91 transitions. [2018-12-03 04:42:11,380 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-03 04:42:11,380 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 91 transitions. [2018-12-03 04:42:11,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-12-03 04:42:11,381 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:11,381 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:11,381 INFO L423 AbstractCegarLoop]: === Iteration 19 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:11,381 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:11,381 INFO L82 PathProgramCache]: Analyzing trace with hash -1653003108, now seen corresponding path program 2 times [2018-12-03 04:42:11,381 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:11,382 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:11,382 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:42:11,382 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:11,382 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:11,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:11,411 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-03 04:42:11,411 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:11,411 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:11,411 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:11,411 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:11,411 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:11,411 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:11,420 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 04:42:11,420 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 04:42:11,451 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-12-03 04:42:11,451 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:42:11,453 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:11,460 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-03 04:42:11,460 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:11,497 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-03 04:42:11,522 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:11,522 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2018-12-03 04:42:11,522 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:11,522 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 04:42:11,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 04:42:11,522 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-12-03 04:42:11,523 INFO L87 Difference]: Start difference. First operand 87 states and 91 transitions. Second operand 5 states. [2018-12-03 04:42:11,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:11,534 INFO L93 Difference]: Finished difference Result 96 states and 100 transitions. [2018-12-03 04:42:11,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-03 04:42:11,534 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2018-12-03 04:42:11,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:11,535 INFO L225 Difference]: With dead ends: 96 [2018-12-03 04:42:11,535 INFO L226 Difference]: Without dead ends: 96 [2018-12-03 04:42:11,535 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 132 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-12-03 04:42:11,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-12-03 04:42:11,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 92. [2018-12-03 04:42:11,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-12-03 04:42:11,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 96 transitions. [2018-12-03 04:42:11,538 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 96 transitions. Word has length 67 [2018-12-03 04:42:11,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:11,538 INFO L480 AbstractCegarLoop]: Abstraction has 92 states and 96 transitions. [2018-12-03 04:42:11,538 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 04:42:11,538 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 96 transitions. [2018-12-03 04:42:11,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-03 04:42:11,539 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:11,539 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:11,539 INFO L423 AbstractCegarLoop]: === Iteration 20 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:11,539 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:11,539 INFO L82 PathProgramCache]: Analyzing trace with hash 2101599232, now seen corresponding path program 3 times [2018-12-03 04:42:11,539 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:11,540 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:11,540 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:42:11,540 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:11,540 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:11,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:11,569 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-03 04:42:11,569 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:11,569 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:11,569 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:11,569 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:11,570 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:11,570 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:11,582 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-03 04:42:11,582 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-03 04:42:11,605 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-03 04:42:11,605 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:42:11,607 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:11,612 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-03 04:42:11,612 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:11,640 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-03 04:42:11,655 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:11,655 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 9 [2018-12-03 04:42:11,655 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:11,656 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 04:42:11,656 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 04:42:11,656 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-03 04:42:11,656 INFO L87 Difference]: Start difference. First operand 92 states and 96 transitions. Second operand 6 states. [2018-12-03 04:42:11,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:11,671 INFO L93 Difference]: Finished difference Result 101 states and 105 transitions. [2018-12-03 04:42:11,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 04:42:11,671 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-12-03 04:42:11,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:11,672 INFO L225 Difference]: With dead ends: 101 [2018-12-03 04:42:11,672 INFO L226 Difference]: Without dead ends: 101 [2018-12-03 04:42:11,672 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 141 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-03 04:42:11,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-12-03 04:42:11,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 97. [2018-12-03 04:42:11,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-03 04:42:11,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 101 transitions. [2018-12-03 04:42:11,675 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 101 transitions. Word has length 72 [2018-12-03 04:42:11,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:11,675 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 101 transitions. [2018-12-03 04:42:11,675 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 04:42:11,675 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 101 transitions. [2018-12-03 04:42:11,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-12-03 04:42:11,676 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:11,676 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:11,676 INFO L423 AbstractCegarLoop]: === Iteration 21 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:11,676 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:11,676 INFO L82 PathProgramCache]: Analyzing trace with hash 913517340, now seen corresponding path program 4 times [2018-12-03 04:42:11,676 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:11,677 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:11,677 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:42:11,677 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:11,677 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:11,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:11,716 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-03 04:42:11,717 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:11,717 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:11,717 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:11,717 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:11,717 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:11,717 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:11,727 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:42:11,727 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 04:42:11,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:11,753 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:11,759 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-03 04:42:11,759 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:11,789 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-03 04:42:11,804 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:11,804 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 11 [2018-12-03 04:42:11,805 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:11,805 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-03 04:42:11,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-03 04:42:11,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-03 04:42:11,805 INFO L87 Difference]: Start difference. First operand 97 states and 101 transitions. Second operand 7 states. [2018-12-03 04:42:11,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:11,821 INFO L93 Difference]: Finished difference Result 106 states and 110 transitions. [2018-12-03 04:42:11,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-03 04:42:11,821 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 77 [2018-12-03 04:42:11,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:11,821 INFO L225 Difference]: With dead ends: 106 [2018-12-03 04:42:11,821 INFO L226 Difference]: Without dead ends: 106 [2018-12-03 04:42:11,821 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 150 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-03 04:42:11,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-03 04:42:11,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 102. [2018-12-03 04:42:11,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-12-03 04:42:11,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 106 transitions. [2018-12-03 04:42:11,823 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 106 transitions. Word has length 77 [2018-12-03 04:42:11,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:11,823 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 106 transitions. [2018-12-03 04:42:11,823 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-03 04:42:11,823 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 106 transitions. [2018-12-03 04:42:11,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-03 04:42:11,823 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:11,824 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:11,824 INFO L423 AbstractCegarLoop]: === Iteration 22 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:11,824 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:11,824 INFO L82 PathProgramCache]: Analyzing trace with hash -515576448, now seen corresponding path program 5 times [2018-12-03 04:42:11,824 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:11,824 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:11,824 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:42:11,824 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:11,824 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:11,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:11,861 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-03 04:42:11,861 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:11,861 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:11,861 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:11,861 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:11,861 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:11,861 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:11,872 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 04:42:11,872 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 04:42:11,895 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-12-03 04:42:11,895 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:42:11,897 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:11,922 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 179 trivial. 0 not checked. [2018-12-03 04:42:11,922 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:11,940 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 179 trivial. 0 not checked. [2018-12-03 04:42:11,955 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:11,955 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 4, 4] total 11 [2018-12-03 04:42:11,955 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:11,955 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-03 04:42:11,955 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-03 04:42:11,955 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2018-12-03 04:42:11,956 INFO L87 Difference]: Start difference. First operand 102 states and 106 transitions. Second operand 9 states. [2018-12-03 04:42:11,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:11,993 INFO L93 Difference]: Finished difference Result 120 states and 124 transitions. [2018-12-03 04:42:11,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 04:42:11,993 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 82 [2018-12-03 04:42:11,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:11,994 INFO L225 Difference]: With dead ends: 120 [2018-12-03 04:42:11,994 INFO L226 Difference]: Without dead ends: 120 [2018-12-03 04:42:11,994 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 161 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2018-12-03 04:42:11,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-12-03 04:42:11,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 112. [2018-12-03 04:42:11,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-12-03 04:42:11,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 116 transitions. [2018-12-03 04:42:11,996 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 116 transitions. Word has length 82 [2018-12-03 04:42:11,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:11,996 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 116 transitions. [2018-12-03 04:42:11,996 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-03 04:42:11,996 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 116 transitions. [2018-12-03 04:42:11,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-12-03 04:42:11,996 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:11,996 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 5, 5, 5, 5, 5, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:11,996 INFO L423 AbstractCegarLoop]: === Iteration 23 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:11,997 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:11,997 INFO L82 PathProgramCache]: Analyzing trace with hash -1249559972, now seen corresponding path program 6 times [2018-12-03 04:42:11,997 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:11,997 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:11,997 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:42:11,997 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:11,997 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:12,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:12,026 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-03 04:42:12,026 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:12,026 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:12,027 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:12,027 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:12,027 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:12,027 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:12,033 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-03 04:42:12,033 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-03 04:42:12,056 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-03 04:42:12,056 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:42:12,057 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:12,069 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-03 04:42:12,069 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:12,135 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-03 04:42:12,154 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:12,154 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 13 [2018-12-03 04:42:12,154 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:12,154 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-03 04:42:12,154 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-03 04:42:12,154 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:12,155 INFO L87 Difference]: Start difference. First operand 112 states and 116 transitions. Second operand 9 states. [2018-12-03 04:42:12,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:12,175 INFO L93 Difference]: Finished difference Result 121 states and 125 transitions. [2018-12-03 04:42:12,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-03 04:42:12,175 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 92 [2018-12-03 04:42:12,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:12,176 INFO L225 Difference]: With dead ends: 121 [2018-12-03 04:42:12,176 INFO L226 Difference]: Without dead ends: 121 [2018-12-03 04:42:12,176 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 178 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:12,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-12-03 04:42:12,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 117. [2018-12-03 04:42:12,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-12-03 04:42:12,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 121 transitions. [2018-12-03 04:42:12,178 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 121 transitions. Word has length 92 [2018-12-03 04:42:12,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:12,179 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 121 transitions. [2018-12-03 04:42:12,179 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-03 04:42:12,179 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 121 transitions. [2018-12-03 04:42:12,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-12-03 04:42:12,179 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:12,179 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 6, 6, 6, 6, 6, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:12,180 INFO L423 AbstractCegarLoop]: === Iteration 24 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:12,180 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:12,180 INFO L82 PathProgramCache]: Analyzing trace with hash -1783504008, now seen corresponding path program 7 times [2018-12-03 04:42:12,180 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:12,180 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:12,181 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:42:12,181 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:12,181 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:12,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:12,226 INFO L134 CoverageAnalysis]: Checked inductivity of 233 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-03 04:42:12,226 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:12,226 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:12,226 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:12,226 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:12,226 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:12,227 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:12,234 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:42:12,234 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 04:42:12,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:12,269 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:12,281 INFO L134 CoverageAnalysis]: Checked inductivity of 233 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-03 04:42:12,281 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:12,343 INFO L134 CoverageAnalysis]: Checked inductivity of 233 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-03 04:42:12,358 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:12,358 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 13 [2018-12-03 04:42:12,358 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:12,358 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-03 04:42:12,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-03 04:42:12,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:12,359 INFO L87 Difference]: Start difference. First operand 117 states and 121 transitions. Second operand 10 states. [2018-12-03 04:42:12,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:12,383 INFO L93 Difference]: Finished difference Result 126 states and 130 transitions. [2018-12-03 04:42:12,384 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 04:42:12,384 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 97 [2018-12-03 04:42:12,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:12,384 INFO L225 Difference]: With dead ends: 126 [2018-12-03 04:42:12,384 INFO L226 Difference]: Without dead ends: 126 [2018-12-03 04:42:12,384 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 187 SyntacticMatches, 4 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:12,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-12-03 04:42:12,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 122. [2018-12-03 04:42:12,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-12-03 04:42:12,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 126 transitions. [2018-12-03 04:42:12,386 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 126 transitions. Word has length 97 [2018-12-03 04:42:12,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:12,386 INFO L480 AbstractCegarLoop]: Abstraction has 122 states and 126 transitions. [2018-12-03 04:42:12,386 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-03 04:42:12,386 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 126 transitions. [2018-12-03 04:42:12,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-03 04:42:12,386 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:12,387 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:12,387 INFO L423 AbstractCegarLoop]: === Iteration 25 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:12,387 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:12,387 INFO L82 PathProgramCache]: Analyzing trace with hash -2083615780, now seen corresponding path program 8 times [2018-12-03 04:42:12,387 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:12,387 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:12,387 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:42:12,387 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:12,387 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:12,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:12,440 INFO L134 CoverageAnalysis]: Checked inductivity of 264 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-03 04:42:12,440 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:12,441 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:12,441 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:12,441 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:12,441 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:12,441 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:12,447 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 04:42:12,447 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 04:42:12,475 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-12-03 04:42:12,475 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:42:12,477 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:12,495 INFO L134 CoverageAnalysis]: Checked inductivity of 264 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 257 trivial. 0 not checked. [2018-12-03 04:42:12,496 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:12,526 INFO L134 CoverageAnalysis]: Checked inductivity of 264 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 257 trivial. 0 not checked. [2018-12-03 04:42:12,540 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:12,540 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 5, 5] total 16 [2018-12-03 04:42:12,540 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:12,541 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-03 04:42:12,541 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-03 04:42:12,541 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=168, Unknown=0, NotChecked=0, Total=240 [2018-12-03 04:42:12,541 INFO L87 Difference]: Start difference. First operand 122 states and 126 transitions. Second operand 13 states. [2018-12-03 04:42:12,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:12,595 INFO L93 Difference]: Finished difference Result 140 states and 144 transitions. [2018-12-03 04:42:12,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-03 04:42:12,595 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 102 [2018-12-03 04:42:12,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:12,595 INFO L225 Difference]: With dead ends: 140 [2018-12-03 04:42:12,595 INFO L226 Difference]: Without dead ends: 140 [2018-12-03 04:42:12,596 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 199 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=168, Unknown=0, NotChecked=0, Total=240 [2018-12-03 04:42:12,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-12-03 04:42:12,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 132. [2018-12-03 04:42:12,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-12-03 04:42:12,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 136 transitions. [2018-12-03 04:42:12,597 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 136 transitions. Word has length 102 [2018-12-03 04:42:12,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:12,597 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 136 transitions. [2018-12-03 04:42:12,597 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-03 04:42:12,597 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 136 transitions. [2018-12-03 04:42:12,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-03 04:42:12,598 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:12,598 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:12,598 INFO L423 AbstractCegarLoop]: === Iteration 26 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:12,598 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:12,598 INFO L82 PathProgramCache]: Analyzing trace with hash 581933952, now seen corresponding path program 9 times [2018-12-03 04:42:12,598 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:12,599 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:12,599 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:42:12,599 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:12,599 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:12,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:12,645 INFO L134 CoverageAnalysis]: Checked inductivity of 311 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 163 trivial. 0 not checked. [2018-12-03 04:42:12,645 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:12,645 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:12,645 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:12,645 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:12,645 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:12,645 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:12,654 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-03 04:42:12,655 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-03 04:42:12,680 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-03 04:42:12,680 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:42:12,682 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:12,694 INFO L134 CoverageAnalysis]: Checked inductivity of 311 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 163 trivial. 0 not checked. [2018-12-03 04:42:12,694 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:12,735 INFO L134 CoverageAnalysis]: Checked inductivity of 311 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 163 trivial. 0 not checked. [2018-12-03 04:42:12,750 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:12,750 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 13 [2018-12-03 04:42:12,750 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:12,750 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-03 04:42:12,750 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-03 04:42:12,751 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:12,751 INFO L87 Difference]: Start difference. First operand 132 states and 136 transitions. Second operand 12 states. [2018-12-03 04:42:12,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:12,778 INFO L93 Difference]: Finished difference Result 141 states and 145 transitions. [2018-12-03 04:42:12,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-03 04:42:12,779 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 112 [2018-12-03 04:42:12,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:12,779 INFO L225 Difference]: With dead ends: 141 [2018-12-03 04:42:12,779 INFO L226 Difference]: Without dead ends: 141 [2018-12-03 04:42:12,779 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 234 GetRequests, 215 SyntacticMatches, 8 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:12,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-12-03 04:42:12,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 137. [2018-12-03 04:42:12,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-12-03 04:42:12,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 141 transitions. [2018-12-03 04:42:12,781 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 141 transitions. Word has length 112 [2018-12-03 04:42:12,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:12,781 INFO L480 AbstractCegarLoop]: Abstraction has 137 states and 141 transitions. [2018-12-03 04:42:12,781 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-03 04:42:12,781 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 141 transitions. [2018-12-03 04:42:12,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-12-03 04:42:12,782 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:12,782 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 9, 9, 9, 9, 9, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:12,782 INFO L423 AbstractCegarLoop]: === Iteration 27 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:12,782 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:12,782 INFO L82 PathProgramCache]: Analyzing trace with hash -1884774756, now seen corresponding path program 10 times [2018-12-03 04:42:12,782 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:12,782 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:12,782 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:42:12,782 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:12,783 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:12,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:12,835 INFO L134 CoverageAnalysis]: Checked inductivity of 352 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 163 trivial. 0 not checked. [2018-12-03 04:42:12,835 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:12,835 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:12,835 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:12,835 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:12,835 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:12,835 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:12,841 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:42:12,841 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 04:42:12,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:12,873 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:12,882 INFO L134 CoverageAnalysis]: Checked inductivity of 352 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 163 trivial. 0 not checked. [2018-12-03 04:42:12,882 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:12,929 INFO L134 CoverageAnalysis]: Checked inductivity of 352 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 163 trivial. 0 not checked. [2018-12-03 04:42:12,943 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:12,944 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 13 [2018-12-03 04:42:12,944 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:12,944 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-03 04:42:12,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-03 04:42:12,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:12,944 INFO L87 Difference]: Start difference. First operand 137 states and 141 transitions. Second operand 13 states. [2018-12-03 04:42:12,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:12,972 INFO L93 Difference]: Finished difference Result 142 states and 146 transitions. [2018-12-03 04:42:12,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-03 04:42:12,972 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 117 [2018-12-03 04:42:12,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:12,973 INFO L225 Difference]: With dead ends: 142 [2018-12-03 04:42:12,973 INFO L226 Difference]: Without dead ends: 142 [2018-12-03 04:42:12,973 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 224 SyntacticMatches, 10 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:12,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-03 04:42:12,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-03 04:42:12,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-03 04:42:12,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 146 transitions. [2018-12-03 04:42:12,976 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 146 transitions. Word has length 117 [2018-12-03 04:42:12,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:12,976 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 146 transitions. [2018-12-03 04:42:12,976 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-03 04:42:12,976 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 146 transitions. [2018-12-03 04:42:12,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-03 04:42:12,977 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:12,977 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:12,977 INFO L423 AbstractCegarLoop]: === Iteration 28 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:12,977 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:12,978 INFO L82 PathProgramCache]: Analyzing trace with hash -1532941056, now seen corresponding path program 11 times [2018-12-03 04:42:12,978 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:12,978 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:12,978 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:42:12,978 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:12,978 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:12,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:13,014 INFO L134 CoverageAnalysis]: Checked inductivity of 398 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:13,014 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:13,014 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:13,014 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:13,014 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:13,014 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:13,014 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:13,022 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 04:42:13,022 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 04:42:13,061 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-12-03 04:42:13,061 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:42:13,064 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:13,077 INFO L134 CoverageAnalysis]: Checked inductivity of 398 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:13,078 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:13,123 INFO L134 CoverageAnalysis]: Checked inductivity of 398 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:13,138 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:13,138 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 11 [2018-12-03 04:42:13,138 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:13,138 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-03 04:42:13,138 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-03 04:42:13,138 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-03 04:42:13,138 INFO L87 Difference]: Start difference. First operand 142 states and 146 transitions. Second operand 7 states. [2018-12-03 04:42:13,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:13,157 INFO L93 Difference]: Finished difference Result 151 states and 155 transitions. [2018-12-03 04:42:13,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-03 04:42:13,158 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 122 [2018-12-03 04:42:13,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:13,158 INFO L225 Difference]: With dead ends: 151 [2018-12-03 04:42:13,158 INFO L226 Difference]: Without dead ends: 151 [2018-12-03 04:42:13,159 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 249 GetRequests, 240 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-03 04:42:13,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-12-03 04:42:13,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 147. [2018-12-03 04:42:13,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-12-03 04:42:13,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 151 transitions. [2018-12-03 04:42:13,161 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 151 transitions. Word has length 122 [2018-12-03 04:42:13,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:13,161 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 151 transitions. [2018-12-03 04:42:13,161 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-03 04:42:13,161 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 151 transitions. [2018-12-03 04:42:13,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-12-03 04:42:13,162 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:13,162 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:13,162 INFO L423 AbstractCegarLoop]: === Iteration 29 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:13,162 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:13,162 INFO L82 PathProgramCache]: Analyzing trace with hash 1963431288, now seen corresponding path program 12 times [2018-12-03 04:42:13,162 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:13,162 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:13,163 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:42:13,163 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:13,163 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:13,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:13,215 INFO L134 CoverageAnalysis]: Checked inductivity of 414 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:13,215 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:13,215 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:13,215 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:13,215 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:13,215 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:13,216 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:13,223 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-03 04:42:13,223 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-03 04:42:13,370 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-03 04:42:13,370 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:42:13,372 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:13,382 INFO L134 CoverageAnalysis]: Checked inductivity of 414 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:13,382 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:13,414 INFO L134 CoverageAnalysis]: Checked inductivity of 414 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:13,429 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:13,429 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2018-12-03 04:42:13,429 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:13,429 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-03 04:42:13,429 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-03 04:42:13,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:13,430 INFO L87 Difference]: Start difference. First operand 147 states and 151 transitions. Second operand 8 states. [2018-12-03 04:42:13,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:13,450 INFO L93 Difference]: Finished difference Result 156 states and 160 transitions. [2018-12-03 04:42:13,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 04:42:13,451 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 127 [2018-12-03 04:42:13,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:13,451 INFO L225 Difference]: With dead ends: 156 [2018-12-03 04:42:13,451 INFO L226 Difference]: Without dead ends: 156 [2018-12-03 04:42:13,451 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 260 GetRequests, 249 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:13,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-03 04:42:13,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 152. [2018-12-03 04:42:13,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-12-03 04:42:13,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 156 transitions. [2018-12-03 04:42:13,454 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 156 transitions. Word has length 127 [2018-12-03 04:42:13,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:13,454 INFO L480 AbstractCegarLoop]: Abstraction has 152 states and 156 transitions. [2018-12-03 04:42:13,454 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-03 04:42:13,455 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 156 transitions. [2018-12-03 04:42:13,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-12-03 04:42:13,455 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:13,455 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:13,455 INFO L423 AbstractCegarLoop]: === Iteration 30 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:13,456 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:13,456 INFO L82 PathProgramCache]: Analyzing trace with hash 958904320, now seen corresponding path program 13 times [2018-12-03 04:42:13,456 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:13,456 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:13,456 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:42:13,456 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:13,457 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:13,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:13,512 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:13,512 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:13,512 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:13,513 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:13,513 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:13,513 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:13,513 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:13,521 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:42:13,521 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 04:42:13,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:13,557 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:13,566 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:13,566 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:13,603 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:13,618 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:13,618 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 13 [2018-12-03 04:42:13,618 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:13,618 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-03 04:42:13,618 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-03 04:42:13,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:13,618 INFO L87 Difference]: Start difference. First operand 152 states and 156 transitions. Second operand 9 states. [2018-12-03 04:42:13,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:13,637 INFO L93 Difference]: Finished difference Result 161 states and 165 transitions. [2018-12-03 04:42:13,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-03 04:42:13,637 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 132 [2018-12-03 04:42:13,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:13,638 INFO L225 Difference]: With dead ends: 161 [2018-12-03 04:42:13,638 INFO L226 Difference]: Without dead ends: 161 [2018-12-03 04:42:13,638 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 271 GetRequests, 258 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:13,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-12-03 04:42:13,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 157. [2018-12-03 04:42:13,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-12-03 04:42:13,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 161 transitions. [2018-12-03 04:42:13,640 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 161 transitions. Word has length 132 [2018-12-03 04:42:13,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:13,641 INFO L480 AbstractCegarLoop]: Abstraction has 157 states and 161 transitions. [2018-12-03 04:42:13,641 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-03 04:42:13,641 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 161 transitions. [2018-12-03 04:42:13,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-12-03 04:42:13,641 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:13,642 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:13,642 INFO L423 AbstractCegarLoop]: === Iteration 31 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:13,642 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:13,642 INFO L82 PathProgramCache]: Analyzing trace with hash -169874824, now seen corresponding path program 14 times [2018-12-03 04:42:13,642 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:13,643 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:13,643 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:42:13,643 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:13,643 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:13,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:13,696 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:13,696 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:13,696 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:13,696 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:13,697 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:13,697 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:13,697 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:13,705 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 04:42:13,705 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 04:42:13,861 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-12-03 04:42:13,861 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:42:13,864 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:13,959 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:13,960 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:14,017 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:14,032 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:14,032 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 12, 9] total 22 [2018-12-03 04:42:14,033 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:14,033 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-03 04:42:14,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-03 04:42:14,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=164, Invalid=298, Unknown=0, NotChecked=0, Total=462 [2018-12-03 04:42:14,033 INFO L87 Difference]: Start difference. First operand 157 states and 161 transitions. Second operand 19 states. [2018-12-03 04:42:14,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:14,110 INFO L93 Difference]: Finished difference Result 166 states and 170 transitions. [2018-12-03 04:42:14,110 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-03 04:42:14,110 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 137 [2018-12-03 04:42:14,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:14,110 INFO L225 Difference]: With dead ends: 166 [2018-12-03 04:42:14,111 INFO L226 Difference]: Without dead ends: 166 [2018-12-03 04:42:14,111 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 283 GetRequests, 258 SyntacticMatches, 4 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=184, Invalid=322, Unknown=0, NotChecked=0, Total=506 [2018-12-03 04:42:14,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-12-03 04:42:14,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 162. [2018-12-03 04:42:14,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-12-03 04:42:14,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 166 transitions. [2018-12-03 04:42:14,113 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 166 transitions. Word has length 137 [2018-12-03 04:42:14,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:14,113 INFO L480 AbstractCegarLoop]: Abstraction has 162 states and 166 transitions. [2018-12-03 04:42:14,113 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-03 04:42:14,113 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 166 transitions. [2018-12-03 04:42:14,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-12-03 04:42:14,113 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:14,113 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:14,114 INFO L423 AbstractCegarLoop]: === Iteration 32 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:14,114 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:14,114 INFO L82 PathProgramCache]: Analyzing trace with hash -1958968576, now seen corresponding path program 15 times [2018-12-03 04:42:14,114 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:14,114 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:14,114 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:42:14,114 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:14,114 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:14,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:14,157 INFO L134 CoverageAnalysis]: Checked inductivity of 492 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:14,157 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:14,157 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:14,157 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:14,158 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:14,158 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:14,158 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:14,163 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-03 04:42:14,163 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-03 04:42:14,574 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-03 04:42:14,574 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:42:14,577 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:14,591 INFO L134 CoverageAnalysis]: Checked inductivity of 492 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:14,591 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:14,633 INFO L134 CoverageAnalysis]: Checked inductivity of 492 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:14,648 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:14,648 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 13 [2018-12-03 04:42:14,648 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:14,648 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-03 04:42:14,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-03 04:42:14,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:14,649 INFO L87 Difference]: Start difference. First operand 162 states and 166 transitions. Second operand 11 states. [2018-12-03 04:42:14,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:14,677 INFO L93 Difference]: Finished difference Result 171 states and 175 transitions. [2018-12-03 04:42:14,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-03 04:42:14,677 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 142 [2018-12-03 04:42:14,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:14,678 INFO L225 Difference]: With dead ends: 171 [2018-12-03 04:42:14,678 INFO L226 Difference]: Without dead ends: 171 [2018-12-03 04:42:14,678 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 293 GetRequests, 276 SyntacticMatches, 6 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:14,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-12-03 04:42:14,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 167. [2018-12-03 04:42:14,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-12-03 04:42:14,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 171 transitions. [2018-12-03 04:42:14,680 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 171 transitions. Word has length 142 [2018-12-03 04:42:14,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:14,680 INFO L480 AbstractCegarLoop]: Abstraction has 167 states and 171 transitions. [2018-12-03 04:42:14,680 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-03 04:42:14,680 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 171 transitions. [2018-12-03 04:42:14,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-12-03 04:42:14,680 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:14,680 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:14,680 INFO L423 AbstractCegarLoop]: === Iteration 33 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:14,680 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:14,681 INFO L82 PathProgramCache]: Analyzing trace with hash 940703608, now seen corresponding path program 16 times [2018-12-03 04:42:14,681 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:14,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:14,681 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:42:14,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:14,681 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:14,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:14,746 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:14,746 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:14,746 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:14,746 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:14,746 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:14,746 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:14,746 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:14,752 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:42:14,752 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 04:42:14,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:14,795 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:14,806 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:14,806 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:14,871 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:14,885 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:14,885 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 13 [2018-12-03 04:42:14,885 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:14,885 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-03 04:42:14,885 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-03 04:42:14,886 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:14,886 INFO L87 Difference]: Start difference. First operand 167 states and 171 transitions. Second operand 12 states. [2018-12-03 04:42:14,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:14,920 INFO L93 Difference]: Finished difference Result 176 states and 180 transitions. [2018-12-03 04:42:14,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-03 04:42:14,920 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 147 [2018-12-03 04:42:14,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:14,920 INFO L225 Difference]: With dead ends: 176 [2018-12-03 04:42:14,920 INFO L226 Difference]: Without dead ends: 176 [2018-12-03 04:42:14,921 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 304 GetRequests, 285 SyntacticMatches, 8 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 04:42:14,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-12-03 04:42:14,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 172. [2018-12-03 04:42:14,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-12-03 04:42:14,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 176 transitions. [2018-12-03 04:42:14,923 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 176 transitions. Word has length 147 [2018-12-03 04:42:14,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:14,923 INFO L480 AbstractCegarLoop]: Abstraction has 172 states and 176 transitions. [2018-12-03 04:42:14,923 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-03 04:42:14,923 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 176 transitions. [2018-12-03 04:42:14,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-12-03 04:42:14,923 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:14,923 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:14,924 INFO L423 AbstractCegarLoop]: === Iteration 34 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:14,924 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:14,924 INFO L82 PathProgramCache]: Analyzing trace with hash -1374712320, now seen corresponding path program 17 times [2018-12-03 04:42:14,924 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:14,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:14,924 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 04:42:14,925 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:14,925 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:14,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 04:42:14,995 INFO L134 CoverageAnalysis]: Checked inductivity of 569 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:14,995 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:14,995 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 04:42:14,996 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 04:42:14,996 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 04:42:14,996 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 04:42:14,996 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 04:42:15,004 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 04:42:15,004 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 04:42:15,528 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-12-03 04:42:15,528 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 04:42:15,532 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 04:42:15,648 INFO L134 CoverageAnalysis]: Checked inductivity of 569 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:15,649 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 04:42:15,709 INFO L134 CoverageAnalysis]: Checked inductivity of 569 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-03 04:42:15,724 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 04:42:15,724 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 15, 12] total 26 [2018-12-03 04:42:15,724 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 04:42:15,724 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-12-03 04:42:15,724 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-12-03 04:42:15,725 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=216, Invalid=434, Unknown=0, NotChecked=0, Total=650 [2018-12-03 04:42:15,725 INFO L87 Difference]: Start difference. First operand 172 states and 176 transitions. Second operand 25 states. [2018-12-03 04:42:15,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 04:42:15,804 INFO L93 Difference]: Finished difference Result 177 states and 181 transitions. [2018-12-03 04:42:15,805 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-03 04:42:15,805 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 152 [2018-12-03 04:42:15,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 04:42:15,805 INFO L225 Difference]: With dead ends: 177 [2018-12-03 04:42:15,805 INFO L226 Difference]: Without dead ends: 177 [2018-12-03 04:42:15,806 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 316 GetRequests, 282 SyntacticMatches, 9 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 375 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=240, Invalid=462, Unknown=0, NotChecked=0, Total=702 [2018-12-03 04:42:15,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-12-03 04:42:15,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 177. [2018-12-03 04:42:15,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-12-03 04:42:15,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 181 transitions. [2018-12-03 04:42:15,808 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 181 transitions. Word has length 152 [2018-12-03 04:42:15,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 04:42:15,808 INFO L480 AbstractCegarLoop]: Abstraction has 177 states and 181 transitions. [2018-12-03 04:42:15,808 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-12-03 04:42:15,808 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 181 transitions. [2018-12-03 04:42:15,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2018-12-03 04:42:15,808 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 04:42:15,808 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 04:42:15,809 INFO L423 AbstractCegarLoop]: === Iteration 35 === [getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-03 04:42:15,809 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 04:42:15,809 INFO L82 PathProgramCache]: Analyzing trace with hash -1502751624, now seen corresponding path program 18 times [2018-12-03 04:42:15,809 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 04:42:15,809 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:15,809 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 04:42:15,809 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 04:42:15,809 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 04:42:15,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-03 04:42:15,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-03 04:42:15,943 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-03 04:42:15,991 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.12 04:42:15 BoogieIcfgContainer [2018-12-03 04:42:15,991 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-03 04:42:15,991 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-03 04:42:15,991 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-03 04:42:15,992 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-03 04:42:15,992 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 04:41:50" (3/4) ... [2018-12-03 04:42:15,994 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-03 04:42:16,032 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_90ca7d6d-a0e5-4c20-9080-2719c7170513/bin-2019/utaipan/witness.graphml [2018-12-03 04:42:16,033 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-03 04:42:16,033 INFO L168 Benchmark]: Toolchain (without parser) took 25795.43 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 498.6 MB). Free memory was 953.5 MB in the beginning and 1.0 GB in the end (delta: -75.3 MB). Peak memory consumption was 423.3 MB. Max. memory is 11.5 GB. [2018-12-03 04:42:16,033 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 973.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-03 04:42:16,033 INFO L168 Benchmark]: CACSL2BoogieTranslator took 150.46 ms. Allocated memory is still 1.0 GB. Free memory was 953.5 MB in the beginning and 942.7 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. [2018-12-03 04:42:16,034 INFO L168 Benchmark]: Boogie Procedure Inliner took 14.36 ms. Allocated memory is still 1.0 GB. Free memory was 942.7 MB in the beginning and 937.3 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-12-03 04:42:16,034 INFO L168 Benchmark]: Boogie Preprocessor took 48.51 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 147.8 MB). Free memory was 937.3 MB in the beginning and 1.1 GB in the end (delta: -202.4 MB). Peak memory consumption was 13.1 MB. Max. memory is 11.5 GB. [2018-12-03 04:42:16,034 INFO L168 Benchmark]: RCFGBuilder took 206.89 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 24.5 MB). Peak memory consumption was 24.5 MB. Max. memory is 11.5 GB. [2018-12-03 04:42:16,034 INFO L168 Benchmark]: TraceAbstraction took 25331.53 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 350.7 MB). Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 73.7 MB). Peak memory consumption was 424.4 MB. Max. memory is 11.5 GB. [2018-12-03 04:42:16,034 INFO L168 Benchmark]: Witness Printer took 41.13 ms. Allocated memory is still 1.5 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 12.8 MB). Peak memory consumption was 12.8 MB. Max. memory is 11.5 GB. [2018-12-03 04:42:16,035 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 973.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 150.46 ms. Allocated memory is still 1.0 GB. Free memory was 953.5 MB in the beginning and 942.7 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 14.36 ms. Allocated memory is still 1.0 GB. Free memory was 942.7 MB in the beginning and 937.3 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 48.51 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 147.8 MB). Free memory was 937.3 MB in the beginning and 1.1 GB in the end (delta: -202.4 MB). Peak memory consumption was 13.1 MB. Max. memory is 11.5 GB. * RCFGBuilder took 206.89 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 24.5 MB). Peak memory consumption was 24.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 25331.53 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 350.7 MB). Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 73.7 MB). Peak memory consumption was 424.4 MB. Max. memory is 11.5 GB. * Witness Printer took 41.13 ms. Allocated memory is still 1.5 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 12.8 MB). Peak memory consumption was 12.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 38]: pointer dereference may fail pointer dereference may fail We found a FailurePath: [L6] static int array[10]; [L17] static int numbers2[10]; [L36] static int numbers4[10]; [L45] CALL getNumbers4() VAL [array={108:0}, numbers2={105:0}, numbers4={112:0}] [L35] CALL, EXPR getNumbers3() VAL [array={108:0}, numbers2={105:0}, numbers4={112:0}] [L25] CALL, EXPR getNumbers2() VAL [array={108:0}, numbers2={105:0}, numbers4={112:0}] [L16] CALL, EXPR getNumbers() VAL [array={108:0}, numbers2={105:0}, numbers4={112:0}] [L8] int i = 0; VAL [array={108:0}, i=0, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=0, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=0, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=1, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=1, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=1, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=2, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=2, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=2, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=3, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=3, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=3, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=4, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=4, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=4, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=5, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=5, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=5, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=6, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=6, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=6, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=7, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=7, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=7, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=8, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=8, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=8, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=9, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=9, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=9, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=10, numbers2={105:0}, numbers4={112:0}] [L8] COND FALSE !(i < 10) VAL [array={108:0}, i=10, numbers2={105:0}, numbers4={112:0}] [L12] return array; VAL [\result={108:0}, array={108:0}, i=10, numbers2={105:0}, numbers4={112:0}] [L16] RET, EXPR getNumbers() VAL [array={108:0}, getNumbers()={108:0}, numbers2={105:0}, numbers4={112:0}] [L16] int* numbers = getNumbers(); [L18] int i = 0; VAL [array={108:0}, i=0, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=0, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=0, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=0] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=0, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=0] [L18] ++i VAL [array={108:0}, i=1, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=1, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=1, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=1] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=1, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=1] [L18] ++i VAL [array={108:0}, i=2, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=2, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=2, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=2] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=2, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=2] [L18] ++i VAL [array={108:0}, i=3, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=3, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=3, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=3] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=3, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=3] [L18] ++i VAL [array={108:0}, i=4, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=4, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=4, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=4] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=4, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=4] [L18] ++i VAL [array={108:0}, i=5, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=5, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=5, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=5] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=5, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=5] [L18] ++i VAL [array={108:0}, i=6, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=6, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=6, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=6] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=6, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=6] [L18] ++i VAL [array={108:0}, i=7, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=7, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=7, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=7] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=7, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=7] [L18] ++i VAL [array={108:0}, i=8, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=8, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=8, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=8] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=8, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=8] [L18] ++i VAL [array={108:0}, i=9, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=9, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=9, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=9] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=9, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=9] [L18] ++i VAL [array={108:0}, i=10, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND FALSE !(i < 10) VAL [array={108:0}, i=10, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L21] return numbers2; VAL [\result={105:0}, array={108:0}, i=10, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L25] RET, EXPR getNumbers2() VAL [array={108:0}, getNumbers2()={105:0}, numbers2={105:0}, numbers4={112:0}] [L25] int* numbers = getNumbers2(); [L26] int numbers3[10]; [L27] int i = 0; VAL [array={108:0}, i=0, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=0, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=0, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=0] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=0, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=0] [L27] ++i VAL [array={108:0}, i=1, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=1, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=1, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=1] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=1, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=1] [L27] ++i VAL [array={108:0}, i=2, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=2, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=2, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=2] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=2, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=2] [L27] ++i VAL [array={108:0}, i=3, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=3, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=3, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=3] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=3, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=3] [L27] ++i VAL [array={108:0}, i=4, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=4, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=4, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=4] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=4, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=4] [L27] ++i VAL [array={108:0}, i=5, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=5, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=5, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=5] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=5, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=5] [L27] ++i VAL [array={108:0}, i=6, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=6, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=6, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=6] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=6, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=6] [L27] ++i VAL [array={108:0}, i=7, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=7, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=7, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=7] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=7, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=7] [L27] ++i VAL [array={108:0}, i=8, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=8, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=8, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=8] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=8, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=8] [L27] ++i VAL [array={108:0}, i=9, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=9, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=9, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=9] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=9, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=9] [L27] ++i VAL [array={108:0}, i=10, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND FALSE !(i < 10) VAL [array={108:0}, i=10, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L31] return numbers3; [L31] return numbers3; VAL [\result={106:0}, array={108:0}, i=10, numbers={105:0}, numbers2={105:0}, numbers4={112:0}] [L35] RET, EXPR getNumbers3() VAL [array={108:0}, getNumbers3()={106:0}, numbers2={105:0}, numbers4={112:0}] [L35] int* numbers = getNumbers3(); [L37] int i = 0; VAL [array={108:0}, i=0, numbers={106:0}, numbers2={105:0}, numbers4={112:0}] [L37] COND TRUE i < 10 VAL [array={108:0}, i=0, numbers={106:0}, numbers2={105:0}, numbers4={112:0}] [L38] numbers[i] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 70 locations, 17 error locations. UNSAFE Result, 25.2s OverallTime, 35 OverallIterations, 10 TraceHistogramMax, 1.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1930 SDtfs, 973 SDslu, 9391 SDs, 0 SdLazy, 1865 SolverSat, 99 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 4948 GetRequests, 4476 SyntacticMatches, 95 SemanticMatches, 377 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1819 ImplicationChecksByTransitivity, 15.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=177occurred in iteration=34, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.5s AbstIntTime, 8 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 34 MinimizatonAttempts, 77 StatesRemovedByMinimization, 21 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 1.9s SatisfiabilityAnalysisTime, 19.3s InterpolantComputationTime, 4943 NumberOfCodeBlocks, 4591 NumberOfCodeBlocksAsserted, 89 NumberOfCheckSat, 7034 ConstructedInterpolants, 236 QuantifiedInterpolants, 1867558 SizeOfPredicates, 79 NumberOfNonLiveVariables, 9907 ConjunctsInSsa, 323 ConjunctsInUnsatCore, 94 InterpolantComputations, 16 PerfectInterpolantSequences, 13257/18417 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...