./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4867b1d8e60a05de2199d52aa990071fe8bd647c ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4867b1d8e60a05de2199d52aa990071fe8bd647c .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-02 20:50:07,518 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-02 20:50:07,519 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-02 20:50:07,525 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-02 20:50:07,525 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-02 20:50:07,526 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-02 20:50:07,527 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-02 20:50:07,527 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-02 20:50:07,528 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-02 20:50:07,529 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-02 20:50:07,529 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-02 20:50:07,529 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-02 20:50:07,530 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-02 20:50:07,530 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-02 20:50:07,531 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-02 20:50:07,531 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-02 20:50:07,531 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-02 20:50:07,532 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-02 20:50:07,533 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-02 20:50:07,534 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-02 20:50:07,534 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-02 20:50:07,535 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-02 20:50:07,536 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-02 20:50:07,536 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-02 20:50:07,536 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-02 20:50:07,537 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-02 20:50:07,537 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-02 20:50:07,538 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-02 20:50:07,538 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-02 20:50:07,539 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-02 20:50:07,539 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-02 20:50:07,539 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-02 20:50:07,539 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-02 20:50:07,539 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-02 20:50:07,540 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-02 20:50:07,540 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-02 20:50:07,540 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf [2018-12-02 20:50:07,548 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-02 20:50:07,548 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-02 20:50:07,549 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-02 20:50:07,549 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-02 20:50:07,549 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-02 20:50:07,549 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-02 20:50:07,549 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-02 20:50:07,549 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-02 20:50:07,549 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-02 20:50:07,549 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-02 20:50:07,549 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-02 20:50:07,549 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-02 20:50:07,550 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-02 20:50:07,550 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-02 20:50:07,550 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-02 20:50:07,550 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-02 20:50:07,550 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-02 20:50:07,550 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-02 20:50:07,550 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-02 20:50:07,550 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-02 20:50:07,551 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-02 20:50:07,551 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-02 20:50:07,551 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-02 20:50:07,551 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-02 20:50:07,551 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-02 20:50:07,551 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-02 20:50:07,551 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-02 20:50:07,551 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-02 20:50:07,551 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-02 20:50:07,551 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-02 20:50:07,551 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 20:50:07,552 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-02 20:50:07,552 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-02 20:50:07,552 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-02 20:50:07,552 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-02 20:50:07,552 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-02 20:50:07,552 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4867b1d8e60a05de2199d52aa990071fe8bd647c [2018-12-02 20:50:07,569 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-02 20:50:07,576 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-02 20:50:07,579 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-02 20:50:07,579 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-02 20:50:07,580 INFO L276 PluginConnector]: CDTParser initialized [2018-12-02 20:50:07,580 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-02 20:50:07,618 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/data/69e874a33/a71eb33a780241d4b3a7e00b159daf90/FLAG8233b582a [2018-12-02 20:50:08,057 INFO L307 CDTParser]: Found 1 translation units. [2018-12-02 20:50:08,058 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-02 20:50:08,068 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/data/69e874a33/a71eb33a780241d4b3a7e00b159daf90/FLAG8233b582a [2018-12-02 20:50:08,078 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/data/69e874a33/a71eb33a780241d4b3a7e00b159daf90 [2018-12-02 20:50:08,080 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-02 20:50:08,081 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-02 20:50:08,081 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-02 20:50:08,081 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-02 20:50:08,083 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-02 20:50:08,083 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:50:08" (1/1) ... [2018-12-02 20:50:08,085 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4f5fc0d3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:08, skipping insertion in model container [2018-12-02 20:50:08,085 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:50:08" (1/1) ... [2018-12-02 20:50:08,089 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-02 20:50:08,110 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-02 20:50:08,321 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 20:50:08,330 INFO L191 MainTranslator]: Completed pre-run [2018-12-02 20:50:08,364 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 20:50:08,396 INFO L195 MainTranslator]: Completed translation [2018-12-02 20:50:08,396 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:08 WrapperNode [2018-12-02 20:50:08,396 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-02 20:50:08,397 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-02 20:50:08,397 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-02 20:50:08,397 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-02 20:50:08,402 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:08" (1/1) ... [2018-12-02 20:50:08,413 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:08" (1/1) ... [2018-12-02 20:50:08,417 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-02 20:50:08,418 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-02 20:50:08,418 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-02 20:50:08,418 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-02 20:50:08,423 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:08" (1/1) ... [2018-12-02 20:50:08,423 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:08" (1/1) ... [2018-12-02 20:50:08,426 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:08" (1/1) ... [2018-12-02 20:50:08,426 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:08" (1/1) ... [2018-12-02 20:50:08,434 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:08" (1/1) ... [2018-12-02 20:50:08,437 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:08" (1/1) ... [2018-12-02 20:50:08,438 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:08" (1/1) ... [2018-12-02 20:50:08,439 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-02 20:50:08,440 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-02 20:50:08,440 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-02 20:50:08,440 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-02 20:50:08,440 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:08" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 20:50:08,471 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-02 20:50:08,471 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-02 20:50:08,471 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-02 20:50:08,471 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-02 20:50:08,471 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-02 20:50:08,471 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-02 20:50:08,471 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-02 20:50:08,471 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-02 20:50:08,471 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-02 20:50:08,471 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-02 20:50:08,471 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-02 20:50:08,471 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-02 20:50:08,471 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-02 20:50:08,472 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-02 20:50:08,472 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-02 20:50:08,472 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-02 20:50:08,472 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-02 20:50:08,472 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-02 20:50:08,472 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-02 20:50:08,472 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-02 20:50:08,472 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-02 20:50:08,472 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-02 20:50:08,472 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-02 20:50:08,472 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-02 20:50:08,472 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-02 20:50:08,472 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-02 20:50:08,472 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-02 20:50:08,472 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-02 20:50:08,473 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-02 20:50:08,473 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-02 20:50:08,473 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-02 20:50:08,473 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-02 20:50:08,473 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-02 20:50:08,473 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-02 20:50:08,473 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-02 20:50:08,473 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-02 20:50:08,473 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-02 20:50:08,473 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-02 20:50:08,473 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-02 20:50:08,473 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-02 20:50:08,473 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-02 20:50:08,473 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-02 20:50:08,473 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-02 20:50:08,474 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-02 20:50:08,474 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-02 20:50:08,474 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-02 20:50:08,474 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-02 20:50:08,474 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-02 20:50:08,474 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-02 20:50:08,641 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-02 20:50:08,716 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-02 20:50:08,716 INFO L280 CfgBuilder]: Removed 0 assue(true) statements. [2018-12-02 20:50:08,716 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:50:08 BoogieIcfgContainer [2018-12-02 20:50:08,716 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-02 20:50:08,717 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-02 20:50:08,717 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-02 20:50:08,719 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-02 20:50:08,719 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 08:50:08" (1/3) ... [2018-12-02 20:50:08,719 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@ea8da0c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:50:08, skipping insertion in model container [2018-12-02 20:50:08,720 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:08" (2/3) ... [2018-12-02 20:50:08,720 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@ea8da0c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:50:08, skipping insertion in model container [2018-12-02 20:50:08,720 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:50:08" (3/3) ... [2018-12-02 20:50:08,721 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-02 20:50:08,727 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-02 20:50:08,732 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-12-02 20:50:08,741 INFO L257 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2018-12-02 20:50:08,756 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-02 20:50:08,756 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-02 20:50:08,756 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-02 20:50:08,756 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-02 20:50:08,756 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-02 20:50:08,756 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-02 20:50:08,756 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-02 20:50:08,757 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-02 20:50:08,767 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states. [2018-12-02 20:50:08,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-02 20:50:08,773 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:08,773 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:08,775 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:08,778 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:08,778 INFO L82 PathProgramCache]: Analyzing trace with hash -210168619, now seen corresponding path program 1 times [2018-12-02 20:50:08,779 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:08,811 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:08,811 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:08,811 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:08,811 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:08,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:08,894 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:08,895 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:08,895 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 20:50:08,895 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:08,898 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:50:08,905 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:50:08,906 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:50:08,907 INFO L87 Difference]: Start difference. First operand 142 states. Second operand 5 states. [2018-12-02 20:50:09,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:09,004 INFO L93 Difference]: Finished difference Result 153 states and 164 transitions. [2018-12-02 20:50:09,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:50:09,005 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-02 20:50:09,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:09,014 INFO L225 Difference]: With dead ends: 153 [2018-12-02 20:50:09,014 INFO L226 Difference]: Without dead ends: 150 [2018-12-02 20:50:09,015 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:50:09,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-02 20:50:09,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 144. [2018-12-02 20:50:09,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-02 20:50:09,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 155 transitions. [2018-12-02 20:50:09,044 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 155 transitions. Word has length 17 [2018-12-02 20:50:09,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:09,044 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 155 transitions. [2018-12-02 20:50:09,044 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:50:09,044 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 155 transitions. [2018-12-02 20:50:09,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-02 20:50:09,044 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:09,044 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:09,045 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:09,045 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:09,045 INFO L82 PathProgramCache]: Analyzing trace with hash -210168618, now seen corresponding path program 1 times [2018-12-02 20:50:09,045 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:09,046 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:09,046 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:09,046 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:09,046 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:09,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:09,102 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:09,102 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:09,102 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 20:50:09,103 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:09,103 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 20:50:09,104 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 20:50:09,104 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-02 20:50:09,104 INFO L87 Difference]: Start difference. First operand 144 states and 155 transitions. Second operand 6 states. [2018-12-02 20:50:09,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:09,221 INFO L93 Difference]: Finished difference Result 149 states and 160 transitions. [2018-12-02 20:50:09,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 20:50:09,222 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-12-02 20:50:09,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:09,223 INFO L225 Difference]: With dead ends: 149 [2018-12-02 20:50:09,224 INFO L226 Difference]: Without dead ends: 149 [2018-12-02 20:50:09,224 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-02 20:50:09,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-02 20:50:09,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 144. [2018-12-02 20:50:09,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-02 20:50:09,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 154 transitions. [2018-12-02 20:50:09,235 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 154 transitions. Word has length 17 [2018-12-02 20:50:09,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:09,235 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 154 transitions. [2018-12-02 20:50:09,235 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 20:50:09,236 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 154 transitions. [2018-12-02 20:50:09,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-02 20:50:09,236 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:09,236 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:09,236 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:09,237 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:09,237 INFO L82 PathProgramCache]: Analyzing trace with hash -181539468, now seen corresponding path program 1 times [2018-12-02 20:50:09,237 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:09,238 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:09,238 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:09,239 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:09,239 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:09,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:09,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:09,283 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:09,283 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 20:50:09,283 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:09,283 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:50:09,284 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:50:09,284 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:50:09,284 INFO L87 Difference]: Start difference. First operand 144 states and 154 transitions. Second operand 5 states. [2018-12-02 20:50:09,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:09,299 INFO L93 Difference]: Finished difference Result 143 states and 151 transitions. [2018-12-02 20:50:09,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:50:09,299 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-02 20:50:09,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:09,300 INFO L225 Difference]: With dead ends: 143 [2018-12-02 20:50:09,300 INFO L226 Difference]: Without dead ends: 143 [2018-12-02 20:50:09,301 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:50:09,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-12-02 20:50:09,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 141. [2018-12-02 20:50:09,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-12-02 20:50:09,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 149 transitions. [2018-12-02 20:50:09,309 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 149 transitions. Word has length 17 [2018-12-02 20:50:09,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:09,309 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 149 transitions. [2018-12-02 20:50:09,309 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:50:09,309 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 149 transitions. [2018-12-02 20:50:09,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-02 20:50:09,310 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:09,310 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:09,311 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:09,311 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:09,311 INFO L82 PathProgramCache]: Analyzing trace with hash -1863702628, now seen corresponding path program 1 times [2018-12-02 20:50:09,311 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:09,312 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:09,312 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:09,313 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:09,313 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:09,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:09,349 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:09,349 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:09,349 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 20:50:09,349 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:09,349 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:50:09,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:50:09,350 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:50:09,350 INFO L87 Difference]: Start difference. First operand 141 states and 149 transitions. Second operand 5 states. [2018-12-02 20:50:09,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:09,360 INFO L93 Difference]: Finished difference Result 143 states and 150 transitions. [2018-12-02 20:50:09,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:50:09,361 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2018-12-02 20:50:09,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:09,361 INFO L225 Difference]: With dead ends: 143 [2018-12-02 20:50:09,361 INFO L226 Difference]: Without dead ends: 143 [2018-12-02 20:50:09,362 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:50:09,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-12-02 20:50:09,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 141. [2018-12-02 20:50:09,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-12-02 20:50:09,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 148 transitions. [2018-12-02 20:50:09,366 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 148 transitions. Word has length 27 [2018-12-02 20:50:09,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:09,367 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 148 transitions. [2018-12-02 20:50:09,367 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:50:09,367 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 148 transitions. [2018-12-02 20:50:09,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-02 20:50:09,367 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:09,367 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:09,368 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:09,368 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:09,368 INFO L82 PathProgramCache]: Analyzing trace with hash 1920730491, now seen corresponding path program 1 times [2018-12-02 20:50:09,368 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:09,369 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:09,369 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:09,369 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:09,369 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:09,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:09,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:09,427 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:09,427 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 20:50:09,427 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:09,427 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 20:50:09,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 20:50:09,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-02 20:50:09,428 INFO L87 Difference]: Start difference. First operand 141 states and 148 transitions. Second operand 7 states. [2018-12-02 20:50:09,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:09,460 INFO L93 Difference]: Finished difference Result 157 states and 165 transitions. [2018-12-02 20:50:09,460 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 20:50:09,460 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-12-02 20:50:09,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:09,461 INFO L225 Difference]: With dead ends: 157 [2018-12-02 20:50:09,461 INFO L226 Difference]: Without dead ends: 157 [2018-12-02 20:50:09,462 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-02 20:50:09,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-12-02 20:50:09,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 150. [2018-12-02 20:50:09,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-02 20:50:09,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 157 transitions. [2018-12-02 20:50:09,469 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 157 transitions. Word has length 27 [2018-12-02 20:50:09,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:09,469 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 157 transitions. [2018-12-02 20:50:09,469 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 20:50:09,470 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 157 transitions. [2018-12-02 20:50:09,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-02 20:50:09,470 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:09,470 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:09,471 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:09,471 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:09,471 INFO L82 PathProgramCache]: Analyzing trace with hash 1565090870, now seen corresponding path program 1 times [2018-12-02 20:50:09,471 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:09,472 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:09,472 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:09,473 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:09,473 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:09,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:09,546 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:09,547 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:09,547 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 20:50:09,547 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:09,547 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-02 20:50:09,547 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-02 20:50:09,548 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-02 20:50:09,548 INFO L87 Difference]: Start difference. First operand 150 states and 157 transitions. Second operand 11 states. [2018-12-02 20:50:09,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:09,758 INFO L93 Difference]: Finished difference Result 149 states and 156 transitions. [2018-12-02 20:50:09,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-02 20:50:09,758 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-12-02 20:50:09,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:09,759 INFO L225 Difference]: With dead ends: 149 [2018-12-02 20:50:09,759 INFO L226 Difference]: Without dead ends: 149 [2018-12-02 20:50:09,760 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-12-02 20:50:09,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-02 20:50:09,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-12-02 20:50:09,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-12-02 20:50:09,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 156 transitions. [2018-12-02 20:50:09,763 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 156 transitions. Word has length 32 [2018-12-02 20:50:09,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:09,764 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 156 transitions. [2018-12-02 20:50:09,764 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-02 20:50:09,764 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 156 transitions. [2018-12-02 20:50:09,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-02 20:50:09,764 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:09,764 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:09,765 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:09,765 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:09,765 INFO L82 PathProgramCache]: Analyzing trace with hash 1565090871, now seen corresponding path program 1 times [2018-12-02 20:50:09,765 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:09,766 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:09,766 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:09,766 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:09,766 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:09,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:09,785 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:09,785 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:09,785 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 20:50:09,785 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:09,785 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 20:50:09,785 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 20:50:09,786 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 20:50:09,786 INFO L87 Difference]: Start difference. First operand 149 states and 156 transitions. Second operand 4 states. [2018-12-02 20:50:09,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:09,795 INFO L93 Difference]: Finished difference Result 152 states and 159 transitions. [2018-12-02 20:50:09,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 20:50:09,796 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-12-02 20:50:09,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:09,796 INFO L225 Difference]: With dead ends: 152 [2018-12-02 20:50:09,796 INFO L226 Difference]: Without dead ends: 150 [2018-12-02 20:50:09,796 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:50:09,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-02 20:50:09,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-02 20:50:09,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-02 20:50:09,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 157 transitions. [2018-12-02 20:50:09,800 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 157 transitions. Word has length 32 [2018-12-02 20:50:09,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:09,800 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 157 transitions. [2018-12-02 20:50:09,800 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 20:50:09,800 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 157 transitions. [2018-12-02 20:50:09,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-02 20:50:09,801 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:09,801 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:09,801 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:09,801 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:09,801 INFO L82 PathProgramCache]: Analyzing trace with hash -606653436, now seen corresponding path program 1 times [2018-12-02 20:50:09,801 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:09,802 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:09,802 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:09,802 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:09,802 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:09,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:09,823 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:09,823 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:09,823 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 20:50:09,824 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 34 with the following transitions: [2018-12-02 20:50:09,825 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [31], [36], [52], [59], [63], [67], [70], [72], [73], [77], [79], [80], [132], [135], [137], [138], [139], [157], [158], [159], [160], [161], [163], [169], [173], [179], [193], [194], [195] [2018-12-02 20:50:09,846 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 20:50:09,846 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 20:50:09,969 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-02 20:50:09,969 INFO L272 AbstractInterpreter]: Visited 33 different actions 41 times. Merged at 3 different actions 5 times. Never widened. Performed 352 root evaluator evaluations with a maximum evaluation depth of 4. Performed 352 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 2 fixpoints after 2 different actions. Largest state had 25 variables. [2018-12-02 20:50:09,983 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:09,983 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-02 20:50:09,984 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:09,984 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:50:09,990 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:09,990 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-02 20:50:10,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:10,018 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:10,039 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:10,039 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:50:10,089 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:10,107 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 20:50:10,107 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 9 [2018-12-02 20:50:10,107 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 20:50:10,108 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 20:50:10,108 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 20:50:10,108 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-12-02 20:50:10,108 INFO L87 Difference]: Start difference. First operand 150 states and 157 transitions. Second operand 6 states. [2018-12-02 20:50:10,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:10,125 INFO L93 Difference]: Finished difference Result 153 states and 160 transitions. [2018-12-02 20:50:10,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:50:10,126 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2018-12-02 20:50:10,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:10,127 INFO L225 Difference]: With dead ends: 153 [2018-12-02 20:50:10,127 INFO L226 Difference]: Without dead ends: 151 [2018-12-02 20:50:10,127 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 62 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-12-02 20:50:10,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-12-02 20:50:10,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-12-02 20:50:10,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-12-02 20:50:10,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 158 transitions. [2018-12-02 20:50:10,133 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 158 transitions. Word has length 33 [2018-12-02 20:50:10,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:10,133 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 158 transitions. [2018-12-02 20:50:10,133 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 20:50:10,133 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 158 transitions. [2018-12-02 20:50:10,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-02 20:50:10,134 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:10,135 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:10,135 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:10,135 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:10,135 INFO L82 PathProgramCache]: Analyzing trace with hash 788749783, now seen corresponding path program 2 times [2018-12-02 20:50:10,135 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:10,137 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:10,137 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:10,137 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:10,137 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:10,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:10,176 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:10,176 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:10,177 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 20:50:10,177 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 20:50:10,177 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 20:50:10,177 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:10,177 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:50:10,186 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 20:50:10,186 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-02 20:50:10,212 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-02 20:50:10,212 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 20:50:10,216 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:10,243 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:10,244 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:10,249 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:10,249 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-02 20:50:10,397 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-02 20:50:10,398 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:50:10,566 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-02 20:50:10,580 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-02 20:50:10,580 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12, 11] imperfect sequences [6] total 27 [2018-12-02 20:50:10,580 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:10,581 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-02 20:50:10,581 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-02 20:50:10,581 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=630, Unknown=0, NotChecked=0, Total=702 [2018-12-02 20:50:10,581 INFO L87 Difference]: Start difference. First operand 151 states and 158 transitions. Second operand 13 states. [2018-12-02 20:50:10,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:10,945 INFO L93 Difference]: Finished difference Result 210 states and 219 transitions. [2018-12-02 20:50:10,945 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-02 20:50:10,945 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 34 [2018-12-02 20:50:10,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:10,946 INFO L225 Difference]: With dead ends: 210 [2018-12-02 20:50:10,946 INFO L226 Difference]: Without dead ends: 210 [2018-12-02 20:50:10,947 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 46 SyntacticMatches, 2 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 181 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=99, Invalid=831, Unknown=0, NotChecked=0, Total=930 [2018-12-02 20:50:10,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2018-12-02 20:50:10,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 150. [2018-12-02 20:50:10,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-02 20:50:10,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 157 transitions. [2018-12-02 20:50:10,952 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 157 transitions. Word has length 34 [2018-12-02 20:50:10,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:10,953 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 157 transitions. [2018-12-02 20:50:10,953 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-02 20:50:10,953 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 157 transitions. [2018-12-02 20:50:10,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-02 20:50:10,954 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:10,954 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:10,954 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:10,954 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:10,954 INFO L82 PathProgramCache]: Analyzing trace with hash 507350654, now seen corresponding path program 1 times [2018-12-02 20:50:10,955 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:10,956 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:10,956 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 20:50:10,956 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:10,956 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:10,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:11,009 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:11,010 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:11,010 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 20:50:11,010 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:11,010 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 20:50:11,010 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 20:50:11,010 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-02 20:50:11,010 INFO L87 Difference]: Start difference. First operand 150 states and 157 transitions. Second operand 7 states. [2018-12-02 20:50:11,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:11,030 INFO L93 Difference]: Finished difference Result 160 states and 167 transitions. [2018-12-02 20:50:11,030 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 20:50:11,030 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-12-02 20:50:11,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:11,031 INFO L225 Difference]: With dead ends: 160 [2018-12-02 20:50:11,031 INFO L226 Difference]: Without dead ends: 160 [2018-12-02 20:50:11,031 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-02 20:50:11,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-02 20:50:11,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 156. [2018-12-02 20:50:11,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-12-02 20:50:11,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 163 transitions. [2018-12-02 20:50:11,034 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 163 transitions. Word has length 36 [2018-12-02 20:50:11,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:11,035 INFO L480 AbstractCegarLoop]: Abstraction has 156 states and 163 transitions. [2018-12-02 20:50:11,035 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 20:50:11,035 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 163 transitions. [2018-12-02 20:50:11,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-02 20:50:11,036 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:11,036 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:11,036 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:11,036 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:11,036 INFO L82 PathProgramCache]: Analyzing trace with hash -213733230, now seen corresponding path program 1 times [2018-12-02 20:50:11,036 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:11,037 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:11,037 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:11,037 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:11,037 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:11,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:11,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:11,052 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:11,052 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 20:50:11,052 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:11,052 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 20:50:11,052 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 20:50:11,052 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 20:50:11,052 INFO L87 Difference]: Start difference. First operand 156 states and 163 transitions. Second operand 3 states. [2018-12-02 20:50:11,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:11,112 INFO L93 Difference]: Finished difference Result 167 states and 173 transitions. [2018-12-02 20:50:11,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 20:50:11,113 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2018-12-02 20:50:11,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:11,113 INFO L225 Difference]: With dead ends: 167 [2018-12-02 20:50:11,113 INFO L226 Difference]: Without dead ends: 145 [2018-12-02 20:50:11,113 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 20:50:11,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-12-02 20:50:11,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 137. [2018-12-02 20:50:11,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-12-02 20:50:11,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 143 transitions. [2018-12-02 20:50:11,116 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 143 transitions. Word has length 34 [2018-12-02 20:50:11,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:11,116 INFO L480 AbstractCegarLoop]: Abstraction has 137 states and 143 transitions. [2018-12-02 20:50:11,116 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 20:50:11,116 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 143 transitions. [2018-12-02 20:50:11,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-12-02 20:50:11,117 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:11,117 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:11,117 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:11,117 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:11,117 INFO L82 PathProgramCache]: Analyzing trace with hash -582742571, now seen corresponding path program 1 times [2018-12-02 20:50:11,117 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:11,118 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:11,118 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:11,118 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:11,118 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:11,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:11,176 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-02 20:50:11,176 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:11,176 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 20:50:11,176 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:11,176 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-02 20:50:11,176 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-02 20:50:11,177 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-02 20:50:11,177 INFO L87 Difference]: Start difference. First operand 137 states and 143 transitions. Second operand 11 states. [2018-12-02 20:50:11,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:11,337 INFO L93 Difference]: Finished difference Result 135 states and 141 transitions. [2018-12-02 20:50:11,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-02 20:50:11,337 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 39 [2018-12-02 20:50:11,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:11,338 INFO L225 Difference]: With dead ends: 135 [2018-12-02 20:50:11,338 INFO L226 Difference]: Without dead ends: 135 [2018-12-02 20:50:11,338 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-12-02 20:50:11,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-12-02 20:50:11,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-12-02 20:50:11,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-12-02 20:50:11,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 141 transitions. [2018-12-02 20:50:11,340 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 141 transitions. Word has length 39 [2018-12-02 20:50:11,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:11,340 INFO L480 AbstractCegarLoop]: Abstraction has 135 states and 141 transitions. [2018-12-02 20:50:11,341 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-02 20:50:11,341 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 141 transitions. [2018-12-02 20:50:11,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-12-02 20:50:11,341 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:11,341 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:11,341 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:11,341 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:11,341 INFO L82 PathProgramCache]: Analyzing trace with hash -582742570, now seen corresponding path program 1 times [2018-12-02 20:50:11,341 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:11,342 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:11,342 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:11,342 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:11,342 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:11,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:11,366 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:11,366 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:11,366 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 20:50:11,366 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 40 with the following transitions: [2018-12-02 20:50:11,366 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [31], [36], [52], [59], [63], [67], [68], [71], [72], [73], [77], [79], [80], [124], [127], [132], [135], [137], [138], [139], [157], [158], [159], [160], [161], [163], [169], [173], [179], [180], [181], [193], [194], [195] [2018-12-02 20:50:11,367 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 20:50:11,367 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 20:50:11,413 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-02 20:50:11,413 INFO L272 AbstractInterpreter]: Visited 38 different actions 50 times. Merged at 3 different actions 8 times. Widened at 1 different actions 1 times. Performed 422 root evaluator evaluations with a maximum evaluation depth of 4. Performed 422 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 3 fixpoints after 2 different actions. Largest state had 25 variables. [2018-12-02 20:50:11,415 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:11,415 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-02 20:50:11,415 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:11,415 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:50:11,422 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:11,422 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-02 20:50:11,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:11,441 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:11,447 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:11,447 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:50:11,513 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:11,528 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 20:50:11,528 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 11 [2018-12-02 20:50:11,529 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 20:50:11,529 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 20:50:11,529 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 20:50:11,529 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-12-02 20:50:11,529 INFO L87 Difference]: Start difference. First operand 135 states and 141 transitions. Second operand 7 states. [2018-12-02 20:50:11,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:11,541 INFO L93 Difference]: Finished difference Result 138 states and 144 transitions. [2018-12-02 20:50:11,541 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 20:50:11,541 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 39 [2018-12-02 20:50:11,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:11,541 INFO L225 Difference]: With dead ends: 138 [2018-12-02 20:50:11,542 INFO L226 Difference]: Without dead ends: 136 [2018-12-02 20:50:11,542 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 73 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-12-02 20:50:11,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-02 20:50:11,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-12-02 20:50:11,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-02 20:50:11,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 142 transitions. [2018-12-02 20:50:11,544 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 142 transitions. Word has length 39 [2018-12-02 20:50:11,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:11,544 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 142 transitions. [2018-12-02 20:50:11,544 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 20:50:11,544 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 142 transitions. [2018-12-02 20:50:11,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-02 20:50:11,545 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:11,545 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:11,545 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:11,545 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:11,545 INFO L82 PathProgramCache]: Analyzing trace with hash -1733276311, now seen corresponding path program 2 times [2018-12-02 20:50:11,545 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:11,546 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:11,546 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:11,546 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:11,546 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:11,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:11,583 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:11,583 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:11,583 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 20:50:11,583 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 20:50:11,584 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 20:50:11,584 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:11,584 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:50:11,592 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 20:50:11,592 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-02 20:50:11,614 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-02 20:50:11,614 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 20:50:11,617 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:11,630 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:11,631 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:11,652 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:11,652 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-02 20:50:11,783 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-02 20:50:11,783 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:50:11,974 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-02 20:50:11,989 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-02 20:50:11,989 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12, 11] imperfect sequences [7] total 28 [2018-12-02 20:50:11,989 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:11,990 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-02 20:50:11,990 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-02 20:50:11,990 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=679, Unknown=0, NotChecked=0, Total=756 [2018-12-02 20:50:11,990 INFO L87 Difference]: Start difference. First operand 136 states and 142 transitions. Second operand 13 states. [2018-12-02 20:50:12,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:12,328 INFO L93 Difference]: Finished difference Result 134 states and 140 transitions. [2018-12-02 20:50:12,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-02 20:50:12,329 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 40 [2018-12-02 20:50:12,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:12,329 INFO L225 Difference]: With dead ends: 134 [2018-12-02 20:50:12,329 INFO L226 Difference]: Without dead ends: 134 [2018-12-02 20:50:12,330 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 56 SyntacticMatches, 4 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 215 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=104, Invalid=888, Unknown=0, NotChecked=0, Total=992 [2018-12-02 20:50:12,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-02 20:50:12,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-02 20:50:12,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-02 20:50:12,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 140 transitions. [2018-12-02 20:50:12,332 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 140 transitions. Word has length 40 [2018-12-02 20:50:12,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:12,332 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 140 transitions. [2018-12-02 20:50:12,332 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-02 20:50:12,333 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 140 transitions. [2018-12-02 20:50:12,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-02 20:50:12,333 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:12,333 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:12,333 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:12,333 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:12,334 INFO L82 PathProgramCache]: Analyzing trace with hash -682027113, now seen corresponding path program 1 times [2018-12-02 20:50:12,334 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:12,334 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:12,334 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 20:50:12,335 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:12,335 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:12,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:12,361 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-02 20:50:12,361 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:12,361 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 20:50:12,361 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:12,362 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 20:50:12,362 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 20:50:12,362 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-02 20:50:12,362 INFO L87 Difference]: Start difference. First operand 134 states and 140 transitions. Second operand 7 states. [2018-12-02 20:50:12,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:12,390 INFO L93 Difference]: Finished difference Result 136 states and 141 transitions. [2018-12-02 20:50:12,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 20:50:12,391 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 43 [2018-12-02 20:50:12,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:12,391 INFO L225 Difference]: With dead ends: 136 [2018-12-02 20:50:12,391 INFO L226 Difference]: Without dead ends: 134 [2018-12-02 20:50:12,392 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-02 20:50:12,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-02 20:50:12,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-02 20:50:12,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-02 20:50:12,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 139 transitions. [2018-12-02 20:50:12,395 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 139 transitions. Word has length 43 [2018-12-02 20:50:12,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:12,395 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 139 transitions. [2018-12-02 20:50:12,395 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 20:50:12,395 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 139 transitions. [2018-12-02 20:50:12,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-02 20:50:12,395 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:12,395 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:12,396 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:12,396 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:12,396 INFO L82 PathProgramCache]: Analyzing trace with hash 2138129783, now seen corresponding path program 1 times [2018-12-02 20:50:12,396 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:12,397 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:12,397 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:12,397 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:12,397 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:12,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:12,450 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-02 20:50:12,450 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:12,450 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-02 20:50:12,450 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:12,450 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 20:50:12,451 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 20:50:12,451 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-02 20:50:12,451 INFO L87 Difference]: Start difference. First operand 134 states and 139 transitions. Second operand 9 states. [2018-12-02 20:50:12,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:12,484 INFO L93 Difference]: Finished difference Result 138 states and 142 transitions. [2018-12-02 20:50:12,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 20:50:12,485 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 48 [2018-12-02 20:50:12,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:12,486 INFO L225 Difference]: With dead ends: 138 [2018-12-02 20:50:12,486 INFO L226 Difference]: Without dead ends: 134 [2018-12-02 20:50:12,486 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-02 20:50:12,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-02 20:50:12,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-02 20:50:12,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-02 20:50:12,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 138 transitions. [2018-12-02 20:50:12,489 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 138 transitions. Word has length 48 [2018-12-02 20:50:12,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:12,489 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 138 transitions. [2018-12-02 20:50:12,489 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 20:50:12,489 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 138 transitions. [2018-12-02 20:50:12,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-12-02 20:50:12,490 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:12,490 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:12,490 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:12,490 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:12,490 INFO L82 PathProgramCache]: Analyzing trace with hash -498769646, now seen corresponding path program 1 times [2018-12-02 20:50:12,491 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:12,491 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:12,491 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:12,491 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:12,492 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:12,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:12,582 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-02 20:50:12,582 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:12,582 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-12-02 20:50:12,582 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:12,583 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-02 20:50:12,583 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-02 20:50:12,583 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=157, Unknown=0, NotChecked=0, Total=182 [2018-12-02 20:50:12,583 INFO L87 Difference]: Start difference. First operand 134 states and 138 transitions. Second operand 14 states. [2018-12-02 20:50:12,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:12,789 INFO L93 Difference]: Finished difference Result 132 states and 136 transitions. [2018-12-02 20:50:12,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-02 20:50:12,789 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 59 [2018-12-02 20:50:12,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:12,789 INFO L225 Difference]: With dead ends: 132 [2018-12-02 20:50:12,789 INFO L226 Difference]: Without dead ends: 132 [2018-12-02 20:50:12,789 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2018-12-02 20:50:12,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-12-02 20:50:12,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-12-02 20:50:12,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-12-02 20:50:12,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 136 transitions. [2018-12-02 20:50:12,791 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 136 transitions. Word has length 59 [2018-12-02 20:50:12,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:12,792 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 136 transitions. [2018-12-02 20:50:12,792 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-02 20:50:12,792 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 136 transitions. [2018-12-02 20:50:12,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-12-02 20:50:12,792 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:12,792 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:12,792 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:12,792 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:12,793 INFO L82 PathProgramCache]: Analyzing trace with hash -498769645, now seen corresponding path program 1 times [2018-12-02 20:50:12,793 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:12,793 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:12,793 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:12,793 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:12,793 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:12,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:12,819 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:12,819 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:12,819 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 20:50:12,819 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 60 with the following transitions: [2018-12-02 20:50:12,820 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [27], [31], [36], [38], [52], [54], [59], [63], [66], [67], [68], [71], [72], [73], [77], [79], [80], [91], [94], [124], [125], [128], [131], [132], [135], [137], [138], [139], [140], [143], [157], [158], [159], [160], [161], [162], [163], [167], [169], [170], [173], [174], [175], [179], [180], [181], [182], [189], [193], [194], [195] [2018-12-02 20:50:12,821 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 20:50:12,821 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 20:50:12,868 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-02 20:50:12,869 INFO L272 AbstractInterpreter]: Visited 57 different actions 69 times. Merged at 3 different actions 8 times. Widened at 1 different actions 1 times. Performed 545 root evaluator evaluations with a maximum evaluation depth of 4. Performed 545 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 3 fixpoints after 2 different actions. Largest state had 26 variables. [2018-12-02 20:50:12,870 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:12,870 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-02 20:50:12,870 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:12,870 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:50:12,879 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:12,879 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-02 20:50:12,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:12,908 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:12,916 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:12,916 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:50:13,013 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:13,028 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 20:50:13,028 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2018-12-02 20:50:13,028 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 20:50:13,028 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-02 20:50:13,028 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-02 20:50:13,028 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-12-02 20:50:13,029 INFO L87 Difference]: Start difference. First operand 132 states and 136 transitions. Second operand 8 states. [2018-12-02 20:50:13,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:13,044 INFO L93 Difference]: Finished difference Result 135 states and 139 transitions. [2018-12-02 20:50:13,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 20:50:13,044 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 59 [2018-12-02 20:50:13,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:13,045 INFO L225 Difference]: With dead ends: 135 [2018-12-02 20:50:13,045 INFO L226 Difference]: Without dead ends: 133 [2018-12-02 20:50:13,045 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 112 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-12-02 20:50:13,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-12-02 20:50:13,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-12-02 20:50:13,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-12-02 20:50:13,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 137 transitions. [2018-12-02 20:50:13,047 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 137 transitions. Word has length 59 [2018-12-02 20:50:13,047 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:13,047 INFO L480 AbstractCegarLoop]: Abstraction has 133 states and 137 transitions. [2018-12-02 20:50:13,047 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-02 20:50:13,047 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 137 transitions. [2018-12-02 20:50:13,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-12-02 20:50:13,047 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:13,047 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:13,048 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:13,048 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:13,048 INFO L82 PathProgramCache]: Analyzing trace with hash -1880024794, now seen corresponding path program 2 times [2018-12-02 20:50:13,048 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:13,048 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:13,049 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:13,049 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:13,049 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:13,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:13,080 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:13,080 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:13,080 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 20:50:13,081 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 20:50:13,081 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 20:50:13,081 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:13,081 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:50:13,091 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 20:50:13,091 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-02 20:50:13,117 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-02 20:50:13,117 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 20:50:13,119 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:13,130 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:13,131 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:13,134 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:13,134 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-02 20:50:13,294 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-02 20:50:13,295 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:50:13,591 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-02 20:50:13,606 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-02 20:50:13,606 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15, 14] imperfect sequences [8] total 35 [2018-12-02 20:50:13,606 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:13,607 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-02 20:50:13,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-02 20:50:13,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=1089, Unknown=0, NotChecked=0, Total=1190 [2018-12-02 20:50:13,607 INFO L87 Difference]: Start difference. First operand 133 states and 137 transitions. Second operand 16 states. [2018-12-02 20:50:14,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:14,431 INFO L93 Difference]: Finished difference Result 131 states and 135 transitions. [2018-12-02 20:50:14,431 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-02 20:50:14,431 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 60 [2018-12-02 20:50:14,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:14,432 INFO L225 Difference]: With dead ends: 131 [2018-12-02 20:50:14,432 INFO L226 Difference]: Without dead ends: 131 [2018-12-02 20:50:14,433 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 90 SyntacticMatches, 4 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 364 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=135, Invalid=1425, Unknown=0, NotChecked=0, Total=1560 [2018-12-02 20:50:14,433 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-12-02 20:50:14,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-12-02 20:50:14,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-12-02 20:50:14,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 135 transitions. [2018-12-02 20:50:14,438 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 135 transitions. Word has length 60 [2018-12-02 20:50:14,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:14,439 INFO L480 AbstractCegarLoop]: Abstraction has 131 states and 135 transitions. [2018-12-02 20:50:14,439 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-02 20:50:14,439 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 135 transitions. [2018-12-02 20:50:14,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-12-02 20:50:14,440 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:14,441 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:14,441 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:14,441 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:14,441 INFO L82 PathProgramCache]: Analyzing trace with hash 9632276, now seen corresponding path program 1 times [2018-12-02 20:50:14,442 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:14,443 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:14,443 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 20:50:14,443 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:14,443 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:14,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:14,522 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-02 20:50:14,522 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:14,522 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 20:50:14,522 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:14,522 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 20:50:14,523 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 20:50:14,523 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-02 20:50:14,523 INFO L87 Difference]: Start difference. First operand 131 states and 135 transitions. Second operand 10 states. [2018-12-02 20:50:14,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:14,556 INFO L93 Difference]: Finished difference Result 134 states and 137 transitions. [2018-12-02 20:50:14,557 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 20:50:14,557 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 69 [2018-12-02 20:50:14,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:14,557 INFO L225 Difference]: With dead ends: 134 [2018-12-02 20:50:14,557 INFO L226 Difference]: Without dead ends: 131 [2018-12-02 20:50:14,558 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-02 20:50:14,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-12-02 20:50:14,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-12-02 20:50:14,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-12-02 20:50:14,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 134 transitions. [2018-12-02 20:50:14,560 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 134 transitions. Word has length 69 [2018-12-02 20:50:14,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:14,561 INFO L480 AbstractCegarLoop]: Abstraction has 131 states and 134 transitions. [2018-12-02 20:50:14,561 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 20:50:14,561 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 134 transitions. [2018-12-02 20:50:14,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-02 20:50:14,561 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:14,562 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:14,562 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:14,562 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:14,562 INFO L82 PathProgramCache]: Analyzing trace with hash -255714010, now seen corresponding path program 1 times [2018-12-02 20:50:14,562 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:14,563 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:14,563 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:14,563 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:14,563 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:14,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:14,678 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-02 20:50:14,678 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:14,678 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-12-02 20:50:14,678 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:14,678 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-02 20:50:14,678 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-02 20:50:14,678 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=211, Unknown=0, NotChecked=0, Total=240 [2018-12-02 20:50:14,678 INFO L87 Difference]: Start difference. First operand 131 states and 134 transitions. Second operand 16 states. [2018-12-02 20:50:14,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:14,928 INFO L93 Difference]: Finished difference Result 138 states and 141 transitions. [2018-12-02 20:50:14,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-02 20:50:14,928 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 82 [2018-12-02 20:50:14,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:14,929 INFO L225 Difference]: With dead ends: 138 [2018-12-02 20:50:14,929 INFO L226 Difference]: Without dead ends: 138 [2018-12-02 20:50:14,929 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2018-12-02 20:50:14,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-02 20:50:14,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 129. [2018-12-02 20:50:14,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-12-02 20:50:14,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 132 transitions. [2018-12-02 20:50:14,932 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 132 transitions. Word has length 82 [2018-12-02 20:50:14,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:14,932 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 132 transitions. [2018-12-02 20:50:14,932 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-02 20:50:14,932 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 132 transitions. [2018-12-02 20:50:14,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-02 20:50:14,933 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:14,933 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:14,933 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:14,933 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:14,934 INFO L82 PathProgramCache]: Analyzing trace with hash -255714009, now seen corresponding path program 1 times [2018-12-02 20:50:14,934 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:14,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:14,934 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:14,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:14,935 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:14,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:14,969 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:14,970 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:14,970 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 20:50:14,970 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 83 with the following transitions: [2018-12-02 20:50:14,970 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [29], [30], [31], [36], [38], [39], [42], [52], [54], [56], [59], [63], [66], [67], [68], [71], [72], [73], [77], [79], [80], [81], [91], [92], [95], [96], [99], [100], [124], [125], [128], [131], [132], [135], [137], [138], [139], [140], [143], [148], [149], [150], [157], [158], [159], [160], [161], [162], [163], [165], [167], [168], [169], [170], [173], [174], [175], [176], [177], [179], [180], [181], [182], [183], [189], [190], [191], [193], [194], [195] [2018-12-02 20:50:14,972 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 20:50:14,972 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 20:50:15,031 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-02 20:50:15,031 INFO L272 AbstractInterpreter]: Visited 79 different actions 87 times. Merged at 3 different actions 5 times. Never widened. Performed 684 root evaluator evaluations with a maximum evaluation depth of 4. Performed 684 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 2 fixpoints after 2 different actions. Largest state had 30 variables. [2018-12-02 20:50:15,033 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:15,033 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-02 20:50:15,033 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:15,033 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:50:15,042 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:15,042 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-02 20:50:15,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:15,090 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:15,108 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:15,108 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:50:15,282 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:15,312 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 20:50:15,312 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 15 [2018-12-02 20:50:15,312 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 20:50:15,312 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 20:50:15,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 20:50:15,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-12-02 20:50:15,313 INFO L87 Difference]: Start difference. First operand 129 states and 132 transitions. Second operand 9 states. [2018-12-02 20:50:15,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:15,336 INFO L93 Difference]: Finished difference Result 132 states and 135 transitions. [2018-12-02 20:50:15,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 20:50:15,336 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 82 [2018-12-02 20:50:15,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:15,337 INFO L225 Difference]: With dead ends: 132 [2018-12-02 20:50:15,337 INFO L226 Difference]: Without dead ends: 130 [2018-12-02 20:50:15,337 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 157 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-12-02 20:50:15,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-12-02 20:50:15,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 130. [2018-12-02 20:50:15,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-12-02 20:50:15,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 133 transitions. [2018-12-02 20:50:15,340 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 133 transitions. Word has length 82 [2018-12-02 20:50:15,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:15,340 INFO L480 AbstractCegarLoop]: Abstraction has 130 states and 133 transitions. [2018-12-02 20:50:15,340 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 20:50:15,340 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 133 transitions. [2018-12-02 20:50:15,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-12-02 20:50:15,341 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:15,341 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:15,341 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:15,341 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:15,341 INFO L82 PathProgramCache]: Analyzing trace with hash -444268620, now seen corresponding path program 2 times [2018-12-02 20:50:15,341 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:15,342 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:15,342 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:15,342 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:15,342 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:15,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:15,395 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:15,396 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:15,396 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 20:50:15,396 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 20:50:15,396 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 20:50:15,396 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:15,396 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:50:15,406 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 20:50:15,406 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-02 20:50:15,439 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-02 20:50:15,439 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 20:50:15,442 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:15,451 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:15,452 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:15,463 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:15,463 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-02 20:50:15,729 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-02 20:50:15,729 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:50:16,190 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-02 20:50:16,205 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-02 20:50:16,205 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18, 18] imperfect sequences [9] total 43 [2018-12-02 20:50:16,205 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:16,206 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-02 20:50:16,206 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-02 20:50:16,206 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=130, Invalid=1676, Unknown=0, NotChecked=0, Total=1806 [2018-12-02 20:50:16,206 INFO L87 Difference]: Start difference. First operand 130 states and 133 transitions. Second operand 19 states. [2018-12-02 20:50:16,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:16,652 INFO L93 Difference]: Finished difference Result 128 states and 131 transitions. [2018-12-02 20:50:16,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-02 20:50:16,652 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 83 [2018-12-02 20:50:16,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:16,653 INFO L225 Difference]: With dead ends: 128 [2018-12-02 20:50:16,653 INFO L226 Difference]: Without dead ends: 128 [2018-12-02 20:50:16,653 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 126 SyntacticMatches, 7 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 605 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=172, Invalid=2180, Unknown=0, NotChecked=0, Total=2352 [2018-12-02 20:50:16,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-12-02 20:50:16,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-12-02 20:50:16,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-12-02 20:50:16,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 131 transitions. [2018-12-02 20:50:16,655 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 131 transitions. Word has length 83 [2018-12-02 20:50:16,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:16,655 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 131 transitions. [2018-12-02 20:50:16,655 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-02 20:50:16,655 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 131 transitions. [2018-12-02 20:50:16,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-02 20:50:16,656 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:16,656 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:16,656 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:16,656 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:16,656 INFO L82 PathProgramCache]: Analyzing trace with hash 1689185031, now seen corresponding path program 1 times [2018-12-02 20:50:16,656 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:16,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:16,657 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 20:50:16,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:16,657 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:16,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:16,708 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-02 20:50:16,708 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:16,708 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 20:50:16,708 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:16,708 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 20:50:16,708 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 20:50:16,709 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-02 20:50:16,709 INFO L87 Difference]: Start difference. First operand 128 states and 131 transitions. Second operand 10 states. [2018-12-02 20:50:16,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:16,744 INFO L93 Difference]: Finished difference Result 130 states and 132 transitions. [2018-12-02 20:50:16,744 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 20:50:16,744 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 81 [2018-12-02 20:50:16,745 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:16,745 INFO L225 Difference]: With dead ends: 130 [2018-12-02 20:50:16,745 INFO L226 Difference]: Without dead ends: 128 [2018-12-02 20:50:16,745 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-02 20:50:16,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-12-02 20:50:16,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-12-02 20:50:16,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-12-02 20:50:16,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 130 transitions. [2018-12-02 20:50:16,747 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 130 transitions. Word has length 81 [2018-12-02 20:50:16,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:16,747 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 130 transitions. [2018-12-02 20:50:16,747 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 20:50:16,747 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 130 transitions. [2018-12-02 20:50:16,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-12-02 20:50:16,748 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:16,748 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:16,748 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:16,748 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:16,748 INFO L82 PathProgramCache]: Analyzing trace with hash 1600555844, now seen corresponding path program 1 times [2018-12-02 20:50:16,748 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:16,749 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:16,749 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:16,749 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:16,749 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:16,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:16,907 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-02 20:50:16,907 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:16,908 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-02 20:50:16,908 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:16,908 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-02 20:50:16,908 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-02 20:50:16,908 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=343, Unknown=0, NotChecked=0, Total=380 [2018-12-02 20:50:16,908 INFO L87 Difference]: Start difference. First operand 128 states and 130 transitions. Second operand 20 states. [2018-12-02 20:50:17,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:17,221 INFO L93 Difference]: Finished difference Result 131 states and 133 transitions. [2018-12-02 20:50:17,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-02 20:50:17,222 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 97 [2018-12-02 20:50:17,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:17,222 INFO L225 Difference]: With dead ends: 131 [2018-12-02 20:50:17,222 INFO L226 Difference]: Without dead ends: 131 [2018-12-02 20:50:17,223 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=637, Unknown=0, NotChecked=0, Total=702 [2018-12-02 20:50:17,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-12-02 20:50:17,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 126. [2018-12-02 20:50:17,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-12-02 20:50:17,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 128 transitions. [2018-12-02 20:50:17,225 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 128 transitions. Word has length 97 [2018-12-02 20:50:17,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:17,225 INFO L480 AbstractCegarLoop]: Abstraction has 126 states and 128 transitions. [2018-12-02 20:50:17,225 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-02 20:50:17,225 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 128 transitions. [2018-12-02 20:50:17,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-12-02 20:50:17,225 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:17,225 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:17,225 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:17,226 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:17,226 INFO L82 PathProgramCache]: Analyzing trace with hash 1600555845, now seen corresponding path program 1 times [2018-12-02 20:50:17,226 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:17,226 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:17,226 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:17,226 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:17,226 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:17,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:17,274 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:17,274 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:17,274 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 20:50:17,275 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 98 with the following transitions: [2018-12-02 20:50:17,275 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [29], [30], [31], [36], [38], [39], [40], [43], [44], [47], [48], [49], [52], [54], [56], [59], [63], [66], [67], [68], [71], [72], [73], [77], [79], [80], [81], [83], [86], [91], [92], [95], [96], [99], [100], [101], [104], [107], [124], [125], [128], [131], [132], [135], [137], [138], [139], [140], [143], [148], [149], [150], [157], [158], [159], [160], [161], [162], [163], [165], [167], [168], [169], [170], [171], [173], [174], [175], [176], [177], [179], [180], [181], [182], [183], [184], [185], [187], [189], [190], [191], [193], [194], [195] [2018-12-02 20:50:17,277 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 20:50:17,277 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 20:50:17,346 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-02 20:50:17,346 INFO L272 AbstractInterpreter]: Visited 93 different actions 105 times. Merged at 3 different actions 8 times. Widened at 1 different actions 1 times. Performed 836 root evaluator evaluations with a maximum evaluation depth of 6. Performed 836 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Found 3 fixpoints after 2 different actions. Largest state had 31 variables. [2018-12-02 20:50:17,347 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:17,347 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-02 20:50:17,348 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:17,348 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:50:17,357 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:17,357 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-02 20:50:17,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:17,407 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:17,420 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:17,420 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:50:17,577 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:17,592 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 20:50:17,592 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 17 [2018-12-02 20:50:17,592 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 20:50:17,593 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 20:50:17,593 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 20:50:17,593 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-12-02 20:50:17,593 INFO L87 Difference]: Start difference. First operand 126 states and 128 transitions. Second operand 10 states. [2018-12-02 20:50:17,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:17,620 INFO L93 Difference]: Finished difference Result 129 states and 131 transitions. [2018-12-02 20:50:17,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 20:50:17,620 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 97 [2018-12-02 20:50:17,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:17,620 INFO L225 Difference]: With dead ends: 129 [2018-12-02 20:50:17,620 INFO L226 Difference]: Without dead ends: 127 [2018-12-02 20:50:17,621 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 186 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-12-02 20:50:17,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-12-02 20:50:17,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-12-02 20:50:17,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-12-02 20:50:17,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 129 transitions. [2018-12-02 20:50:17,622 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 129 transitions. Word has length 97 [2018-12-02 20:50:17,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:17,622 INFO L480 AbstractCegarLoop]: Abstraction has 127 states and 129 transitions. [2018-12-02 20:50:17,622 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 20:50:17,622 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 129 transitions. [2018-12-02 20:50:17,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-02 20:50:17,623 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:17,623 INFO L402 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:17,623 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:17,623 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:17,623 INFO L82 PathProgramCache]: Analyzing trace with hash 295345432, now seen corresponding path program 2 times [2018-12-02 20:50:17,623 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:17,624 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:17,624 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:17,624 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:17,624 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:17,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:17,685 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:17,685 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:17,685 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 20:50:17,685 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 20:50:17,685 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 20:50:17,685 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:17,685 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:50:17,692 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 20:50:17,692 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-02 20:50:17,723 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-02 20:50:17,723 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 20:50:17,727 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:17,737 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:17,737 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:17,743 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:17,744 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-02 20:50:18,076 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-12-02 20:50:18,076 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:50:18,586 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-12-02 20:50:18,601 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-02 20:50:18,601 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [22, 22] imperfect sequences [10] total 52 [2018-12-02 20:50:18,601 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 20:50:18,601 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-12-02 20:50:18,601 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-12-02 20:50:18,602 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=162, Invalid=2490, Unknown=0, NotChecked=0, Total=2652 [2018-12-02 20:50:18,602 INFO L87 Difference]: Start difference. First operand 127 states and 129 transitions. Second operand 23 states. [2018-12-02 20:50:19,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:19,187 INFO L93 Difference]: Finished difference Result 125 states and 127 transitions. [2018-12-02 20:50:19,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-02 20:50:19,188 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 98 [2018-12-02 20:50:19,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:19,188 INFO L225 Difference]: With dead ends: 125 [2018-12-02 20:50:19,189 INFO L226 Difference]: Without dead ends: 125 [2018-12-02 20:50:19,189 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 146 SyntacticMatches, 9 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 947 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=218, Invalid=3322, Unknown=0, NotChecked=0, Total=3540 [2018-12-02 20:50:19,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-12-02 20:50:19,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2018-12-02 20:50:19,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-12-02 20:50:19,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 127 transitions. [2018-12-02 20:50:19,192 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 127 transitions. Word has length 98 [2018-12-02 20:50:19,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:19,192 INFO L480 AbstractCegarLoop]: Abstraction has 125 states and 127 transitions. [2018-12-02 20:50:19,192 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-12-02 20:50:19,192 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 127 transitions. [2018-12-02 20:50:19,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-12-02 20:50:19,193 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:19,193 INFO L402 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:19,193 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:19,193 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:19,193 INFO L82 PathProgramCache]: Analyzing trace with hash -214974791, now seen corresponding path program 1 times [2018-12-02 20:50:19,193 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:19,194 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:19,194 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 20:50:19,194 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:19,194 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:19,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:19,251 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:19,252 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:19,252 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 20:50:19,252 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 104 with the following transitions: [2018-12-02 20:50:19,252 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [29], [30], [31], [36], [38], [39], [40], [43], [44], [47], [48], [49], [52], [54], [56], [59], [63], [66], [67], [68], [71], [72], [73], [77], [79], [80], [81], [83], [86], [91], [92], [95], [96], [99], [100], [101], [104], [105], [108], [110], [112], [115], [116], [124], [125], [128], [131], [132], [135], [137], [138], [139], [140], [143], [148], [149], [150], [157], [158], [159], [160], [161], [162], [163], [165], [167], [168], [169], [170], [171], [173], [174], [175], [176], [177], [179], [180], [181], [182], [183], [184], [185], [187], [189], [190], [191], [193], [194], [195] [2018-12-02 20:50:19,253 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 20:50:19,254 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 20:50:19,322 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-02 20:50:19,323 INFO L272 AbstractInterpreter]: Visited 98 different actions 110 times. Merged at 3 different actions 8 times. Widened at 1 different actions 1 times. Performed 863 root evaluator evaluations with a maximum evaluation depth of 6. Performed 863 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Found 3 fixpoints after 2 different actions. Largest state had 31 variables. [2018-12-02 20:50:19,324 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:19,324 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-02 20:50:19,324 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:19,324 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:50:19,332 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:19,332 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-02 20:50:19,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:19,383 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:19,396 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:19,396 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:50:19,537 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:19,552 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 20:50:19,552 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 19 [2018-12-02 20:50:19,552 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 20:50:19,553 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-02 20:50:19,553 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-02 20:50:19,553 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-12-02 20:50:19,553 INFO L87 Difference]: Start difference. First operand 125 states and 127 transitions. Second operand 11 states. [2018-12-02 20:50:19,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:19,570 INFO L93 Difference]: Finished difference Result 128 states and 130 transitions. [2018-12-02 20:50:19,570 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 20:50:19,570 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 103 [2018-12-02 20:50:19,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:19,570 INFO L225 Difference]: With dead ends: 128 [2018-12-02 20:50:19,570 INFO L226 Difference]: Without dead ends: 126 [2018-12-02 20:50:19,570 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 197 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-12-02 20:50:19,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-12-02 20:50:19,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-12-02 20:50:19,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-12-02 20:50:19,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 128 transitions. [2018-12-02 20:50:19,572 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 128 transitions. Word has length 103 [2018-12-02 20:50:19,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:19,572 INFO L480 AbstractCegarLoop]: Abstraction has 126 states and 128 transitions. [2018-12-02 20:50:19,572 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-02 20:50:19,572 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 128 transitions. [2018-12-02 20:50:19,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-12-02 20:50:19,572 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:19,573 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:19,573 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:19,573 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:19,573 INFO L82 PathProgramCache]: Analyzing trace with hash 303425100, now seen corresponding path program 2 times [2018-12-02 20:50:19,573 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 20:50:19,574 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:19,574 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:19,574 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:50:19,574 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 20:50:19,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:19,648 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:19,648 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:19,648 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 20:50:19,649 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 20:50:19,649 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 20:50:19,649 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:19,649 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:50:19,657 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 20:50:19,658 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-02 20:50:19,703 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-02 20:50:19,703 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 20:50:19,708 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:19,751 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 20:50:19,752 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 20:50:19,752 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:19,753 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:19,754 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:19,754 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-12-02 20:50:19,811 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:50:19,813 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:50:19,816 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 20:50:19,817 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-12-02 20:50:20,448 WARN L854 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-12-02 20:50:20,454 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-12-02 20:50:20,457 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:20,458 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-12-02 20:50:20,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:20,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:20,464 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-12-02 20:50:20,464 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:20,469 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:20,471 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:20,474 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:20,474 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-12-02 20:50:20,709 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:20,710 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-12-02 20:50:20,711 INFO L683 Elim1Store]: detected equality via solver [2018-12-02 20:50:20,712 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:20,713 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-12-02 20:50:20,713 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:20,715 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:20,717 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:20,718 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-12-02 20:50:20,975 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-12-02 20:50:20,976 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-12-02 20:50:20,976 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:20,977 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:20,978 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:20,978 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-12-02 20:50:21,010 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-02 20:50:21,010 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:50:22,137 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-02 20:50:22,138 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-02 20:50:22,139 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:22,140 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:22,143 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 20:50:22,143 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:43, output treesize:34 [2018-12-02 20:50:22,343 INFO L683 Elim1Store]: detected equality via solver [2018-12-02 20:50:22,357 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 66 treesize of output 89 [2018-12-02 20:50:22,560 WARN L521 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:50:22,561 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.UnsupportedOperationException: alternation not yet supported at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.applyNonSddEliminations(ElimStorePlain.java:347) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:223) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:293) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:245) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:418) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:290) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getTraceCheck(BaseTaipanRefinementStrategy.java:214) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:456) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:434) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:334) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:126) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-12-02 20:50:22,565 INFO L168 Benchmark]: Toolchain (without parser) took 14484.84 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 418.4 MB). Free memory was 953.5 MB in the beginning and 1.3 GB in the end (delta: -379.8 MB). Peak memory consumption was 38.5 MB. Max. memory is 11.5 GB. [2018-12-02 20:50:22,567 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 20:50:22,567 INFO L168 Benchmark]: CACSL2BoogieTranslator took 315.66 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 90.2 MB). Free memory was 953.5 MB in the beginning and 1.1 GB in the end (delta: -105.2 MB). Peak memory consumption was 31.3 MB. Max. memory is 11.5 GB. [2018-12-02 20:50:22,568 INFO L168 Benchmark]: Boogie Procedure Inliner took 20.55 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 20:50:22,568 INFO L168 Benchmark]: Boogie Preprocessor took 22.03 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 20:50:22,569 INFO L168 Benchmark]: RCFGBuilder took 276.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 44.4 MB). Peak memory consumption was 44.4 MB. Max. memory is 11.5 GB. [2018-12-02 20:50:22,569 INFO L168 Benchmark]: TraceAbstraction took 13847.28 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 328.2 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -319.1 MB). Peak memory consumption was 9.1 MB. Max. memory is 11.5 GB. [2018-12-02 20:50:22,574 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 315.66 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 90.2 MB). Free memory was 953.5 MB in the beginning and 1.1 GB in the end (delta: -105.2 MB). Peak memory consumption was 31.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 20.55 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 22.03 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 276.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 44.4 MB). Peak memory consumption was 44.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 13847.28 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 328.2 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -319.1 MB). Peak memory consumption was 9.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: UnsupportedOperationException: alternation not yet supported de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: UnsupportedOperationException: alternation not yet supported: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.applyNonSddEliminations(ElimStorePlain.java:347) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-635dfa2 [2018-12-02 20:50:23,860 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-02 20:50:23,861 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-02 20:50:23,870 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-02 20:50:23,870 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-02 20:50:23,871 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-02 20:50:23,872 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-02 20:50:23,873 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-02 20:50:23,874 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-02 20:50:23,875 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-02 20:50:23,875 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-02 20:50:23,876 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-02 20:50:23,876 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-02 20:50:23,877 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-02 20:50:23,878 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-02 20:50:23,878 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-02 20:50:23,879 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-02 20:50:23,880 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-02 20:50:23,881 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-02 20:50:23,883 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-02 20:50:23,883 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-02 20:50:23,884 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-02 20:50:23,886 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-02 20:50:23,886 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-02 20:50:23,886 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-02 20:50:23,887 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-02 20:50:23,887 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-02 20:50:23,888 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-02 20:50:23,888 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-02 20:50:23,889 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-02 20:50:23,889 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-02 20:50:23,890 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-02 20:50:23,890 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-02 20:50:23,890 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-02 20:50:23,891 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-02 20:50:23,891 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-02 20:50:23,891 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf [2018-12-02 20:50:23,902 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-02 20:50:23,902 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-02 20:50:23,902 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-02 20:50:23,903 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-02 20:50:23,903 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-02 20:50:23,903 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-02 20:50:23,903 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-02 20:50:23,903 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-02 20:50:23,903 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-02 20:50:23,903 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-02 20:50:23,904 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-02 20:50:23,904 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-02 20:50:23,904 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-02 20:50:23,904 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-02 20:50:23,904 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-02 20:50:23,905 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-02 20:50:23,905 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-02 20:50:23,905 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-02 20:50:23,905 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-02 20:50:23,905 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-02 20:50:23,905 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-02 20:50:23,905 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-02 20:50:23,905 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-12-02 20:50:23,906 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-12-02 20:50:23,906 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-02 20:50:23,906 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-02 20:50:23,906 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-02 20:50:23,906 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-02 20:50:23,906 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-02 20:50:23,906 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-02 20:50:23,906 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 20:50:23,907 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-02 20:50:23,907 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-02 20:50:23,907 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-12-02 20:50:23,907 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-02 20:50:23,907 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-12-02 20:50:23,907 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4867b1d8e60a05de2199d52aa990071fe8bd647c [2018-12-02 20:50:23,931 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-02 20:50:23,942 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-02 20:50:23,945 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-02 20:50:23,946 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-02 20:50:23,946 INFO L276 PluginConnector]: CDTParser initialized [2018-12-02 20:50:23,947 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-02 20:50:23,984 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/data/6eaf2c8e7/396e3a33dad54eb99571457eb6baedf1/FLAGdeea5f964 [2018-12-02 20:50:24,342 INFO L307 CDTParser]: Found 1 translation units. [2018-12-02 20:50:24,342 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-02 20:50:24,352 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/data/6eaf2c8e7/396e3a33dad54eb99571457eb6baedf1/FLAGdeea5f964 [2018-12-02 20:50:24,729 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/data/6eaf2c8e7/396e3a33dad54eb99571457eb6baedf1 [2018-12-02 20:50:24,732 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-02 20:50:24,734 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-02 20:50:24,735 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-02 20:50:24,735 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-02 20:50:24,740 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-02 20:50:24,742 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:50:24" (1/1) ... [2018-12-02 20:50:24,746 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@35e5a7d6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:24, skipping insertion in model container [2018-12-02 20:50:24,746 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:50:24" (1/1) ... [2018-12-02 20:50:24,754 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-02 20:50:24,783 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-02 20:50:24,975 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 20:50:25,022 INFO L191 MainTranslator]: Completed pre-run [2018-12-02 20:50:25,056 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 20:50:25,089 INFO L195 MainTranslator]: Completed translation [2018-12-02 20:50:25,090 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:25 WrapperNode [2018-12-02 20:50:25,090 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-02 20:50:25,090 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-02 20:50:25,090 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-02 20:50:25,090 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-02 20:50:25,095 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:25" (1/1) ... [2018-12-02 20:50:25,107 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:25" (1/1) ... [2018-12-02 20:50:25,112 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-02 20:50:25,112 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-02 20:50:25,112 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-02 20:50:25,112 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-02 20:50:25,118 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:25" (1/1) ... [2018-12-02 20:50:25,118 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:25" (1/1) ... [2018-12-02 20:50:25,121 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:25" (1/1) ... [2018-12-02 20:50:25,121 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:25" (1/1) ... [2018-12-02 20:50:25,129 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:25" (1/1) ... [2018-12-02 20:50:25,132 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:25" (1/1) ... [2018-12-02 20:50:25,133 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:25" (1/1) ... [2018-12-02 20:50:25,135 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-02 20:50:25,136 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-02 20:50:25,136 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-02 20:50:25,136 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-02 20:50:25,136 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:25" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 20:50:25,166 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-02 20:50:25,166 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-12-02 20:50:25,166 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-02 20:50:25,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-02 20:50:25,167 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-02 20:50:25,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-02 20:50:25,167 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-02 20:50:25,167 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-02 20:50:25,167 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-02 20:50:25,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-02 20:50:25,167 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-02 20:50:25,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-02 20:50:25,167 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-02 20:50:25,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-02 20:50:25,167 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-02 20:50:25,168 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-02 20:50:25,168 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-02 20:50:25,168 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-02 20:50:25,168 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-02 20:50:25,168 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-02 20:50:25,168 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-02 20:50:25,168 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-02 20:50:25,168 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-02 20:50:25,168 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-02 20:50:25,168 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-02 20:50:25,168 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-02 20:50:25,168 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-02 20:50:25,169 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-02 20:50:25,169 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-02 20:50:25,169 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-02 20:50:25,169 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-02 20:50:25,169 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-02 20:50:25,169 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-02 20:50:25,169 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-02 20:50:25,169 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-12-02 20:50:25,169 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-02 20:50:25,169 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-02 20:50:25,169 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-02 20:50:25,169 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-02 20:50:25,169 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-02 20:50:25,170 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-02 20:50:25,170 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-02 20:50:25,170 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-02 20:50:25,170 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-02 20:50:25,170 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-02 20:50:25,170 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-02 20:50:25,170 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-02 20:50:25,170 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-02 20:50:25,170 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-02 20:50:25,367 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-02 20:50:25,495 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-02 20:50:25,496 INFO L280 CfgBuilder]: Removed 0 assue(true) statements. [2018-12-02 20:50:25,496 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:50:25 BoogieIcfgContainer [2018-12-02 20:50:25,496 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-02 20:50:25,496 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-02 20:50:25,496 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-02 20:50:25,498 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-02 20:50:25,498 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 08:50:24" (1/3) ... [2018-12-02 20:50:25,499 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@170d83d1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:50:25, skipping insertion in model container [2018-12-02 20:50:25,499 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:50:25" (2/3) ... [2018-12-02 20:50:25,499 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@170d83d1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:50:25, skipping insertion in model container [2018-12-02 20:50:25,499 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:50:25" (3/3) ... [2018-12-02 20:50:25,500 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-02 20:50:25,507 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-02 20:50:25,513 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-12-02 20:50:25,524 INFO L257 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2018-12-02 20:50:25,542 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-02 20:50:25,542 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-02 20:50:25,542 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-02 20:50:25,542 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-02 20:50:25,542 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-02 20:50:25,542 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-02 20:50:25,543 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-02 20:50:25,543 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-02 20:50:25,543 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-02 20:50:25,553 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states. [2018-12-02 20:50:25,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-02 20:50:25,559 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:25,560 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:25,562 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:25,565 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:25,565 INFO L82 PathProgramCache]: Analyzing trace with hash -59032713, now seen corresponding path program 1 times [2018-12-02 20:50:25,569 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:25,569 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:25,589 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:25,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:25,644 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:25,673 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:25,675 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:25,679 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:25,679 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:50:25,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:25,698 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:25,700 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:25,701 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 20:50:25,703 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:50:25,711 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:50:25,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:50:25,713 INFO L87 Difference]: Start difference. First operand 141 states. Second operand 5 states. [2018-12-02 20:50:25,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:25,915 INFO L93 Difference]: Finished difference Result 152 states and 163 transitions. [2018-12-02 20:50:25,915 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:50:25,916 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-02 20:50:25,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:25,927 INFO L225 Difference]: With dead ends: 152 [2018-12-02 20:50:25,927 INFO L226 Difference]: Without dead ends: 149 [2018-12-02 20:50:25,928 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:50:25,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-02 20:50:25,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 143. [2018-12-02 20:50:25,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-12-02 20:50:25,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 154 transitions. [2018-12-02 20:50:25,958 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 154 transitions. Word has length 17 [2018-12-02 20:50:25,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:25,958 INFO L480 AbstractCegarLoop]: Abstraction has 143 states and 154 transitions. [2018-12-02 20:50:25,958 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:50:25,958 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 154 transitions. [2018-12-02 20:50:25,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-02 20:50:25,959 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:25,959 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:25,959 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:25,959 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:25,959 INFO L82 PathProgramCache]: Analyzing trace with hash -59032712, now seen corresponding path program 1 times [2018-12-02 20:50:25,960 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:25,960 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:25,974 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:26,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:26,018 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:26,027 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:26,028 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:26,032 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:26,033 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 20:50:26,059 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:26,059 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:26,061 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:26,061 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 20:50:26,062 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 20:50:26,062 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 20:50:26,062 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-02 20:50:26,062 INFO L87 Difference]: Start difference. First operand 143 states and 154 transitions. Second operand 6 states. [2018-12-02 20:50:26,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:26,297 INFO L93 Difference]: Finished difference Result 148 states and 159 transitions. [2018-12-02 20:50:26,297 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 20:50:26,298 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-12-02 20:50:26,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:26,299 INFO L225 Difference]: With dead ends: 148 [2018-12-02 20:50:26,299 INFO L226 Difference]: Without dead ends: 148 [2018-12-02 20:50:26,299 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-02 20:50:26,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-12-02 20:50:26,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 143. [2018-12-02 20:50:26,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-12-02 20:50:26,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 153 transitions. [2018-12-02 20:50:26,306 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 153 transitions. Word has length 17 [2018-12-02 20:50:26,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:26,306 INFO L480 AbstractCegarLoop]: Abstraction has 143 states and 153 transitions. [2018-12-02 20:50:26,306 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 20:50:26,306 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 153 transitions. [2018-12-02 20:50:26,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-02 20:50:26,306 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:26,306 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:26,307 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:26,307 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:26,307 INFO L82 PathProgramCache]: Analyzing trace with hash -30403562, now seen corresponding path program 1 times [2018-12-02 20:50:26,307 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:26,307 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:26,321 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:26,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:26,351 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:26,369 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:26,369 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:26,370 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:26,370 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 20:50:26,370 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:50:26,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:50:26,371 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:50:26,371 INFO L87 Difference]: Start difference. First operand 143 states and 153 transitions. Second operand 5 states. [2018-12-02 20:50:26,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:26,386 INFO L93 Difference]: Finished difference Result 142 states and 150 transitions. [2018-12-02 20:50:26,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:50:26,386 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-02 20:50:26,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:26,387 INFO L225 Difference]: With dead ends: 142 [2018-12-02 20:50:26,387 INFO L226 Difference]: Without dead ends: 142 [2018-12-02 20:50:26,388 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:50:26,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-02 20:50:26,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 140. [2018-12-02 20:50:26,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-02 20:50:26,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 148 transitions. [2018-12-02 20:50:26,394 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 148 transitions. Word has length 17 [2018-12-02 20:50:26,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:26,394 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 148 transitions. [2018-12-02 20:50:26,394 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:50:26,394 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 148 transitions. [2018-12-02 20:50:26,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-02 20:50:26,395 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:26,395 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:26,395 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:26,395 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:26,395 INFO L82 PathProgramCache]: Analyzing trace with hash 1473912446, now seen corresponding path program 1 times [2018-12-02 20:50:26,395 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:26,396 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:26,410 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:26,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:26,444 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:26,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:26,473 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:26,474 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:26,474 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 20:50:26,474 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:50:26,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:50:26,475 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:50:26,475 INFO L87 Difference]: Start difference. First operand 140 states and 148 transitions. Second operand 5 states. [2018-12-02 20:50:26,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:26,490 INFO L93 Difference]: Finished difference Result 142 states and 149 transitions. [2018-12-02 20:50:26,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:50:26,490 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2018-12-02 20:50:26,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:26,491 INFO L225 Difference]: With dead ends: 142 [2018-12-02 20:50:26,491 INFO L226 Difference]: Without dead ends: 142 [2018-12-02 20:50:26,492 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:50:26,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-02 20:50:26,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 140. [2018-12-02 20:50:26,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-02 20:50:26,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 147 transitions. [2018-12-02 20:50:26,498 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 147 transitions. Word has length 27 [2018-12-02 20:50:26,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:26,499 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 147 transitions. [2018-12-02 20:50:26,499 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:50:26,499 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 147 transitions. [2018-12-02 20:50:26,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-02 20:50:26,499 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:26,499 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:26,499 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:26,500 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:26,500 INFO L82 PathProgramCache]: Analyzing trace with hash 963378269, now seen corresponding path program 1 times [2018-12-02 20:50:26,500 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:26,500 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:26,514 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:26,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:26,564 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:26,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:26,612 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:26,613 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:26,613 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 20:50:26,614 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 20:50:26,614 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 20:50:26,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-02 20:50:26,614 INFO L87 Difference]: Start difference. First operand 140 states and 147 transitions. Second operand 7 states. [2018-12-02 20:50:26,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:26,663 INFO L93 Difference]: Finished difference Result 156 states and 164 transitions. [2018-12-02 20:50:26,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 20:50:26,663 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-12-02 20:50:26,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:26,664 INFO L225 Difference]: With dead ends: 156 [2018-12-02 20:50:26,664 INFO L226 Difference]: Without dead ends: 156 [2018-12-02 20:50:26,664 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-02 20:50:26,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-02 20:50:26,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 149. [2018-12-02 20:50:26,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-12-02 20:50:26,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 156 transitions. [2018-12-02 20:50:26,669 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 156 transitions. Word has length 27 [2018-12-02 20:50:26,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:26,669 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 156 transitions. [2018-12-02 20:50:26,669 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 20:50:26,669 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 156 transitions. [2018-12-02 20:50:26,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-02 20:50:26,670 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:26,670 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:26,670 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:26,670 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:26,670 INFO L82 PathProgramCache]: Analyzing trace with hash 1221921107, now seen corresponding path program 1 times [2018-12-02 20:50:26,671 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:26,671 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:26,687 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:26,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:26,741 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:26,749 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:26,750 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:26,751 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:26,751 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 20:50:26,751 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 20:50:26,751 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 20:50:26,751 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 20:50:26,751 INFO L87 Difference]: Start difference. First operand 149 states and 156 transitions. Second operand 4 states. [2018-12-02 20:50:26,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:26,779 INFO L93 Difference]: Finished difference Result 152 states and 159 transitions. [2018-12-02 20:50:26,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 20:50:26,779 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-12-02 20:50:26,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:26,780 INFO L225 Difference]: With dead ends: 152 [2018-12-02 20:50:26,780 INFO L226 Difference]: Without dead ends: 150 [2018-12-02 20:50:26,780 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:50:26,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-02 20:50:26,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-02 20:50:26,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-02 20:50:26,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 157 transitions. [2018-12-02 20:50:26,784 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 157 transitions. Word has length 32 [2018-12-02 20:50:26,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:26,784 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 157 transitions. [2018-12-02 20:50:26,784 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 20:50:26,784 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 157 transitions. [2018-12-02 20:50:26,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-02 20:50:26,785 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:26,785 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:26,785 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:26,785 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:26,785 INFO L82 PathProgramCache]: Analyzing trace with hash 1740896898, now seen corresponding path program 1 times [2018-12-02 20:50:26,785 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:26,785 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:26,799 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:26,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:26,851 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:26,861 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:26,861 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:50:26,908 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:26,909 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:26,909 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:50:26,916 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:26,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:26,940 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:26,943 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:26,944 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:26,946 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:26,946 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:50:27,109 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-02 20:50:27,109 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:27,123 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:50:27,124 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [5, 5] total 18 [2018-12-02 20:50:27,124 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-02 20:50:27,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-02 20:50:27,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=255, Unknown=0, NotChecked=0, Total=306 [2018-12-02 20:50:27,124 INFO L87 Difference]: Start difference. First operand 150 states and 157 transitions. Second operand 18 states. [2018-12-02 20:50:28,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:28,403 INFO L93 Difference]: Finished difference Result 168 states and 175 transitions. [2018-12-02 20:50:28,403 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-02 20:50:28,403 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 33 [2018-12-02 20:50:28,403 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:28,404 INFO L225 Difference]: With dead ends: 168 [2018-12-02 20:50:28,404 INFO L226 Difference]: Without dead ends: 164 [2018-12-02 20:50:28,404 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 79 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=112, Invalid=590, Unknown=0, NotChecked=0, Total=702 [2018-12-02 20:50:28,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-12-02 20:50:28,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 152. [2018-12-02 20:50:28,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-12-02 20:50:28,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 159 transitions. [2018-12-02 20:50:28,408 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 159 transitions. Word has length 33 [2018-12-02 20:50:28,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:28,408 INFO L480 AbstractCegarLoop]: Abstraction has 152 states and 159 transitions. [2018-12-02 20:50:28,409 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-02 20:50:28,409 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 159 transitions. [2018-12-02 20:50:28,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-02 20:50:28,409 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:28,409 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:28,410 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:28,410 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:28,410 INFO L82 PathProgramCache]: Analyzing trace with hash 1601221370, now seen corresponding path program 1 times [2018-12-02 20:50:28,410 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:28,410 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:28,425 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:28,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:28,489 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:28,522 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:28,523 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:28,525 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:28,525 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 20:50:28,525 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 20:50:28,525 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 20:50:28,525 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-02 20:50:28,526 INFO L87 Difference]: Start difference. First operand 152 states and 159 transitions. Second operand 7 states. [2018-12-02 20:50:28,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:28,553 INFO L93 Difference]: Finished difference Result 162 states and 169 transitions. [2018-12-02 20:50:28,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 20:50:28,553 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-12-02 20:50:28,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:28,554 INFO L225 Difference]: With dead ends: 162 [2018-12-02 20:50:28,554 INFO L226 Difference]: Without dead ends: 162 [2018-12-02 20:50:28,555 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-02 20:50:28,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-12-02 20:50:28,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 158. [2018-12-02 20:50:28,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-12-02 20:50:28,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 165 transitions. [2018-12-02 20:50:28,559 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 165 transitions. Word has length 36 [2018-12-02 20:50:28,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:28,560 INFO L480 AbstractCegarLoop]: Abstraction has 158 states and 165 transitions. [2018-12-02 20:50:28,560 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 20:50:28,560 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 165 transitions. [2018-12-02 20:50:28,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-02 20:50:28,561 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:28,561 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:28,561 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:28,561 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:28,561 INFO L82 PathProgramCache]: Analyzing trace with hash 94330132, now seen corresponding path program 1 times [2018-12-02 20:50:28,562 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:28,562 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:28,577 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:28,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:28,642 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:28,672 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:28,672 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:50:28,799 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:28,801 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:28,801 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:50:28,807 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:28,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:28,832 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:28,851 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:28,851 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:28,855 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:28,855 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 20:50:29,150 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-02 20:50:29,150 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:29,168 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:50:29,168 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [8, 8] total 25 [2018-12-02 20:50:29,169 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-12-02 20:50:29,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-12-02 20:50:29,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=509, Unknown=0, NotChecked=0, Total=600 [2018-12-02 20:50:29,169 INFO L87 Difference]: Start difference. First operand 158 states and 165 transitions. Second operand 25 states. [2018-12-02 20:50:31,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:31,513 INFO L93 Difference]: Finished difference Result 171 states and 181 transitions. [2018-12-02 20:50:31,513 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-02 20:50:31,513 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 36 [2018-12-02 20:50:31,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:31,514 INFO L225 Difference]: With dead ends: 171 [2018-12-02 20:50:31,514 INFO L226 Difference]: Without dead ends: 167 [2018-12-02 20:50:31,515 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 211 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=252, Invalid=1388, Unknown=0, NotChecked=0, Total=1640 [2018-12-02 20:50:31,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-12-02 20:50:31,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 163. [2018-12-02 20:50:31,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-12-02 20:50:31,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 170 transitions. [2018-12-02 20:50:31,518 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 170 transitions. Word has length 36 [2018-12-02 20:50:31,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:31,519 INFO L480 AbstractCegarLoop]: Abstraction has 163 states and 170 transitions. [2018-12-02 20:50:31,519 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-12-02 20:50:31,519 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 170 transitions. [2018-12-02 20:50:31,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-02 20:50:31,520 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:31,520 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:31,520 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:31,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:31,520 INFO L82 PathProgramCache]: Analyzing trace with hash 1723522866, now seen corresponding path program 1 times [2018-12-02 20:50:31,521 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:31,521 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:31,536 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:31,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:31,558 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:31,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:31,568 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:31,570 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:31,570 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 20:50:31,570 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 20:50:31,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 20:50:31,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 20:50:31,570 INFO L87 Difference]: Start difference. First operand 163 states and 170 transitions. Second operand 3 states. [2018-12-02 20:50:31,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:31,669 INFO L93 Difference]: Finished difference Result 174 states and 180 transitions. [2018-12-02 20:50:31,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 20:50:31,670 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2018-12-02 20:50:31,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:31,670 INFO L225 Difference]: With dead ends: 174 [2018-12-02 20:50:31,670 INFO L226 Difference]: Without dead ends: 152 [2018-12-02 20:50:31,670 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 20:50:31,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-12-02 20:50:31,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 144. [2018-12-02 20:50:31,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-02 20:50:31,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 150 transitions. [2018-12-02 20:50:31,673 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 150 transitions. Word has length 34 [2018-12-02 20:50:31,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:31,673 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 150 transitions. [2018-12-02 20:50:31,673 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 20:50:31,673 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 150 transitions. [2018-12-02 20:50:31,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 20:50:31,673 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:31,673 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:31,674 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:31,674 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:31,674 INFO L82 PathProgramCache]: Analyzing trace with hash 1404362456, now seen corresponding path program 1 times [2018-12-02 20:50:31,674 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:31,674 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:31,688 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:31,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:31,781 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:31,842 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:31,842 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:50:32,238 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:50:32,240 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:50:32,240 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:50:32,246 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:32,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:32,282 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:32,284 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:32,285 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:32,286 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:32,287 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:50:32,663 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-12-02 20:50:32,664 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:32,681 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:50:32,681 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [14, 14] total 36 [2018-12-02 20:50:32,681 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-12-02 20:50:32,682 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-12-02 20:50:32,682 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=207, Invalid=1053, Unknown=0, NotChecked=0, Total=1260 [2018-12-02 20:50:32,682 INFO L87 Difference]: Start difference. First operand 144 states and 150 transitions. Second operand 36 states. [2018-12-02 20:50:36,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:36,390 INFO L93 Difference]: Finished difference Result 164 states and 173 transitions. [2018-12-02 20:50:36,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-12-02 20:50:36,391 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 47 [2018-12-02 20:50:36,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:36,392 INFO L225 Difference]: With dead ends: 164 [2018-12-02 20:50:36,392 INFO L226 Difference]: Without dead ends: 160 [2018-12-02 20:50:36,393 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 101 SyntacticMatches, 4 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 424 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=511, Invalid=2681, Unknown=0, NotChecked=0, Total=3192 [2018-12-02 20:50:36,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-02 20:50:36,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 148. [2018-12-02 20:50:36,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-02 20:50:36,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 154 transitions. [2018-12-02 20:50:36,398 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 154 transitions. Word has length 47 [2018-12-02 20:50:36,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:36,398 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 154 transitions. [2018-12-02 20:50:36,399 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-12-02 20:50:36,399 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 154 transitions. [2018-12-02 20:50:36,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-02 20:50:36,400 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:36,400 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:36,400 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:36,400 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:36,401 INFO L82 PathProgramCache]: Analyzing trace with hash -1661345479, now seen corresponding path program 1 times [2018-12-02 20:50:36,401 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:36,401 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:36,416 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:36,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:36,588 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:36,594 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:36,594 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:36,598 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:36,598 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 20:50:36,759 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 20:50:36,759 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:36,762 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:36,762 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-02 20:50:36,762 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-02 20:50:36,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-02 20:50:36,763 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2018-12-02 20:50:36,763 INFO L87 Difference]: Start difference. First operand 148 states and 154 transitions. Second operand 13 states. [2018-12-02 20:50:37,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:37,557 INFO L93 Difference]: Finished difference Result 146 states and 152 transitions. [2018-12-02 20:50:37,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-02 20:50:37,558 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 53 [2018-12-02 20:50:37,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:37,559 INFO L225 Difference]: With dead ends: 146 [2018-12-02 20:50:37,559 INFO L226 Difference]: Without dead ends: 146 [2018-12-02 20:50:37,559 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2018-12-02 20:50:37,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-02 20:50:37,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-02 20:50:37,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-02 20:50:37,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 152 transitions. [2018-12-02 20:50:37,563 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 152 transitions. Word has length 53 [2018-12-02 20:50:37,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:37,563 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 152 transitions. [2018-12-02 20:50:37,563 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-02 20:50:37,563 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 152 transitions. [2018-12-02 20:50:37,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-12-02 20:50:37,564 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:37,564 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:37,565 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:37,565 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:37,565 INFO L82 PathProgramCache]: Analyzing trace with hash -239699418, now seen corresponding path program 1 times [2018-12-02 20:50:37,565 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:37,565 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:37,583 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:37,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:37,636 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:37,667 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 20:50:37,667 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:37,668 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:37,668 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 20:50:37,669 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 20:50:37,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 20:50:37,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-02 20:50:37,669 INFO L87 Difference]: Start difference. First operand 146 states and 152 transitions. Second operand 7 states. [2018-12-02 20:50:37,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:37,710 INFO L93 Difference]: Finished difference Result 148 states and 153 transitions. [2018-12-02 20:50:37,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 20:50:37,710 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 56 [2018-12-02 20:50:37,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:37,711 INFO L225 Difference]: With dead ends: 148 [2018-12-02 20:50:37,711 INFO L226 Difference]: Without dead ends: 146 [2018-12-02 20:50:37,711 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-02 20:50:37,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-02 20:50:37,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-02 20:50:37,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-02 20:50:37,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 151 transitions. [2018-12-02 20:50:37,714 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 151 transitions. Word has length 56 [2018-12-02 20:50:37,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:37,714 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 151 transitions. [2018-12-02 20:50:37,714 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 20:50:37,714 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 151 transitions. [2018-12-02 20:50:37,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-02 20:50:37,715 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:37,715 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:37,715 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:37,715 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:37,715 INFO L82 PathProgramCache]: Analyzing trace with hash 429252964, now seen corresponding path program 1 times [2018-12-02 20:50:37,716 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:37,716 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:37,733 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:37,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:37,782 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:37,826 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 20:50:37,827 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:37,828 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:37,828 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-02 20:50:37,828 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 20:50:37,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 20:50:37,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-02 20:50:37,829 INFO L87 Difference]: Start difference. First operand 146 states and 151 transitions. Second operand 9 states. [2018-12-02 20:50:37,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:37,888 INFO L93 Difference]: Finished difference Result 150 states and 154 transitions. [2018-12-02 20:50:37,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 20:50:37,888 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 61 [2018-12-02 20:50:37,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:37,889 INFO L225 Difference]: With dead ends: 150 [2018-12-02 20:50:37,889 INFO L226 Difference]: Without dead ends: 146 [2018-12-02 20:50:37,889 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-02 20:50:37,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-02 20:50:37,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-02 20:50:37,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-02 20:50:37,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 150 transitions. [2018-12-02 20:50:37,891 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 150 transitions. Word has length 61 [2018-12-02 20:50:37,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:37,891 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 150 transitions. [2018-12-02 20:50:37,891 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 20:50:37,891 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 150 transitions. [2018-12-02 20:50:37,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-02 20:50:37,892 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:37,892 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:37,892 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:37,892 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:37,892 INFO L82 PathProgramCache]: Analyzing trace with hash -488981665, now seen corresponding path program 1 times [2018-12-02 20:50:37,892 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:37,892 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:37,906 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:38,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:38,060 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:38,063 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:38,063 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:38,065 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:38,065 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:50:38,277 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 20:50:38,277 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:38,281 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:38,281 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-12-02 20:50:38,281 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-02 20:50:38,281 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-02 20:50:38,282 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=258, Unknown=0, NotChecked=0, Total=306 [2018-12-02 20:50:38,282 INFO L87 Difference]: Start difference. First operand 146 states and 150 transitions. Second operand 18 states. [2018-12-02 20:50:39,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:39,591 INFO L93 Difference]: Finished difference Result 156 states and 159 transitions. [2018-12-02 20:50:39,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-02 20:50:39,591 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2018-12-02 20:50:39,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:39,591 INFO L225 Difference]: With dead ends: 156 [2018-12-02 20:50:39,592 INFO L226 Difference]: Without dead ends: 156 [2018-12-02 20:50:39,592 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=68, Invalid=394, Unknown=0, NotChecked=0, Total=462 [2018-12-02 20:50:39,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-02 20:50:39,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 144. [2018-12-02 20:50:39,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-02 20:50:39,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 148 transitions. [2018-12-02 20:50:39,594 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 148 transitions. Word has length 72 [2018-12-02 20:50:39,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:39,594 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 148 transitions. [2018-12-02 20:50:39,594 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-02 20:50:39,594 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 148 transitions. [2018-12-02 20:50:39,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-02 20:50:39,595 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:39,595 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:39,595 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:39,595 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:39,595 INFO L82 PathProgramCache]: Analyzing trace with hash -488981664, now seen corresponding path program 1 times [2018-12-02 20:50:39,595 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:39,595 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:39,611 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:39,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:39,801 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:39,808 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:39,808 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:39,815 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:39,815 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 20:50:40,105 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 20:50:40,105 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:40,108 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:40,109 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-12-02 20:50:40,109 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-02 20:50:40,109 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-02 20:50:40,109 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=260, Unknown=0, NotChecked=0, Total=306 [2018-12-02 20:50:40,109 INFO L87 Difference]: Start difference. First operand 144 states and 148 transitions. Second operand 18 states. [2018-12-02 20:50:41,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:41,401 INFO L93 Difference]: Finished difference Result 142 states and 146 transitions. [2018-12-02 20:50:41,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-02 20:50:41,401 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2018-12-02 20:50:41,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:41,402 INFO L225 Difference]: With dead ends: 142 [2018-12-02 20:50:41,402 INFO L226 Difference]: Without dead ends: 142 [2018-12-02 20:50:41,402 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=70, Invalid=436, Unknown=0, NotChecked=0, Total=506 [2018-12-02 20:50:41,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-02 20:50:41,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-02 20:50:41,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-02 20:50:41,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 146 transitions. [2018-12-02 20:50:41,406 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 146 transitions. Word has length 72 [2018-12-02 20:50:41,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:41,406 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 146 transitions. [2018-12-02 20:50:41,406 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-02 20:50:41,406 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 146 transitions. [2018-12-02 20:50:41,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-02 20:50:41,407 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:41,407 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:41,407 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:41,407 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:41,408 INFO L82 PathProgramCache]: Analyzing trace with hash 633058872, now seen corresponding path program 1 times [2018-12-02 20:50:41,408 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:41,408 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:41,423 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:41,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:41,488 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:41,529 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 20:50:41,529 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:41,531 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:41,531 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 20:50:41,531 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 20:50:41,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 20:50:41,531 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-02 20:50:41,531 INFO L87 Difference]: Start difference. First operand 142 states and 146 transitions. Second operand 10 states. [2018-12-02 20:50:41,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:41,592 INFO L93 Difference]: Finished difference Result 145 states and 148 transitions. [2018-12-02 20:50:41,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 20:50:41,592 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 81 [2018-12-02 20:50:41,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:41,593 INFO L225 Difference]: With dead ends: 145 [2018-12-02 20:50:41,593 INFO L226 Difference]: Without dead ends: 142 [2018-12-02 20:50:41,593 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 72 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-02 20:50:41,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-02 20:50:41,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-02 20:50:41,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-02 20:50:41,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 145 transitions. [2018-12-02 20:50:41,596 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 145 transitions. Word has length 81 [2018-12-02 20:50:41,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:41,596 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 145 transitions. [2018-12-02 20:50:41,596 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 20:50:41,596 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 145 transitions. [2018-12-02 20:50:41,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-02 20:50:41,597 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:41,597 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:41,597 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:41,597 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:41,597 INFO L82 PathProgramCache]: Analyzing trace with hash 122006912, now seen corresponding path program 1 times [2018-12-02 20:50:41,597 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:41,598 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:41,613 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:41,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:41,798 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:41,801 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:41,801 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:41,802 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:41,803 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:50:42,057 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 20:50:42,058 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:42,061 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:42,061 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-02 20:50:42,061 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-02 20:50:42,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-02 20:50:42,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=326, Unknown=0, NotChecked=0, Total=380 [2018-12-02 20:50:42,061 INFO L87 Difference]: Start difference. First operand 142 states and 145 transitions. Second operand 20 states. [2018-12-02 20:50:43,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:43,603 INFO L93 Difference]: Finished difference Result 156 states and 158 transitions. [2018-12-02 20:50:43,603 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-02 20:50:43,603 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 94 [2018-12-02 20:50:43,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:43,604 INFO L225 Difference]: With dead ends: 156 [2018-12-02 20:50:43,604 INFO L226 Difference]: Without dead ends: 156 [2018-12-02 20:50:43,604 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 70 SyntacticMatches, 5 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=79, Invalid=521, Unknown=0, NotChecked=0, Total=600 [2018-12-02 20:50:43,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-02 20:50:43,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 140. [2018-12-02 20:50:43,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-02 20:50:43,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 143 transitions. [2018-12-02 20:50:43,606 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 143 transitions. Word has length 94 [2018-12-02 20:50:43,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:43,606 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 143 transitions. [2018-12-02 20:50:43,606 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-02 20:50:43,606 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 143 transitions. [2018-12-02 20:50:43,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-02 20:50:43,607 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:43,607 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:43,607 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:43,607 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:43,607 INFO L82 PathProgramCache]: Analyzing trace with hash 122006913, now seen corresponding path program 1 times [2018-12-02 20:50:43,607 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:43,607 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:43,628 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:43,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:43,870 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:43,877 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:43,877 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:43,881 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:43,882 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 20:50:44,330 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 20:50:44,331 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:44,335 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:44,335 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-02 20:50:44,335 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-02 20:50:44,335 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-02 20:50:44,335 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=328, Unknown=0, NotChecked=0, Total=380 [2018-12-02 20:50:44,335 INFO L87 Difference]: Start difference. First operand 140 states and 143 transitions. Second operand 20 states. [2018-12-02 20:50:45,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:45,781 INFO L93 Difference]: Finished difference Result 138 states and 141 transitions. [2018-12-02 20:50:45,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-02 20:50:45,781 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 94 [2018-12-02 20:50:45,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:45,782 INFO L225 Difference]: With dead ends: 138 [2018-12-02 20:50:45,782 INFO L226 Difference]: Without dead ends: 138 [2018-12-02 20:50:45,782 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 70 SyntacticMatches, 5 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=81, Invalid=569, Unknown=0, NotChecked=0, Total=650 [2018-12-02 20:50:45,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-02 20:50:45,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-02 20:50:45,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-02 20:50:45,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 141 transitions. [2018-12-02 20:50:45,785 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 141 transitions. Word has length 94 [2018-12-02 20:50:45,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:45,785 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 141 transitions. [2018-12-02 20:50:45,785 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-02 20:50:45,785 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 141 transitions. [2018-12-02 20:50:45,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-12-02 20:50:45,786 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:45,786 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:45,786 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:45,786 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:45,786 INFO L82 PathProgramCache]: Analyzing trace with hash 108577592, now seen corresponding path program 1 times [2018-12-02 20:50:45,786 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:45,786 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:45,812 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:45,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:45,889 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:45,968 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 20:50:45,968 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:45,970 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:45,970 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 20:50:45,971 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 20:50:45,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 20:50:45,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-02 20:50:45,971 INFO L87 Difference]: Start difference. First operand 138 states and 141 transitions. Second operand 10 states. [2018-12-02 20:50:46,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:46,047 INFO L93 Difference]: Finished difference Result 140 states and 142 transitions. [2018-12-02 20:50:46,047 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 20:50:46,048 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 92 [2018-12-02 20:50:46,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:46,048 INFO L225 Difference]: With dead ends: 140 [2018-12-02 20:50:46,048 INFO L226 Difference]: Without dead ends: 138 [2018-12-02 20:50:46,049 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-02 20:50:46,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-02 20:50:46,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-02 20:50:46,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-02 20:50:46,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 140 transitions. [2018-12-02 20:50:46,052 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 140 transitions. Word has length 92 [2018-12-02 20:50:46,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:46,052 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 140 transitions. [2018-12-02 20:50:46,052 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 20:50:46,052 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 140 transitions. [2018-12-02 20:50:46,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-12-02 20:50:46,053 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:46,053 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:46,053 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:46,053 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:46,053 INFO L82 PathProgramCache]: Analyzing trace with hash 46278890, now seen corresponding path program 1 times [2018-12-02 20:50:46,054 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:46,054 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:46,077 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:46,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:46,315 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:46,318 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:46,318 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:46,328 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:46,328 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:50:46,728 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 20:50:46,728 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:46,731 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:46,731 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-12-02 20:50:46,731 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-02 20:50:46,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-02 20:50:46,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=486, Unknown=0, NotChecked=0, Total=552 [2018-12-02 20:50:46,731 INFO L87 Difference]: Start difference. First operand 138 states and 140 transitions. Second operand 24 states. [2018-12-02 20:50:48,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:48,750 INFO L93 Difference]: Finished difference Result 148 states and 149 transitions. [2018-12-02 20:50:48,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-02 20:50:48,751 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 107 [2018-12-02 20:50:48,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:48,752 INFO L225 Difference]: With dead ends: 148 [2018-12-02 20:50:48,752 INFO L226 Difference]: Without dead ends: 148 [2018-12-02 20:50:48,753 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 77 SyntacticMatches, 7 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=101, Invalid=829, Unknown=0, NotChecked=0, Total=930 [2018-12-02 20:50:48,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-12-02 20:50:48,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 136. [2018-12-02 20:50:48,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-02 20:50:48,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 138 transitions. [2018-12-02 20:50:48,756 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 138 transitions. Word has length 107 [2018-12-02 20:50:48,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:48,756 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 138 transitions. [2018-12-02 20:50:48,757 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-02 20:50:48,757 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 138 transitions. [2018-12-02 20:50:48,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-12-02 20:50:48,757 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:48,757 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:48,758 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:48,758 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:48,758 INFO L82 PathProgramCache]: Analyzing trace with hash 46278891, now seen corresponding path program 1 times [2018-12-02 20:50:48,758 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:48,759 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:48,787 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:49,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:49,115 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:49,121 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:50:49,121 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:49,127 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:49,127 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 20:50:49,619 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 20:50:49,619 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:50:49,624 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:50:49,624 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-12-02 20:50:49,624 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-02 20:50:49,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-02 20:50:49,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=488, Unknown=0, NotChecked=0, Total=552 [2018-12-02 20:50:49,624 INFO L87 Difference]: Start difference. First operand 136 states and 138 transitions. Second operand 24 states. [2018-12-02 20:50:51,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:50:51,852 INFO L93 Difference]: Finished difference Result 134 states and 136 transitions. [2018-12-02 20:50:51,853 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-02 20:50:51,853 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 107 [2018-12-02 20:50:51,854 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:50:51,854 INFO L225 Difference]: With dead ends: 134 [2018-12-02 20:50:51,854 INFO L226 Difference]: Without dead ends: 134 [2018-12-02 20:50:51,854 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 77 SyntacticMatches, 7 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=103, Invalid=889, Unknown=0, NotChecked=0, Total=992 [2018-12-02 20:50:51,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-02 20:50:51,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-02 20:50:51,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-02 20:50:51,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 136 transitions. [2018-12-02 20:50:51,857 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 136 transitions. Word has length 107 [2018-12-02 20:50:51,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:50:51,857 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 136 transitions. [2018-12-02 20:50:51,857 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-02 20:50:51,857 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2018-12-02 20:50:51,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-02 20:50:51,858 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:50:51,858 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:50:51,858 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:50:51,859 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:50:51,859 INFO L82 PathProgramCache]: Analyzing trace with hash 1007095557, now seen corresponding path program 1 times [2018-12-02 20:50:51,859 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:50:51,859 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:50:51,876 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:50:52,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:50:52,337 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:50:52,356 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-02 20:50:52,358 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-02 20:50:52,358 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,360 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,364 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,364 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-12-02 20:50:52,380 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-12-02 20:50:52,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,384 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-12-02 20:50:52,385 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,394 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,403 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,403 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-12-02 20:50:52,436 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-12-02 20:50:52,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,443 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-12-02 20:50:52,443 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,459 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,475 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,475 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:39, output treesize:35 [2018-12-02 20:50:52,523 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-12-02 20:50:52,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,529 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,530 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,532 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,533 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,534 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,535 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-12-02 20:50:52,535 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,564 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,584 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,584 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:46 [2018-12-02 20:50:52,644 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-12-02 20:50:52,650 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,658 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,659 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,662 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,665 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-12-02 20:50:52,665 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,711 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,740 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,740 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:61, output treesize:57 [2018-12-02 20:50:52,820 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-12-02 20:50:52,825 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,829 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,830 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,832 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,834 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,837 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,839 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,841 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,845 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,846 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,850 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:52,851 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-12-02 20:50:52,852 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,923 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,960 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:52,960 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:72, output treesize:68 [2018-12-02 20:50:53,050 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-12-02 20:50:53,058 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,060 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,062 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,064 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,066 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,068 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,070 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,074 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,077 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,078 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,080 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,082 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,084 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,086 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,088 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,090 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,092 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,094 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,096 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,098 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,099 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-12-02 20:50:53,100 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:53,203 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:53,247 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:53,247 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:83, output treesize:79 [2018-12-02 20:50:53,365 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 74 [2018-12-02 20:50:53,373 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,375 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,378 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,380 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,382 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,386 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,388 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,392 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,396 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,398 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,400 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,402 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,413 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,424 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,426 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,428 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,430 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 297 [2018-12-02 20:50:53,430 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:53,577 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:53,631 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:53,631 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:94, output treesize:90 [2018-12-02 20:50:53,766 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 83 [2018-12-02 20:50:53,774 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,777 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,779 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,782 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,784 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,786 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,788 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,791 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,793 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,795 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,797 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,800 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,802 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,805 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,807 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,809 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,811 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,814 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,820 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,825 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,828 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,830 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,833 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,837 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,840 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,842 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,844 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,849 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,859 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:53,860 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 370 [2018-12-02 20:50:53,861 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:54,074 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:54,144 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:54,144 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:105, output treesize:101 [2018-12-02 20:50:54,329 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 92 [2018-12-02 20:50:54,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,340 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,342 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,345 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,347 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,350 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,352 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,354 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,359 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,362 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,365 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,373 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,376 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,379 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,381 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,386 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,391 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,398 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,409 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,415 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,417 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,430 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,437 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,440 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:54,455 INFO L303 Elim1Store]: Index analysis took 124 ms [2018-12-02 20:50:54,455 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 451 [2018-12-02 20:50:54,456 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:54,736 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:54,811 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:54,811 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:116, output treesize:112 [2018-12-02 20:50:55,010 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 101 [2018-12-02 20:50:55,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,023 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,025 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,028 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,031 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,034 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,037 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,040 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,042 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,045 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,048 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,050 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,053 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,056 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,059 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,061 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,064 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,066 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,069 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,074 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,077 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,080 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,083 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,086 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,088 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,091 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,093 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,096 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,099 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,102 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,104 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,107 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,112 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,115 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,117 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,120 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,122 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,125 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,128 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,131 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,134 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,136 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,139 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,142 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,147 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,149 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,157 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,160 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,162 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,166 INFO L303 Elim1Store]: Index analysis took 154 ms [2018-12-02 20:50:55,167 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 55 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 540 [2018-12-02 20:50:55,168 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:55,535 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:55,635 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:55,635 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:127, output treesize:123 [2018-12-02 20:50:55,861 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 135 treesize of output 110 [2018-12-02 20:50:55,872 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,878 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,885 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,888 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,892 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,898 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,901 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,903 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,906 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,909 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,914 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,921 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,925 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,928 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,931 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,939 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,948 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,951 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,954 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,957 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,959 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,965 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,968 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,971 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,973 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,976 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,982 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,984 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,987 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,990 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,996 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:55,999 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,001 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,004 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,007 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,010 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,012 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,015 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,018 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,021 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,024 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,027 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,030 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,033 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,036 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,038 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,041 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,044 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,047 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,050 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,053 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,056 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,059 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,062 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,063 INFO L303 Elim1Store]: Index analysis took 200 ms [2018-12-02 20:50:56,064 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 66 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 637 [2018-12-02 20:50:56,065 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:56,574 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:56,681 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:56,681 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:138, output treesize:134 [2018-12-02 20:50:56,924 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification that was a NOOP. DAG size: 57 [2018-12-02 20:50:56,942 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 119 [2018-12-02 20:50:56,953 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,957 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,960 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,966 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,972 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,982 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,984 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,987 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,990 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,996 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:56,999 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,002 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,005 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,008 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,011 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,014 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,017 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,023 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,026 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,029 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,032 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,035 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,038 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,041 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,044 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,046 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,049 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,052 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,055 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,058 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,061 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,064 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,066 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,069 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,076 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,079 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,082 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,085 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,088 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,091 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,094 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,097 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,100 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,103 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,112 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,115 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,118 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,124 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,127 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,130 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,133 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,136 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,139 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,142 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,146 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,149 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,157 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,161 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,170 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,176 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,179 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,182 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,185 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:57,186 INFO L303 Elim1Store]: Index analysis took 242 ms [2018-12-02 20:50:57,187 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 78 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 742 [2018-12-02 20:50:57,188 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:57,746 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:57,860 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:50:57,860 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:149, output treesize:145 [2018-12-02 20:50:58,121 WARN L180 SmtUtils]: Spent 114.00 ms on a formula simplification that was a NOOP. DAG size: 61 [2018-12-02 20:50:58,157 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 128 [2018-12-02 20:50:58,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,193 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,204 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,226 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,237 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,249 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,261 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,272 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,286 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,299 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,307 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,319 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,330 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,343 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,350 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,360 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,385 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,392 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,466 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,474 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,486 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,496 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,509 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,521 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,546 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,560 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,574 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,587 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,598 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,608 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,619 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,666 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,702 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,715 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,726 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,741 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,763 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,776 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,790 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,802 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,824 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,846 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,858 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,908 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,922 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,931 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,938 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,960 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:58,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,000 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,010 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,017 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,028 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,042 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,052 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,065 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,074 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,084 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,092 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,118 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,129 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,142 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,168 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:50:59,192 INFO L303 Elim1Store]: Index analysis took 1033 ms [2018-12-02 20:50:59,194 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 91 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 855 [2018-12-02 20:50:59,195 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:50:59,871 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:00,007 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:00,007 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:160, output treesize:156 [2018-12-02 20:51:00,315 WARN L180 SmtUtils]: Spent 140.00 ms on a formula simplification that was a NOOP. DAG size: 65 [2018-12-02 20:51:00,341 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 137 [2018-12-02 20:51:00,353 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,356 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,360 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,363 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,366 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,370 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,373 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,376 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,379 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,383 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,386 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,396 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,402 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,409 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,413 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,423 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,426 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,430 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,433 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,436 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,440 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,457 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,464 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,470 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,474 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,477 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,481 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,485 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,489 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,493 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,496 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,500 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,504 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,507 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,510 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,514 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,517 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,521 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,525 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,529 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,533 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,537 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,540 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,544 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,548 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,552 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,556 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,559 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,566 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,569 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,573 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,576 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,580 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,584 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,596 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,604 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,609 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,612 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,619 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,623 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,629 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,633 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,636 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,644 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,663 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,666 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,670 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,673 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,677 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,680 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,684 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,691 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,695 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,698 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,702 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,706 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,709 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,713 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,721 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,724 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:00,726 INFO L303 Elim1Store]: Index analysis took 382 ms [2018-12-02 20:51:00,727 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 105 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 976 [2018-12-02 20:51:00,728 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:51:01,578 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:01,742 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:01,742 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:171, output treesize:167 [2018-12-02 20:51:02,107 WARN L180 SmtUtils]: Spent 163.00 ms on a formula simplification that was a NOOP. DAG size: 69 [2018-12-02 20:51:02,156 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 179 treesize of output 146 [2018-12-02 20:51:02,184 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,201 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,215 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,225 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,237 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,252 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,267 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,284 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,297 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,306 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,321 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,333 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,350 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,358 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,369 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,382 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,417 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,434 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,471 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,503 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,531 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,548 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,555 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,570 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,585 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,607 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,633 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,677 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,694 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,711 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,721 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,734 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,749 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,766 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,783 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,797 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,806 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,886 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,903 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,915 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,928 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,959 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,981 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:02,992 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,009 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,017 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,034 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,046 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,063 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,076 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,089 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,132 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,149 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,163 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,227 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,242 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,259 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,276 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,293 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,306 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,323 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,336 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,341 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,354 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,372 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,402 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,433 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,474 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,491 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,503 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,547 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,560 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,574 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,633 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,677 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,695 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,704 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,718 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,733 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,744 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,751 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,768 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,782 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,798 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,815 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,826 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:03,827 INFO L303 Elim1Store]: Index analysis took 1669 ms [2018-12-02 20:51:03,829 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 1105 [2018-12-02 20:51:03,831 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:51:04,837 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:05,010 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:05,010 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:179, output treesize:175 [2018-12-02 20:51:05,439 WARN L180 SmtUtils]: Spent 177.00 ms on a formula simplification that was a NOOP. DAG size: 70 [2018-12-02 20:51:07,315 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:51:07,321 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:51:07,327 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:51:07,327 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:27 [2018-12-02 20:51:09,332 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 (_ BitVec 32))) (= |c_#memory_$Pointer$.offset| (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base| (let ((.cse0 (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv4 32)))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base|) (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv12 32)) v_DerPreprocessor_2) .cse0 .cse0) (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv8 32)) .cse0))))) is different from true [2018-12-02 20:51:11,340 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 (_ BitVec 32))) (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base| (let ((.cse0 (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv4 32)))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base|) (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv12 32)) v_DerPreprocessor_2) .cse0 .cse0) (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv8 32)) .cse0))) |c_#memory_$Pointer$.offset|)) is different from true [2018-12-02 20:51:11,481 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:11,482 INFO L303 Elim1Store]: Index analysis took 138 ms [2018-12-02 20:51:11,482 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 170 treesize of output 158 [2018-12-02 20:51:11,592 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:11,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:11,706 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:11,750 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:11,805 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:11,861 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:11,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:11,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,026 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,075 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,125 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,168 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,274 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,320 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,373 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,475 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,574 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,631 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,746 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,803 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,856 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:12,961 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,017 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,126 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,178 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,228 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,286 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,342 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,508 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,563 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,617 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,725 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,779 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,834 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,885 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:13,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,042 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,089 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,138 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,192 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,236 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,290 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,342 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,555 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,704 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,809 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:14,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,005 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,056 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,108 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,166 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,269 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,320 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,367 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,520 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,568 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,669 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,712 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,763 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,812 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,867 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,921 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:15,972 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,016 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,068 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,117 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,224 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,277 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,331 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,383 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,431 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,487 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,542 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,597 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,710 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,821 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,927 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:16,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:17,028 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:17,079 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:17,129 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:17,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:17,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:17,281 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:17,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:17,565 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:17,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:17,667 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:17,823 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:17,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:17,925 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:17,977 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,030 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,083 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,136 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,190 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,237 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,288 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,335 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,386 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,430 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,484 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,590 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,679 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,732 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,781 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:18,827 INFO L683 Elim1Store]: detected equality via solver [2018-12-02 20:51:20,547 INFO L303 Elim1Store]: Index analysis took 9063 ms [2018-12-02 20:51:20,780 INFO L478 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 134 disjoint index pairs (out of 136 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 158 treesize of output 1177 [2018-12-02 20:51:20,885 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:20,910 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:20,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:20,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:20,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,014 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,040 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,068 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,093 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,116 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,141 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,189 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,237 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,260 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,285 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,308 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,332 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,356 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,379 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,489 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,515 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,559 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,584 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,606 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,631 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,682 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,707 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,731 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,756 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,780 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,806 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,829 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,853 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,877 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,899 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,920 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,966 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:21,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,009 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,032 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,056 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,076 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,102 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,123 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,147 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,196 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,218 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,240 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,265 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,290 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,314 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,339 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,380 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,426 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,476 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,526 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,550 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,566 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,590 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,614 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,637 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,659 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,685 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,707 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,732 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,779 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,802 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,824 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,849 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:22,989 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,014 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,037 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,063 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,086 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,107 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,132 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,170 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,218 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,239 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,264 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,288 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,310 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,334 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,382 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,405 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,473 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,490 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,516 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,537 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,560 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,582 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,627 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,646 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:23,734 INFO L303 Elim1Store]: Index analysis took 2907 ms [2018-12-02 20:51:23,736 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1092 treesize of output 1092 [2018-12-02 20:51:24,504 WARN L180 SmtUtils]: Spent 765.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 77 [2018-12-02 20:51:24,539 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,549 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,567 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,573 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,582 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,592 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,609 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,617 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,634 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,650 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,657 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,671 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,679 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,695 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,704 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,710 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,718 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,725 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,732 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,740 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,748 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,756 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,782 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,790 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,798 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,803 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,811 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,826 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,834 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,842 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,850 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,890 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,913 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,920 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,929 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,953 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,971 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,980 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,989 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:24,997 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,007 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,016 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,025 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,032 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,041 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,059 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,069 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,078 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,086 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,095 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,105 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,114 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,123 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,133 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,142 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,160 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,168 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,186 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,210 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,218 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,227 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,234 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,241 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,249 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,255 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,261 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,268 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,276 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,283 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,291 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,299 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,306 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,314 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,322 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,330 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,345 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,352 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,360 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,367 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,376 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,383 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:25,412 INFO L303 Elim1Store]: Index analysis took 905 ms [2018-12-02 20:51:25,413 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 1096 [2018-12-02 20:51:25,415 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 20:51:25,804 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:27,101 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,129 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,210 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,237 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,263 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,292 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,319 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,348 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,482 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,509 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,561 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,587 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,632 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,659 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,713 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,743 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,770 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,798 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,828 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,907 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,964 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:27,990 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,046 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,076 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,105 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,125 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,209 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,235 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,263 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,289 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,312 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,339 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,367 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,448 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,475 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,529 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,583 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,612 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,668 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,698 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,725 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,752 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,832 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,858 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,907 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,932 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,961 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:28,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,016 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,038 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,064 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,090 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,120 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,149 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,175 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,228 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,254 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,284 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,310 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,339 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,366 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,446 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,474 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,526 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,551 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,578 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,601 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,658 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,684 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,712 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,739 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,768 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,793 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,844 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,872 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,920 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,948 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:29,976 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,001 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,028 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,052 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,124 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,149 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,202 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,280 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,308 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,335 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,385 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,464 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,487 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,512 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,567 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,646 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,700 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,726 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,753 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,777 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:30,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:31,618 INFO L303 Elim1Store]: Index analysis took 4572 ms [2018-12-02 20:51:31,699 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 134 disjoint index pairs (out of 136 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 155 treesize of output 1164 [2018-12-02 20:51:33,465 WARN L180 SmtUtils]: Spent 1.76 s on a formula simplification. DAG size of input: 166 DAG size of output: 119 [2018-12-02 20:51:33,486 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,503 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,512 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,519 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,528 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,542 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,550 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,559 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,566 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,575 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,583 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,610 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,619 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,637 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,646 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,663 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,680 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,697 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,706 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,716 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,725 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,732 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,740 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,748 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,756 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,765 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,772 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,781 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,789 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,797 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,805 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,813 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,823 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,831 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,840 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,856 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,865 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,873 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,890 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,899 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,909 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,928 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,935 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,952 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,959 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,968 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,978 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:33,998 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,007 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,015 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,025 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,034 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,042 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,050 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,059 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,068 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,077 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,085 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,094 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,103 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,110 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,118 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,127 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,135 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,141 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,149 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,166 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,182 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,199 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,208 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,221 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,239 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,248 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,266 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,275 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,284 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,292 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,302 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,312 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,321 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,330 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,338 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,346 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,355 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,365 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,392 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,417 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,434 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,470 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,487 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,497 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,506 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:34,740 INFO L303 Elim1Store]: Index analysis took 1272 ms [2018-12-02 20:51:34,741 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 133 treesize of output 1092 [2018-12-02 20:51:34,743 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-02 20:51:35,327 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,336 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,345 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,353 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,362 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,381 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,388 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,407 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,423 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,433 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,468 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,477 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,485 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,510 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,524 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,533 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,541 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,549 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,566 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,576 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,586 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,595 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,610 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,618 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,634 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,667 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,675 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,683 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,693 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,701 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,710 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,719 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,727 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,736 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,744 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,750 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,758 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,767 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,777 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,787 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,795 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,805 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,813 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,832 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,841 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,849 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,858 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,867 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,876 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,886 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,924 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,931 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,958 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,968 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,977 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,985 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:35,999 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,009 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,018 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,027 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,036 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,045 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,054 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,061 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,069 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,077 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,086 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,095 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,104 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,112 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,119 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,127 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,136 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,145 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,180 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,187 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,196 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,205 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,213 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,221 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,229 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,237 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,246 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,252 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,259 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,269 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,278 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,287 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,295 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,304 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,314 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,322 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,329 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,338 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,346 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:36,575 INFO L303 Elim1Store]: Index analysis took 1266 ms [2018-12-02 20:51:36,577 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 1062 [2018-12-02 20:51:36,578 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-02 20:51:37,039 INFO L267 ElimStorePlain]: Start of recursive call 6: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-02 20:51:37,214 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-02 20:51:37,289 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:37,352 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:37,352 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 2 variables, input treesize:173, output treesize:141 [2018-12-02 20:51:40,382 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 124 [2018-12-02 20:51:40,388 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,391 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,392 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,396 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,398 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,400 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,402 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,403 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,403 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,405 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,407 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,409 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,409 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,413 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,415 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,415 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,417 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,417 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,423 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,424 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,426 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,428 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,430 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,431 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,433 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,434 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,436 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,437 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,437 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,440 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,440 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,446 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,448 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,455 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,455 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,456 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,457 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,459 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,462 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,463 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,464 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,465 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,466 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,466 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,468 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,470 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,471 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,472 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,473 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,474 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,474 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,475 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,476 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,477 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,477 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,479 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,480 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:40,495 INFO L303 Elim1Store]: Index analysis took 110 ms [2018-12-02 20:51:40,497 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 1068 [2018-12-02 20:51:40,500 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:51:40,833 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:40,880 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:40,881 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:160, output treesize:141 [2018-12-02 20:51:43,419 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 125 treesize of output 92 [2018-12-02 20:51:43,646 INFO L303 Elim1Store]: Index analysis took 225 ms [2018-12-02 20:51:43,647 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 110 [2018-12-02 20:51:43,648 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:51:43,674 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:43,701 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:43,701 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:125, output treesize:110 [2018-12-02 20:51:45,772 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 81 [2018-12-02 20:51:45,849 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 16 select indices, 16 select index equivalence classes, 105 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 15 case distinctions, treesize of input 81 treesize of output 121 [2018-12-02 20:51:45,849 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2018-12-02 20:51:45,850 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-12-02 20:51:45,907 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-02 20:51:45,957 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-02 20:51:45,957 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:113, output treesize:130 [2018-12-02 20:51:46,878 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:51:46,878 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:51:48,997 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:51:48,999 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:51:49,000 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:51:49,000 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:10 [2018-12-02 20:51:49,297 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:51:49,297 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:51:49,303 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:51:49,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:51:49,371 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:51:50,128 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 20:51:50,129 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 20:51:50,130 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:51:50,131 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:50,134 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:50,135 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-12-02 20:51:51,492 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:51:51,499 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:51:51,520 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:51:51,521 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:38 [2018-12-02 20:51:55,301 WARN L180 SmtUtils]: Spent 2.02 s on a formula simplification that was a NOOP. DAG size: 22 [2018-12-02 20:51:55,312 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 31 [2018-12-02 20:51:55,316 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:55,318 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 41 [2018-12-02 20:51:55,323 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:55,325 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:55,326 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:55,331 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 45 [2018-12-02 20:51:55,331 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 20:51:55,340 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:55,346 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:55,366 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:51:55,366 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:58, output treesize:22 [2018-12-02 20:51:59,992 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:59,992 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 38 [2018-12-02 20:51:59,996 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:51:59,996 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 9 [2018-12-02 20:51:59,996 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:51:59,998 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:52:00,004 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:52:00,004 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:39, output treesize:13 [2018-12-02 20:52:03,808 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-12-02 20:52:03,809 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 5 [2018-12-02 20:52:03,809 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:52:03,810 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:52:03,811 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:52:03,811 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:5 [2018-12-02 20:52:04,094 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 20:52:04,095 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:52:04,111 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 20:52:04,111 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [40] imperfect sequences [61] total 97 [2018-12-02 20:52:04,111 INFO L459 AbstractCegarLoop]: Interpolant automaton has 97 states [2018-12-02 20:52:04,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2018-12-02 20:52:04,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=295, Invalid=10631, Unknown=2, NotChecked=414, Total=11342 [2018-12-02 20:52:04,113 INFO L87 Difference]: Start difference. First operand 134 states and 136 transitions. Second operand 97 states. [2018-12-02 20:53:05,597 WARN L180 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 29 [2018-12-02 20:53:11,154 WARN L180 SmtUtils]: Spent 4.12 s on a formula simplification. DAG size of input: 38 DAG size of output: 31 [2018-12-02 20:53:16,387 WARN L180 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 32 [2018-12-02 20:53:23,157 WARN L180 SmtUtils]: Spent 126.00 ms on a formula simplification that was a NOOP. DAG size: 128 [2018-12-02 20:53:46,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:53:46,505 INFO L93 Difference]: Finished difference Result 112 states and 112 transitions. [2018-12-02 20:53:46,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-12-02 20:53:46,506 INFO L78 Accepts]: Start accepts. Automaton has 97 states. Word has length 112 [2018-12-02 20:53:46,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:53:46,506 INFO L225 Difference]: With dead ends: 112 [2018-12-02 20:53:46,506 INFO L226 Difference]: Without dead ends: 112 [2018-12-02 20:53:46,508 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 278 GetRequests, 131 SyntacticMatches, 1 SemanticMatches, 146 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 3132 ImplicationChecksByTransitivity, 57.0s TimeCoverageRelationStatistics Valid=677, Invalid=20498, Unknown=3, NotChecked=578, Total=21756 [2018-12-02 20:53:46,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-12-02 20:53:46,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-12-02 20:53:46,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-12-02 20:53:46,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 112 transitions. [2018-12-02 20:53:46,510 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 112 transitions. Word has length 112 [2018-12-02 20:53:46,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:53:46,510 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 112 transitions. [2018-12-02 20:53:46,510 INFO L481 AbstractCegarLoop]: Interpolant automaton has 97 states. [2018-12-02 20:53:46,510 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 112 transitions. [2018-12-02 20:53:46,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-02 20:53:46,511 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:53:46,511 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:53:46,511 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION]=== [2018-12-02 20:53:46,511 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:53:46,511 INFO L82 PathProgramCache]: Analyzing trace with hash -1664575082, now seen corresponding path program 1 times [2018-12-02 20:53:46,512 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:53:46,512 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c3858aec-d3f8-40e6-bc57-b4ca0fb938b6/bin-2019/utaipan/cvc4 Starting monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:53:46,530 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:53:50,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 20:53:55,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 20:53:55,479 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-02 20:53:55,489 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-12-02 20:53:55,495 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-12-02 20:53:55,504 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-02 20:53:55,504 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-02 20:53:55,516 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 08:53:55 BoogieIcfgContainer [2018-12-02 20:53:55,516 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-02 20:53:55,516 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-02 20:53:55,516 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-02 20:53:55,517 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-02 20:53:55,517 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:50:25" (3/4) ... [2018-12-02 20:53:55,520 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-02 20:53:55,520 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-02 20:53:55,521 INFO L168 Benchmark]: Toolchain (without parser) took 210788.22 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 260.6 MB). Free memory was 938.0 MB in the beginning and 1.2 GB in the end (delta: -242.0 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. [2018-12-02 20:53:55,521 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 20:53:55,521 INFO L168 Benchmark]: CACSL2BoogieTranslator took 355.37 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 124.3 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -152.3 MB). Peak memory consumption was 31.6 MB. Max. memory is 11.5 GB. [2018-12-02 20:53:55,521 INFO L168 Benchmark]: Boogie Procedure Inliner took 21.86 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 20:53:55,522 INFO L168 Benchmark]: Boogie Preprocessor took 23.22 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 20:53:55,522 INFO L168 Benchmark]: RCFGBuilder took 360.35 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 44.4 MB). Peak memory consumption was 44.4 MB. Max. memory is 11.5 GB. [2018-12-02 20:53:55,522 INFO L168 Benchmark]: TraceAbstraction took 210019.80 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 136.3 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -134.1 MB). Peak memory consumption was 2.2 MB. Max. memory is 11.5 GB. [2018-12-02 20:53:55,522 INFO L168 Benchmark]: Witness Printer took 3.79 ms. Allocated memory is still 1.3 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 20:53:55,523 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 355.37 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 124.3 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -152.3 MB). Peak memory consumption was 31.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 21.86 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.22 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 360.35 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 44.4 MB). Peak memory consumption was 44.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 210019.80 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 136.3 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -134.1 MB). Peak memory consumption was 2.2 MB. Max. memory is 11.5 GB. * Witness Printer took 3.79 ms. Allocated memory is still 1.3 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1443]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1443. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={-1:0}] [L1444] CALL entry_point() VAL [ldv_global_msg_list={-1:0}] [L1436] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={-1:0}] [L1437] CALL, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={-1:0}] [L1406] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={-1:0}] [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16, ldv_global_msg_list={-1:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=16, \result={1082401:0}, ldv_global_msg_list={-1:0}, malloc(size)={1082401:0}, size=16] [L1408] RET, EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_global_msg_list={-1:0}, ldv_malloc(sizeof(*kobj))={1082401:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) [L1409] COND FALSE !(!kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}, memset(kobj, 0, sizeof(*kobj))={1082401:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1294] ((&kref->refcount)->counter) = (1) VAL [kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1382] RET ldv_kref_init(&kobj->kref) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [ldv_global_msg_list={-1:0}, list={1082401:4}] [L1099] list->next = list VAL [ldv_global_msg_list={-1:0}, list={1082401:4}, list={1082401:4}] [L1100] list->prev = list VAL [ldv_global_msg_list={-1:0}, list={1082401:4}, list={1082401:4}] [L1383] RET LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1398] RET ldv_kobject_init_internal(kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1413] RET ldv_kobject_init(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1414] return kobj; VAL [\result={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1437] RET, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={-1:0}, ldv_kobject_create()={1082401:0}] [L1437] kobj = ldv_kobject_create() [L1438] CALL ldv_kobject_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={-1:0}, v={1082401:12}] [L1255] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}] [L1256] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}, v->counter=1] [L1256] temp = v->counter [L1257] temp += i VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1258] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1259] return temp; VAL [\old(i)=1, \result=2, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={1082401:12}, kref={1082401:12}, ldv_atomic_add_return(1, (&kref->refcount))=2, ldv_global_msg_list={-1:0}] [L1374] RET ldv_kref_get(&kobj->kref) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1375] return kobj; VAL [\result={1082401:0}, kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1438] RET ldv_kobject_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}, ldv_kobject_get(kobj)={1082401:0}] [L1440] CALL ldv_kobject_put(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={-1:0}, v={1082401:12}] [L1264] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}] [L1265] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}, v->counter=2] [L1265] temp = v->counter [L1266] temp -= i VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1267] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1268] return temp; VAL [\old(i)=1, \result=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1281] RET, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={1082401:12}, kref={1082401:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, ldv_global_msg_list={-1:0}, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) [L1285] return 0; VAL [\old(count)=1, \result=0, count=1, kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}, release={-1:0}] [L1313] RET, EXPR ldv_kref_sub(kref, 1, release) VAL [kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] return ldv_kref_sub(kref, 1, release); [L1363] RET ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1440] RET ldv_kobject_put(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1444] RET entry_point() VAL [ldv_global_msg_list={-1:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 21 procedures, 141 locations, 23 error locations. UNSAFE Result, 209.9s OverallTime, 24 OverallIterations, 16 TraceHistogramMax, 121.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2646 SDtfs, 1320 SDslu, 21582 SDs, 0 SdLazy, 16728 SolverSat, 382 SolverUnsat, 8 SolverUnknown, 0 SolverNotchecked, 88.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1793 GetRequests, 1259 SyntacticMatches, 42 SemanticMatches, 492 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 4165 ImplicationChecksByTransitivity, 63.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=163occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 23 MinimizatonAttempts, 102 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 6.8s SatisfiabilityAnalysisTime, 76.1s InterpolantComputationTime, 1663 NumberOfCodeBlocks, 1663 NumberOfCodeBlocksAsserted, 28 NumberOfCheckSat, 1638 ConstructedInterpolants, 337 QuantifiedInterpolants, 1209961 SizeOfPredicates, 226 NumberOfNonLiveVariables, 6392 ConjunctsInSsa, 640 ConjunctsInUnsatCore, 30 InterpolantComputations, 23 PerfectInterpolantSequences, 1698/1966 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...