./Ultimate.py --spec ../../sv-benchmarks/c/properties/no-overflow.prp --file ../../sv-benchmarks/c/busybox-1.22.0/basename_false-unreach-call_true-no-overflow_true-valid-memsafety.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for overflows Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/busybox-1.22.0/basename_false-unreach-call_true-no-overflow_true-valid-memsafety.i -s /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/config/svcomp-Overflow-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! overflow) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash c57ebc44b313bf301635c00d4458ecfdd41286b1 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Using bit-precise analysis No suitable file found in config dir /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/config using search string *Overflow*64bit*_Bitvector*.epf No suitable settings file found using Overflow*64bit*_Bitvector ERROR: UNSUPPORTED PROPERTY Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: AssertionError: var is still there: v_arrayElimArr_9 input size 57 context size 57 output size 57 --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-03 06:23:27,839 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-03 06:23:27,840 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-03 06:23:27,847 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-03 06:23:27,847 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-03 06:23:27,848 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-03 06:23:27,849 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-03 06:23:27,850 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-03 06:23:27,851 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-03 06:23:27,851 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-03 06:23:27,852 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-03 06:23:27,852 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-03 06:23:27,853 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-03 06:23:27,854 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-03 06:23:27,854 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-03 06:23:27,855 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-03 06:23:27,855 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-03 06:23:27,857 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-03 06:23:27,858 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-03 06:23:27,859 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-03 06:23:27,860 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-03 06:23:27,861 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-03 06:23:27,862 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-03 06:23:27,862 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-03 06:23:27,863 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-03 06:23:27,863 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-03 06:23:27,864 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-03 06:23:27,864 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-03 06:23:27,865 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-03 06:23:27,866 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-03 06:23:27,866 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-03 06:23:27,866 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-03 06:23:27,866 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-03 06:23:27,867 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-03 06:23:27,867 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-03 06:23:27,867 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-03 06:23:27,868 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/config/svcomp-Overflow-64bit-Taipan_Default.epf [2018-12-03 06:23:27,877 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-03 06:23:27,877 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-03 06:23:27,878 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-03 06:23:27,878 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-03 06:23:27,878 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-03 06:23:27,878 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-03 06:23:27,879 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-03 06:23:27,879 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-03 06:23:27,879 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-03 06:23:27,879 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-03 06:23:27,879 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-03 06:23:27,879 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-03 06:23:27,879 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-03 06:23:27,880 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-03 06:23:27,880 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-03 06:23:27,880 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-03 06:23:27,880 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-03 06:23:27,880 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-03 06:23:27,881 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-03 06:23:27,881 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-03 06:23:27,881 INFO L133 SettingsManager]: * Check absence of signed integer overflows=true [2018-12-03 06:23:27,881 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-03 06:23:27,881 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-03 06:23:27,881 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-03 06:23:27,881 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-03 06:23:27,882 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-03 06:23:27,882 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-03 06:23:27,882 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-03 06:23:27,882 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-03 06:23:27,882 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-03 06:23:27,882 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-03 06:23:27,882 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-03 06:23:27,883 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-03 06:23:27,883 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-03 06:23:27,883 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-03 06:23:27,883 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! overflow) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c57ebc44b313bf301635c00d4458ecfdd41286b1 [2018-12-03 06:23:27,905 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-03 06:23:27,912 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-03 06:23:27,914 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-03 06:23:27,915 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-03 06:23:27,915 INFO L276 PluginConnector]: CDTParser initialized [2018-12-03 06:23:27,916 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/../../sv-benchmarks/c/busybox-1.22.0/basename_false-unreach-call_true-no-overflow_true-valid-memsafety.i [2018-12-03 06:23:27,953 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/data/23513e18f/03739d3cc1664242853e031c2b693348/FLAGd3ea71ee2 [2018-12-03 06:23:28,456 INFO L307 CDTParser]: Found 1 translation units. [2018-12-03 06:23:28,456 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/sv-benchmarks/c/busybox-1.22.0/basename_false-unreach-call_true-no-overflow_true-valid-memsafety.i [2018-12-03 06:23:28,465 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/data/23513e18f/03739d3cc1664242853e031c2b693348/FLAGd3ea71ee2 [2018-12-03 06:23:28,473 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/data/23513e18f/03739d3cc1664242853e031c2b693348 [2018-12-03 06:23:28,474 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-03 06:23:28,475 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-03 06:23:28,476 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-03 06:23:28,476 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-03 06:23:28,478 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-03 06:23:28,478 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.12 06:23:28" (1/1) ... [2018-12-03 06:23:28,480 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5bf3e0cc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:23:28, skipping insertion in model container [2018-12-03 06:23:28,480 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.12 06:23:28" (1/1) ... [2018-12-03 06:23:28,484 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-03 06:23:28,509 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-03 06:23:28,866 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-03 06:23:28,884 INFO L191 MainTranslator]: Completed pre-run [2018-12-03 06:23:28,927 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-03 06:23:29,013 INFO L195 MainTranslator]: Completed translation [2018-12-03 06:23:29,013 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:23:29 WrapperNode [2018-12-03 06:23:29,013 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-03 06:23:29,014 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-03 06:23:29,014 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-03 06:23:29,014 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-03 06:23:29,019 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:23:29" (1/1) ... [2018-12-03 06:23:29,036 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:23:29" (1/1) ... [2018-12-03 06:23:29,043 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-03 06:23:29,044 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-03 06:23:29,044 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-03 06:23:29,044 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-03 06:23:29,050 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:23:29" (1/1) ... [2018-12-03 06:23:29,050 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:23:29" (1/1) ... [2018-12-03 06:23:29,055 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:23:29" (1/1) ... [2018-12-03 06:23:29,055 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:23:29" (1/1) ... [2018-12-03 06:23:29,076 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:23:29" (1/1) ... [2018-12-03 06:23:29,081 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:23:29" (1/1) ... [2018-12-03 06:23:29,085 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:23:29" (1/1) ... [2018-12-03 06:23:29,090 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-03 06:23:29,090 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-03 06:23:29,090 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-03 06:23:29,090 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-03 06:23:29,091 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:23:29" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-03 06:23:29,125 INFO L130 BoogieDeclarations]: Found specification of procedure __main [2018-12-03 06:23:29,126 INFO L138 BoogieDeclarations]: Found implementation of procedure __main [2018-12-03 06:23:29,126 INFO L130 BoogieDeclarations]: Found specification of procedure last_char_is [2018-12-03 06:23:29,126 INFO L138 BoogieDeclarations]: Found implementation of procedure last_char_is [2018-12-03 06:23:29,126 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-03 06:23:29,126 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-03 06:23:29,126 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-03 06:23:29,126 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-03 06:23:29,126 INFO L130 BoogieDeclarations]: Found specification of procedure safe_write [2018-12-03 06:23:29,126 INFO L138 BoogieDeclarations]: Found implementation of procedure safe_write [2018-12-03 06:23:29,126 INFO L130 BoogieDeclarations]: Found specification of procedure bb_get_last_path_component_nostrip [2018-12-03 06:23:29,127 INFO L138 BoogieDeclarations]: Found implementation of procedure bb_get_last_path_component_nostrip [2018-12-03 06:23:29,127 INFO L130 BoogieDeclarations]: Found specification of procedure bb_get_last_path_component_strip [2018-12-03 06:23:29,127 INFO L138 BoogieDeclarations]: Found implementation of procedure bb_get_last_path_component_strip [2018-12-03 06:23:29,127 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-03 06:23:29,127 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-03 06:23:29,127 INFO L130 BoogieDeclarations]: Found specification of procedure write [2018-12-03 06:23:29,127 INFO L138 BoogieDeclarations]: Found implementation of procedure write [2018-12-03 06:23:29,127 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-03 06:23:29,127 INFO L130 BoogieDeclarations]: Found specification of procedure strrchr [2018-12-03 06:23:29,127 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-03 06:23:29,127 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-03 06:23:29,127 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-03 06:23:29,128 INFO L130 BoogieDeclarations]: Found specification of procedure full_write [2018-12-03 06:23:29,128 INFO L138 BoogieDeclarations]: Found implementation of procedure full_write [2018-12-03 06:23:29,128 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-03 06:23:29,128 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-03 06:23:29,128 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-03 06:23:29,711 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-03 06:23:29,711 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-12-03 06:23:29,711 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 06:23:29 BoogieIcfgContainer [2018-12-03 06:23:29,712 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-03 06:23:29,712 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-03 06:23:29,712 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-03 06:23:29,715 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-03 06:23:29,716 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.12 06:23:28" (1/3) ... [2018-12-03 06:23:29,716 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3e339129 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.12 06:23:29, skipping insertion in model container [2018-12-03 06:23:29,716 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:23:29" (2/3) ... [2018-12-03 06:23:29,717 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3e339129 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.12 06:23:29, skipping insertion in model container [2018-12-03 06:23:29,717 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 06:23:29" (3/3) ... [2018-12-03 06:23:29,718 INFO L112 eAbstractionObserver]: Analyzing ICFG basename_false-unreach-call_true-no-overflow_true-valid-memsafety.i [2018-12-03 06:23:29,726 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-03 06:23:29,731 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 28 error locations. [2018-12-03 06:23:29,740 INFO L257 AbstractCegarLoop]: Starting to check reachability of 28 error locations. [2018-12-03 06:23:29,760 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-03 06:23:29,760 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-03 06:23:29,760 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-03 06:23:29,760 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-03 06:23:29,760 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-03 06:23:29,760 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-03 06:23:29,760 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-03 06:23:29,760 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-03 06:23:29,774 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states. [2018-12-03 06:23:29,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-12-03 06:23:29,777 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:29,777 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:29,779 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:29,782 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:29,782 INFO L82 PathProgramCache]: Analyzing trace with hash -51273939, now seen corresponding path program 1 times [2018-12-03 06:23:29,784 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:29,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:29,852 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:29,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:29,852 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:29,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:30,011 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:23:30,013 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:23:30,013 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-03 06:23:30,013 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:23:30,016 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 06:23:30,024 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 06:23:30,024 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:30,026 INFO L87 Difference]: Start difference. First operand 154 states. Second operand 3 states. [2018-12-03 06:23:30,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:30,073 INFO L93 Difference]: Finished difference Result 298 states and 388 transitions. [2018-12-03 06:23:30,074 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 06:23:30,074 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-12-03 06:23:30,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:30,081 INFO L225 Difference]: With dead ends: 298 [2018-12-03 06:23:30,081 INFO L226 Difference]: Without dead ends: 149 [2018-12-03 06:23:30,084 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:30,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-03 06:23:30,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-12-03 06:23:30,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-12-03 06:23:30,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 183 transitions. [2018-12-03 06:23:30,114 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 183 transitions. Word has length 8 [2018-12-03 06:23:30,114 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:30,114 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 183 transitions. [2018-12-03 06:23:30,114 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 06:23:30,115 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 183 transitions. [2018-12-03 06:23:30,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-12-03 06:23:30,115 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:30,115 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:30,115 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:30,116 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:30,116 INFO L82 PathProgramCache]: Analyzing trace with hash -1589491972, now seen corresponding path program 1 times [2018-12-03 06:23:30,116 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:30,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,123 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:30,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,123 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:30,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:30,180 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:23:30,180 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:23:30,180 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-03 06:23:30,180 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:23:30,181 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 06:23:30,181 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 06:23:30,181 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:30,182 INFO L87 Difference]: Start difference. First operand 149 states and 183 transitions. Second operand 3 states. [2018-12-03 06:23:30,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:30,204 INFO L93 Difference]: Finished difference Result 152 states and 186 transitions. [2018-12-03 06:23:30,205 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 06:23:30,205 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2018-12-03 06:23:30,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:30,206 INFO L225 Difference]: With dead ends: 152 [2018-12-03 06:23:30,206 INFO L226 Difference]: Without dead ends: 151 [2018-12-03 06:23:30,206 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:30,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-12-03 06:23:30,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-12-03 06:23:30,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-12-03 06:23:30,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 185 transitions. [2018-12-03 06:23:30,214 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 185 transitions. Word has length 9 [2018-12-03 06:23:30,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:30,214 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 185 transitions. [2018-12-03 06:23:30,214 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 06:23:30,214 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 185 transitions. [2018-12-03 06:23:30,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-03 06:23:30,215 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:30,215 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:30,215 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:30,215 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:30,215 INFO L82 PathProgramCache]: Analyzing trace with hash -540770008, now seen corresponding path program 1 times [2018-12-03 06:23:30,215 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:30,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,221 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:30,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,221 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:30,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:30,271 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 06:23:30,271 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:23:30,271 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-03 06:23:30,271 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:23:30,272 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 06:23:30,272 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 06:23:30,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:30,272 INFO L87 Difference]: Start difference. First operand 151 states and 185 transitions. Second operand 3 states. [2018-12-03 06:23:30,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:30,309 INFO L93 Difference]: Finished difference Result 151 states and 185 transitions. [2018-12-03 06:23:30,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 06:23:30,309 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-12-03 06:23:30,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:30,310 INFO L225 Difference]: With dead ends: 151 [2018-12-03 06:23:30,310 INFO L226 Difference]: Without dead ends: 147 [2018-12-03 06:23:30,311 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:30,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-12-03 06:23:30,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 147. [2018-12-03 06:23:30,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-12-03 06:23:30,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 181 transitions. [2018-12-03 06:23:30,317 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 181 transitions. Word has length 12 [2018-12-03 06:23:30,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:30,317 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 181 transitions. [2018-12-03 06:23:30,317 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 06:23:30,317 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 181 transitions. [2018-12-03 06:23:30,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-03 06:23:30,317 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:30,318 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:30,318 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:30,318 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:30,318 INFO L82 PathProgramCache]: Analyzing trace with hash -540768278, now seen corresponding path program 1 times [2018-12-03 06:23:30,318 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:30,324 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,324 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:30,324 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,324 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:30,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:30,383 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:23:30,383 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:23:30,383 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-03 06:23:30,383 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:23:30,383 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 06:23:30,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 06:23:30,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:30,384 INFO L87 Difference]: Start difference. First operand 147 states and 181 transitions. Second operand 3 states. [2018-12-03 06:23:30,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:30,397 INFO L93 Difference]: Finished difference Result 147 states and 181 transitions. [2018-12-03 06:23:30,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 06:23:30,397 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-12-03 06:23:30,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:30,398 INFO L225 Difference]: With dead ends: 147 [2018-12-03 06:23:30,398 INFO L226 Difference]: Without dead ends: 146 [2018-12-03 06:23:30,399 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:30,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-03 06:23:30,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 144. [2018-12-03 06:23:30,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-03 06:23:30,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 178 transitions. [2018-12-03 06:23:30,404 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 178 transitions. Word has length 12 [2018-12-03 06:23:30,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:30,405 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 178 transitions. [2018-12-03 06:23:30,405 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 06:23:30,405 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 178 transitions. [2018-12-03 06:23:30,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-12-03 06:23:30,405 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:30,405 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:30,406 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:30,406 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:30,406 INFO L82 PathProgramCache]: Analyzing trace with hash 415999081, now seen corresponding path program 1 times [2018-12-03 06:23:30,406 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:30,412 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,412 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:30,412 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,412 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:30,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:30,459 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 06:23:30,459 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:23:30,459 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-03 06:23:30,459 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:23:30,459 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 06:23:30,459 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 06:23:30,460 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:30,460 INFO L87 Difference]: Start difference. First operand 144 states and 178 transitions. Second operand 3 states. [2018-12-03 06:23:30,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:30,490 INFO L93 Difference]: Finished difference Result 144 states and 178 transitions. [2018-12-03 06:23:30,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 06:23:30,491 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2018-12-03 06:23:30,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:30,492 INFO L225 Difference]: With dead ends: 144 [2018-12-03 06:23:30,492 INFO L226 Difference]: Without dead ends: 142 [2018-12-03 06:23:30,492 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:30,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-03 06:23:30,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-03 06:23:30,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-03 06:23:30,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 176 transitions. [2018-12-03 06:23:30,500 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 176 transitions. Word has length 13 [2018-12-03 06:23:30,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:30,500 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 176 transitions. [2018-12-03 06:23:30,500 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 06:23:30,500 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 176 transitions. [2018-12-03 06:23:30,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-12-03 06:23:30,501 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:30,501 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:30,502 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:30,502 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:30,502 INFO L82 PathProgramCache]: Analyzing trace with hash 343163019, now seen corresponding path program 1 times [2018-12-03 06:23:30,502 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:30,510 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,511 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:30,511 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,511 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:30,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:30,586 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 06:23:30,586 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:23:30,586 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-03 06:23:30,586 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:23:30,587 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 06:23:30,587 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 06:23:30,587 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:30,587 INFO L87 Difference]: Start difference. First operand 142 states and 176 transitions. Second operand 3 states. [2018-12-03 06:23:30,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:30,612 INFO L93 Difference]: Finished difference Result 142 states and 176 transitions. [2018-12-03 06:23:30,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 06:23:30,613 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 15 [2018-12-03 06:23:30,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:30,613 INFO L225 Difference]: With dead ends: 142 [2018-12-03 06:23:30,614 INFO L226 Difference]: Without dead ends: 140 [2018-12-03 06:23:30,614 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:30,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-12-03 06:23:30,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-12-03 06:23:30,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-03 06:23:30,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 174 transitions. [2018-12-03 06:23:30,618 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 174 transitions. Word has length 15 [2018-12-03 06:23:30,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:30,619 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 174 transitions. [2018-12-03 06:23:30,619 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 06:23:30,619 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 174 transitions. [2018-12-03 06:23:30,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-12-03 06:23:30,620 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:30,620 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:30,620 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:30,620 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:30,620 INFO L82 PathProgramCache]: Analyzing trace with hash -1254383198, now seen corresponding path program 1 times [2018-12-03 06:23:30,620 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:30,625 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,625 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:30,625 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,626 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:30,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:30,669 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 06:23:30,669 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:23:30,669 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-03 06:23:30,670 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:23:30,670 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 06:23:30,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 06:23:30,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:30,670 INFO L87 Difference]: Start difference. First operand 140 states and 174 transitions. Second operand 3 states. [2018-12-03 06:23:30,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:30,691 INFO L93 Difference]: Finished difference Result 264 states and 334 transitions. [2018-12-03 06:23:30,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 06:23:30,692 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 22 [2018-12-03 06:23:30,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:30,693 INFO L225 Difference]: With dead ends: 264 [2018-12-03 06:23:30,693 INFO L226 Difference]: Without dead ends: 143 [2018-12-03 06:23:30,694 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:30,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-12-03 06:23:30,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-12-03 06:23:30,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-12-03 06:23:30,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 177 transitions. [2018-12-03 06:23:30,700 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 177 transitions. Word has length 22 [2018-12-03 06:23:30,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:30,700 INFO L480 AbstractCegarLoop]: Abstraction has 143 states and 177 transitions. [2018-12-03 06:23:30,700 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 06:23:30,700 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 177 transitions. [2018-12-03 06:23:30,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-03 06:23:30,701 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:30,701 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:30,702 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:30,702 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:30,702 INFO L82 PathProgramCache]: Analyzing trace with hash 1182405925, now seen corresponding path program 1 times [2018-12-03 06:23:30,702 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:30,709 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,709 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:30,709 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,709 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:30,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:30,785 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-03 06:23:30,785 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:23:30,786 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-03 06:23:30,786 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:23:30,786 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 06:23:30,786 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 06:23:30,786 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 06:23:30,787 INFO L87 Difference]: Start difference. First operand 143 states and 177 transitions. Second operand 4 states. [2018-12-03 06:23:30,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:30,841 INFO L93 Difference]: Finished difference Result 151 states and 187 transitions. [2018-12-03 06:23:30,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-03 06:23:30,842 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2018-12-03 06:23:30,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:30,843 INFO L225 Difference]: With dead ends: 151 [2018-12-03 06:23:30,843 INFO L226 Difference]: Without dead ends: 150 [2018-12-03 06:23:30,844 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-03 06:23:30,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-03 06:23:30,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 142. [2018-12-03 06:23:30,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-03 06:23:30,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 176 transitions. [2018-12-03 06:23:30,852 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 176 transitions. Word has length 25 [2018-12-03 06:23:30,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:30,853 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 176 transitions. [2018-12-03 06:23:30,853 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 06:23:30,853 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 176 transitions. [2018-12-03 06:23:30,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-03 06:23:30,853 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:30,853 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:30,854 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:30,854 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:30,854 INFO L82 PathProgramCache]: Analyzing trace with hash 1182405980, now seen corresponding path program 1 times [2018-12-03 06:23:30,854 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:30,862 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,862 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:30,862 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,862 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:30,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:30,920 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-03 06:23:30,920 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:23:30,920 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-03 06:23:30,920 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:23:30,920 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 06:23:30,921 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 06:23:30,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:30,921 INFO L87 Difference]: Start difference. First operand 142 states and 176 transitions. Second operand 3 states. [2018-12-03 06:23:30,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:30,937 INFO L93 Difference]: Finished difference Result 142 states and 176 transitions. [2018-12-03 06:23:30,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 06:23:30,938 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2018-12-03 06:23:30,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:30,939 INFO L225 Difference]: With dead ends: 142 [2018-12-03 06:23:30,939 INFO L226 Difference]: Without dead ends: 141 [2018-12-03 06:23:30,939 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:30,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-12-03 06:23:30,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-12-03 06:23:30,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-12-03 06:23:30,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 175 transitions. [2018-12-03 06:23:30,944 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 175 transitions. Word has length 25 [2018-12-03 06:23:30,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:30,945 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 175 transitions. [2018-12-03 06:23:30,945 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 06:23:30,945 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 175 transitions. [2018-12-03 06:23:30,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-03 06:23:30,946 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:30,946 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:30,946 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:30,946 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:30,947 INFO L82 PathProgramCache]: Analyzing trace with hash -1458323352, now seen corresponding path program 1 times [2018-12-03 06:23:30,947 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:30,953 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,954 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:30,954 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:30,954 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:30,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:31,021 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:23:31,021 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:31,021 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 06:23:31,022 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 28 with the following transitions: [2018-12-03 06:23:31,023 INFO L205 CegarAbsIntRunner]: [94], [100], [102], [105], [107], [111], [113], [115], [117], [119], [121], [123], [125], [127], [133], [179], [180], [181], [184], [189], [202], [206], [207], [364], [370], [371], [372] [2018-12-03 06:23:31,055 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 06:23:31,055 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 06:23:31,236 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-03 06:23:31,237 INFO L272 AbstractInterpreter]: Visited 26 different actions 34 times. Merged at 3 different actions 6 times. Never widened. Performed 1221 root evaluator evaluations with a maximum evaluation depth of 8. Performed 1221 inverse root evaluator evaluations with a maximum inverse evaluation depth of 8. Found 1 fixpoints after 1 different actions. Largest state had 86 variables. [2018-12-03 06:23:31,246 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:31,246 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-03 06:23:31,343 INFO L227 lantSequenceWeakener]: Weakened 24 states. On average, predicates are now at 82.7% of their original sizes. [2018-12-03 06:23:31,343 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-03 06:23:31,419 INFO L418 sIntCurrentIteration]: We unified 26 AI predicates to 26 [2018-12-03 06:23:31,419 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-03 06:23:31,420 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-03 06:23:31,420 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [4] total 12 [2018-12-03 06:23:31,420 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:23:31,420 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-03 06:23:31,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-03 06:23:31,421 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-12-03 06:23:31,421 INFO L87 Difference]: Start difference. First operand 141 states and 175 transitions. Second operand 10 states. [2018-12-03 06:23:32,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:32,708 INFO L93 Difference]: Finished difference Result 280 states and 354 transitions. [2018-12-03 06:23:32,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-03 06:23:32,709 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 27 [2018-12-03 06:23:32,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:32,711 INFO L225 Difference]: With dead ends: 280 [2018-12-03 06:23:32,711 INFO L226 Difference]: Without dead ends: 176 [2018-12-03 06:23:32,712 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 31 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=150, Unknown=0, NotChecked=0, Total=210 [2018-12-03 06:23:32,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-12-03 06:23:32,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 151. [2018-12-03 06:23:32,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-12-03 06:23:32,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 188 transitions. [2018-12-03 06:23:32,720 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 188 transitions. Word has length 27 [2018-12-03 06:23:32,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:32,720 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 188 transitions. [2018-12-03 06:23:32,720 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-03 06:23:32,720 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 188 transitions. [2018-12-03 06:23:32,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-03 06:23:32,721 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:32,721 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:32,722 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:32,722 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:32,722 INFO L82 PathProgramCache]: Analyzing trace with hash -2000120106, now seen corresponding path program 1 times [2018-12-03 06:23:32,722 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:32,729 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:32,730 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:32,730 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:32,730 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:32,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:32,789 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-03 06:23:32,789 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:23:32,789 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-03 06:23:32,789 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:23:32,789 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 06:23:32,790 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 06:23:32,790 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:32,790 INFO L87 Difference]: Start difference. First operand 151 states and 188 transitions. Second operand 3 states. [2018-12-03 06:23:32,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:32,802 INFO L93 Difference]: Finished difference Result 158 states and 196 transitions. [2018-12-03 06:23:32,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 06:23:32,803 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 26 [2018-12-03 06:23:32,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:32,803 INFO L225 Difference]: With dead ends: 158 [2018-12-03 06:23:32,803 INFO L226 Difference]: Without dead ends: 157 [2018-12-03 06:23:32,804 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:32,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-12-03 06:23:32,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 146. [2018-12-03 06:23:32,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-03 06:23:32,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 182 transitions. [2018-12-03 06:23:32,809 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 182 transitions. Word has length 26 [2018-12-03 06:23:32,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:32,809 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 182 transitions. [2018-12-03 06:23:32,809 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 06:23:32,809 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 182 transitions. [2018-12-03 06:23:32,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-12-03 06:23:32,809 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:32,809 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:32,810 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:32,810 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:32,810 INFO L82 PathProgramCache]: Analyzing trace with hash 2038217546, now seen corresponding path program 1 times [2018-12-03 06:23:32,810 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:32,813 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:32,813 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:32,814 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:32,814 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:32,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:32,864 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:23:32,864 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:32,864 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 06:23:32,865 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 29 with the following transitions: [2018-12-03 06:23:32,865 INFO L205 CegarAbsIntRunner]: [94], [100], [102], [105], [107], [111], [113], [115], [117], [119], [121], [123], [125], [127], [133], [179], [180], [181], [184], [191], [194], [198], [206], [207], [364], [370], [371], [372] [2018-12-03 06:23:32,866 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 06:23:32,866 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 06:23:32,934 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 06:23:32,934 INFO L272 AbstractInterpreter]: Visited 28 different actions 62 times. Merged at 14 different actions 23 times. Widened at 1 different actions 1 times. Performed 1626 root evaluator evaluations with a maximum evaluation depth of 9. Performed 1626 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 2 fixpoints after 2 different actions. Largest state had 88 variables. [2018-12-03 06:23:32,938 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:32,939 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 06:23:32,939 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:32,939 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 06:23:32,962 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:32,962 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 06:23:33,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:33,055 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 06:23:33,075 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:23:33,075 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 06:23:33,101 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:23:33,117 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 06:23:33,117 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2018-12-03 06:23:33,117 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 06:23:33,117 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 06:23:33,117 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 06:23:33,118 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-12-03 06:23:33,118 INFO L87 Difference]: Start difference. First operand 146 states and 182 transitions. Second operand 5 states. [2018-12-03 06:23:33,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:33,138 INFO L93 Difference]: Finished difference Result 287 states and 359 transitions. [2018-12-03 06:23:33,138 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-03 06:23:33,138 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2018-12-03 06:23:33,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:33,139 INFO L225 Difference]: With dead ends: 287 [2018-12-03 06:23:33,139 INFO L226 Difference]: Without dead ends: 151 [2018-12-03 06:23:33,139 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 54 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-12-03 06:23:33,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-12-03 06:23:33,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 149. [2018-12-03 06:23:33,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-12-03 06:23:33,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 185 transitions. [2018-12-03 06:23:33,144 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 185 transitions. Word has length 28 [2018-12-03 06:23:33,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:33,144 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 185 transitions. [2018-12-03 06:23:33,144 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 06:23:33,144 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 185 transitions. [2018-12-03 06:23:33,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-12-03 06:23:33,144 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:33,144 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:33,145 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:33,145 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:33,145 INFO L82 PathProgramCache]: Analyzing trace with hash 633849756, now seen corresponding path program 2 times [2018-12-03 06:23:33,145 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:33,149 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:33,149 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:33,149 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:33,149 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:33,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:33,203 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:23:33,203 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:33,203 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 06:23:33,203 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 06:23:33,204 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 06:23:33,204 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:33,204 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 06:23:33,226 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 06:23:33,226 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 06:23:33,314 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-03 06:23:33,315 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 06:23:33,319 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 06:23:33,350 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-12-03 06:23:33,351 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 06:23:33,377 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-12-03 06:23:33,393 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-03 06:23:33,393 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [5] total 9 [2018-12-03 06:23:33,393 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:23:33,394 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 06:23:33,394 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 06:23:33,394 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2018-12-03 06:23:33,394 INFO L87 Difference]: Start difference. First operand 149 states and 185 transitions. Second operand 4 states. [2018-12-03 06:23:33,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:33,441 INFO L93 Difference]: Finished difference Result 261 states and 328 transitions. [2018-12-03 06:23:33,442 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-03 06:23:33,442 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2018-12-03 06:23:33,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:33,442 INFO L225 Difference]: With dead ends: 261 [2018-12-03 06:23:33,442 INFO L226 Difference]: Without dead ends: 149 [2018-12-03 06:23:33,443 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2018-12-03 06:23:33,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-03 06:23:33,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-12-03 06:23:33,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-12-03 06:23:33,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 184 transitions. [2018-12-03 06:23:33,448 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 184 transitions. Word has length 31 [2018-12-03 06:23:33,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:33,448 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 184 transitions. [2018-12-03 06:23:33,448 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 06:23:33,448 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 184 transitions. [2018-12-03 06:23:33,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-03 06:23:33,449 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:33,449 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:33,449 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:33,449 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:33,449 INFO L82 PathProgramCache]: Analyzing trace with hash -478501859, now seen corresponding path program 1 times [2018-12-03 06:23:33,450 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:33,453 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:33,453 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 06:23:33,454 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:33,454 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:33,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:33,496 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-12-03 06:23:33,496 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:23:33,496 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-03 06:23:33,496 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:23:33,496 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 06:23:33,497 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 06:23:33,497 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:33,497 INFO L87 Difference]: Start difference. First operand 149 states and 184 transitions. Second operand 3 states. [2018-12-03 06:23:33,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:33,515 INFO L93 Difference]: Finished difference Result 149 states and 184 transitions. [2018-12-03 06:23:33,515 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 06:23:33,516 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2018-12-03 06:23:33,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:33,516 INFO L225 Difference]: With dead ends: 149 [2018-12-03 06:23:33,516 INFO L226 Difference]: Without dead ends: 148 [2018-12-03 06:23:33,516 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:23:33,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-12-03 06:23:33,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 142. [2018-12-03 06:23:33,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-03 06:23:33,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 176 transitions. [2018-12-03 06:23:33,521 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 176 transitions. Word has length 36 [2018-12-03 06:23:33,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:33,521 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 176 transitions. [2018-12-03 06:23:33,521 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 06:23:33,521 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 176 transitions. [2018-12-03 06:23:33,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-03 06:23:33,521 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:33,521 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:33,522 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:33,522 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:33,522 INFO L82 PathProgramCache]: Analyzing trace with hash -268863245, now seen corresponding path program 1 times [2018-12-03 06:23:33,522 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:33,525 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:33,525 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:33,525 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:33,525 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:33,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:33,575 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-03 06:23:33,576 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:33,576 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 06:23:33,576 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 39 with the following transitions: [2018-12-03 06:23:33,576 INFO L205 CegarAbsIntRunner]: [94], [100], [102], [105], [107], [111], [113], [115], [117], [119], [121], [123], [125], [127], [133], [135], [141], [143], [146], [148], [153], [155], [179], [180], [181], [184], [191], [194], [198], [206], [207], [364], [370], [371], [372] [2018-12-03 06:23:33,578 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 06:23:33,578 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 06:23:33,659 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 06:23:33,659 INFO L272 AbstractInterpreter]: Visited 35 different actions 81 times. Merged at 11 different actions 24 times. Widened at 1 different actions 1 times. Performed 1867 root evaluator evaluations with a maximum evaluation depth of 9. Performed 1867 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 5 fixpoints after 4 different actions. Largest state had 91 variables. [2018-12-03 06:23:33,661 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:33,662 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 06:23:33,662 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:33,662 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 06:23:33,681 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:33,681 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 06:23:33,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:33,776 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 06:23:33,787 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-03 06:23:33,788 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 06:23:33,841 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-03 06:23:33,860 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 06:23:33,860 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 9 [2018-12-03 06:23:33,860 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 06:23:33,860 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 06:23:33,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 06:23:33,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-03 06:23:33,860 INFO L87 Difference]: Start difference. First operand 142 states and 176 transitions. Second operand 6 states. [2018-12-03 06:23:33,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:33,893 INFO L93 Difference]: Finished difference Result 276 states and 344 transitions. [2018-12-03 06:23:33,893 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 06:23:33,893 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 38 [2018-12-03 06:23:33,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:33,894 INFO L225 Difference]: With dead ends: 276 [2018-12-03 06:23:33,894 INFO L226 Difference]: Without dead ends: 147 [2018-12-03 06:23:33,895 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 73 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-03 06:23:33,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-12-03 06:23:33,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 145. [2018-12-03 06:23:33,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-12-03 06:23:33,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 179 transitions. [2018-12-03 06:23:33,902 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 179 transitions. Word has length 38 [2018-12-03 06:23:33,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:33,902 INFO L480 AbstractCegarLoop]: Abstraction has 145 states and 179 transitions. [2018-12-03 06:23:33,902 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 06:23:33,902 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 179 transitions. [2018-12-03 06:23:33,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-12-03 06:23:33,903 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:33,903 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:33,903 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:33,903 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:33,903 INFO L82 PathProgramCache]: Analyzing trace with hash 1680262853, now seen corresponding path program 2 times [2018-12-03 06:23:33,903 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:33,908 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:33,908 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:33,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:33,909 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:33,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:33,964 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-03 06:23:33,964 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:33,964 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 06:23:33,964 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 06:23:33,964 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 06:23:33,964 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:33,964 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 06:23:33,986 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 06:23:33,986 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 06:23:34,133 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-12-03 06:23:34,133 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 06:23:34,137 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 06:23:34,162 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-03 06:23:34,163 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 06:23:34,186 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-03 06:23:34,204 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 06:23:34,204 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2018-12-03 06:23:34,204 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 06:23:34,204 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 06:23:34,204 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 06:23:34,204 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-12-03 06:23:34,205 INFO L87 Difference]: Start difference. First operand 145 states and 179 transitions. Second operand 5 states. [2018-12-03 06:23:34,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:34,240 INFO L93 Difference]: Finished difference Result 269 states and 337 transitions. [2018-12-03 06:23:34,240 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-03 06:23:34,241 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2018-12-03 06:23:34,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:34,241 INFO L225 Difference]: With dead ends: 269 [2018-12-03 06:23:34,241 INFO L226 Difference]: Without dead ends: 150 [2018-12-03 06:23:34,242 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 80 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-12-03 06:23:34,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-03 06:23:34,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 148. [2018-12-03 06:23:34,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-03 06:23:34,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 182 transitions. [2018-12-03 06:23:34,250 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 182 transitions. Word has length 41 [2018-12-03 06:23:34,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:34,250 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 182 transitions. [2018-12-03 06:23:34,250 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 06:23:34,250 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 182 transitions. [2018-12-03 06:23:34,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-12-03 06:23:34,251 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:34,251 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:34,251 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:34,251 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:34,251 INFO L82 PathProgramCache]: Analyzing trace with hash 1413256610, now seen corresponding path program 3 times [2018-12-03 06:23:34,251 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:34,256 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:34,256 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 06:23:34,256 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:34,256 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:34,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:34,333 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-03 06:23:34,333 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:34,333 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 06:23:34,333 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 06:23:34,333 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 06:23:34,333 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:34,333 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 06:23:34,354 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-03 06:23:34,355 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-03 06:23:34,433 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-03 06:23:34,433 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 06:23:34,437 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 06:23:34,472 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-03 06:23:34,472 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 06:23:34,519 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-03 06:23:34,535 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 06:23:34,535 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 6, 6] total 13 [2018-12-03 06:23:34,535 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 06:23:34,536 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-03 06:23:34,536 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-03 06:23:34,536 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-12-03 06:23:34,536 INFO L87 Difference]: Start difference. First operand 148 states and 182 transitions. Second operand 9 states. [2018-12-03 06:23:34,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:34,589 INFO L93 Difference]: Finished difference Result 290 states and 359 transitions. [2018-12-03 06:23:34,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 06:23:34,589 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 44 [2018-12-03 06:23:34,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:34,590 INFO L225 Difference]: With dead ends: 290 [2018-12-03 06:23:34,590 INFO L226 Difference]: Without dead ends: 158 [2018-12-03 06:23:34,590 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 81 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-12-03 06:23:34,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-12-03 06:23:34,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 154. [2018-12-03 06:23:34,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-12-03 06:23:34,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 188 transitions. [2018-12-03 06:23:34,595 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 188 transitions. Word has length 44 [2018-12-03 06:23:34,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:34,595 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 188 transitions. [2018-12-03 06:23:34,595 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-03 06:23:34,595 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 188 transitions. [2018-12-03 06:23:34,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-03 06:23:34,595 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:34,596 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:34,596 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:34,596 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:34,596 INFO L82 PathProgramCache]: Analyzing trace with hash -1211589613, now seen corresponding path program 4 times [2018-12-03 06:23:34,596 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:34,599 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:34,599 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 06:23:34,599 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:34,599 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:34,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:34,659 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-03 06:23:34,660 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:34,660 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 06:23:34,660 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 06:23:34,660 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 06:23:34,660 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:34,660 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 06:23:34,680 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:34,680 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 06:23:34,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:34,773 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 06:23:34,840 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-03 06:23:34,840 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 06:23:34,930 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-03 06:23:34,955 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 06:23:34,955 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7, 7] total 16 [2018-12-03 06:23:34,955 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 06:23:34,955 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-03 06:23:34,955 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-03 06:23:34,955 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=160, Unknown=0, NotChecked=0, Total=240 [2018-12-03 06:23:34,955 INFO L87 Difference]: Start difference. First operand 154 states and 188 transitions. Second operand 11 states. [2018-12-03 06:23:35,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:35,031 INFO L93 Difference]: Finished difference Result 299 states and 368 transitions. [2018-12-03 06:23:35,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-03 06:23:35,032 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 50 [2018-12-03 06:23:35,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:35,032 INFO L225 Difference]: With dead ends: 299 [2018-12-03 06:23:35,032 INFO L226 Difference]: Without dead ends: 164 [2018-12-03 06:23:35,033 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=80, Invalid=160, Unknown=0, NotChecked=0, Total=240 [2018-12-03 06:23:35,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-12-03 06:23:35,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 160. [2018-12-03 06:23:35,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-12-03 06:23:35,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 194 transitions. [2018-12-03 06:23:35,037 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 194 transitions. Word has length 50 [2018-12-03 06:23:35,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:35,037 INFO L480 AbstractCegarLoop]: Abstraction has 160 states and 194 transitions. [2018-12-03 06:23:35,037 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-03 06:23:35,037 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 194 transitions. [2018-12-03 06:23:35,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-12-03 06:23:35,038 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:35,038 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:35,038 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:35,038 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:35,038 INFO L82 PathProgramCache]: Analyzing trace with hash -1484183166, now seen corresponding path program 5 times [2018-12-03 06:23:35,038 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:35,041 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:35,041 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:35,041 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:35,041 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:35,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:35,110 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2018-12-03 06:23:35,110 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:35,110 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 06:23:35,111 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 06:23:35,111 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 06:23:35,111 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:35,111 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 06:23:35,133 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 06:23:35,134 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 06:23:36,559 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-12-03 06:23:36,559 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 06:23:36,563 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 06:23:36,571 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2018-12-03 06:23:36,571 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 06:23:36,627 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2018-12-03 06:23:36,645 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 06:23:36,645 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2018-12-03 06:23:36,645 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 06:23:36,645 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-03 06:23:36,646 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-03 06:23:36,646 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 06:23:36,646 INFO L87 Difference]: Start difference. First operand 160 states and 194 transitions. Second operand 8 states. [2018-12-03 06:23:36,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:36,686 INFO L93 Difference]: Finished difference Result 293 states and 361 transitions. [2018-12-03 06:23:36,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 06:23:36,686 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 56 [2018-12-03 06:23:36,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:36,687 INFO L225 Difference]: With dead ends: 293 [2018-12-03 06:23:36,687 INFO L226 Difference]: Without dead ends: 165 [2018-12-03 06:23:36,687 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 06:23:36,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-12-03 06:23:36,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 163. [2018-12-03 06:23:36,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-12-03 06:23:36,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 197 transitions. [2018-12-03 06:23:36,692 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 197 transitions. Word has length 56 [2018-12-03 06:23:36,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:36,692 INFO L480 AbstractCegarLoop]: Abstraction has 163 states and 197 transitions. [2018-12-03 06:23:36,692 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-03 06:23:36,692 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 197 transitions. [2018-12-03 06:23:36,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-12-03 06:23:36,692 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:36,692 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:36,693 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:36,693 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:36,693 INFO L82 PathProgramCache]: Analyzing trace with hash -360915515, now seen corresponding path program 6 times [2018-12-03 06:23:36,693 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:36,696 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:36,696 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 06:23:36,696 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:36,696 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:36,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:36,763 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-03 06:23:36,763 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:36,763 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 06:23:36,763 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 06:23:36,763 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 06:23:36,763 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:36,763 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 06:23:36,790 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-03 06:23:36,790 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-03 06:23:36,869 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-03 06:23:36,869 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 06:23:36,873 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 06:23:36,885 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-03 06:23:36,885 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 06:23:36,951 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-03 06:23:36,966 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 06:23:36,967 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 13 [2018-12-03 06:23:36,967 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 06:23:36,967 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-03 06:23:36,967 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-03 06:23:36,967 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 06:23:36,967 INFO L87 Difference]: Start difference. First operand 163 states and 197 transitions. Second operand 9 states. [2018-12-03 06:23:37,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:37,004 INFO L93 Difference]: Finished difference Result 309 states and 377 transitions. [2018-12-03 06:23:37,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-03 06:23:37,004 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 59 [2018-12-03 06:23:37,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:37,005 INFO L225 Difference]: With dead ends: 309 [2018-12-03 06:23:37,005 INFO L226 Difference]: Without dead ends: 168 [2018-12-03 06:23:37,005 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 06:23:37,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-12-03 06:23:37,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 166. [2018-12-03 06:23:37,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-12-03 06:23:37,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 200 transitions. [2018-12-03 06:23:37,010 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 200 transitions. Word has length 59 [2018-12-03 06:23:37,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:37,010 INFO L480 AbstractCegarLoop]: Abstraction has 166 states and 200 transitions. [2018-12-03 06:23:37,010 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-03 06:23:37,010 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 200 transitions. [2018-12-03 06:23:37,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-03 06:23:37,011 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:37,011 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:37,011 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:37,011 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:37,011 INFO L82 PathProgramCache]: Analyzing trace with hash 1464125235, now seen corresponding path program 7 times [2018-12-03 06:23:37,011 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:37,015 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:37,016 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 06:23:37,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:37,016 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:37,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:37,102 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 1 proven. 35 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-12-03 06:23:37,102 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:37,102 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 06:23:37,102 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 06:23:37,102 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 06:23:37,102 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:37,102 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 06:23:37,119 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:37,119 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 06:23:37,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:37,202 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 06:23:37,277 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-03 06:23:37,277 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 06:23:37,368 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-03 06:23:37,383 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 06:23:37,383 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9, 9] total 18 [2018-12-03 06:23:37,383 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 06:23:37,383 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-03 06:23:37,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-03 06:23:37,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2018-12-03 06:23:37,384 INFO L87 Difference]: Start difference. First operand 166 states and 200 transitions. Second operand 15 states. [2018-12-03 06:23:37,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:37,478 INFO L93 Difference]: Finished difference Result 317 states and 386 transitions. [2018-12-03 06:23:37,478 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-03 06:23:37,478 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 62 [2018-12-03 06:23:37,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:37,479 INFO L225 Difference]: With dead ends: 317 [2018-12-03 06:23:37,479 INFO L226 Difference]: Without dead ends: 176 [2018-12-03 06:23:37,479 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 111 SyntacticMatches, 4 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2018-12-03 06:23:37,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-12-03 06:23:37,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 172. [2018-12-03 06:23:37,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-12-03 06:23:37,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 206 transitions. [2018-12-03 06:23:37,485 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 206 transitions. Word has length 62 [2018-12-03 06:23:37,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:37,485 INFO L480 AbstractCegarLoop]: Abstraction has 172 states and 206 transitions. [2018-12-03 06:23:37,485 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-03 06:23:37,485 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 206 transitions. [2018-12-03 06:23:37,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-12-03 06:23:37,486 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:37,486 INFO L402 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:37,486 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:37,486 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:37,486 INFO L82 PathProgramCache]: Analyzing trace with hash -420268702, now seen corresponding path program 8 times [2018-12-03 06:23:37,486 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:37,489 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:37,489 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:37,489 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:37,489 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:37,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:37,584 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2018-12-03 06:23:37,584 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:37,584 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 06:23:37,584 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 06:23:37,584 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 06:23:37,584 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:37,584 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 06:23:37,602 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 06:23:37,602 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 06:23:44,175 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-12-03 06:23:44,175 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 06:23:44,180 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 06:23:44,273 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 1 proven. 51 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-12-03 06:23:44,273 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 06:23:44,383 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 1 proven. 51 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-12-03 06:23:44,401 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 06:23:44,401 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9] total 20 [2018-12-03 06:23:44,401 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 06:23:44,402 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-03 06:23:44,402 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-03 06:23:44,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=270, Unknown=0, NotChecked=0, Total=380 [2018-12-03 06:23:44,402 INFO L87 Difference]: Start difference. First operand 172 states and 206 transitions. Second operand 17 states. [2018-12-03 06:23:44,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:44,492 INFO L93 Difference]: Finished difference Result 326 states and 395 transitions. [2018-12-03 06:23:44,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-03 06:23:44,492 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 68 [2018-12-03 06:23:44,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:44,493 INFO L225 Difference]: With dead ends: 326 [2018-12-03 06:23:44,493 INFO L226 Difference]: Without dead ends: 182 [2018-12-03 06:23:44,493 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 123 SyntacticMatches, 4 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=110, Invalid=270, Unknown=0, NotChecked=0, Total=380 [2018-12-03 06:23:44,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-12-03 06:23:44,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 178. [2018-12-03 06:23:44,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-12-03 06:23:44,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 212 transitions. [2018-12-03 06:23:44,501 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 212 transitions. Word has length 68 [2018-12-03 06:23:44,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:44,501 INFO L480 AbstractCegarLoop]: Abstraction has 178 states and 212 transitions. [2018-12-03 06:23:44,501 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-03 06:23:44,501 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 212 transitions. [2018-12-03 06:23:44,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-03 06:23:44,502 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:44,502 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 8, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:44,502 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:44,502 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:44,502 INFO L82 PathProgramCache]: Analyzing trace with hash -1212679597, now seen corresponding path program 9 times [2018-12-03 06:23:44,502 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:44,505 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:44,505 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 06:23:44,505 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:44,505 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:44,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:44,609 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 1 proven. 70 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-12-03 06:23:44,609 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:44,609 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 06:23:44,609 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 06:23:44,609 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 06:23:44,609 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:44,609 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 06:23:44,628 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-03 06:23:44,628 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-03 06:23:44,717 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-03 06:23:44,717 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 06:23:44,721 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 06:23:44,849 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2018-12-03 06:23:44,849 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 06:23:44,969 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2018-12-03 06:23:44,985 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 06:23:44,985 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 11] total 20 [2018-12-03 06:23:44,986 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 06:23:44,986 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-03 06:23:44,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-03 06:23:44,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=270, Unknown=0, NotChecked=0, Total=380 [2018-12-03 06:23:44,986 INFO L87 Difference]: Start difference. First operand 178 states and 212 transitions. Second operand 19 states. [2018-12-03 06:23:45,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:45,099 INFO L93 Difference]: Finished difference Result 335 states and 404 transitions. [2018-12-03 06:23:45,099 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-03 06:23:45,099 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 74 [2018-12-03 06:23:45,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:45,100 INFO L225 Difference]: With dead ends: 335 [2018-12-03 06:23:45,100 INFO L226 Difference]: Without dead ends: 188 [2018-12-03 06:23:45,100 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 131 SyntacticMatches, 8 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 162 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=110, Invalid=270, Unknown=0, NotChecked=0, Total=380 [2018-12-03 06:23:45,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-12-03 06:23:45,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 184. [2018-12-03 06:23:45,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-12-03 06:23:45,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 218 transitions. [2018-12-03 06:23:45,106 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 218 transitions. Word has length 74 [2018-12-03 06:23:45,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:45,106 INFO L480 AbstractCegarLoop]: Abstraction has 184 states and 218 transitions. [2018-12-03 06:23:45,106 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-03 06:23:45,106 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 218 transitions. [2018-12-03 06:23:45,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-03 06:23:45,107 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:45,107 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 9, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:45,107 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:45,107 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:45,107 INFO L82 PathProgramCache]: Analyzing trace with hash -38749886, now seen corresponding path program 10 times [2018-12-03 06:23:45,107 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:45,111 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:45,111 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 06:23:45,111 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:45,111 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:45,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:45,227 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 1 proven. 92 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2018-12-03 06:23:45,227 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:45,227 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 06:23:45,227 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 06:23:45,227 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 06:23:45,227 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:45,228 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 06:23:45,254 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:45,254 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 06:23:45,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:45,331 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 06:23:45,471 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2018-12-03 06:23:45,471 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 06:23:45,604 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2018-12-03 06:23:45,619 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 06:23:45,619 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12, 12] total 21 [2018-12-03 06:23:45,619 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 06:23:45,619 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-12-03 06:23:45,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-12-03 06:23:45,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=300, Unknown=0, NotChecked=0, Total=420 [2018-12-03 06:23:45,620 INFO L87 Difference]: Start difference. First operand 184 states and 218 transitions. Second operand 21 states. [2018-12-03 06:23:45,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:23:45,746 INFO L93 Difference]: Finished difference Result 342 states and 411 transitions. [2018-12-03 06:23:45,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-03 06:23:45,746 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 80 [2018-12-03 06:23:45,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:23:45,747 INFO L225 Difference]: With dead ends: 342 [2018-12-03 06:23:45,747 INFO L226 Difference]: Without dead ends: 192 [2018-12-03 06:23:45,747 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 141 SyntacticMatches, 10 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 205 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=120, Invalid=300, Unknown=0, NotChecked=0, Total=420 [2018-12-03 06:23:45,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2018-12-03 06:23:45,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 190. [2018-12-03 06:23:45,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-12-03 06:23:45,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 224 transitions. [2018-12-03 06:23:45,753 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 224 transitions. Word has length 80 [2018-12-03 06:23:45,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:23:45,753 INFO L480 AbstractCegarLoop]: Abstraction has 190 states and 224 transitions. [2018-12-03 06:23:45,754 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-12-03 06:23:45,754 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 224 transitions. [2018-12-03 06:23:45,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-03 06:23:45,754 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:23:45,754 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:23:45,754 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:23:45,754 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:23:45,755 INFO L82 PathProgramCache]: Analyzing trace with hash -622054029, now seen corresponding path program 11 times [2018-12-03 06:23:45,755 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:23:45,758 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:45,758 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:23:45,758 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:23:45,758 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:23:45,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:23:45,874 INFO L134 CoverageAnalysis]: Checked inductivity of 263 backedges. 1 proven. 117 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-03 06:23:45,875 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:45,875 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 06:23:45,875 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 06:23:45,875 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 06:23:45,875 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:23:45,875 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 06:23:45,890 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 06:23:45,890 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 06:24:12,229 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-12-03 06:24:12,230 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 06:24:12,237 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 06:24:12,253 INFO L134 CoverageAnalysis]: Checked inductivity of 263 backedges. 1 proven. 117 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-03 06:24:12,253 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 06:24:12,338 INFO L134 CoverageAnalysis]: Checked inductivity of 263 backedges. 1 proven. 117 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-03 06:24:12,358 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 06:24:12,358 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 13 [2018-12-03 06:24:12,358 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 06:24:12,359 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-03 06:24:12,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-03 06:24:12,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 06:24:12,359 INFO L87 Difference]: Start difference. First operand 190 states and 224 transitions. Second operand 13 states. [2018-12-03 06:24:12,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:24:12,405 INFO L93 Difference]: Finished difference Result 336 states and 404 transitions. [2018-12-03 06:24:12,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-03 06:24:12,405 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 86 [2018-12-03 06:24:12,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:24:12,406 INFO L225 Difference]: With dead ends: 336 [2018-12-03 06:24:12,406 INFO L226 Difference]: Without dead ends: 193 [2018-12-03 06:24:12,406 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 183 GetRequests, 162 SyntacticMatches, 10 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-03 06:24:12,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-12-03 06:24:12,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 193. [2018-12-03 06:24:12,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2018-12-03 06:24:12,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 227 transitions. [2018-12-03 06:24:12,412 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 227 transitions. Word has length 86 [2018-12-03 06:24:12,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:24:12,412 INFO L480 AbstractCegarLoop]: Abstraction has 193 states and 227 transitions. [2018-12-03 06:24:12,412 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-03 06:24:12,412 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 227 transitions. [2018-12-03 06:24:12,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-12-03 06:24:12,413 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:24:12,413 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:24:12,413 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-03 06:24:12,413 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:24:12,413 INFO L82 PathProgramCache]: Analyzing trace with hash -576225228, now seen corresponding path program 12 times [2018-12-03 06:24:12,413 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:24:12,417 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:24:12,417 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 06:24:12,418 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:24:12,418 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:24:12,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:24:13,216 INFO L134 CoverageAnalysis]: Checked inductivity of 291 backedges. 0 proven. 29 refuted. 0 times theorem prover too weak. 262 trivial. 0 not checked. [2018-12-03 06:24:13,217 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:24:13,217 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 06:24:13,217 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 06:24:13,217 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 06:24:13,217 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 06:24:13,217 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f2d4ff7a-0129-4130-8597-b2cdc5ddc50e/bin-2019/utaipan/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 06:24:13,233 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-03 06:24:13,233 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-03 06:24:13,330 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-03 06:24:13,330 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 06:24:13,335 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 06:24:13,373 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-03 06:24:13,375 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:13,386 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:13,386 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-12-03 06:24:13,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 06:24:13,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 06:24:13,419 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-03 06:24:13,419 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:13,446 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-12-03 06:24:13,449 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-03 06:24:13,449 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:13,452 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:13,476 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-12-03 06:24:13,478 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-03 06:24:13,479 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:13,481 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:13,516 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:13,516 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:56, output treesize:46 [2018-12-03 06:24:13,569 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 06:24:13,573 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 06:24:13,577 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 06:24:13,577 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-12-03 06:24:13,578 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:13,642 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 634 treesize of output 500 [2018-12-03 06:24:13,737 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 06:24:13,742 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 35 [2018-12-03 06:24:13,742 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:13,791 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 198 treesize of output 190 [2018-12-03 06:24:13,795 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-03 06:24:13,795 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:13,821 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 06:24:13,823 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 06:24:13,845 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 185 treesize of output 238 [2018-12-03 06:24:13,849 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 1 [2018-12-03 06:24:13,849 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:13,868 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:13,882 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:13,899 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:13,944 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 235 treesize of output 125 [2018-12-03 06:24:13,985 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 06:24:13,987 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 35 [2018-12-03 06:24:13,988 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,010 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 82 [2018-12-03 06:24:14,012 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-03 06:24:14,013 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,040 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 86 [2018-12-03 06:24:14,043 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 23 [2018-12-03 06:24:14,043 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,056 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,064 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,071 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,098 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:14,098 INFO L202 ElimStorePlain]: Needed 14 recursive calls to eliminate 7 variables, input treesize:673, output treesize:98 [2018-12-03 06:24:14,161 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 166 [2018-12-03 06:24:14,164 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-03 06:24:14,164 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,178 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,219 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 110 [2018-12-03 06:24:14,221 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-03 06:24:14,221 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,234 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,257 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:14,257 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:216, output treesize:98 [2018-12-03 06:24:14,285 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 166 [2018-12-03 06:24:14,288 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-03 06:24:14,288 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,308 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,359 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 110 [2018-12-03 06:24:14,362 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-03 06:24:14,362 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,380 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,401 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:14,402 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:216, output treesize:98 [2018-12-03 06:24:14,421 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 166 [2018-12-03 06:24:14,424 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-03 06:24:14,424 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,439 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,480 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 110 [2018-12-03 06:24:14,483 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-03 06:24:14,483 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,495 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,517 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:14,517 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:216, output treesize:98 [2018-12-03 06:24:14,536 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-03 06:24:14,539 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-03 06:24:14,539 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,556 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,603 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-03 06:24:14,605 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-03 06:24:14,605 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,615 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,638 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:14,639 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:216, output treesize:98 [2018-12-03 06:24:14,657 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-03 06:24:14,660 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-03 06:24:14,661 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,677 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,719 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-03 06:24:14,722 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-03 06:24:14,722 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,732 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,754 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:14,754 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:216, output treesize:98 [2018-12-03 06:24:14,772 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 166 [2018-12-03 06:24:14,776 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-03 06:24:14,776 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,790 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,835 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 110 [2018-12-03 06:24:14,837 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-03 06:24:14,838 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,850 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,872 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:14,872 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:216, output treesize:98 [2018-12-03 06:24:14,890 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-03 06:24:14,893 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-03 06:24:14,893 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,909 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,956 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-03 06:24:14,959 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-03 06:24:14,959 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,972 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:14,994 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:14,995 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:216, output treesize:98 [2018-12-03 06:24:15,015 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 166 [2018-12-03 06:24:15,018 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-03 06:24:15,018 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,038 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,090 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 110 [2018-12-03 06:24:15,093 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-03 06:24:15,094 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,105 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,127 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:15,127 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:216, output treesize:98 [2018-12-03 06:24:15,146 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 166 [2018-12-03 06:24:15,149 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-03 06:24:15,149 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,163 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,205 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 110 [2018-12-03 06:24:15,208 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-03 06:24:15,208 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,222 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,244 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:15,244 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:216, output treesize:98 [2018-12-03 06:24:15,264 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-03 06:24:15,267 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-03 06:24:15,268 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,284 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,328 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-03 06:24:15,331 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-03 06:24:15,331 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,343 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,365 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:15,365 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:216, output treesize:98 [2018-12-03 06:24:15,527 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 56 [2018-12-03 06:24:15,531 INFO L701 Elim1Store]: detected not equals via solver [2018-12-03 06:24:15,531 INFO L683 Elim1Store]: detected equality via solver [2018-12-03 06:24:15,535 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-12-03 06:24:15,535 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,548 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 9 [2018-12-03 06:24:15,548 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,550 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,572 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 36 [2018-12-03 06:24:15,574 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2018-12-03 06:24:15,574 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,583 INFO L683 Elim1Store]: detected equality via solver [2018-12-03 06:24:15,584 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-12-03 06:24:15,584 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,588 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,600 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,600 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 8 variables, input treesize:121, output treesize:7 [2018-12-03 06:24:15,637 INFO L134 CoverageAnalysis]: Checked inductivity of 291 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 290 trivial. 0 not checked. [2018-12-03 06:24:15,637 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 06:24:15,783 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,793 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,825 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:15,836 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:15,864 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,871 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:15,894 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:15,900 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:15,919 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 4 dim-2 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-12-03 06:24:15,919 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 6 variables, input treesize:271, output treesize:99 [2018-12-03 06:24:16,108 WARN L180 SmtUtils]: Spent 110.00 ms on a formula simplification that was a NOOP. DAG size: 87 [2018-12-03 06:24:16,109 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:16,120 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:16,121 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,137 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,138 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,152 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,152 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:16,164 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:16,357 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,373 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,373 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,388 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,389 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,406 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,594 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,603 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,604 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,618 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,618 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,627 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,628 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,638 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,785 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:16,794 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:16,795 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,805 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,806 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,819 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:16,959 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 4 dim-2 vars, End of recursive call: 15 dim-0 vars, and 7 xjuncts. [2018-12-03 06:24:16,960 INFO L202 ElimStorePlain]: Needed 29 recursive calls to eliminate 10 variables, input treesize:339, output treesize:440 [2018-12-03 06:24:19,954 WARN L180 SmtUtils]: Spent 916.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 62 [2018-12-03 06:24:20,580 WARN L180 SmtUtils]: Spent 621.00 ms on a formula simplification. DAG size of input: 133 DAG size of output: 130 [2018-12-03 06:24:20,582 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:20,602 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:20,602 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:20,614 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:20,615 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:20,633 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:20,635 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:20,656 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:21,070 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:21,083 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:21,085 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:21,105 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:21,106 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:21,128 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:21,553 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:21,567 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:21,568 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:21,582 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:21,984 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:21,994 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:21,995 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:22,006 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:22,380 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:22,401 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:22,402 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:22,412 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:22,413 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:22,429 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:22,430 INFO L267 ElimStorePlain]: Start of recursive call 31: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:22,446 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:22,748 INFO L267 ElimStorePlain]: Start of recursive call 33: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:22,759 INFO L267 ElimStorePlain]: Start of recursive call 32: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:22,760 INFO L267 ElimStorePlain]: Start of recursive call 35: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:22,779 INFO L267 ElimStorePlain]: Start of recursive call 34: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:22,779 INFO L267 ElimStorePlain]: Start of recursive call 37: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:22,796 INFO L267 ElimStorePlain]: Start of recursive call 36: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:23,051 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 6 dim-2 vars, End of recursive call: 19 dim-0 vars, and 9 xjuncts. [2018-12-03 06:24:23,052 INFO L202 ElimStorePlain]: Needed 37 recursive calls to eliminate 16 variables, input treesize:601, output treesize:566 [2018-12-03 06:24:25,821 WARN L180 SmtUtils]: Spent 648.00 ms on a formula simplification. DAG size of input: 133 DAG size of output: 130 [2018-12-03 06:24:25,823 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:25,843 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:25,844 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:25,865 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:25,866 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:25,885 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:25,886 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:25,899 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:26,314 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:26,328 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:26,329 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:26,341 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:26,717 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:26,734 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:26,735 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:26,752 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:26,752 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:26,767 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:26,768 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:26,778 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:27,091 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:27,099 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:27,100 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:27,111 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:27,418 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:27,437 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:27,438 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:27,461 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:27,462 INFO L267 ElimStorePlain]: Start of recursive call 31: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:27,476 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:27,726 INFO L267 ElimStorePlain]: Start of recursive call 33: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:27,735 INFO L267 ElimStorePlain]: Start of recursive call 32: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:27,736 INFO L267 ElimStorePlain]: Start of recursive call 35: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:27,751 INFO L267 ElimStorePlain]: Start of recursive call 34: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:27,752 INFO L267 ElimStorePlain]: Start of recursive call 37: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:27,769 INFO L267 ElimStorePlain]: Start of recursive call 36: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:28,004 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 6 dim-2 vars, End of recursive call: 19 dim-0 vars, and 9 xjuncts. [2018-12-03 06:24:28,004 INFO L202 ElimStorePlain]: Needed 37 recursive calls to eliminate 16 variables, input treesize:601, output treesize:566 [2018-12-03 06:24:30,715 WARN L180 SmtUtils]: Spent 600.00 ms on a formula simplification. DAG size of input: 133 DAG size of output: 130 [2018-12-03 06:24:30,716 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:30,731 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:30,732 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:30,752 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:30,752 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:30,770 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:30,770 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:30,786 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:31,210 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:31,221 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:31,222 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:31,235 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:31,592 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:31,608 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:31,609 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:31,620 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:31,621 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:31,639 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:31,640 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:31,656 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:32,047 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:32,058 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:32,058 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:32,067 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:32,439 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:32,461 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:32,462 INFO L267 ElimStorePlain]: Start of recursive call 29: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:32,473 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:32,474 INFO L267 ElimStorePlain]: Start of recursive call 31: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:32,493 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:32,842 INFO L267 ElimStorePlain]: Start of recursive call 33: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:32,860 INFO L267 ElimStorePlain]: Start of recursive call 32: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:32,861 INFO L267 ElimStorePlain]: Start of recursive call 35: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:32,877 INFO L267 ElimStorePlain]: Start of recursive call 34: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:32,878 INFO L267 ElimStorePlain]: Start of recursive call 37: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:32,888 INFO L267 ElimStorePlain]: Start of recursive call 36: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:33,271 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 6 dim-2 vars, End of recursive call: 19 dim-0 vars, and 9 xjuncts. [2018-12-03 06:24:33,272 INFO L202 ElimStorePlain]: Needed 37 recursive calls to eliminate 16 variables, input treesize:601, output treesize:566 [2018-12-03 06:24:36,041 WARN L180 SmtUtils]: Spent 646.00 ms on a formula simplification. DAG size of input: 133 DAG size of output: 130 [2018-12-03 06:24:36,042 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:36,056 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:36,057 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:36,078 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:36,079 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:36,099 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:36,099 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:36,118 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:36,552 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:36,565 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:36,565 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:36,579 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:36,985 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:36,994 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:36,995 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:37,006 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:37,341 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:37,354 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:37,355 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:37,375 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:37,375 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:37,399 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:37,697 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:37,713 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:37,714 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:37,729 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:37,730 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:37,749 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:37,750 INFO L267 ElimStorePlain]: Start of recursive call 31: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:37,759 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:38,036 INFO L267 ElimStorePlain]: Start of recursive call 33: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:38,055 INFO L267 ElimStorePlain]: Start of recursive call 32: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:38,055 INFO L267 ElimStorePlain]: Start of recursive call 35: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:38,070 INFO L267 ElimStorePlain]: Start of recursive call 34: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:38,071 INFO L267 ElimStorePlain]: Start of recursive call 37: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:38,082 INFO L267 ElimStorePlain]: Start of recursive call 36: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:38,332 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 6 dim-2 vars, End of recursive call: 19 dim-0 vars, and 9 xjuncts. [2018-12-03 06:24:38,333 INFO L202 ElimStorePlain]: Needed 37 recursive calls to eliminate 16 variables, input treesize:601, output treesize:566 [2018-12-03 06:24:41,060 WARN L180 SmtUtils]: Spent 610.00 ms on a formula simplification. DAG size of input: 133 DAG size of output: 130 [2018-12-03 06:24:41,061 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:41,081 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:41,082 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:41,096 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:41,096 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:41,116 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:41,117 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:41,135 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:41,531 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:41,545 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:41,546 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:41,559 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:41,916 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:41,933 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:41,934 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:41,948 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:41,949 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:41,959 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:41,959 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:41,974 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:42,285 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:42,308 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:42,309 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:42,320 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:42,321 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:42,340 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:42,654 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:42,666 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:42,666 INFO L267 ElimStorePlain]: Start of recursive call 31: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:42,675 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:42,959 INFO L267 ElimStorePlain]: Start of recursive call 33: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:42,977 INFO L267 ElimStorePlain]: Start of recursive call 32: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:42,978 INFO L267 ElimStorePlain]: Start of recursive call 35: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:42,993 INFO L267 ElimStorePlain]: Start of recursive call 34: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:42,993 INFO L267 ElimStorePlain]: Start of recursive call 37: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:43,011 INFO L267 ElimStorePlain]: Start of recursive call 36: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:43,257 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 6 dim-2 vars, End of recursive call: 19 dim-0 vars, and 9 xjuncts. [2018-12-03 06:24:43,258 INFO L202 ElimStorePlain]: Needed 37 recursive calls to eliminate 16 variables, input treesize:601, output treesize:566 [2018-12-03 06:24:45,997 WARN L180 SmtUtils]: Spent 623.00 ms on a formula simplification. DAG size of input: 133 DAG size of output: 130 [2018-12-03 06:24:45,999 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:46,026 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:46,027 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:46,048 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:46,049 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:46,063 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:46,064 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:46,085 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:46,540 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:46,555 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:46,556 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:46,565 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:46,566 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:46,589 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:46,590 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:46,607 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:47,074 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:47,088 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:47,089 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:47,109 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:47,110 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:47,129 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:47,618 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:47,636 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:47,637 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:47,649 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:47,650 INFO L267 ElimStorePlain]: Start of recursive call 29: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:47,667 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:48,106 INFO L267 ElimStorePlain]: Start of recursive call 31: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:48,119 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:48,120 INFO L267 ElimStorePlain]: Start of recursive call 33: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:48,132 INFO L267 ElimStorePlain]: Start of recursive call 32: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:48,469 INFO L267 ElimStorePlain]: Start of recursive call 35: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:48,480 INFO L267 ElimStorePlain]: Start of recursive call 34: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:48,480 INFO L267 ElimStorePlain]: Start of recursive call 37: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:48,492 INFO L267 ElimStorePlain]: Start of recursive call 36: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:48,780 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 6 dim-2 vars, End of recursive call: 19 dim-0 vars, and 9 xjuncts. [2018-12-03 06:24:48,780 INFO L202 ElimStorePlain]: Needed 37 recursive calls to eliminate 16 variables, input treesize:601, output treesize:566 [2018-12-03 06:24:51,562 WARN L180 SmtUtils]: Spent 642.00 ms on a formula simplification. DAG size of input: 133 DAG size of output: 130 [2018-12-03 06:24:51,564 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:51,578 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:51,578 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:51,590 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:51,970 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:51,990 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:51,990 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:52,005 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:52,005 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:52,026 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:52,338 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:52,354 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:52,355 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:52,368 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:52,369 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:52,387 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:52,732 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:52,742 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:52,743 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:52,752 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:53,026 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:53,048 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:53,049 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:53,062 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:53,063 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:53,084 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:53,359 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:53,370 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:53,371 INFO L267 ElimStorePlain]: Start of recursive call 31: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:53,386 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:53,387 INFO L267 ElimStorePlain]: Start of recursive call 33: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:53,404 INFO L267 ElimStorePlain]: Start of recursive call 32: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:53,643 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 6 dim-2 vars, End of recursive call: 17 dim-0 vars, and 8 xjuncts. [2018-12-03 06:24:53,643 INFO L202 ElimStorePlain]: Needed 33 recursive calls to eliminate 16 variables, input treesize:601, output treesize:517 [2018-12-03 06:24:56,370 WARN L180 SmtUtils]: Spent 612.00 ms on a formula simplification. DAG size of input: 133 DAG size of output: 130 [2018-12-03 06:24:56,372 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:56,393 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:56,394 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:56,415 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:56,416 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:56,438 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:56,439 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:56,454 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:56,908 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:56,928 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:56,929 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:56,945 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:56,946 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:56,961 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:56,961 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:56,971 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:57,479 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:57,491 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:57,492 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:57,505 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:57,917 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:57,930 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:57,931 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:57,951 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:57,951 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:57,972 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:58,356 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:58,365 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:58,366 INFO L267 ElimStorePlain]: Start of recursive call 31: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:58,375 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:58,723 INFO L267 ElimStorePlain]: Start of recursive call 33: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:58,734 INFO L267 ElimStorePlain]: Start of recursive call 32: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:58,735 INFO L267 ElimStorePlain]: Start of recursive call 35: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:58,753 INFO L267 ElimStorePlain]: Start of recursive call 34: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:24:58,754 INFO L267 ElimStorePlain]: Start of recursive call 37: End of recursive call: and 1 xjuncts. [2018-12-03 06:24:58,769 INFO L267 ElimStorePlain]: Start of recursive call 36: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:24:59,067 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 6 dim-2 vars, End of recursive call: 19 dim-0 vars, and 9 xjuncts. [2018-12-03 06:24:59,067 INFO L202 ElimStorePlain]: Needed 37 recursive calls to eliminate 16 variables, input treesize:601, output treesize:566 [2018-12-03 06:25:09,410 WARN L180 SmtUtils]: Spent 8.21 s on a formula simplification. DAG size of input: 198 DAG size of output: 195 [2018-12-03 06:25:09,411 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:09,439 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:09,439 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:09,469 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:13,243 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:13,279 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:13,280 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:13,313 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:13,314 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:13,340 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:16,635 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:16,655 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:16,656 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-12-03 06:25:16,673 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:25:20,054 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:20,084 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:20,085 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-12-03 06:25:20,103 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:25:20,104 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:20,133 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:21,462 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-12-03 06:25:21,493 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:25:21,494 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:21,521 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:21,522 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:21,560 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:22,914 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:22,936 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:22,937 INFO L267 ElimStorePlain]: Start of recursive call 31: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:22,966 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:22,967 INFO L267 ElimStorePlain]: Start of recursive call 33: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:22,998 INFO L267 ElimStorePlain]: Start of recursive call 32: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-03 06:25:23,927 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 6 dim-2 vars, End of recursive call: 33 dim-0 vars, and 8 xjuncts. [2018-12-03 06:25:23,928 INFO L202 ElimStorePlain]: Needed 33 recursive calls to eliminate 22 variables, input treesize:2131, output treesize:2365 [2018-12-03 06:25:39,968 WARN L180 SmtUtils]: Spent 12.63 s on a formula simplification. DAG size of input: 291 DAG size of output: 126 [2018-12-03 06:25:41,529 WARN L180 SmtUtils]: Spent 1.55 s on a formula simplification. DAG size of input: 314 DAG size of output: 199 [2018-12-03 06:25:41,536 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 296 treesize of output 274 [2018-12-03 06:25:41,601 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 237 treesize of output 226 [2018-12-03 06:25:41,625 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 226 treesize of output 230 [2018-12-03 06:25:41,626 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-12-03 06:25:41,657 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-03 06:25:41,708 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 217 treesize of output 211 [2018-12-03 06:25:41,742 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 1 [2018-12-03 06:25:41,742 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-03 06:25:41,751 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:25:41,754 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 217 treesize of output 209 [2018-12-03 06:25:41,800 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 16 [2018-12-03 06:25:41,800 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-12-03 06:25:41,813 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-03 06:25:41,844 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-03 06:25:41,888 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 492 treesize of output 405 [2018-12-03 06:25:42,285 WARN L180 SmtUtils]: Spent 394.00 ms on a formula simplification. DAG size of input: 195 DAG size of output: 123 [2018-12-03 06:25:42,288 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 325 treesize of output 328 [2018-12-03 06:25:42,308 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 24 treesize of output 38 [2018-12-03 06:25:42,308 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-12-03 06:25:42,359 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-03 06:25:42,588 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 352 treesize of output 330 [2018-12-03 06:25:42,846 WARN L521 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 06:25:42,847 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: v_arrayElimArr_9 input size 57 context size 57 output size 57 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:293) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:245) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:418) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:290) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getTraceCheck(BaseTaipanRefinementStrategy.java:214) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:456) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:434) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:334) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:126) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-12-03 06:25:42,850 INFO L168 Benchmark]: Toolchain (without parser) took 134374.98 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 422.6 MB). Free memory was 948.1 MB in the beginning and 791.7 MB in the end (delta: 156.4 MB). Peak memory consumption was 578.9 MB. Max. memory is 11.5 GB. [2018-12-03 06:25:42,850 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 976.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-03 06:25:42,850 INFO L168 Benchmark]: CACSL2BoogieTranslator took 537.94 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 75.5 MB). Free memory was 948.1 MB in the beginning and 982.6 MB in the end (delta: -34.5 MB). Peak memory consumption was 54.9 MB. Max. memory is 11.5 GB. [2018-12-03 06:25:42,850 INFO L168 Benchmark]: Boogie Procedure Inliner took 29.72 ms. Allocated memory is still 1.1 GB. Free memory is still 982.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-03 06:25:42,851 INFO L168 Benchmark]: Boogie Preprocessor took 46.47 ms. Allocated memory is still 1.1 GB. Free memory was 982.6 MB in the beginning and 975.3 MB in the end (delta: 7.2 MB). Peak memory consumption was 7.2 MB. Max. memory is 11.5 GB. [2018-12-03 06:25:42,851 INFO L168 Benchmark]: RCFGBuilder took 621.39 ms. Allocated memory is still 1.1 GB. Free memory was 975.3 MB in the beginning and 878.3 MB in the end (delta: 97.0 MB). Peak memory consumption was 97.0 MB. Max. memory is 11.5 GB. [2018-12-03 06:25:42,851 INFO L168 Benchmark]: TraceAbstraction took 133136.81 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 347.1 MB). Free memory was 878.3 MB in the beginning and 791.7 MB in the end (delta: 86.6 MB). Peak memory consumption was 433.7 MB. Max. memory is 11.5 GB. [2018-12-03 06:25:42,853 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 976.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 537.94 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 75.5 MB). Free memory was 948.1 MB in the beginning and 982.6 MB in the end (delta: -34.5 MB). Peak memory consumption was 54.9 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 29.72 ms. Allocated memory is still 1.1 GB. Free memory is still 982.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 46.47 ms. Allocated memory is still 1.1 GB. Free memory was 982.6 MB in the beginning and 975.3 MB in the end (delta: 7.2 MB). Peak memory consumption was 7.2 MB. Max. memory is 11.5 GB. * RCFGBuilder took 621.39 ms. Allocated memory is still 1.1 GB. Free memory was 975.3 MB in the beginning and 878.3 MB in the end (delta: 97.0 MB). Peak memory consumption was 97.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 133136.81 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 347.1 MB). Free memory was 878.3 MB in the beginning and 791.7 MB in the end (delta: 86.6 MB). Peak memory consumption was 433.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: v_arrayElimArr_9 input size 57 context size 57 output size 57 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: v_arrayElimArr_9 input size 57 context size 57 output size 57: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request...