./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/bitvector/interleave_bits_true-unreach-call_true-no-overflow.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/bitvector/interleave_bits_true-unreach-call_true-no-overflow.i -s /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a69112b8d023c6203418abb04301ebe890b3a5f5 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/bitvector/interleave_bits_true-unreach-call_true-no-overflow.i -s /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a69112b8d023c6203418abb04301ebe890b3a5f5 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Result: TRUE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-02 14:48:05,484 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-02 14:48:05,485 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-02 14:48:05,491 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-02 14:48:05,491 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-02 14:48:05,492 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-02 14:48:05,493 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-02 14:48:05,493 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-02 14:48:05,494 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-02 14:48:05,495 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-02 14:48:05,495 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-02 14:48:05,495 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-02 14:48:05,496 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-02 14:48:05,496 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-02 14:48:05,497 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-02 14:48:05,497 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-02 14:48:05,497 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-02 14:48:05,498 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-02 14:48:05,499 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-02 14:48:05,500 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-02 14:48:05,501 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-02 14:48:05,501 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-02 14:48:05,502 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-02 14:48:05,502 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-02 14:48:05,503 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-02 14:48:05,503 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-02 14:48:05,503 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-02 14:48:05,504 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-02 14:48:05,504 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-02 14:48:05,505 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-02 14:48:05,505 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-02 14:48:05,505 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-02 14:48:05,505 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-02 14:48:05,505 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-02 14:48:05,506 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-02 14:48:05,506 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-02 14:48:05,506 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-12-02 14:48:05,513 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-02 14:48:05,513 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-02 14:48:05,514 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-02 14:48:05,514 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-02 14:48:05,514 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-02 14:48:05,514 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-02 14:48:05,514 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-02 14:48:05,514 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-02 14:48:05,514 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-02 14:48:05,515 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-02 14:48:05,515 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-02 14:48:05,515 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-02 14:48:05,515 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-02 14:48:05,515 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-02 14:48:05,515 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-02 14:48:05,515 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-02 14:48:05,515 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-02 14:48:05,515 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-02 14:48:05,516 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-02 14:48:05,516 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-02 14:48:05,516 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-02 14:48:05,516 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-02 14:48:05,516 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-02 14:48:05,516 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-02 14:48:05,516 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-02 14:48:05,516 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-02 14:48:05,516 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-02 14:48:05,516 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-02 14:48:05,516 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 14:48:05,517 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-02 14:48:05,517 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-02 14:48:05,517 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-02 14:48:05,517 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-02 14:48:05,517 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-02 14:48:05,517 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-02 14:48:05,517 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-02 14:48:05,517 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a69112b8d023c6203418abb04301ebe890b3a5f5 [2018-12-02 14:48:05,540 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-02 14:48:05,548 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-02 14:48:05,550 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-02 14:48:05,551 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-02 14:48:05,551 INFO L276 PluginConnector]: CDTParser initialized [2018-12-02 14:48:05,552 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/../../sv-benchmarks/c/bitvector/interleave_bits_true-unreach-call_true-no-overflow.i [2018-12-02 14:48:05,590 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/data/f3591eeed/ac8a79d58cf745a69295eee476595d7d/FLAG03b98e61a [2018-12-02 14:48:06,006 INFO L307 CDTParser]: Found 1 translation units. [2018-12-02 14:48:06,006 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/sv-benchmarks/c/bitvector/interleave_bits_true-unreach-call_true-no-overflow.i [2018-12-02 14:48:06,010 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/data/f3591eeed/ac8a79d58cf745a69295eee476595d7d/FLAG03b98e61a [2018-12-02 14:48:06,018 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/data/f3591eeed/ac8a79d58cf745a69295eee476595d7d [2018-12-02 14:48:06,020 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-02 14:48:06,021 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-02 14:48:06,021 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-02 14:48:06,021 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-02 14:48:06,023 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-02 14:48:06,024 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 02:48:06" (1/1) ... [2018-12-02 14:48:06,025 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3aeeb41d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:06, skipping insertion in model container [2018-12-02 14:48:06,025 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 02:48:06" (1/1) ... [2018-12-02 14:48:06,030 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-02 14:48:06,039 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-02 14:48:06,126 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 14:48:06,128 INFO L191 MainTranslator]: Completed pre-run [2018-12-02 14:48:06,140 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 14:48:06,148 INFO L195 MainTranslator]: Completed translation [2018-12-02 14:48:06,148 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:06 WrapperNode [2018-12-02 14:48:06,148 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-02 14:48:06,148 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-02 14:48:06,149 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-02 14:48:06,149 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-02 14:48:06,153 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:06" (1/1) ... [2018-12-02 14:48:06,157 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:06" (1/1) ... [2018-12-02 14:48:06,161 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-02 14:48:06,161 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-02 14:48:06,161 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-02 14:48:06,161 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-02 14:48:06,166 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:06" (1/1) ... [2018-12-02 14:48:06,166 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:06" (1/1) ... [2018-12-02 14:48:06,167 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:06" (1/1) ... [2018-12-02 14:48:06,167 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:06" (1/1) ... [2018-12-02 14:48:06,170 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:06" (1/1) ... [2018-12-02 14:48:06,202 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:06" (1/1) ... [2018-12-02 14:48:06,203 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:06" (1/1) ... [2018-12-02 14:48:06,204 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-02 14:48:06,204 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-02 14:48:06,205 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-02 14:48:06,205 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-02 14:48:06,205 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:06" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 14:48:06,240 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-02 14:48:06,241 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-02 14:48:06,241 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-02 14:48:06,241 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-02 14:48:06,241 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-02 14:48:06,241 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-02 14:48:06,241 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-12-02 14:48:06,241 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-12-02 14:48:06,323 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-02 14:48:06,323 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-02 14:48:06,324 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 02:48:06 BoogieIcfgContainer [2018-12-02 14:48:06,324 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-02 14:48:06,324 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-02 14:48:06,324 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-02 14:48:06,326 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-02 14:48:06,326 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 02:48:06" (1/3) ... [2018-12-02 14:48:06,327 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2ecfedc9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 02:48:06, skipping insertion in model container [2018-12-02 14:48:06,327 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:06" (2/3) ... [2018-12-02 14:48:06,327 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2ecfedc9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 02:48:06, skipping insertion in model container [2018-12-02 14:48:06,327 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 02:48:06" (3/3) ... [2018-12-02 14:48:06,328 INFO L112 eAbstractionObserver]: Analyzing ICFG interleave_bits_true-unreach-call_true-no-overflow.i [2018-12-02 14:48:06,334 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-02 14:48:06,338 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-12-02 14:48:06,348 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-12-02 14:48:06,367 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-02 14:48:06,367 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-02 14:48:06,367 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-02 14:48:06,367 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-02 14:48:06,367 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-02 14:48:06,367 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-02 14:48:06,367 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-02 14:48:06,368 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-02 14:48:06,377 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states. [2018-12-02 14:48:06,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-12-02 14:48:06,380 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:06,381 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:06,382 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:06,385 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:06,386 INFO L82 PathProgramCache]: Analyzing trace with hash -480905734, now seen corresponding path program 1 times [2018-12-02 14:48:06,387 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:06,415 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:06,415 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 14:48:06,415 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:06,416 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:06,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:06,487 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:06,488 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 14:48:06,488 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 14:48:06,489 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 14:48:06,491 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 14:48:06,498 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 14:48:06,498 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 14:48:06,500 INFO L87 Difference]: Start difference. First operand 18 states. Second operand 3 states. [2018-12-02 14:48:06,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:06,516 INFO L93 Difference]: Finished difference Result 31 states and 36 transitions. [2018-12-02 14:48:06,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 14:48:06,518 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-12-02 14:48:06,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:06,522 INFO L225 Difference]: With dead ends: 31 [2018-12-02 14:48:06,523 INFO L226 Difference]: Without dead ends: 13 [2018-12-02 14:48:06,524 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 14:48:06,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2018-12-02 14:48:06,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2018-12-02 14:48:06,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-12-02 14:48:06,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 13 transitions. [2018-12-02 14:48:06,545 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 13 transitions. Word has length 11 [2018-12-02 14:48:06,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:06,545 INFO L480 AbstractCegarLoop]: Abstraction has 13 states and 13 transitions. [2018-12-02 14:48:06,545 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 14:48:06,545 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2018-12-02 14:48:06,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-02 14:48:06,546 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:06,546 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:06,546 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:06,546 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:06,547 INFO L82 PathProgramCache]: Analyzing trace with hash -436122843, now seen corresponding path program 1 times [2018-12-02 14:48:06,547 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:06,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:06,548 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 14:48:06,548 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:06,548 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:06,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:06,595 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:06,595 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:06,595 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 14:48:06,596 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 13 with the following transitions: [2018-12-02 14:48:06,597 INFO L205 CegarAbsIntRunner]: [0], [4], [11], [13], [17], [20], [23], [25], [31], [32], [33], [35] [2018-12-02 14:48:06,617 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 14:48:06,618 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 14:48:06,695 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-02 14:48:06,696 INFO L272 AbstractInterpreter]: Visited 12 different actions 16 times. Merged at 1 different actions 2 times. Never widened. Performed 40 root evaluator evaluations with a maximum evaluation depth of 5. Performed 40 inverse root evaluator evaluations with a maximum inverse evaluation depth of 5. Found 1 fixpoints after 1 different actions. Largest state had 9 variables. [2018-12-02 14:48:06,701 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:06,702 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-02 14:48:06,702 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:06,702 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:06,709 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 14:48:06,709 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-02 14:48:06,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:06,724 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:06,749 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:06,749 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:06,772 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:06,787 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 14:48:06,787 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2018-12-02 14:48:06,787 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 14:48:06,787 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 14:48:06,787 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 14:48:06,788 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-12-02 14:48:06,788 INFO L87 Difference]: Start difference. First operand 13 states and 13 transitions. Second operand 5 states. [2018-12-02 14:48:06,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:06,799 INFO L93 Difference]: Finished difference Result 20 states and 20 transitions. [2018-12-02 14:48:06,799 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 14:48:06,799 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 12 [2018-12-02 14:48:06,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:06,800 INFO L225 Difference]: With dead ends: 20 [2018-12-02 14:48:06,800 INFO L226 Difference]: Without dead ends: 14 [2018-12-02 14:48:06,801 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 21 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-12-02 14:48:06,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2018-12-02 14:48:06,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2018-12-02 14:48:06,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-12-02 14:48:06,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 14 transitions. [2018-12-02 14:48:06,804 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 14 transitions. Word has length 12 [2018-12-02 14:48:06,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:06,804 INFO L480 AbstractCegarLoop]: Abstraction has 14 states and 14 transitions. [2018-12-02 14:48:06,804 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 14:48:06,804 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2018-12-02 14:48:06,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-12-02 14:48:06,805 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:06,805 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:06,805 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:06,805 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:06,805 INFO L82 PathProgramCache]: Analyzing trace with hash 952146778, now seen corresponding path program 2 times [2018-12-02 14:48:06,805 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:06,806 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:06,806 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 14:48:06,806 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:06,807 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:06,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:06,859 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:06,859 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:06,859 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 14:48:06,859 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 14:48:06,859 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 14:48:06,859 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:06,860 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:06,866 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 14:48:06,866 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-02 14:48:06,876 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-12-02 14:48:06,876 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 14:48:06,877 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:06,888 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:06,888 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:06,912 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:06,927 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 14:48:06,927 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 9 [2018-12-02 14:48:06,927 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 14:48:06,927 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 14:48:06,928 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 14:48:06,928 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-12-02 14:48:06,928 INFO L87 Difference]: Start difference. First operand 14 states and 14 transitions. Second operand 6 states. [2018-12-02 14:48:06,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:06,941 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2018-12-02 14:48:06,941 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 14:48:06,942 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 13 [2018-12-02 14:48:06,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:06,942 INFO L225 Difference]: With dead ends: 21 [2018-12-02 14:48:06,942 INFO L226 Difference]: Without dead ends: 15 [2018-12-02 14:48:06,942 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 22 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-12-02 14:48:06,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2018-12-02 14:48:06,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2018-12-02 14:48:06,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-12-02 14:48:06,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 15 transitions. [2018-12-02 14:48:06,945 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 15 transitions. Word has length 13 [2018-12-02 14:48:06,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:06,945 INFO L480 AbstractCegarLoop]: Abstraction has 15 states and 15 transitions. [2018-12-02 14:48:06,945 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 14:48:06,945 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 15 transitions. [2018-12-02 14:48:06,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-12-02 14:48:06,945 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:06,946 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:06,946 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:06,946 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:06,946 INFO L82 PathProgramCache]: Analyzing trace with hash 1038832069, now seen corresponding path program 3 times [2018-12-02 14:48:06,946 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:06,947 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:06,947 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 14:48:06,947 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:06,947 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:06,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:06,989 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:06,990 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:06,990 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 14:48:06,990 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 14:48:06,990 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 14:48:06,990 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:06,990 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:06,998 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-02 14:48:06,998 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-02 14:48:07,004 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-02 14:48:07,004 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 14:48:07,005 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:07,023 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:07,023 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:07,065 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:07,079 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 14:48:07,079 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 11 [2018-12-02 14:48:07,079 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 14:48:07,079 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 14:48:07,079 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 14:48:07,079 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=67, Unknown=0, NotChecked=0, Total=110 [2018-12-02 14:48:07,080 INFO L87 Difference]: Start difference. First operand 15 states and 15 transitions. Second operand 7 states. [2018-12-02 14:48:07,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:07,102 INFO L93 Difference]: Finished difference Result 22 states and 22 transitions. [2018-12-02 14:48:07,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 14:48:07,102 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 14 [2018-12-02 14:48:07,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:07,102 INFO L225 Difference]: With dead ends: 22 [2018-12-02 14:48:07,103 INFO L226 Difference]: Without dead ends: 16 [2018-12-02 14:48:07,103 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=67, Unknown=0, NotChecked=0, Total=110 [2018-12-02 14:48:07,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-12-02 14:48:07,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2018-12-02 14:48:07,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-12-02 14:48:07,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 16 transitions. [2018-12-02 14:48:07,106 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 16 transitions. Word has length 14 [2018-12-02 14:48:07,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:07,106 INFO L480 AbstractCegarLoop]: Abstraction has 16 states and 16 transitions. [2018-12-02 14:48:07,106 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 14:48:07,106 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2018-12-02 14:48:07,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-12-02 14:48:07,107 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:07,107 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:07,107 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:07,107 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:07,107 INFO L82 PathProgramCache]: Analyzing trace with hash -568891206, now seen corresponding path program 4 times [2018-12-02 14:48:07,107 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:07,108 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:07,108 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 14:48:07,108 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:07,108 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:07,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:07,160 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:07,160 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:07,160 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 14:48:07,160 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 14:48:07,160 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 14:48:07,160 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:07,160 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:07,168 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 14:48:07,168 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-02 14:48:07,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:07,174 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:07,185 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:07,186 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:07,256 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:07,270 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 14:48:07,270 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2018-12-02 14:48:07,270 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 14:48:07,271 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-02 14:48:07,271 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-02 14:48:07,271 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=98, Unknown=0, NotChecked=0, Total=156 [2018-12-02 14:48:07,271 INFO L87 Difference]: Start difference. First operand 16 states and 16 transitions. Second operand 8 states. [2018-12-02 14:48:07,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:07,291 INFO L93 Difference]: Finished difference Result 23 states and 23 transitions. [2018-12-02 14:48:07,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 14:48:07,292 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 15 [2018-12-02 14:48:07,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:07,292 INFO L225 Difference]: With dead ends: 23 [2018-12-02 14:48:07,292 INFO L226 Difference]: Without dead ends: 17 [2018-12-02 14:48:07,292 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 24 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=58, Invalid=98, Unknown=0, NotChecked=0, Total=156 [2018-12-02 14:48:07,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2018-12-02 14:48:07,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2018-12-02 14:48:07,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-12-02 14:48:07,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 17 transitions. [2018-12-02 14:48:07,294 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 17 transitions. Word has length 15 [2018-12-02 14:48:07,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:07,295 INFO L480 AbstractCegarLoop]: Abstraction has 17 states and 17 transitions. [2018-12-02 14:48:07,295 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-02 14:48:07,295 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 17 transitions. [2018-12-02 14:48:07,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-12-02 14:48:07,295 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:07,295 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:07,295 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:07,295 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:07,295 INFO L82 PathProgramCache]: Analyzing trace with hash 1131294821, now seen corresponding path program 5 times [2018-12-02 14:48:07,296 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:07,296 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:07,296 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 14:48:07,296 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:07,296 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:07,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:07,358 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:07,358 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:07,358 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 14:48:07,358 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 14:48:07,358 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 14:48:07,358 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:07,359 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:07,364 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 14:48:07,365 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-02 14:48:07,375 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-12-02 14:48:07,375 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 14:48:07,376 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:07,394 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:07,394 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:07,497 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:07,511 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 14:48:07,511 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 15 [2018-12-02 14:48:07,511 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 14:48:07,511 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 14:48:07,512 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 14:48:07,512 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=135, Unknown=0, NotChecked=0, Total=210 [2018-12-02 14:48:07,512 INFO L87 Difference]: Start difference. First operand 17 states and 17 transitions. Second operand 9 states. [2018-12-02 14:48:07,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:07,553 INFO L93 Difference]: Finished difference Result 24 states and 24 transitions. [2018-12-02 14:48:07,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 14:48:07,553 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 16 [2018-12-02 14:48:07,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:07,554 INFO L225 Difference]: With dead ends: 24 [2018-12-02 14:48:07,554 INFO L226 Difference]: Without dead ends: 18 [2018-12-02 14:48:07,554 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 25 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=135, Unknown=0, NotChecked=0, Total=210 [2018-12-02 14:48:07,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2018-12-02 14:48:07,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2018-12-02 14:48:07,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-12-02 14:48:07,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 18 transitions. [2018-12-02 14:48:07,557 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 18 transitions. Word has length 16 [2018-12-02 14:48:07,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:07,557 INFO L480 AbstractCegarLoop]: Abstraction has 18 states and 18 transitions. [2018-12-02 14:48:07,557 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 14:48:07,557 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 18 transitions. [2018-12-02 14:48:07,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-02 14:48:07,558 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:07,558 INFO L402 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:07,558 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:07,558 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:07,558 INFO L82 PathProgramCache]: Analyzing trace with hash -1997513190, now seen corresponding path program 6 times [2018-12-02 14:48:07,558 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:07,559 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:07,559 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 14:48:07,559 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:07,559 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:07,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:07,650 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:07,650 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:07,650 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 14:48:07,650 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 14:48:07,650 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 14:48:07,650 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:07,650 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:07,657 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-02 14:48:07,657 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-02 14:48:07,664 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-02 14:48:07,665 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 14:48:07,666 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:07,679 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:07,680 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:07,800 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:07,813 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 14:48:07,814 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 17 [2018-12-02 14:48:07,814 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 14:48:07,814 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 14:48:07,814 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 14:48:07,814 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=178, Unknown=0, NotChecked=0, Total=272 [2018-12-02 14:48:07,814 INFO L87 Difference]: Start difference. First operand 18 states and 18 transitions. Second operand 10 states. [2018-12-02 14:48:07,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:07,839 INFO L93 Difference]: Finished difference Result 25 states and 25 transitions. [2018-12-02 14:48:07,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 14:48:07,840 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 17 [2018-12-02 14:48:07,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:07,840 INFO L225 Difference]: With dead ends: 25 [2018-12-02 14:48:07,840 INFO L226 Difference]: Without dead ends: 19 [2018-12-02 14:48:07,840 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 26 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=94, Invalid=178, Unknown=0, NotChecked=0, Total=272 [2018-12-02 14:48:07,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-12-02 14:48:07,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-12-02 14:48:07,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-12-02 14:48:07,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-12-02 14:48:07,842 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-12-02 14:48:07,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:07,842 INFO L480 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-12-02 14:48:07,842 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 14:48:07,843 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-12-02 14:48:07,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-12-02 14:48:07,843 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:07,843 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:07,843 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:07,843 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:07,843 INFO L82 PathProgramCache]: Analyzing trace with hash -206313723, now seen corresponding path program 7 times [2018-12-02 14:48:07,843 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:07,844 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:07,844 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 14:48:07,844 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:07,844 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:07,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:07,906 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:07,907 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:07,907 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 14:48:07,907 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 14:48:07,907 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 14:48:07,907 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:07,907 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:07,913 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 14:48:07,913 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-02 14:48:07,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:07,921 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:07,936 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:07,937 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:08,090 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:08,106 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 14:48:08,107 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 19 [2018-12-02 14:48:08,107 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 14:48:08,107 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-02 14:48:08,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-02 14:48:08,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=227, Unknown=0, NotChecked=0, Total=342 [2018-12-02 14:48:08,108 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 11 states. [2018-12-02 14:48:08,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:08,148 INFO L93 Difference]: Finished difference Result 26 states and 26 transitions. [2018-12-02 14:48:08,149 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 14:48:08,149 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 18 [2018-12-02 14:48:08,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:08,149 INFO L225 Difference]: With dead ends: 26 [2018-12-02 14:48:08,149 INFO L226 Difference]: Without dead ends: 20 [2018-12-02 14:48:08,150 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 27 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=115, Invalid=227, Unknown=0, NotChecked=0, Total=342 [2018-12-02 14:48:08,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-12-02 14:48:08,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-12-02 14:48:08,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-12-02 14:48:08,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-12-02 14:48:08,152 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-12-02 14:48:08,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:08,152 INFO L480 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-12-02 14:48:08,153 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-02 14:48:08,153 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-12-02 14:48:08,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-12-02 14:48:08,153 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:08,153 INFO L402 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:08,153 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:08,153 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:08,154 INFO L82 PathProgramCache]: Analyzing trace with hash -513705094, now seen corresponding path program 8 times [2018-12-02 14:48:08,154 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:08,154 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:08,154 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 14:48:08,154 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:08,154 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:08,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:08,232 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:08,232 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:08,232 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 14:48:08,233 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 14:48:08,233 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 14:48:08,233 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:08,233 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:08,247 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 14:48:08,247 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-02 14:48:08,261 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-12-02 14:48:08,261 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 14:48:08,262 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:08,275 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:08,275 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:08,424 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:08,438 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 14:48:08,438 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 21 [2018-12-02 14:48:08,438 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 14:48:08,439 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-02 14:48:08,439 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-02 14:48:08,439 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=284, Unknown=0, NotChecked=0, Total=420 [2018-12-02 14:48:08,439 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 12 states. [2018-12-02 14:48:08,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:08,482 INFO L93 Difference]: Finished difference Result 27 states and 27 transitions. [2018-12-02 14:48:08,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-02 14:48:08,483 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 19 [2018-12-02 14:48:08,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:08,483 INFO L225 Difference]: With dead ends: 27 [2018-12-02 14:48:08,483 INFO L226 Difference]: Without dead ends: 21 [2018-12-02 14:48:08,483 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=136, Invalid=284, Unknown=0, NotChecked=0, Total=420 [2018-12-02 14:48:08,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-12-02 14:48:08,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-12-02 14:48:08,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-12-02 14:48:08,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-12-02 14:48:08,485 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-12-02 14:48:08,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:08,486 INFO L480 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-12-02 14:48:08,486 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-02 14:48:08,486 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-12-02 14:48:08,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-12-02 14:48:08,486 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:08,486 INFO L402 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:08,486 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:08,486 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:08,486 INFO L82 PathProgramCache]: Analyzing trace with hash -1452903003, now seen corresponding path program 9 times [2018-12-02 14:48:08,486 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:08,487 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:08,487 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 14:48:08,487 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:08,487 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:08,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:08,563 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:08,564 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:08,564 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 14:48:08,564 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 14:48:08,564 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 14:48:08,564 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:08,564 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:08,570 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-02 14:48:08,570 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-02 14:48:08,578 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-02 14:48:08,578 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 14:48:08,579 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:08,598 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:08,598 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:08,766 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:08,782 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 14:48:08,782 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 23 [2018-12-02 14:48:08,782 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 14:48:08,783 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-02 14:48:08,783 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-02 14:48:08,783 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=154, Invalid=352, Unknown=0, NotChecked=0, Total=506 [2018-12-02 14:48:08,783 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 13 states. [2018-12-02 14:48:08,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:08,831 INFO L93 Difference]: Finished difference Result 28 states and 28 transitions. [2018-12-02 14:48:08,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-02 14:48:08,832 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 20 [2018-12-02 14:48:08,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:08,832 INFO L225 Difference]: With dead ends: 28 [2018-12-02 14:48:08,832 INFO L226 Difference]: Without dead ends: 22 [2018-12-02 14:48:08,833 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=154, Invalid=352, Unknown=0, NotChecked=0, Total=506 [2018-12-02 14:48:08,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-12-02 14:48:08,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-12-02 14:48:08,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-12-02 14:48:08,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-12-02 14:48:08,834 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-12-02 14:48:08,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:08,835 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-12-02 14:48:08,835 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-02 14:48:08,835 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-12-02 14:48:08,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-02 14:48:08,835 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:08,835 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:08,835 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:08,835 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:08,836 INFO L82 PathProgramCache]: Analyzing trace with hash -503267110, now seen corresponding path program 10 times [2018-12-02 14:48:08,836 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:08,836 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:08,837 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 14:48:08,837 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:08,837 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:08,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:08,917 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:08,918 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:08,918 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 14:48:08,918 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 14:48:08,918 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 14:48:08,918 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:08,918 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:08,926 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 14:48:08,926 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-02 14:48:08,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:08,932 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:08,953 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:08,953 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:09,127 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:09,144 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 14:48:09,144 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2018-12-02 14:48:09,144 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 14:48:09,145 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-02 14:48:09,145 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-02 14:48:09,145 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=170, Invalid=430, Unknown=0, NotChecked=0, Total=600 [2018-12-02 14:48:09,145 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 14 states. [2018-12-02 14:48:09,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:09,201 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-12-02 14:48:09,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-02 14:48:09,201 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 21 [2018-12-02 14:48:09,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:09,201 INFO L225 Difference]: With dead ends: 29 [2018-12-02 14:48:09,201 INFO L226 Difference]: Without dead ends: 23 [2018-12-02 14:48:09,202 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 30 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=170, Invalid=430, Unknown=0, NotChecked=0, Total=600 [2018-12-02 14:48:09,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-12-02 14:48:09,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-12-02 14:48:09,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-12-02 14:48:09,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-12-02 14:48:09,204 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-12-02 14:48:09,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:09,204 INFO L480 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-12-02 14:48:09,204 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-02 14:48:09,204 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-12-02 14:48:09,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-12-02 14:48:09,204 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:09,204 INFO L402 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:09,204 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:09,205 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:09,205 INFO L82 PathProgramCache]: Analyzing trace with hash -1129325499, now seen corresponding path program 11 times [2018-12-02 14:48:09,205 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:09,205 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:09,205 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 14:48:09,205 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:09,205 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:09,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:09,297 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:09,297 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:09,297 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 14:48:09,297 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 14:48:09,297 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 14:48:09,297 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:09,297 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:09,303 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 14:48:09,303 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-02 14:48:09,326 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-12-02 14:48:09,326 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 14:48:09,328 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:09,341 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:09,341 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:09,533 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:09,548 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 14:48:09,548 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 27 [2018-12-02 14:48:09,548 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 14:48:09,548 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-02 14:48:09,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-02 14:48:09,548 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=184, Invalid=518, Unknown=0, NotChecked=0, Total=702 [2018-12-02 14:48:09,549 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 15 states. [2018-12-02 14:48:09,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:09,612 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-12-02 14:48:09,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-02 14:48:09,613 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 22 [2018-12-02 14:48:09,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:09,613 INFO L225 Difference]: With dead ends: 30 [2018-12-02 14:48:09,613 INFO L226 Difference]: Without dead ends: 24 [2018-12-02 14:48:09,614 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=184, Invalid=518, Unknown=0, NotChecked=0, Total=702 [2018-12-02 14:48:09,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-12-02 14:48:09,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-12-02 14:48:09,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-12-02 14:48:09,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-12-02 14:48:09,616 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-12-02 14:48:09,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:09,616 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-12-02 14:48:09,616 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-02 14:48:09,616 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-12-02 14:48:09,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-12-02 14:48:09,617 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:09,617 INFO L402 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:09,617 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:09,617 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:09,617 INFO L82 PathProgramCache]: Analyzing trace with hash 937700922, now seen corresponding path program 12 times [2018-12-02 14:48:09,617 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:09,618 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:09,618 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 14:48:09,618 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:09,618 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:09,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:09,712 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:09,712 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:09,712 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 14:48:09,712 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 14:48:09,712 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 14:48:09,713 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:09,713 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:09,721 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-02 14:48:09,721 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-02 14:48:09,728 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-02 14:48:09,728 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 14:48:09,729 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:09,747 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:09,747 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:09,967 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:09,982 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 14:48:09,982 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 29 [2018-12-02 14:48:09,982 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 14:48:09,983 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-02 14:48:09,983 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-02 14:48:09,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=196, Invalid=616, Unknown=0, NotChecked=0, Total=812 [2018-12-02 14:48:09,983 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 16 states. [2018-12-02 14:48:10,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:10,076 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-12-02 14:48:10,076 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-02 14:48:10,077 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 23 [2018-12-02 14:48:10,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:10,077 INFO L225 Difference]: With dead ends: 31 [2018-12-02 14:48:10,077 INFO L226 Difference]: Without dead ends: 25 [2018-12-02 14:48:10,078 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 32 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=196, Invalid=616, Unknown=0, NotChecked=0, Total=812 [2018-12-02 14:48:10,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-12-02 14:48:10,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-12-02 14:48:10,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-12-02 14:48:10,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-12-02 14:48:10,080 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-12-02 14:48:10,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:10,081 INFO L480 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-12-02 14:48:10,081 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-02 14:48:10,081 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-12-02 14:48:10,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-12-02 14:48:10,081 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:10,081 INFO L402 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:10,081 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:10,081 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:10,081 INFO L82 PathProgramCache]: Analyzing trace with hash 591010533, now seen corresponding path program 13 times [2018-12-02 14:48:10,082 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:10,082 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:10,082 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 14:48:10,082 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:10,082 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:10,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:10,224 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:10,224 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:10,224 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 14:48:10,224 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 14:48:10,224 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 14:48:10,224 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:10,225 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:10,232 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 14:48:10,232 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-02 14:48:10,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:10,241 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:10,258 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:10,259 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:10,481 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:10,495 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 14:48:10,495 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 31 [2018-12-02 14:48:10,495 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 14:48:10,496 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-02 14:48:10,496 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-02 14:48:10,496 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=206, Invalid=724, Unknown=0, NotChecked=0, Total=930 [2018-12-02 14:48:10,496 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 17 states. [2018-12-02 14:48:10,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:10,567 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-12-02 14:48:10,567 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-02 14:48:10,567 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 24 [2018-12-02 14:48:10,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:10,568 INFO L225 Difference]: With dead ends: 32 [2018-12-02 14:48:10,568 INFO L226 Difference]: Without dead ends: 26 [2018-12-02 14:48:10,568 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 33 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=206, Invalid=724, Unknown=0, NotChecked=0, Total=930 [2018-12-02 14:48:10,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-12-02 14:48:10,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-12-02 14:48:10,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-12-02 14:48:10,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-12-02 14:48:10,570 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-12-02 14:48:10,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:10,570 INFO L480 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-12-02 14:48:10,570 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-02 14:48:10,570 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-12-02 14:48:10,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-02 14:48:10,571 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:10,571 INFO L402 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:10,571 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:10,571 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:10,571 INFO L82 PathProgramCache]: Analyzing trace with hash -1566456934, now seen corresponding path program 14 times [2018-12-02 14:48:10,571 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:10,571 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:10,571 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 14:48:10,571 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:10,571 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:10,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:10,698 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:10,698 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:10,698 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 14:48:10,698 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 14:48:10,698 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 14:48:10,698 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:10,698 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:10,706 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 14:48:10,706 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-02 14:48:10,861 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-12-02 14:48:10,861 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 14:48:10,864 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:10,886 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:10,886 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:11,142 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:11,156 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 14:48:11,157 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 33 [2018-12-02 14:48:11,157 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 14:48:11,157 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-02 14:48:11,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-02 14:48:11,157 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=214, Invalid=842, Unknown=0, NotChecked=0, Total=1056 [2018-12-02 14:48:11,158 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 18 states. [2018-12-02 14:48:11,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:11,237 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-12-02 14:48:11,238 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-02 14:48:11,238 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 25 [2018-12-02 14:48:11,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:11,238 INFO L225 Difference]: With dead ends: 33 [2018-12-02 14:48:11,238 INFO L226 Difference]: Without dead ends: 27 [2018-12-02 14:48:11,239 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 34 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=214, Invalid=842, Unknown=0, NotChecked=0, Total=1056 [2018-12-02 14:48:11,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-12-02 14:48:11,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-12-02 14:48:11,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-12-02 14:48:11,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-12-02 14:48:11,241 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-12-02 14:48:11,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:11,241 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-12-02 14:48:11,241 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-02 14:48:11,241 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-12-02 14:48:11,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-02 14:48:11,242 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:11,242 INFO L402 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:11,242 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:11,242 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:11,242 INFO L82 PathProgramCache]: Analyzing trace with hash 271528325, now seen corresponding path program 15 times [2018-12-02 14:48:11,242 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:11,243 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:11,243 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 14:48:11,243 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:11,243 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:11,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:11,397 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:11,397 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:11,397 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 14:48:11,397 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-02 14:48:11,397 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-02 14:48:11,397 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:11,397 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:11,404 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-02 14:48:11,404 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-02 14:48:11,411 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-02 14:48:11,411 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 14:48:11,412 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:11,438 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:11,438 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:11,709 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:11,723 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 14:48:11,724 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18] total 35 [2018-12-02 14:48:11,724 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 14:48:11,724 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-02 14:48:11,724 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-02 14:48:11,724 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=220, Invalid=970, Unknown=0, NotChecked=0, Total=1190 [2018-12-02 14:48:11,724 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 19 states. [2018-12-02 14:48:11,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:11,810 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-12-02 14:48:11,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-02 14:48:11,811 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 26 [2018-12-02 14:48:11,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:11,811 INFO L225 Difference]: With dead ends: 34 [2018-12-02 14:48:11,811 INFO L226 Difference]: Without dead ends: 28 [2018-12-02 14:48:11,812 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=220, Invalid=970, Unknown=0, NotChecked=0, Total=1190 [2018-12-02 14:48:11,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-12-02 14:48:11,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-12-02 14:48:11,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-12-02 14:48:11,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-12-02 14:48:11,814 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-12-02 14:48:11,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:11,815 INFO L480 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-12-02 14:48:11,815 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-02 14:48:11,815 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-12-02 14:48:11,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-02 14:48:11,815 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:11,815 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:11,815 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:11,816 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:11,816 INFO L82 PathProgramCache]: Analyzing trace with hash 1414496506, now seen corresponding path program 16 times [2018-12-02 14:48:11,816 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 14:48:11,816 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:11,816 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 14:48:11,817 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 14:48:11,817 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 14:48:11,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 14:48:11,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 14:48:11,837 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-02 14:48:11,854 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 02:48:11 BoogieIcfgContainer [2018-12-02 14:48:11,854 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-02 14:48:11,854 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-02 14:48:11,854 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-02 14:48:11,855 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-02 14:48:11,855 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 02:48:06" (3/4) ... [2018-12-02 14:48:11,857 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-02 14:48:11,857 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-02 14:48:11,857 INFO L168 Benchmark]: Toolchain (without parser) took 5837.00 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 295.7 MB). Free memory was 958.8 MB in the beginning and 897.1 MB in the end (delta: 61.8 MB). Peak memory consumption was 357.5 MB. Max. memory is 11.5 GB. [2018-12-02 14:48:11,858 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 14:48:11,858 INFO L168 Benchmark]: CACSL2BoogieTranslator took 127.00 ms. Allocated memory is still 1.0 GB. Free memory was 958.8 MB in the beginning and 947.0 MB in the end (delta: 11.8 MB). Peak memory consumption was 11.8 MB. Max. memory is 11.5 GB. [2018-12-02 14:48:11,859 INFO L168 Benchmark]: Boogie Procedure Inliner took 12.39 ms. Allocated memory is still 1.0 GB. Free memory is still 947.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 14:48:11,859 INFO L168 Benchmark]: Boogie Preprocessor took 43.16 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 123.7 MB). Free memory was 947.0 MB in the beginning and 1.1 GB in the end (delta: -171.3 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2018-12-02 14:48:11,859 INFO L168 Benchmark]: RCFGBuilder took 119.46 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 15.3 MB). Peak memory consumption was 15.3 MB. Max. memory is 11.5 GB. [2018-12-02 14:48:11,860 INFO L168 Benchmark]: TraceAbstraction took 5529.92 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 172.0 MB). Free memory was 1.1 GB in the beginning and 897.1 MB in the end (delta: 205.9 MB). Peak memory consumption was 377.9 MB. Max. memory is 11.5 GB. [2018-12-02 14:48:11,860 INFO L168 Benchmark]: Witness Printer took 2.57 ms. Allocated memory is still 1.3 GB. Free memory is still 897.1 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 14:48:11,862 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 127.00 ms. Allocated memory is still 1.0 GB. Free memory was 958.8 MB in the beginning and 947.0 MB in the end (delta: 11.8 MB). Peak memory consumption was 11.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 12.39 ms. Allocated memory is still 1.0 GB. Free memory is still 947.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 43.16 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 123.7 MB). Free memory was 947.0 MB in the beginning and 1.1 GB in the end (delta: -171.3 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 119.46 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 15.3 MB). Peak memory consumption was 15.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 5529.92 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 172.0 MB). Free memory was 1.1 GB in the beginning and 897.1 MB in the end (delta: 205.9 MB). Peak memory consumption was 377.9 MB. Max. memory is 11.5 GB. * Witness Printer took 2.57 ms. Allocated memory is still 1.3 GB. Free memory is still 897.1 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 6]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of bitwiseOr at line 45, overapproximation of bitwiseAnd at line 36. Possible FailurePath: [L23] unsigned short x = __VERIFIER_nondet_ushort(); [L24] unsigned short y = __VERIFIER_nondet_ushort(); [L25] unsigned int xx; [L26] unsigned int yy; [L27] unsigned int zz; [L28] unsigned int z = 0; [L29] unsigned int i = 0; VAL [i=0, x=3, y=2, z=0] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=1, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=2, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=3, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=4, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=5, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=6, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=7, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=8, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=9, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=10, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=11, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=12, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=13, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=14, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=15, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=16, x=3, y=2] [L30] COND FALSE !(i < sizeof(x) * 8) VAL [i=16, x=3, y=2] [L34] xx = x [L35] yy = y [L36] xx = (xx | (xx << 8u)) & 16711935U [L37] xx = (xx | (xx << 4u)) & 252645135U [L38] xx = (xx | (xx << 2u)) & 858993459U [L39] xx = (xx | (xx << 1u)) & 1431655765U [L40] yy = (yy | (yy << 8u)) & 16711935U [L41] yy = (yy | (yy << 4u)) & 252645135U [L42] yy = (yy | (yy << 2u)) & 858993459U [L43] yy = (yy | (yy << 1u)) & 1431655765U [L45] zz = xx | (yy << 1U) VAL [i=16, x=3, y=2] [L47] CALL __VERIFIER_assert(z == zz) VAL [\old(cond)=0] [L5] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L6] __VERIFIER_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 18 locations, 1 error locations. UNSAFE Result, 5.4s OverallTime, 17 OverallIterations, 16 TraceHistogramMax, 0.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 182 SDtfs, 0 SDslu, 1032 SDs, 0 SdLazy, 1724 SolverSat, 120 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 723 GetRequests, 422 SyntacticMatches, 15 SemanticMatches, 286 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 804 ImplicationChecksByTransitivity, 3.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=28occurred in iteration=16, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.1s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 16 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 3.6s InterpolantComputationTime, 608 NumberOfCodeBlocks, 608 NumberOfCodeBlocksAsserted, 58 NumberOfCheckSat, 820 ConstructedInterpolants, 0 QuantifiedInterpolants, 64940 SizeOfPredicates, 15 NumberOfNonLiveVariables, 795 ConjunctsInSsa, 285 ConjunctsInUnsatCore, 46 InterpolantComputations, 1 PerfectInterpolantSequences, 0/2040 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-635dfa2 [2018-12-02 14:48:13,157 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-02 14:48:13,158 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-02 14:48:13,164 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2018-12-02 14:48:13,168 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-02 14:48:13,168 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-02 14:48:13,169 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-02 14:48:13,169 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-02 14:48:13,170 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-02 14:48:13,170 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-02 14:48:13,171 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-02 14:48:13,172 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-02 14:48:13,172 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-02 14:48:13,173 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-02 14:48:13,174 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-02 14:48:13,175 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-02 14:48:13,175 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-02 14:48:13,175 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-02 14:48:13,175 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-02 14:48:13,176 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-02 14:48:13,176 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-02 14:48:13,177 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-02 14:48:13,177 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-02 14:48:13,177 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-02 14:48:13,177 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-02 14:48:13,178 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-02 14:48:13,178 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-02 14:48:13,178 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-02 14:48:13,178 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-02 14:48:13,179 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf [2018-12-02 14:48:13,186 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-02 14:48:13,186 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-02 14:48:13,186 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-02 14:48:13,187 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-02 14:48:13,187 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-02 14:48:13,187 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-02 14:48:13,187 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-02 14:48:13,187 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-02 14:48:13,187 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-02 14:48:13,187 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-02 14:48:13,187 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-02 14:48:13,188 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-02 14:48:13,188 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-02 14:48:13,188 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-02 14:48:13,188 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-02 14:48:13,188 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-02 14:48:13,188 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-02 14:48:13,188 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-12-02 14:48:13,188 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-12-02 14:48:13,188 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-02 14:48:13,188 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-02 14:48:13,188 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-02 14:48:13,188 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-02 14:48:13,188 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-02 14:48:13,189 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-02 14:48:13,189 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-02 14:48:13,189 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-02 14:48:13,189 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 14:48:13,189 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-02 14:48:13,189 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-02 14:48:13,189 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-02 14:48:13,189 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-12-02 14:48:13,189 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-02 14:48:13,189 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-12-02 14:48:13,189 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-12-02 14:48:13,189 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a69112b8d023c6203418abb04301ebe890b3a5f5 [2018-12-02 14:48:13,208 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-02 14:48:13,215 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-02 14:48:13,218 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-02 14:48:13,219 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-02 14:48:13,219 INFO L276 PluginConnector]: CDTParser initialized [2018-12-02 14:48:13,219 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/../../sv-benchmarks/c/bitvector/interleave_bits_true-unreach-call_true-no-overflow.i [2018-12-02 14:48:13,254 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/data/6fdab55c4/c00b520fceb846809721afb880a6f4f9/FLAG23aba1028 [2018-12-02 14:48:13,668 INFO L307 CDTParser]: Found 1 translation units. [2018-12-02 14:48:13,669 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/sv-benchmarks/c/bitvector/interleave_bits_true-unreach-call_true-no-overflow.i [2018-12-02 14:48:13,673 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/data/6fdab55c4/c00b520fceb846809721afb880a6f4f9/FLAG23aba1028 [2018-12-02 14:48:13,681 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/data/6fdab55c4/c00b520fceb846809721afb880a6f4f9 [2018-12-02 14:48:13,683 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-02 14:48:13,683 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-02 14:48:13,684 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-02 14:48:13,684 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-02 14:48:13,686 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-02 14:48:13,687 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 02:48:13" (1/1) ... [2018-12-02 14:48:13,688 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4f98f186 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:13, skipping insertion in model container [2018-12-02 14:48:13,689 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 02:48:13" (1/1) ... [2018-12-02 14:48:13,693 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-02 14:48:13,703 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-02 14:48:13,791 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 14:48:13,794 INFO L191 MainTranslator]: Completed pre-run [2018-12-02 14:48:13,807 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 14:48:13,815 INFO L195 MainTranslator]: Completed translation [2018-12-02 14:48:13,815 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:13 WrapperNode [2018-12-02 14:48:13,816 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-02 14:48:13,816 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-02 14:48:13,816 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-02 14:48:13,816 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-02 14:48:13,821 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:13" (1/1) ... [2018-12-02 14:48:13,826 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:13" (1/1) ... [2018-12-02 14:48:13,830 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-02 14:48:13,830 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-02 14:48:13,830 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-02 14:48:13,830 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-02 14:48:13,836 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:13" (1/1) ... [2018-12-02 14:48:13,836 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:13" (1/1) ... [2018-12-02 14:48:13,837 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:13" (1/1) ... [2018-12-02 14:48:13,837 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:13" (1/1) ... [2018-12-02 14:48:13,840 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:13" (1/1) ... [2018-12-02 14:48:13,843 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:13" (1/1) ... [2018-12-02 14:48:13,844 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:13" (1/1) ... [2018-12-02 14:48:13,845 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-02 14:48:13,845 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-02 14:48:13,845 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-02 14:48:13,845 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-02 14:48:13,846 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:13" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 14:48:13,909 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-02 14:48:13,909 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-02 14:48:13,909 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-02 14:48:13,910 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-02 14:48:13,910 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-02 14:48:13,910 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-02 14:48:13,910 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-12-02 14:48:13,910 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-12-02 14:48:14,012 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-02 14:48:14,012 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-02 14:48:14,012 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 02:48:14 BoogieIcfgContainer [2018-12-02 14:48:14,012 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-02 14:48:14,013 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-02 14:48:14,013 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-02 14:48:14,015 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-02 14:48:14,015 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 02:48:13" (1/3) ... [2018-12-02 14:48:14,015 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@18b0c69f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 02:48:14, skipping insertion in model container [2018-12-02 14:48:14,015 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:48:13" (2/3) ... [2018-12-02 14:48:14,015 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@18b0c69f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 02:48:14, skipping insertion in model container [2018-12-02 14:48:14,015 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 02:48:14" (3/3) ... [2018-12-02 14:48:14,016 INFO L112 eAbstractionObserver]: Analyzing ICFG interleave_bits_true-unreach-call_true-no-overflow.i [2018-12-02 14:48:14,022 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-02 14:48:14,026 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-12-02 14:48:14,034 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-12-02 14:48:14,051 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-02 14:48:14,051 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-02 14:48:14,051 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-02 14:48:14,051 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-02 14:48:14,051 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-02 14:48:14,051 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-02 14:48:14,051 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-02 14:48:14,051 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-02 14:48:14,052 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-02 14:48:14,061 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states. [2018-12-02 14:48:14,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-12-02 14:48:14,064 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:14,064 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:14,065 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:14,068 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:14,068 INFO L82 PathProgramCache]: Analyzing trace with hash -480905734, now seen corresponding path program 1 times [2018-12-02 14:48:14,070 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 14:48:14,071 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 14:48:14,085 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 14:48:14,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:14,110 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:14,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:14,130 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 14:48:14,132 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 14:48:14,132 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 14:48:14,135 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 14:48:14,142 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 14:48:14,142 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 14:48:14,144 INFO L87 Difference]: Start difference. First operand 18 states. Second operand 3 states. [2018-12-02 14:48:14,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:14,164 INFO L93 Difference]: Finished difference Result 31 states and 36 transitions. [2018-12-02 14:48:14,165 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 14:48:14,166 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-12-02 14:48:14,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:14,170 INFO L225 Difference]: With dead ends: 31 [2018-12-02 14:48:14,170 INFO L226 Difference]: Without dead ends: 13 [2018-12-02 14:48:14,172 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 14:48:14,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2018-12-02 14:48:14,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2018-12-02 14:48:14,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-12-02 14:48:14,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 13 transitions. [2018-12-02 14:48:14,194 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 13 transitions. Word has length 11 [2018-12-02 14:48:14,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:14,194 INFO L480 AbstractCegarLoop]: Abstraction has 13 states and 13 transitions. [2018-12-02 14:48:14,194 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 14:48:14,194 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2018-12-02 14:48:14,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-02 14:48:14,195 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:14,195 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:14,195 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:14,195 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:14,195 INFO L82 PathProgramCache]: Analyzing trace with hash -436122843, now seen corresponding path program 1 times [2018-12-02 14:48:14,195 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 14:48:14,195 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/cvc4 Starting monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 14:48:14,221 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 14:48:14,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:14,246 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:14,263 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:14,263 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:14,287 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:14,288 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:14,288 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:14,294 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 14:48:14,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 14:48:14,304 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:14,307 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:14,307 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:14,338 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:14,352 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-02 14:48:14,352 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4] total 7 [2018-12-02 14:48:14,353 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 14:48:14,353 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 14:48:14,353 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-02 14:48:14,353 INFO L87 Difference]: Start difference. First operand 13 states and 13 transitions. Second operand 7 states. [2018-12-02 14:48:14,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:14,394 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2018-12-02 14:48:14,394 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 14:48:14,394 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 12 [2018-12-02 14:48:14,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:14,395 INFO L225 Difference]: With dead ends: 22 [2018-12-02 14:48:14,395 INFO L226 Difference]: Without dead ends: 16 [2018-12-02 14:48:14,396 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=31, Unknown=0, NotChecked=0, Total=56 [2018-12-02 14:48:14,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-12-02 14:48:14,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2018-12-02 14:48:14,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-12-02 14:48:14,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 16 transitions. [2018-12-02 14:48:14,400 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 16 transitions. Word has length 12 [2018-12-02 14:48:14,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:14,400 INFO L480 AbstractCegarLoop]: Abstraction has 16 states and 16 transitions. [2018-12-02 14:48:14,400 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 14:48:14,400 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2018-12-02 14:48:14,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-12-02 14:48:14,401 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:14,401 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:14,401 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:14,402 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:14,402 INFO L82 PathProgramCache]: Analyzing trace with hash -568891206, now seen corresponding path program 2 times [2018-12-02 14:48:14,402 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 14:48:14,403 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/cvc4 Starting monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 14:48:14,416 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-02 14:48:14,464 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-02 14:48:14,464 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 14:48:14,466 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:14,502 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:14,502 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:14,583 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:14,585 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:14,585 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:14,591 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 14:48:14,610 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-02 14:48:14,610 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 14:48:14,613 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:14,624 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:14,624 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:14,812 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:14,835 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-02 14:48:14,835 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7] total 16 [2018-12-02 14:48:14,836 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-02 14:48:14,836 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-02 14:48:14,836 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=156, Unknown=0, NotChecked=0, Total=240 [2018-12-02 14:48:14,837 INFO L87 Difference]: Start difference. First operand 16 states and 16 transitions. Second operand 16 states. [2018-12-02 14:48:15,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:15,150 INFO L93 Difference]: Finished difference Result 28 states and 33 transitions. [2018-12-02 14:48:15,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-02 14:48:15,150 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 15 [2018-12-02 14:48:15,151 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:15,151 INFO L225 Difference]: With dead ends: 28 [2018-12-02 14:48:15,151 INFO L226 Difference]: Without dead ends: 22 [2018-12-02 14:48:15,152 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=155, Invalid=265, Unknown=0, NotChecked=0, Total=420 [2018-12-02 14:48:15,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-12-02 14:48:15,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-12-02 14:48:15,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-12-02 14:48:15,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-12-02 14:48:15,155 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 15 [2018-12-02 14:48:15,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:15,155 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-12-02 14:48:15,155 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-02 14:48:15,155 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-12-02 14:48:15,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-02 14:48:15,156 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:15,156 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:15,156 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:15,156 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:15,156 INFO L82 PathProgramCache]: Analyzing trace with hash -503267110, now seen corresponding path program 3 times [2018-12-02 14:48:15,156 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 14:48:15,157 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/cvc4 Starting monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 14:48:15,170 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-12-02 14:48:15,272 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-12-02 14:48:15,273 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 14:48:15,275 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:15,344 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:15,344 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:15,766 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:15,768 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 14:48:15,768 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 14:48:15,774 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 14:48:15,816 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-12-02 14:48:15,816 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 14:48:15,820 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:15,834 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:15,834 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:48:15,843 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:15,858 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-02 14:48:15,858 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13] total 24 [2018-12-02 14:48:15,859 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-02 14:48:15,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-02 14:48:15,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=161, Invalid=391, Unknown=0, NotChecked=0, Total=552 [2018-12-02 14:48:15,859 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 24 states. [2018-12-02 14:48:16,364 WARN L180 SmtUtils]: Spent 250.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 35 [2018-12-02 14:48:16,775 WARN L180 SmtUtils]: Spent 315.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 35 [2018-12-02 14:48:17,143 WARN L180 SmtUtils]: Spent 259.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 35 [2018-12-02 14:48:17,446 WARN L180 SmtUtils]: Spent 192.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 35 [2018-12-02 14:48:18,103 WARN L180 SmtUtils]: Spent 151.00 ms on a formula simplification that was a NOOP. DAG size: 54 [2018-12-02 14:48:18,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:48:18,575 INFO L93 Difference]: Finished difference Result 40 states and 51 transitions. [2018-12-02 14:48:18,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-02 14:48:18,576 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 21 [2018-12-02 14:48:18,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:48:18,576 INFO L225 Difference]: With dead ends: 40 [2018-12-02 14:48:18,577 INFO L226 Difference]: Without dead ends: 34 [2018-12-02 14:48:18,577 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 58 SyntacticMatches, 2 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 137 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=370, Invalid=820, Unknown=0, NotChecked=0, Total=1190 [2018-12-02 14:48:18,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-12-02 14:48:18,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-12-02 14:48:18,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-12-02 14:48:18,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 35 transitions. [2018-12-02 14:48:18,585 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 35 transitions. Word has length 21 [2018-12-02 14:48:18,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:48:18,585 INFO L480 AbstractCegarLoop]: Abstraction has 34 states and 35 transitions. [2018-12-02 14:48:18,585 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-02 14:48:18,586 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 35 transitions. [2018-12-02 14:48:18,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-02 14:48:18,586 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 14:48:18,586 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 14:48:18,586 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 14:48:18,587 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 14:48:18,587 INFO L82 PathProgramCache]: Analyzing trace with hash 1414496506, now seen corresponding path program 4 times [2018-12-02 14:48:18,587 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 14:48:18,587 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/cvc4 Starting monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 14:48:18,604 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-02 14:48:18,784 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-02 14:48:18,784 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 14:48:18,787 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 14:48:20,068 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:48:20,068 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 14:50:01,491 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 136 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 14:50:01,494 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 14:50:01,494 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [22] total 41 [2018-12-02 14:50:01,495 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-12-02 14:50:01,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-12-02 14:50:01,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=354, Invalid=1285, Unknown=1, NotChecked=0, Total=1640 [2018-12-02 14:50:01,495 INFO L87 Difference]: Start difference. First operand 34 states and 35 transitions. Second operand 41 states. [2018-12-02 14:50:07,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 14:50:07,717 INFO L93 Difference]: Finished difference Result 34 states and 35 transitions. [2018-12-02 14:50:07,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-12-02 14:50:07,717 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 27 [2018-12-02 14:50:07,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 14:50:07,717 INFO L225 Difference]: With dead ends: 34 [2018-12-02 14:50:07,717 INFO L226 Difference]: Without dead ends: 0 [2018-12-02 14:50:07,718 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 13 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 103.1s TimeCoverageRelationStatistics Valid=381, Invalid=1424, Unknown=1, NotChecked=0, Total=1806 [2018-12-02 14:50:07,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-12-02 14:50:07,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-12-02 14:50:07,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-12-02 14:50:07,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-12-02 14:50:07,718 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 27 [2018-12-02 14:50:07,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 14:50:07,719 INFO L480 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-12-02 14:50:07,719 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-12-02 14:50:07,719 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-12-02 14:50:07,719 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-12-02 14:50:07,722 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2018-12-02 14:50:09,377 WARN L180 SmtUtils]: Spent 1.58 s on a formula simplification. DAG size of input: 269 DAG size of output: 223 [2018-12-02 14:50:09,643 WARN L180 SmtUtils]: Spent 262.00 ms on a formula simplification that was a NOOP. DAG size: 207 [2018-12-02 14:50:09,645 INFO L451 ceAbstractionStarter]: At program point ULTIMATE.initFINAL(line -1) the Hoare annotation is: true [2018-12-02 14:50:09,645 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.initEXIT(line -1) no Hoare annotation was computed. [2018-12-02 14:50:09,645 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startEXIT(line -1) no Hoare annotation was computed. [2018-12-02 14:50:09,645 INFO L451 ceAbstractionStarter]: At program point L-1(line -1) the Hoare annotation is: true [2018-12-02 14:50:09,645 INFO L451 ceAbstractionStarter]: At program point ULTIMATE.startENTRY(line -1) the Hoare annotation is: true [2018-12-02 14:50:09,645 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startFINAL(line -1) no Hoare annotation was computed. [2018-12-02 14:50:09,645 INFO L451 ceAbstractionStarter]: At program point mainENTRY(lines 21 48) the Hoare annotation is: true [2018-12-02 14:50:09,646 INFO L444 ceAbstractionStarter]: At program point L30-2(lines 30 33) the Hoare annotation is: (let ((.cse3 ((_ zero_extend 16) main_~x~0)) (.cse4 ((_ zero_extend 16) main_~y~0))) (let ((.cse9 (bvor (_ bv0 32) (bvor (bvshl (bvand .cse3 (_ bv1 32)) (_ bv0 32)) (bvshl (bvand .cse4 (_ bv1 32)) (_ bv1 32)))))) (let ((.cse6 (bvor .cse9 (bvor (bvshl (bvand .cse3 (_ bv2 32)) (_ bv1 32)) (bvshl (bvand .cse4 (_ bv2 32)) (_ bv2 32)))))) (let ((.cse8 (bvor (bvor .cse6 (bvor (bvshl (bvand .cse3 (_ bv4 32)) (_ bv2 32)) (bvshl (bvand .cse4 (_ bv4 32)) (_ bv3 32)))) (bvor (bvshl (bvand .cse3 (_ bv8 32)) (_ bv3 32)) (bvshl (bvand .cse4 (_ bv8 32)) (_ bv4 32)))))) (let ((.cse11 (bvor (bvor (bvor .cse8 (bvor (bvshl (bvand .cse3 (_ bv16 32)) (_ bv4 32)) (bvshl (bvand .cse4 (_ bv16 32)) (_ bv5 32)))) (bvor (bvshl (bvand .cse3 (_ bv32 32)) (_ bv5 32)) (bvshl (bvand .cse4 (_ bv32 32)) (_ bv6 32)))) (bvor (bvshl (bvand .cse3 (_ bv64 32)) (_ bv6 32)) (bvshl (bvand .cse4 (_ bv64 32)) (_ bv7 32)))))) (let ((.cse12 (bvor (bvor .cse11 (bvor (bvshl (bvand .cse3 (_ bv128 32)) (_ bv7 32)) (bvshl (bvand .cse4 (_ bv128 32)) (_ bv8 32)))) (bvor (bvshl (bvand .cse3 (_ bv256 32)) (_ bv8 32)) (bvshl (bvand .cse4 (_ bv256 32)) (_ bv9 32)))))) (let ((.cse0 (bvor .cse12 (bvor (bvshl (bvand .cse3 (_ bv512 32)) (_ bv9 32)) (bvshl (bvand .cse4 (_ bv512 32)) (_ bv10 32)))))) (let ((.cse5 (bvor .cse0 (bvor (bvshl (bvand .cse3 (_ bv1024 32)) (_ bv10 32)) (bvshl (bvand .cse4 (_ bv1024 32)) (_ bv11 32)))))) (let ((.cse10 (bvadd main_~i~0 (_ bv4294967295 32))) (.cse1 (bvor (bvor .cse5 (bvor (bvshl (bvand .cse3 (_ bv2048 32)) (_ bv11 32)) (bvshl (bvand .cse4 (_ bv2048 32)) (_ bv12 32)))) (bvor (bvshl (bvand .cse3 (_ bv4096 32)) (_ bv12 32)) (bvshl (bvand .cse4 (_ bv4096 32)) (_ bv13 32)))))) (let ((.cse2 (bvor .cse1 (bvor (bvshl (bvand .cse3 (_ bv8192 32)) (_ bv13 32)) (bvshl (bvand .cse4 (_ bv8192 32)) (_ bv14 32))))) (.cse7 (let ((.cse15 (bvshl (_ bv1 32) .cse10))) (bvor (bvshl (bvand .cse3 .cse15) .cse10) (bvshl (bvand .cse4 .cse15) main_~i~0))))) (or (and (= (bvadd main_~i~0 (_ bv4294967286 32)) (_ bv0 32)) (= main_~z~0 .cse0)) (and (= .cse1 main_~z~0) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32))) (and (= main_~z~0 .cse2) (= (bvadd main_~i~0 (_ bv4294967282 32)) (_ bv0 32))) (= (bvor (bvor .cse2 (bvor (bvshl (bvand .cse3 (_ bv16384 32)) (_ bv14 32)) (bvshl (bvand .cse4 (_ bv16384 32)) (_ bv15 32)))) (bvor (bvshl (bvand .cse3 (_ bv32768 32)) (_ bv15 32)) (bvshl (bvand .cse4 (_ bv32768 32)) (_ bv16 32)))) main_~z~0) (and (= .cse5 main_~z~0) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32))) (and (= main_~z~0 (_ bv0 32)) (= main_~i~0 (_ bv0 32))) (and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~z~0 (bvor .cse6 .cse7))) (and (= main_~z~0 (bvor .cse5 .cse7)) (= (_ bv12 32) main_~i~0)) (and (= main_~z~0 .cse8) (= (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))) (and (= main_~z~0 .cse9) (= .cse10 (_ bv0 32))) (and (= main_~z~0 .cse11) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))) (and (= (bvor .cse2 .cse7) main_~z~0) (= (_ bv15 32) main_~i~0)) (and (= (bvor .cse11 .cse7) main_~z~0) (= (_ bv8 32) main_~i~0)) (and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvor .cse8 .cse7) main_~z~0)) (and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (= main_~z~0 .cse12)) (and (= main_~z~0 .cse6) (= (_ bv2 32) main_~i~0)) (and (= main_~z~0 (bvor (bvor .cse8 (let ((.cse14 (bvadd main_~i~0 (_ bv4294967294 32)))) (let ((.cse13 (bvshl (_ bv1 32) .cse14))) (bvor (bvshl (bvand .cse3 .cse13) .cse14) (bvshl (bvand .cse4 .cse13) .cse10))))) .cse7)) (= (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))))))))))))) [2018-12-02 14:50:09,646 INFO L448 ceAbstractionStarter]: For program point L30-3(lines 30 33) no Hoare annotation was computed. [2018-12-02 14:50:09,646 INFO L448 ceAbstractionStarter]: For program point mainEXIT(lines 21 48) no Hoare annotation was computed. [2018-12-02 14:50:09,646 INFO L444 ceAbstractionStarter]: At program point L47(line 47) the Hoare annotation is: (let ((.cse1 (bvult (bvadd main_~i~0 (_ bv7 32)) (_ bv16 32))) (.cse2 (bvult (bvadd main_~i~0 (_ bv8 32)) (_ bv16 32))) (.cse0 (bvult (bvadd main_~i~0 (_ bv6 32)) (_ bv16 32))) (.cse8 (bvult (bvadd main_~i~0 (_ bv5 32)) (_ bv16 32))) (.cse17 (bvult (bvadd main_~i~0 (_ bv4 32)) (_ bv16 32))) (.cse7 (bvult (bvadd main_~i~0 (_ bv1 32)) (_ bv16 32))) (.cse3 (bvult (bvadd main_~i~0 (_ bv9 32)) (_ bv16 32))) (.cse6 (bvult (bvadd main_~i~0 (_ bv2 32)) (_ bv16 32))) (.cse18 (bvult (bvadd main_~i~0 (_ bv3 32)) (_ bv16 32)))) (and (or (not .cse0) .cse1) (or (not .cse1) .cse2) (or .cse3 (not .cse2)) (= (let ((.cse4 ((_ zero_extend 16) main_~x~0)) (.cse5 ((_ zero_extend 16) main_~y~0))) (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (_ bv0 32) (bvor (bvshl (bvand .cse4 (_ bv1 32)) (_ bv0 32)) (bvshl (bvand .cse5 (_ bv1 32)) (_ bv1 32)))) (bvor (bvshl (bvand .cse4 (_ bv2 32)) (_ bv1 32)) (bvshl (bvand .cse5 (_ bv2 32)) (_ bv2 32)))) (bvor (bvshl (bvand .cse4 (_ bv4 32)) (_ bv2 32)) (bvshl (bvand .cse5 (_ bv4 32)) (_ bv3 32)))) (bvor (bvshl (bvand .cse4 (_ bv8 32)) (_ bv3 32)) (bvshl (bvand .cse5 (_ bv8 32)) (_ bv4 32)))) (bvor (bvshl (bvand .cse4 (_ bv16 32)) (_ bv4 32)) (bvshl (bvand .cse5 (_ bv16 32)) (_ bv5 32)))) (bvor (bvshl (bvand .cse4 (_ bv32 32)) (_ bv5 32)) (bvshl (bvand .cse5 (_ bv32 32)) (_ bv6 32)))) (bvor (bvshl (bvand .cse4 (_ bv64 32)) (_ bv6 32)) (bvshl (bvand .cse5 (_ bv64 32)) (_ bv7 32)))) (bvor (bvshl (bvand .cse4 (_ bv128 32)) (_ bv7 32)) (bvshl (bvand .cse5 (_ bv128 32)) (_ bv8 32)))) (bvor (bvshl (bvand .cse4 (_ bv256 32)) (_ bv8 32)) (bvshl (bvand .cse5 (_ bv256 32)) (_ bv9 32)))) (bvor (bvshl (bvand .cse4 (_ bv512 32)) (_ bv9 32)) (bvshl (bvand .cse5 (_ bv512 32)) (_ bv10 32)))) (bvor (bvshl (bvand .cse4 (_ bv1024 32)) (_ bv10 32)) (bvshl (bvand .cse5 (_ bv1024 32)) (_ bv11 32)))) (bvor (bvshl (bvand .cse4 (_ bv2048 32)) (_ bv11 32)) (bvshl (bvand .cse5 (_ bv2048 32)) (_ bv12 32)))) (bvor (bvshl (bvand .cse4 (_ bv4096 32)) (_ bv12 32)) (bvshl (bvand .cse5 (_ bv4096 32)) (_ bv13 32)))) (bvor (bvshl (bvand .cse4 (_ bv8192 32)) (_ bv13 32)) (bvshl (bvand .cse5 (_ bv8192 32)) (_ bv14 32)))) (bvor (bvshl (bvand .cse4 (_ bv16384 32)) (_ bv14 32)) (bvshl (bvand .cse5 (_ bv16384 32)) (_ bv15 32)))) (bvor (bvshl (bvand .cse4 (_ bv32768 32)) (_ bv15 32)) (bvshl (bvand .cse5 (_ bv32768 32)) (_ bv16 32))))) main_~z~0) (or .cse6 (not .cse7)) (or .cse0 (not .cse8)) (exists ((main_~y~0 (_ BitVec 16)) (main_~x~0 (_ BitVec 16))) (let ((.cse12 ((_ zero_extend 16) main_~x~0)) (.cse16 ((_ zero_extend 16) main_~y~0))) (and (= (bvor (bvand (_ bv1431655765 32) (let ((.cse9 (bvand (_ bv858993459 32) (let ((.cse10 (bvand (_ bv252645135 32) (let ((.cse11 (bvand (_ bv16711935 32) (bvor .cse12 (bvshl .cse12 (_ bv8 32)))))) (bvor .cse11 (bvshl .cse11 (_ bv4 32))))))) (bvor .cse10 (bvshl .cse10 (_ bv2 32))))))) (bvor .cse9 (bvshl .cse9 (_ bv1 32))))) (bvshl (bvand (_ bv1431655765 32) (let ((.cse13 (bvand (_ bv858993459 32) (let ((.cse14 (bvand (_ bv252645135 32) (let ((.cse15 (bvand (_ bv16711935 32) (bvor .cse16 (bvshl .cse16 (_ bv8 32)))))) (bvor .cse15 (bvshl .cse15 (_ bv4 32))))))) (bvor .cse14 (bvshl .cse14 (_ bv2 32))))))) (bvor .cse13 (bvshl .cse13 (_ bv1 32))))) (_ bv1 32))) main_~zz~0) (= (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (_ bv0 32) (bvor (bvshl (bvand .cse12 (_ bv1 32)) (_ bv0 32)) (bvshl (bvand .cse16 (_ bv1 32)) (_ bv1 32)))) (bvor (bvshl (bvand .cse12 (_ bv2 32)) (_ bv1 32)) (bvshl (bvand .cse16 (_ bv2 32)) (_ bv2 32)))) (bvor (bvshl (bvand .cse12 (_ bv4 32)) (_ bv2 32)) (bvshl (bvand .cse16 (_ bv4 32)) (_ bv3 32)))) (bvor (bvshl (bvand .cse12 (_ bv8 32)) (_ bv3 32)) (bvshl (bvand .cse16 (_ bv8 32)) (_ bv4 32)))) (bvor (bvshl (bvand .cse12 (_ bv16 32)) (_ bv4 32)) (bvshl (bvand .cse16 (_ bv16 32)) (_ bv5 32)))) (bvor (bvshl (bvand .cse12 (_ bv32 32)) (_ bv5 32)) (bvshl (bvand .cse16 (_ bv32 32)) (_ bv6 32)))) (bvor (bvshl (bvand .cse12 (_ bv64 32)) (_ bv6 32)) (bvshl (bvand .cse16 (_ bv64 32)) (_ bv7 32)))) (bvor (bvshl (bvand .cse12 (_ bv128 32)) (_ bv7 32)) (bvshl (bvand .cse16 (_ bv128 32)) (_ bv8 32)))) (bvor (bvshl (bvand .cse12 (_ bv256 32)) (_ bv8 32)) (bvshl (bvand .cse16 (_ bv256 32)) (_ bv9 32)))) (bvor (bvshl (bvand .cse12 (_ bv512 32)) (_ bv9 32)) (bvshl (bvand .cse16 (_ bv512 32)) (_ bv10 32)))) (bvor (bvshl (bvand .cse12 (_ bv1024 32)) (_ bv10 32)) (bvshl (bvand .cse16 (_ bv1024 32)) (_ bv11 32)))) (bvor (bvshl (bvand .cse12 (_ bv2048 32)) (_ bv11 32)) (bvshl (bvand .cse16 (_ bv2048 32)) (_ bv12 32)))) (bvor (bvshl (bvand .cse12 (_ bv4096 32)) (_ bv12 32)) (bvshl (bvand .cse16 (_ bv4096 32)) (_ bv13 32)))) (bvor (bvshl (bvand .cse12 (_ bv8192 32)) (_ bv13 32)) (bvshl (bvand .cse16 (_ bv8192 32)) (_ bv14 32)))) (bvor (bvshl (bvand .cse12 (_ bv16384 32)) (_ bv14 32)) (bvshl (bvand .cse16 (_ bv16384 32)) (_ bv15 32)))) (bvor (bvshl (bvand .cse12 (_ bv32768 32)) (_ bv15 32)) (bvshl (bvand .cse16 (_ bv32768 32)) (_ bv16 32)))) main_~z~0)))) (or .cse8 (not .cse17)) (or (not .cse18) .cse17) (or .cse7 (not (bvult main_~i~0 (_ bv16 32)))) (or (bvult (bvadd main_~i~0 (_ bv10 32)) (_ bv16 32)) (not .cse3)) (or (not .cse6) .cse18))) [2018-12-02 14:50:09,646 INFO L448 ceAbstractionStarter]: For program point mainFINAL(lines 21 48) no Hoare annotation was computed. [2018-12-02 14:50:09,647 INFO L451 ceAbstractionStarter]: At program point __VERIFIER_assertENTRY(lines 4 9) the Hoare annotation is: true [2018-12-02 14:50:09,647 INFO L448 ceAbstractionStarter]: For program point __VERIFIER_assertEXIT(lines 4 9) no Hoare annotation was computed. [2018-12-02 14:50:09,647 INFO L448 ceAbstractionStarter]: For program point L6(line 6) no Hoare annotation was computed. [2018-12-02 14:50:09,647 INFO L448 ceAbstractionStarter]: For program point L5(lines 5 7) no Hoare annotation was computed. [2018-12-02 14:50:09,647 INFO L448 ceAbstractionStarter]: For program point __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION(line 6) no Hoare annotation was computed. [2018-12-02 14:50:09,647 INFO L448 ceAbstractionStarter]: For program point L5-2(lines 4 9) no Hoare annotation was computed. [2018-12-02 14:50:09,667 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 02:50:09 BoogieIcfgContainer [2018-12-02 14:50:09,667 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-02 14:50:09,667 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-02 14:50:09,667 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-02 14:50:09,667 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-02 14:50:09,668 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 02:48:14" (3/4) ... [2018-12-02 14:50:09,671 INFO L144 WitnessPrinter]: Generating witness for correct program [2018-12-02 14:50:09,676 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ULTIMATE.init [2018-12-02 14:50:09,677 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure main [2018-12-02 14:50:09,677 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure __VERIFIER_assert [2018-12-02 14:50:09,680 INFO L905 BoogieBacktranslator]: Reduced CFG by removing 7 nodes and edges [2018-12-02 14:50:09,680 INFO L905 BoogieBacktranslator]: Reduced CFG by removing 2 nodes and edges [2018-12-02 14:50:09,680 INFO L905 BoogieBacktranslator]: Reduced CFG by removing 1 nodes and edges [2018-12-02 14:50:09,712 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_81fb199f-1cc6-4b79-a6b7-27aa135e8299/bin-2019/utaipan/witness.graphml [2018-12-02 14:50:09,712 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-02 14:50:09,713 INFO L168 Benchmark]: Toolchain (without parser) took 116029.70 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 246.9 MB). Free memory was 943.4 MB in the beginning and 1.1 GB in the end (delta: -115.0 MB). Peak memory consumption was 131.9 MB. Max. memory is 11.5 GB. [2018-12-02 14:50:09,713 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 14:50:09,713 INFO L168 Benchmark]: CACSL2BoogieTranslator took 131.91 ms. Allocated memory is still 1.0 GB. Free memory was 943.4 MB in the beginning and 932.6 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. [2018-12-02 14:50:09,713 INFO L168 Benchmark]: Boogie Procedure Inliner took 13.70 ms. Allocated memory is still 1.0 GB. Free memory is still 932.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 14:50:09,714 INFO L168 Benchmark]: Boogie Preprocessor took 14.71 ms. Allocated memory is still 1.0 GB. Free memory was 932.6 MB in the beginning and 927.3 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-12-02 14:50:09,714 INFO L168 Benchmark]: RCFGBuilder took 167.53 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 118.5 MB). Free memory was 927.3 MB in the beginning and 1.1 GB in the end (delta: -167.6 MB). Peak memory consumption was 13.6 MB. Max. memory is 11.5 GB. [2018-12-02 14:50:09,714 INFO L168 Benchmark]: TraceAbstraction took 115654.13 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 128.5 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 27.4 MB). Peak memory consumption was 155.9 MB. Max. memory is 11.5 GB. [2018-12-02 14:50:09,714 INFO L168 Benchmark]: Witness Printer took 44.91 ms. Allocated memory is still 1.3 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 9.1 MB). Peak memory consumption was 9.1 MB. Max. memory is 11.5 GB. [2018-12-02 14:50:09,716 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 131.91 ms. Allocated memory is still 1.0 GB. Free memory was 943.4 MB in the beginning and 932.6 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 13.70 ms. Allocated memory is still 1.0 GB. Free memory is still 932.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 14.71 ms. Allocated memory is still 1.0 GB. Free memory was 932.6 MB in the beginning and 927.3 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 167.53 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 118.5 MB). Free memory was 927.3 MB in the beginning and 1.1 GB in the end (delta: -167.6 MB). Peak memory consumption was 13.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 115654.13 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 128.5 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 27.4 MB). Peak memory consumption was 155.9 MB. Max. memory is 11.5 GB. * Witness Printer took 44.91 ms. Allocated memory is still 1.3 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 9.1 MB). Peak memory consumption was 9.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - PositiveResult [Line: 6]: call of __VERIFIER_error() unreachable For all program executions holds that call of __VERIFIER_error() unreachable at this location - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold - InvariantResult [Line: 30]: Loop Invariant Derived loop invariant: ((((((((((((((((~bvadd64(i, 4294967286bv32) == 0bv32 && z == ~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 128bv32), 7bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 128bv32), 8bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 256bv32), 8bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 256bv32), 9bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 512bv32), 9bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 512bv32), 10bv32)))) || (~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 128bv32), 7bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 128bv32), 8bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 256bv32), 8bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 256bv32), 9bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 512bv32), 9bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 512bv32), 10bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1024bv32), 10bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1024bv32), 11bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2048bv32), 11bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2048bv32), 12bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4096bv32), 12bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4096bv32), 13bv32))) == z && ~bvadd64(i, 4294967283bv32) == 0bv32)) || (z == ~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 128bv32), 7bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 128bv32), 8bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 256bv32), 8bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 256bv32), 9bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 512bv32), 9bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 512bv32), 10bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1024bv32), 10bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1024bv32), 11bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2048bv32), 11bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2048bv32), 12bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4096bv32), 12bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4096bv32), 13bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8192bv32), 13bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8192bv32), 14bv32))) && ~bvadd64(i, 4294967282bv32) == 0bv32)) || ~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 128bv32), 7bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 128bv32), 8bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 256bv32), 8bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 256bv32), 9bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 512bv32), 9bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 512bv32), 10bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1024bv32), 10bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1024bv32), 11bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2048bv32), 11bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2048bv32), 12bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4096bv32), 12bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4096bv32), 13bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8192bv32), 13bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8192bv32), 14bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16384bv32), 14bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16384bv32), 15bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32768bv32), 15bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32768bv32), 16bv32))) == z) || (~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 128bv32), 7bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 128bv32), 8bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 256bv32), 8bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 256bv32), 9bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 512bv32), 9bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 512bv32), 10bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1024bv32), 10bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1024bv32), 11bv32))) == z && ~bvadd64(i, 4294967285bv32) == 0bv32)) || (z == 0bv32 && i == 0bv32)) || (~bvadd64(i, 4294967293bv32) == 0bv32 && z == ~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), ~bvadd64(i, 4294967295bv32)), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), i))))) || (z == ~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 128bv32), 7bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 128bv32), 8bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 256bv32), 8bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 256bv32), 9bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 512bv32), 9bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 512bv32), 10bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1024bv32), 10bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1024bv32), 11bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), ~bvadd64(i, 4294967295bv32)), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), i))) && 12bv32 == i)) || (z == ~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))) && ~bvadd64(i, 4294967292bv32) == 0bv32)) || (z == ~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))) && ~bvadd64(i, 4294967295bv32) == 0bv32)) || (z == ~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))) && ~bvadd64(i, 4294967289bv32) == 0bv32)) || (~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 128bv32), 7bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 128bv32), 8bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 256bv32), 8bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 256bv32), 9bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 512bv32), 9bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 512bv32), 10bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1024bv32), 10bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1024bv32), 11bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2048bv32), 11bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2048bv32), 12bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4096bv32), 12bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4096bv32), 13bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8192bv32), 13bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8192bv32), 14bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), ~bvadd64(i, 4294967295bv32)), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), i))) == z && 15bv32 == i)) || (~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), ~bvadd64(i, 4294967295bv32)), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), i))) == z && 8bv32 == i)) || (~bvadd64(i, 4294967291bv32) == 0bv32 && ~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), ~bvadd64(i, 4294967295bv32)), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), i))) == z)) || (~bvadd64(i, 4294967287bv32) == 0bv32 && z == ~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 128bv32), 7bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 128bv32), 8bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 256bv32), 8bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 256bv32), 9bv32))))) || (z == ~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))) && 2bv32 == i)) || (z == ~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), ~bvshl32(1bv32, ~bvadd64(i, 4294967294bv32))), ~bvadd64(i, 4294967294bv32)), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), ~bvshl32(1bv32, ~bvadd64(i, 4294967294bv32))), ~bvadd64(i, 4294967295bv32)))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), ~bvadd64(i, 4294967295bv32)), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), i))) && ~bvadd64(i, 4294967290bv32) == 0bv32) - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 18 locations, 1 error locations. SAFE Result, 115.6s OverallTime, 5 OverallIterations, 16 TraceHistogramMax, 9.3s AutomataDifference, 0.0s DeadEndRemovalTime, 1.9s HoareAnnotationTime, HoareTripleCheckerStatistics: 56 SDtfs, 26 SDslu, 262 SDs, 0 SdLazy, 651 SolverSat, 79 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 268 GetRequests, 164 SyntacticMatches, 4 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 216 ImplicationChecksByTransitivity, 106.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=34occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 5 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 7 LocationsWithAnnotation, 11 PreInvPairs, 34 NumberOfFragments, 2913 HoareAnnotationTreeSize, 11 FomulaSimplifications, 1461 FormulaSimplificationTreeSizeReduction, 0.0s HoareSimplificationTime, 7 FomulaSimplificationsInter, 400 FormulaSimplificationTreeSizeReductionInter, 1.8s HoareSimplificationTimeInter, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 103.6s InterpolantComputationTime, 134 NumberOfCodeBlocks, 134 NumberOfCodeBlocksAsserted, 20 NumberOfCheckSat, 242 ConstructedInterpolants, 1 QuantifiedInterpolants, 279489 SizeOfPredicates, 15 NumberOfNonLiveVariables, 330 ConjunctsInSsa, 89 ConjunctsInUnsatCore, 15 InterpolantComputations, 2 PerfectInterpolantSequences, 136/536 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be correct! Received shutdown request...