./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/psyco/psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/psyco/psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c -s /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 747981090a474d9d2269aea1ffd03eef2ddc8848 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-03 07:36:15,486 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-03 07:36:15,487 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-03 07:36:15,493 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-03 07:36:15,494 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-03 07:36:15,494 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-03 07:36:15,495 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-03 07:36:15,496 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-03 07:36:15,496 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-03 07:36:15,497 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-03 07:36:15,497 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-03 07:36:15,497 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-03 07:36:15,498 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-03 07:36:15,498 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-03 07:36:15,499 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-03 07:36:15,499 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-03 07:36:15,500 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-03 07:36:15,500 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-03 07:36:15,501 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-03 07:36:15,502 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-03 07:36:15,503 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-03 07:36:15,503 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-03 07:36:15,504 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-03 07:36:15,504 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-03 07:36:15,505 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-03 07:36:15,505 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-03 07:36:15,505 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-03 07:36:15,506 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-03 07:36:15,506 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-03 07:36:15,507 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-03 07:36:15,507 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-03 07:36:15,507 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-03 07:36:15,507 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-03 07:36:15,508 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-03 07:36:15,508 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-03 07:36:15,508 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-03 07:36:15,509 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-12-03 07:36:15,516 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-03 07:36:15,516 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-03 07:36:15,517 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-03 07:36:15,517 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-03 07:36:15,517 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-03 07:36:15,517 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-03 07:36:15,517 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-03 07:36:15,517 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-03 07:36:15,517 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-03 07:36:15,517 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-03 07:36:15,517 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-03 07:36:15,517 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-03 07:36:15,517 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-03 07:36:15,518 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-03 07:36:15,518 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-03 07:36:15,518 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-03 07:36:15,518 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-03 07:36:15,518 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-03 07:36:15,518 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-03 07:36:15,518 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-03 07:36:15,518 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-03 07:36:15,518 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-03 07:36:15,518 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-03 07:36:15,519 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-03 07:36:15,519 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-03 07:36:15,519 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-03 07:36:15,519 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-03 07:36:15,519 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-03 07:36:15,519 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-03 07:36:15,519 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-03 07:36:15,519 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-03 07:36:15,519 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-03 07:36:15,519 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-03 07:36:15,519 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-03 07:36:15,519 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-03 07:36:15,519 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-03 07:36:15,520 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 747981090a474d9d2269aea1ffd03eef2ddc8848 [2018-12-03 07:36:15,536 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-03 07:36:15,543 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-03 07:36:15,545 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-03 07:36:15,546 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-03 07:36:15,546 INFO L276 PluginConnector]: CDTParser initialized [2018-12-03 07:36:15,547 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/../../sv-benchmarks/c/psyco/psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c [2018-12-03 07:36:15,581 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/data/6081a6cdc/2895973eb4574a8099629bebd8e8bdc3/FLAGfc39c322c [2018-12-03 07:36:16,042 INFO L307 CDTParser]: Found 1 translation units. [2018-12-03 07:36:16,043 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/sv-benchmarks/c/psyco/psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c [2018-12-03 07:36:16,049 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/data/6081a6cdc/2895973eb4574a8099629bebd8e8bdc3/FLAGfc39c322c [2018-12-03 07:36:16,057 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/data/6081a6cdc/2895973eb4574a8099629bebd8e8bdc3 [2018-12-03 07:36:16,059 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-03 07:36:16,060 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-03 07:36:16,061 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-03 07:36:16,061 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-03 07:36:16,063 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-03 07:36:16,063 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.12 07:36:16" (1/1) ... [2018-12-03 07:36:16,065 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4040b4f8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:36:16, skipping insertion in model container [2018-12-03 07:36:16,065 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.12 07:36:16" (1/1) ... [2018-12-03 07:36:16,069 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-03 07:36:16,088 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-03 07:36:16,221 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-03 07:36:16,224 INFO L191 MainTranslator]: Completed pre-run [2018-12-03 07:36:16,258 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-03 07:36:16,298 INFO L195 MainTranslator]: Completed translation [2018-12-03 07:36:16,298 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:36:16 WrapperNode [2018-12-03 07:36:16,298 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-03 07:36:16,299 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-03 07:36:16,299 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-03 07:36:16,299 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-03 07:36:16,304 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:36:16" (1/1) ... [2018-12-03 07:36:16,310 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:36:16" (1/1) ... [2018-12-03 07:36:16,314 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-03 07:36:16,314 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-03 07:36:16,314 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-03 07:36:16,315 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-03 07:36:16,320 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:36:16" (1/1) ... [2018-12-03 07:36:16,320 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:36:16" (1/1) ... [2018-12-03 07:36:16,322 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:36:16" (1/1) ... [2018-12-03 07:36:16,322 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:36:16" (1/1) ... [2018-12-03 07:36:16,331 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:36:16" (1/1) ... [2018-12-03 07:36:16,337 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:36:16" (1/1) ... [2018-12-03 07:36:16,339 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:36:16" (1/1) ... [2018-12-03 07:36:16,341 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-03 07:36:16,341 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-03 07:36:16,341 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-03 07:36:16,342 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-03 07:36:16,342 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:36:16" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-03 07:36:16,373 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-03 07:36:16,373 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-03 07:36:16,373 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-03 07:36:16,373 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-03 07:36:16,373 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-03 07:36:16,374 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-03 07:36:16,752 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-03 07:36:16,752 INFO L280 CfgBuilder]: Removed 2 assue(true) statements. [2018-12-03 07:36:16,752 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 07:36:16 BoogieIcfgContainer [2018-12-03 07:36:16,752 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-03 07:36:16,753 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-03 07:36:16,753 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-03 07:36:16,755 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-03 07:36:16,755 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.12 07:36:16" (1/3) ... [2018-12-03 07:36:16,755 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f5ec745 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.12 07:36:16, skipping insertion in model container [2018-12-03 07:36:16,755 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:36:16" (2/3) ... [2018-12-03 07:36:16,755 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f5ec745 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.12 07:36:16, skipping insertion in model container [2018-12-03 07:36:16,755 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 07:36:16" (3/3) ... [2018-12-03 07:36:16,756 INFO L112 eAbstractionObserver]: Analyzing ICFG psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c [2018-12-03 07:36:16,762 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-03 07:36:16,767 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-12-03 07:36:16,776 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-12-03 07:36:16,794 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-03 07:36:16,794 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-03 07:36:16,794 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-03 07:36:16,794 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-03 07:36:16,794 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-03 07:36:16,794 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-03 07:36:16,794 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-03 07:36:16,795 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-03 07:36:16,805 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states. [2018-12-03 07:36:16,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-12-03 07:36:16,809 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:16,809 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:16,811 INFO L423 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:16,814 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:16,814 INFO L82 PathProgramCache]: Analyzing trace with hash 919157391, now seen corresponding path program 1 times [2018-12-03 07:36:16,815 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:16,843 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:16,843 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:16,843 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:16,844 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:16,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:16,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:16,906 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:36:16,906 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-03 07:36:16,906 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:36:16,909 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 07:36:16,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 07:36:16,917 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:36:16,918 INFO L87 Difference]: Start difference. First operand 115 states. Second operand 3 states. [2018-12-03 07:36:17,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:17,078 INFO L93 Difference]: Finished difference Result 331 states and 635 transitions. [2018-12-03 07:36:17,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 07:36:17,079 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2018-12-03 07:36:17,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:17,087 INFO L225 Difference]: With dead ends: 331 [2018-12-03 07:36:17,087 INFO L226 Difference]: Without dead ends: 206 [2018-12-03 07:36:17,089 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:36:17,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-12-03 07:36:17,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 182. [2018-12-03 07:36:17,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-12-03 07:36:17,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 314 transitions. [2018-12-03 07:36:17,118 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 314 transitions. Word has length 14 [2018-12-03 07:36:17,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:17,118 INFO L480 AbstractCegarLoop]: Abstraction has 182 states and 314 transitions. [2018-12-03 07:36:17,118 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 07:36:17,119 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 314 transitions. [2018-12-03 07:36:17,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-12-03 07:36:17,119 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:17,119 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:17,119 INFO L423 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:17,119 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:17,120 INFO L82 PathProgramCache]: Analyzing trace with hash 736602936, now seen corresponding path program 1 times [2018-12-03 07:36:17,120 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:17,120 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:17,120 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:17,120 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:17,120 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:17,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:17,147 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:17,147 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:36:17,147 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-03 07:36:17,147 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:36:17,149 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 07:36:17,149 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 07:36:17,149 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:36:17,149 INFO L87 Difference]: Start difference. First operand 182 states and 314 transitions. Second operand 3 states. [2018-12-03 07:36:17,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:17,178 INFO L93 Difference]: Finished difference Result 365 states and 632 transitions. [2018-12-03 07:36:17,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 07:36:17,179 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 15 [2018-12-03 07:36:17,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:17,180 INFO L225 Difference]: With dead ends: 365 [2018-12-03 07:36:17,180 INFO L226 Difference]: Without dead ends: 189 [2018-12-03 07:36:17,181 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:36:17,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-12-03 07:36:17,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 189. [2018-12-03 07:36:17,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2018-12-03 07:36:17,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 322 transitions. [2018-12-03 07:36:17,188 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 322 transitions. Word has length 15 [2018-12-03 07:36:17,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:17,188 INFO L480 AbstractCegarLoop]: Abstraction has 189 states and 322 transitions. [2018-12-03 07:36:17,188 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 07:36:17,188 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 322 transitions. [2018-12-03 07:36:17,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-03 07:36:17,189 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:17,189 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:17,189 INFO L423 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:17,189 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:17,189 INFO L82 PathProgramCache]: Analyzing trace with hash 816788357, now seen corresponding path program 1 times [2018-12-03 07:36:17,189 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:17,190 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:17,190 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:17,190 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:17,190 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:17,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:17,381 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:17,381 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:36:17,381 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-03 07:36:17,381 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:36:17,382 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 07:36:17,382 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 07:36:17,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-03 07:36:17,382 INFO L87 Difference]: Start difference. First operand 189 states and 322 transitions. Second operand 4 states. [2018-12-03 07:36:17,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:17,539 INFO L93 Difference]: Finished difference Result 290 states and 484 transitions. [2018-12-03 07:36:17,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 07:36:17,539 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 21 [2018-12-03 07:36:17,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:17,540 INFO L225 Difference]: With dead ends: 290 [2018-12-03 07:36:17,540 INFO L226 Difference]: Without dead ends: 274 [2018-12-03 07:36:17,541 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-03 07:36:17,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274 states. [2018-12-03 07:36:17,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274 to 259. [2018-12-03 07:36:17,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 259 states. [2018-12-03 07:36:17,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 259 states to 259 states and 436 transitions. [2018-12-03 07:36:17,550 INFO L78 Accepts]: Start accepts. Automaton has 259 states and 436 transitions. Word has length 21 [2018-12-03 07:36:17,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:17,550 INFO L480 AbstractCegarLoop]: Abstraction has 259 states and 436 transitions. [2018-12-03 07:36:17,550 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 07:36:17,550 INFO L276 IsEmpty]: Start isEmpty. Operand 259 states and 436 transitions. [2018-12-03 07:36:17,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-12-03 07:36:17,550 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:17,551 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:17,551 INFO L423 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:17,551 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:17,551 INFO L82 PathProgramCache]: Analyzing trace with hash -1993084704, now seen corresponding path program 1 times [2018-12-03 07:36:17,551 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:17,552 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:17,552 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:17,552 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:17,552 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:17,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:17,569 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:17,569 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:36:17,569 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-03 07:36:17,570 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:36:17,570 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 07:36:17,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 07:36:17,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:36:17,570 INFO L87 Difference]: Start difference. First operand 259 states and 436 transitions. Second operand 3 states. [2018-12-03 07:36:17,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:17,590 INFO L93 Difference]: Finished difference Result 468 states and 791 transitions. [2018-12-03 07:36:17,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 07:36:17,590 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 22 [2018-12-03 07:36:17,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:17,592 INFO L225 Difference]: With dead ends: 468 [2018-12-03 07:36:17,592 INFO L226 Difference]: Without dead ends: 216 [2018-12-03 07:36:17,593 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:36:17,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-12-03 07:36:17,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 214. [2018-12-03 07:36:17,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-12-03 07:36:17,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 355 transitions. [2018-12-03 07:36:17,602 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 355 transitions. Word has length 22 [2018-12-03 07:36:17,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:17,603 INFO L480 AbstractCegarLoop]: Abstraction has 214 states and 355 transitions. [2018-12-03 07:36:17,603 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 07:36:17,603 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 355 transitions. [2018-12-03 07:36:17,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-12-03 07:36:17,604 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:17,604 INFO L402 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:17,604 INFO L423 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:17,605 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:17,605 INFO L82 PathProgramCache]: Analyzing trace with hash -365898165, now seen corresponding path program 1 times [2018-12-03 07:36:17,605 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:17,606 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:17,606 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:17,606 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:17,606 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:17,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:17,640 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 11 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:17,641 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:17,641 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:17,642 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 29 with the following transitions: [2018-12-03 07:36:17,643 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [17], [19], [23], [26], [29], [34], [41], [44], [47], [50], [53], [55], [525], [528], [529], [530] [2018-12-03 07:36:17,672 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:17,673 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:17,876 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:17,877 INFO L272 AbstractInterpreter]: Visited 21 different actions 41 times. Merged at 9 different actions 15 times. Never widened. Performed 491 root evaluator evaluations with a maximum evaluation depth of 10. Performed 491 inverse root evaluator evaluations with a maximum inverse evaluation depth of 10. Found 5 fixpoints after 3 different actions. Largest state had 38 variables. [2018-12-03 07:36:17,882 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:17,883 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:17,883 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:17,883 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:17,892 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:17,893 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:17,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:17,928 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:17,952 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-03 07:36:17,953 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:17,966 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-03 07:36:17,980 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-03 07:36:17,980 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [4] total 6 [2018-12-03 07:36:17,980 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:36:17,981 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 07:36:17,981 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 07:36:17,981 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-03 07:36:17,981 INFO L87 Difference]: Start difference. First operand 214 states and 355 transitions. Second operand 3 states. [2018-12-03 07:36:18,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:18,009 INFO L93 Difference]: Finished difference Result 389 states and 646 transitions. [2018-12-03 07:36:18,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 07:36:18,009 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2018-12-03 07:36:18,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:18,010 INFO L225 Difference]: With dead ends: 389 [2018-12-03 07:36:18,010 INFO L226 Difference]: Without dead ends: 182 [2018-12-03 07:36:18,010 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-03 07:36:18,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-12-03 07:36:18,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 180. [2018-12-03 07:36:18,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-12-03 07:36:18,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 291 transitions. [2018-12-03 07:36:18,015 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 291 transitions. Word has length 28 [2018-12-03 07:36:18,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:18,015 INFO L480 AbstractCegarLoop]: Abstraction has 180 states and 291 transitions. [2018-12-03 07:36:18,015 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 07:36:18,015 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 291 transitions. [2018-12-03 07:36:18,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-12-03 07:36:18,016 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:18,016 INFO L402 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:18,016 INFO L423 AbstractCegarLoop]: === Iteration 6 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:18,016 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:18,016 INFO L82 PathProgramCache]: Analyzing trace with hash -1624798356, now seen corresponding path program 1 times [2018-12-03 07:36:18,016 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:18,017 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:18,017 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:18,017 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:18,017 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:18,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:18,054 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:18,055 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:18,055 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:18,055 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 31 with the following transitions: [2018-12-03 07:36:18,055 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [17], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [238], [241], [244], [525], [528], [529], [530] [2018-12-03 07:36:18,056 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:18,056 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:18,144 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:18,145 INFO L272 AbstractInterpreter]: Visited 26 different actions 54 times. Merged at 16 different actions 22 times. Never widened. Performed 579 root evaluator evaluations with a maximum evaluation depth of 9. Performed 579 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 5 fixpoints after 2 different actions. Largest state had 39 variables. [2018-12-03 07:36:18,150 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:18,150 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:18,150 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:18,150 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:18,158 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:18,158 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:18,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:18,178 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:18,194 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:18,194 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:18,211 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:18,235 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:18,235 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 6 [2018-12-03 07:36:18,235 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:18,235 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 07:36:18,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 07:36:18,236 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-03 07:36:18,236 INFO L87 Difference]: Start difference. First operand 180 states and 291 transitions. Second operand 6 states. [2018-12-03 07:36:18,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:18,469 INFO L93 Difference]: Finished difference Result 690 states and 1121 transitions. [2018-12-03 07:36:18,469 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-03 07:36:18,469 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-12-03 07:36:18,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:18,471 INFO L225 Difference]: With dead ends: 690 [2018-12-03 07:36:18,471 INFO L226 Difference]: Without dead ends: 507 [2018-12-03 07:36:18,472 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 61 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-12-03 07:36:18,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 507 states. [2018-12-03 07:36:18,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 507 to 438. [2018-12-03 07:36:18,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 438 states. [2018-12-03 07:36:18,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 438 states to 438 states and 730 transitions. [2018-12-03 07:36:18,479 INFO L78 Accepts]: Start accepts. Automaton has 438 states and 730 transitions. Word has length 30 [2018-12-03 07:36:18,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:18,479 INFO L480 AbstractCegarLoop]: Abstraction has 438 states and 730 transitions. [2018-12-03 07:36:18,480 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 07:36:18,480 INFO L276 IsEmpty]: Start isEmpty. Operand 438 states and 730 transitions. [2018-12-03 07:36:18,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-12-03 07:36:18,480 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:18,480 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:18,481 INFO L423 AbstractCegarLoop]: === Iteration 7 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:18,481 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:18,481 INFO L82 PathProgramCache]: Analyzing trace with hash 789275061, now seen corresponding path program 1 times [2018-12-03 07:36:18,481 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:18,482 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:18,482 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:18,482 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:18,482 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:18,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:18,563 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:18,564 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:18,564 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:18,564 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 32 with the following transitions: [2018-12-03 07:36:18,564 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [250], [253], [256], [259], [525], [528], [529], [530] [2018-12-03 07:36:18,566 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:18,566 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:18,620 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:18,621 INFO L272 AbstractInterpreter]: Visited 26 different actions 39 times. Merged at 8 different actions 10 times. Never widened. Performed 465 root evaluator evaluations with a maximum evaluation depth of 9. Performed 465 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 3 fixpoints after 3 different actions. Largest state had 40 variables. [2018-12-03 07:36:18,622 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:18,623 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:18,623 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:18,623 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:18,631 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:18,632 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:18,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:18,655 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:18,677 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:18,678 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:18,711 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:18,725 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:18,726 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 8 [2018-12-03 07:36:18,726 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:18,726 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 07:36:18,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 07:36:18,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-12-03 07:36:18,726 INFO L87 Difference]: Start difference. First operand 438 states and 730 transitions. Second operand 6 states. [2018-12-03 07:36:18,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:18,802 INFO L93 Difference]: Finished difference Result 495 states and 817 transitions. [2018-12-03 07:36:18,802 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-03 07:36:18,802 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 31 [2018-12-03 07:36:18,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:18,804 INFO L225 Difference]: With dead ends: 495 [2018-12-03 07:36:18,804 INFO L226 Difference]: Without dead ends: 490 [2018-12-03 07:36:18,805 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 59 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-12-03 07:36:18,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 490 states. [2018-12-03 07:36:18,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 490 to 484. [2018-12-03 07:36:18,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 484 states. [2018-12-03 07:36:18,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 484 states to 484 states and 802 transitions. [2018-12-03 07:36:18,817 INFO L78 Accepts]: Start accepts. Automaton has 484 states and 802 transitions. Word has length 31 [2018-12-03 07:36:18,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:18,817 INFO L480 AbstractCegarLoop]: Abstraction has 484 states and 802 transitions. [2018-12-03 07:36:18,817 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 07:36:18,817 INFO L276 IsEmpty]: Start isEmpty. Operand 484 states and 802 transitions. [2018-12-03 07:36:18,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-03 07:36:18,818 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:18,818 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:18,818 INFO L423 AbstractCegarLoop]: === Iteration 8 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:18,819 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:18,819 INFO L82 PathProgramCache]: Analyzing trace with hash 2038890699, now seen corresponding path program 1 times [2018-12-03 07:36:18,819 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:18,819 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:18,820 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:18,820 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:18,820 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:18,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:18,846 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-03 07:36:18,847 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:36:18,847 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-03 07:36:18,847 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:36:18,847 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 07:36:18,847 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 07:36:18,847 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:36:18,847 INFO L87 Difference]: Start difference. First operand 484 states and 802 transitions. Second operand 3 states. [2018-12-03 07:36:18,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:18,867 INFO L93 Difference]: Finished difference Result 949 states and 1566 transitions. [2018-12-03 07:36:18,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 07:36:18,867 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 32 [2018-12-03 07:36:18,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:18,868 INFO L225 Difference]: With dead ends: 949 [2018-12-03 07:36:18,868 INFO L226 Difference]: Without dead ends: 495 [2018-12-03 07:36:18,869 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:36:18,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 495 states. [2018-12-03 07:36:18,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 495 to 493. [2018-12-03 07:36:18,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 493 states. [2018-12-03 07:36:18,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 493 states to 493 states and 794 transitions. [2018-12-03 07:36:18,876 INFO L78 Accepts]: Start accepts. Automaton has 493 states and 794 transitions. Word has length 32 [2018-12-03 07:36:18,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:18,876 INFO L480 AbstractCegarLoop]: Abstraction has 493 states and 794 transitions. [2018-12-03 07:36:18,876 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 07:36:18,877 INFO L276 IsEmpty]: Start isEmpty. Operand 493 states and 794 transitions. [2018-12-03 07:36:18,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-03 07:36:18,877 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:18,877 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:18,877 INFO L423 AbstractCegarLoop]: === Iteration 9 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:18,877 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:18,877 INFO L82 PathProgramCache]: Analyzing trace with hash 820851006, now seen corresponding path program 1 times [2018-12-03 07:36:18,878 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:18,878 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:18,878 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:18,878 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:18,878 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:18,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:18,896 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 07:36:18,896 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:36:18,896 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-03 07:36:18,896 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:36:18,896 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 07:36:18,896 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 07:36:18,896 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:36:18,896 INFO L87 Difference]: Start difference. First operand 493 states and 794 transitions. Second operand 3 states. [2018-12-03 07:36:18,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:18,924 INFO L93 Difference]: Finished difference Result 939 states and 1525 transitions. [2018-12-03 07:36:18,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 07:36:18,924 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2018-12-03 07:36:18,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:18,925 INFO L225 Difference]: With dead ends: 939 [2018-12-03 07:36:18,925 INFO L226 Difference]: Without dead ends: 495 [2018-12-03 07:36:18,926 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:36:18,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 495 states. [2018-12-03 07:36:18,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 495 to 493. [2018-12-03 07:36:18,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 493 states. [2018-12-03 07:36:18,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 493 states to 493 states and 788 transitions. [2018-12-03 07:36:18,933 INFO L78 Accepts]: Start accepts. Automaton has 493 states and 788 transitions. Word has length 40 [2018-12-03 07:36:18,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:18,933 INFO L480 AbstractCegarLoop]: Abstraction has 493 states and 788 transitions. [2018-12-03 07:36:18,934 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 07:36:18,934 INFO L276 IsEmpty]: Start isEmpty. Operand 493 states and 788 transitions. [2018-12-03 07:36:18,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-12-03 07:36:18,934 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:18,934 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:18,934 INFO L423 AbstractCegarLoop]: === Iteration 10 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:18,934 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:18,934 INFO L82 PathProgramCache]: Analyzing trace with hash -1867136664, now seen corresponding path program 1 times [2018-12-03 07:36:18,935 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:18,935 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:18,935 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:18,935 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:18,935 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:18,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:19,027 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:19,027 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:19,027 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:19,027 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 42 with the following transitions: [2018-12-03 07:36:19,027 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [250], [253], [256], [261], [328], [331], [334], [337], [340], [525], [528], [529], [530] [2018-12-03 07:36:19,028 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:19,028 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:19,106 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:19,106 INFO L272 AbstractInterpreter]: Visited 31 different actions 64 times. Merged at 19 different actions 27 times. Never widened. Performed 755 root evaluator evaluations with a maximum evaluation depth of 9. Performed 755 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 6 fixpoints after 5 different actions. Largest state had 41 variables. [2018-12-03 07:36:19,107 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:19,107 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:19,108 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:19,108 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:19,116 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:19,117 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:19,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:19,143 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:19,181 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 8 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-03 07:36:19,181 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:19,300 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 8 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-03 07:36:19,315 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:19,315 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 11 [2018-12-03 07:36:19,315 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:19,315 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-03 07:36:19,316 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-03 07:36:19,316 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2018-12-03 07:36:19,316 INFO L87 Difference]: Start difference. First operand 493 states and 788 transitions. Second operand 8 states. [2018-12-03 07:36:19,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:19,605 INFO L93 Difference]: Finished difference Result 1031 states and 1639 transitions. [2018-12-03 07:36:19,605 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 07:36:19,605 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 41 [2018-12-03 07:36:19,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:19,607 INFO L225 Difference]: With dead ends: 1031 [2018-12-03 07:36:19,607 INFO L226 Difference]: Without dead ends: 580 [2018-12-03 07:36:19,608 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 79 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=129, Unknown=0, NotChecked=0, Total=182 [2018-12-03 07:36:19,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 580 states. [2018-12-03 07:36:19,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 580 to 544. [2018-12-03 07:36:19,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 544 states. [2018-12-03 07:36:19,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 544 states to 544 states and 867 transitions. [2018-12-03 07:36:19,618 INFO L78 Accepts]: Start accepts. Automaton has 544 states and 867 transitions. Word has length 41 [2018-12-03 07:36:19,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:19,618 INFO L480 AbstractCegarLoop]: Abstraction has 544 states and 867 transitions. [2018-12-03 07:36:19,618 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-03 07:36:19,618 INFO L276 IsEmpty]: Start isEmpty. Operand 544 states and 867 transitions. [2018-12-03 07:36:19,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-03 07:36:19,618 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:19,618 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:19,619 INFO L423 AbstractCegarLoop]: === Iteration 11 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:19,619 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:19,619 INFO L82 PathProgramCache]: Analyzing trace with hash -2035215205, now seen corresponding path program 1 times [2018-12-03 07:36:19,619 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:19,619 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:19,619 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:19,619 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:19,619 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:19,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:19,646 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-03 07:36:19,647 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:19,647 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:19,647 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 43 with the following transitions: [2018-12-03 07:36:19,647 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [250], [253], [256], [261], [328], [331], [346], [349], [352], [355], [525], [528], [529], [530] [2018-12-03 07:36:19,648 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:19,648 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:19,735 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:19,735 INFO L272 AbstractInterpreter]: Visited 32 different actions 85 times. Merged at 23 different actions 44 times. Never widened. Performed 1057 root evaluator evaluations with a maximum evaluation depth of 9. Performed 1057 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 9 fixpoints after 6 different actions. Largest state had 42 variables. [2018-12-03 07:36:19,736 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:19,736 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:19,736 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:19,736 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:19,744 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:19,744 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:19,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:19,768 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:19,791 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-03 07:36:19,791 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:19,805 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-03 07:36:19,831 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:19,831 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 4 [2018-12-03 07:36:19,831 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:19,831 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 07:36:19,832 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 07:36:19,832 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 07:36:19,832 INFO L87 Difference]: Start difference. First operand 544 states and 867 transitions. Second operand 4 states. [2018-12-03 07:36:19,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:19,897 INFO L93 Difference]: Finished difference Result 558 states and 879 transitions. [2018-12-03 07:36:19,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-03 07:36:19,897 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 42 [2018-12-03 07:36:19,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:19,899 INFO L225 Difference]: With dead ends: 558 [2018-12-03 07:36:19,899 INFO L226 Difference]: Without dead ends: 546 [2018-12-03 07:36:19,899 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 81 SyntacticMatches, 5 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 07:36:19,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 546 states. [2018-12-03 07:36:19,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 546 to 544. [2018-12-03 07:36:19,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 544 states. [2018-12-03 07:36:19,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 544 states to 544 states and 841 transitions. [2018-12-03 07:36:19,908 INFO L78 Accepts]: Start accepts. Automaton has 544 states and 841 transitions. Word has length 42 [2018-12-03 07:36:19,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:19,908 INFO L480 AbstractCegarLoop]: Abstraction has 544 states and 841 transitions. [2018-12-03 07:36:19,908 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 07:36:19,908 INFO L276 IsEmpty]: Start isEmpty. Operand 544 states and 841 transitions. [2018-12-03 07:36:19,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-12-03 07:36:19,909 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:19,909 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:19,909 INFO L423 AbstractCegarLoop]: === Iteration 12 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:19,909 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:19,909 INFO L82 PathProgramCache]: Analyzing trace with hash -1265387988, now seen corresponding path program 1 times [2018-12-03 07:36:19,909 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:19,910 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:19,910 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:19,910 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:19,910 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:19,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:20,050 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:20,050 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:20,050 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:20,050 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 45 with the following transitions: [2018-12-03 07:36:20,050 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [250], [253], [256], [261], [328], [331], [346], [361], [376], [379], [382], [385], [525], [528], [529], [530] [2018-12-03 07:36:20,052 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:20,052 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:20,108 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:20,108 INFO L272 AbstractInterpreter]: Visited 34 different actions 47 times. Merged at 8 different actions 10 times. Never widened. Performed 549 root evaluator evaluations with a maximum evaluation depth of 9. Performed 549 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 4 fixpoints after 3 different actions. Largest state had 44 variables. [2018-12-03 07:36:20,109 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:20,109 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:20,109 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:20,110 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:20,116 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:20,116 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:20,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:20,136 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:20,148 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:20,148 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:20,234 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:20,249 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:20,250 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 9 [2018-12-03 07:36:20,250 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:20,250 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-03 07:36:20,250 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-03 07:36:20,250 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-12-03 07:36:20,250 INFO L87 Difference]: Start difference. First operand 544 states and 841 transitions. Second operand 7 states. [2018-12-03 07:36:20,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:20,387 INFO L93 Difference]: Finished difference Result 555 states and 849 transitions. [2018-12-03 07:36:20,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-03 07:36:20,387 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 44 [2018-12-03 07:36:20,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:20,388 INFO L225 Difference]: With dead ends: 555 [2018-12-03 07:36:20,388 INFO L226 Difference]: Without dead ends: 553 [2018-12-03 07:36:20,389 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 84 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-12-03 07:36:20,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2018-12-03 07:36:20,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 545. [2018-12-03 07:36:20,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 545 states. [2018-12-03 07:36:20,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 545 states to 545 states and 842 transitions. [2018-12-03 07:36:20,397 INFO L78 Accepts]: Start accepts. Automaton has 545 states and 842 transitions. Word has length 44 [2018-12-03 07:36:20,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:20,398 INFO L480 AbstractCegarLoop]: Abstraction has 545 states and 842 transitions. [2018-12-03 07:36:20,398 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-03 07:36:20,398 INFO L276 IsEmpty]: Start isEmpty. Operand 545 states and 842 transitions. [2018-12-03 07:36:20,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-12-03 07:36:20,398 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:20,398 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:20,398 INFO L423 AbstractCegarLoop]: === Iteration 13 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:20,398 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:20,398 INFO L82 PathProgramCache]: Analyzing trace with hash -447084202, now seen corresponding path program 1 times [2018-12-03 07:36:20,399 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:20,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:20,399 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:20,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:20,399 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:20,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:20,414 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 07:36:20,414 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:36:20,414 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-03 07:36:20,414 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:36:20,414 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 07:36:20,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 07:36:20,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:36:20,415 INFO L87 Difference]: Start difference. First operand 545 states and 842 transitions. Second operand 3 states. [2018-12-03 07:36:20,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:20,437 INFO L93 Difference]: Finished difference Result 1053 states and 1621 transitions. [2018-12-03 07:36:20,437 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 07:36:20,437 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 45 [2018-12-03 07:36:20,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:20,438 INFO L225 Difference]: With dead ends: 1053 [2018-12-03 07:36:20,439 INFO L226 Difference]: Without dead ends: 557 [2018-12-03 07:36:20,439 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:36:20,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 557 states. [2018-12-03 07:36:20,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 557 to 555. [2018-12-03 07:36:20,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 555 states. [2018-12-03 07:36:20,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 835 transitions. [2018-12-03 07:36:20,449 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 835 transitions. Word has length 45 [2018-12-03 07:36:20,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:20,449 INFO L480 AbstractCegarLoop]: Abstraction has 555 states and 835 transitions. [2018-12-03 07:36:20,449 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 07:36:20,449 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 835 transitions. [2018-12-03 07:36:20,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-12-03 07:36:20,449 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:20,449 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:20,449 INFO L423 AbstractCegarLoop]: === Iteration 14 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:20,449 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:20,449 INFO L82 PathProgramCache]: Analyzing trace with hash 1882634818, now seen corresponding path program 1 times [2018-12-03 07:36:20,450 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:20,450 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:20,450 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:20,450 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:20,450 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:20,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:20,467 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-12-03 07:36:20,467 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:36:20,467 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-03 07:36:20,467 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:36:20,468 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 07:36:20,468 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 07:36:20,468 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:36:20,468 INFO L87 Difference]: Start difference. First operand 555 states and 835 transitions. Second operand 3 states. [2018-12-03 07:36:20,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:20,485 INFO L93 Difference]: Finished difference Result 799 states and 1202 transitions. [2018-12-03 07:36:20,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 07:36:20,485 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2018-12-03 07:36:20,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:20,486 INFO L225 Difference]: With dead ends: 799 [2018-12-03 07:36:20,487 INFO L226 Difference]: Without dead ends: 313 [2018-12-03 07:36:20,487 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:36:20,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 313 states. [2018-12-03 07:36:20,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 313 to 311. [2018-12-03 07:36:20,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 311 states. [2018-12-03 07:36:20,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 311 states to 311 states and 454 transitions. [2018-12-03 07:36:20,493 INFO L78 Accepts]: Start accepts. Automaton has 311 states and 454 transitions. Word has length 55 [2018-12-03 07:36:20,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:20,494 INFO L480 AbstractCegarLoop]: Abstraction has 311 states and 454 transitions. [2018-12-03 07:36:20,494 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 07:36:20,494 INFO L276 IsEmpty]: Start isEmpty. Operand 311 states and 454 transitions. [2018-12-03 07:36:20,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-12-03 07:36:20,494 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:20,494 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:20,494 INFO L423 AbstractCegarLoop]: === Iteration 15 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:20,495 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:20,495 INFO L82 PathProgramCache]: Analyzing trace with hash 1573307774, now seen corresponding path program 1 times [2018-12-03 07:36:20,495 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:20,495 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:20,495 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:20,495 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:20,496 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:20,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:20,527 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 23 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-03 07:36:20,527 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:20,527 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:20,527 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 57 with the following transitions: [2018-12-03 07:36:20,527 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [17], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [250], [253], [256], [261], [328], [331], [346], [361], [376], [379], [382], [387], [424], [427], [442], [445], [448], [451], [525], [528], [529], [530] [2018-12-03 07:36:20,529 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:20,529 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:20,613 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:20,613 INFO L272 AbstractInterpreter]: Visited 41 different actions 102 times. Merged at 21 different actions 45 times. Widened at 1 different actions 1 times. Performed 1206 root evaluator evaluations with a maximum evaluation depth of 9. Performed 1206 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 13 fixpoints after 7 different actions. Largest state had 46 variables. [2018-12-03 07:36:20,615 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:20,615 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:20,615 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:20,615 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:20,621 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:20,621 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:20,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:20,648 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:20,651 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 23 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-03 07:36:20,651 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:20,675 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 23 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-03 07:36:20,698 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:20,698 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 8 [2018-12-03 07:36:20,698 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:20,698 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 07:36:20,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 07:36:20,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-12-03 07:36:20,698 INFO L87 Difference]: Start difference. First operand 311 states and 454 transitions. Second operand 5 states. [2018-12-03 07:36:20,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:20,784 INFO L93 Difference]: Finished difference Result 660 states and 968 transitions. [2018-12-03 07:36:20,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 07:36:20,784 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2018-12-03 07:36:20,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:20,786 INFO L225 Difference]: With dead ends: 660 [2018-12-03 07:36:20,786 INFO L226 Difference]: Without dead ends: 418 [2018-12-03 07:36:20,787 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 111 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-12-03 07:36:20,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 418 states. [2018-12-03 07:36:20,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 418 to 389. [2018-12-03 07:36:20,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 389 states. [2018-12-03 07:36:20,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389 states to 389 states and 573 transitions. [2018-12-03 07:36:20,798 INFO L78 Accepts]: Start accepts. Automaton has 389 states and 573 transitions. Word has length 56 [2018-12-03 07:36:20,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:20,799 INFO L480 AbstractCegarLoop]: Abstraction has 389 states and 573 transitions. [2018-12-03 07:36:20,799 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 07:36:20,799 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 573 transitions. [2018-12-03 07:36:20,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-12-03 07:36:20,799 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:20,799 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:20,800 INFO L423 AbstractCegarLoop]: === Iteration 16 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:20,800 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:20,800 INFO L82 PathProgramCache]: Analyzing trace with hash 1831473212, now seen corresponding path program 1 times [2018-12-03 07:36:20,800 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:20,800 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:20,801 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:20,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:20,801 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:20,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:20,850 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-03 07:36:20,850 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:20,850 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:20,851 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 57 with the following transitions: [2018-12-03 07:36:20,851 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [250], [253], [256], [261], [328], [331], [346], [361], [376], [379], [382], [387], [424], [427], [442], [445], [448], [451], [525], [528], [529], [530] [2018-12-03 07:36:20,852 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:20,852 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:21,000 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:21,000 INFO L272 AbstractInterpreter]: Visited 40 different actions 130 times. Merged at 32 different actions 77 times. Widened at 1 different actions 1 times. Performed 1498 root evaluator evaluations with a maximum evaluation depth of 9. Performed 1498 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 14 fixpoints after 8 different actions. Largest state had 46 variables. [2018-12-03 07:36:21,001 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:21,002 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:21,002 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:21,002 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:21,010 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:21,010 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:21,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:21,039 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:21,046 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-03 07:36:21,046 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:21,072 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 07:36:21,092 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:21,092 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 4] total 7 [2018-12-03 07:36:21,092 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:21,093 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 07:36:21,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 07:36:21,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-12-03 07:36:21,093 INFO L87 Difference]: Start difference. First operand 389 states and 573 transitions. Second operand 5 states. [2018-12-03 07:36:21,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:21,152 INFO L93 Difference]: Finished difference Result 436 states and 639 transitions. [2018-12-03 07:36:21,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 07:36:21,153 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2018-12-03 07:36:21,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:21,154 INFO L225 Difference]: With dead ends: 436 [2018-12-03 07:36:21,154 INFO L226 Difference]: Without dead ends: 430 [2018-12-03 07:36:21,154 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 111 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-12-03 07:36:21,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states. [2018-12-03 07:36:21,161 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 427. [2018-12-03 07:36:21,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 427 states. [2018-12-03 07:36:21,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 427 states to 427 states and 627 transitions. [2018-12-03 07:36:21,162 INFO L78 Accepts]: Start accepts. Automaton has 427 states and 627 transitions. Word has length 56 [2018-12-03 07:36:21,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:21,162 INFO L480 AbstractCegarLoop]: Abstraction has 427 states and 627 transitions. [2018-12-03 07:36:21,162 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 07:36:21,162 INFO L276 IsEmpty]: Start isEmpty. Operand 427 states and 627 transitions. [2018-12-03 07:36:21,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-12-03 07:36:21,163 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:21,163 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:21,163 INFO L423 AbstractCegarLoop]: === Iteration 17 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:21,163 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:21,163 INFO L82 PathProgramCache]: Analyzing trace with hash -1104488738, now seen corresponding path program 1 times [2018-12-03 07:36:21,163 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:21,164 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:21,164 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:21,164 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:21,164 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:21,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:21,283 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:21,283 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:21,283 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:21,283 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 61 with the following transitions: [2018-12-03 07:36:21,283 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [250], [253], [256], [261], [328], [331], [346], [361], [376], [379], [382], [387], [424], [427], [442], [457], [472], [487], [502], [505], [508], [511], [525], [528], [529], [530] [2018-12-03 07:36:21,284 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:21,284 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:21,351 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:21,351 INFO L272 AbstractInterpreter]: Visited 44 different actions 79 times. Merged at 20 different actions 28 times. Never widened. Performed 878 root evaluator evaluations with a maximum evaluation depth of 11. Performed 878 inverse root evaluator evaluations with a maximum inverse evaluation depth of 11. Found 7 fixpoints after 6 different actions. Largest state had 50 variables. [2018-12-03 07:36:21,352 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:21,352 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:21,352 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:21,352 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:21,361 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:21,361 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:21,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:21,389 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:21,450 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:21,450 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:21,511 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:21,526 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:21,526 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 14 [2018-12-03 07:36:21,526 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:21,526 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-03 07:36:21,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-03 07:36:21,527 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=145, Unknown=0, NotChecked=0, Total=182 [2018-12-03 07:36:21,527 INFO L87 Difference]: Start difference. First operand 427 states and 627 transitions. Second operand 10 states. [2018-12-03 07:36:21,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:21,664 INFO L93 Difference]: Finished difference Result 430 states and 629 transitions. [2018-12-03 07:36:21,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 07:36:21,665 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 60 [2018-12-03 07:36:21,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:21,666 INFO L225 Difference]: With dead ends: 430 [2018-12-03 07:36:21,666 INFO L226 Difference]: Without dead ends: 428 [2018-12-03 07:36:21,666 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 114 SyntacticMatches, 3 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=167, Unknown=0, NotChecked=0, Total=210 [2018-12-03 07:36:21,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 428 states. [2018-12-03 07:36:21,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 428 to 427. [2018-12-03 07:36:21,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 427 states. [2018-12-03 07:36:21,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 427 states to 427 states and 626 transitions. [2018-12-03 07:36:21,676 INFO L78 Accepts]: Start accepts. Automaton has 427 states and 626 transitions. Word has length 60 [2018-12-03 07:36:21,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:21,676 INFO L480 AbstractCegarLoop]: Abstraction has 427 states and 626 transitions. [2018-12-03 07:36:21,676 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-03 07:36:21,676 INFO L276 IsEmpty]: Start isEmpty. Operand 427 states and 626 transitions. [2018-12-03 07:36:21,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-12-03 07:36:21,677 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:21,677 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 5, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:21,677 INFO L423 AbstractCegarLoop]: === Iteration 18 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:21,677 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:21,677 INFO L82 PathProgramCache]: Analyzing trace with hash 855434068, now seen corresponding path program 1 times [2018-12-03 07:36:21,677 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:21,678 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:21,678 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:21,678 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:21,678 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:21,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:21,816 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 15 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:21,816 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:21,816 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:21,816 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 68 with the following transitions: [2018-12-03 07:36:21,816 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [19], [23], [26], [29], [34], [41], [44], [47], [50], [53], [55], [137], [232], [235], [250], [253], [256], [261], [328], [331], [346], [361], [376], [379], [382], [387], [424], [427], [442], [457], [472], [487], [502], [505], [508], [513], [525], [528], [529], [530] [2018-12-03 07:36:21,817 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:21,817 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:21,977 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:21,977 INFO L272 AbstractInterpreter]: Visited 45 different actions 148 times. Merged at 36 different actions 89 times. Widened at 1 different actions 1 times. Performed 1746 root evaluator evaluations with a maximum evaluation depth of 10. Performed 1746 inverse root evaluator evaluations with a maximum inverse evaluation depth of 10. Found 17 fixpoints after 9 different actions. Largest state had 50 variables. [2018-12-03 07:36:21,978 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:21,978 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:21,979 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:21,979 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:21,986 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:21,986 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:22,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:22,021 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:22,068 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 15 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:22,068 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:22,222 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 15 proven. 44 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-03 07:36:22,237 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:22,237 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 7] total 15 [2018-12-03 07:36:22,237 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:22,237 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-03 07:36:22,238 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-03 07:36:22,238 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=167, Unknown=0, NotChecked=0, Total=210 [2018-12-03 07:36:22,238 INFO L87 Difference]: Start difference. First operand 427 states and 626 transitions. Second operand 10 states. [2018-12-03 07:36:22,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:22,371 INFO L93 Difference]: Finished difference Result 431 states and 630 transitions. [2018-12-03 07:36:22,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 07:36:22,371 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2018-12-03 07:36:22,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:22,373 INFO L225 Difference]: With dead ends: 431 [2018-12-03 07:36:22,373 INFO L226 Difference]: Without dead ends: 429 [2018-12-03 07:36:22,373 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 125 SyntacticMatches, 4 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-12-03 07:36:22,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 429 states. [2018-12-03 07:36:22,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 429 to 428. [2018-12-03 07:36:22,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 428 states. [2018-12-03 07:36:22,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 428 states to 428 states and 627 transitions. [2018-12-03 07:36:22,385 INFO L78 Accepts]: Start accepts. Automaton has 428 states and 627 transitions. Word has length 67 [2018-12-03 07:36:22,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:22,385 INFO L480 AbstractCegarLoop]: Abstraction has 428 states and 627 transitions. [2018-12-03 07:36:22,385 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-03 07:36:22,386 INFO L276 IsEmpty]: Start isEmpty. Operand 428 states and 627 transitions. [2018-12-03 07:36:22,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-12-03 07:36:22,386 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:22,386 INFO L402 BasicCegarLoop]: trace histogram [7, 6, 6, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:22,386 INFO L423 AbstractCegarLoop]: === Iteration 19 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:22,387 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:22,387 INFO L82 PathProgramCache]: Analyzing trace with hash 1201928326, now seen corresponding path program 1 times [2018-12-03 07:36:22,387 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:22,387 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:22,387 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:22,388 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:22,388 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:22,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:22,436 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 50 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 07:36:22,436 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:22,436 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:22,436 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 78 with the following transitions: [2018-12-03 07:36:22,437 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [17], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [250], [253], [256], [259], [261], [328], [331], [346], [361], [376], [379], [382], [387], [424], [427], [442], [457], [472], [487], [502], [505], [508], [513], [525], [528], [529], [530] [2018-12-03 07:36:22,438 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:22,438 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:22,614 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:22,615 INFO L272 AbstractInterpreter]: Visited 46 different actions 152 times. Merged at 37 different actions 87 times. Widened at 1 different actions 1 times. Performed 1778 root evaluator evaluations with a maximum evaluation depth of 9. Performed 1778 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 18 fixpoints after 10 different actions. Largest state had 50 variables. [2018-12-03 07:36:22,622 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:22,622 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:22,622 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:22,622 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:22,630 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:22,630 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:22,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:22,671 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:22,678 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 50 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 07:36:22,678 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:22,707 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 50 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 07:36:22,732 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:22,732 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 10 [2018-12-03 07:36:22,732 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:22,733 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 07:36:22,733 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 07:36:22,733 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-12-03 07:36:22,733 INFO L87 Difference]: Start difference. First operand 428 states and 627 transitions. Second operand 6 states. [2018-12-03 07:36:22,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:22,833 INFO L93 Difference]: Finished difference Result 865 states and 1269 transitions. [2018-12-03 07:36:22,833 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-03 07:36:22,833 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 77 [2018-12-03 07:36:22,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:22,835 INFO L225 Difference]: With dead ends: 865 [2018-12-03 07:36:22,835 INFO L226 Difference]: Without dead ends: 545 [2018-12-03 07:36:22,836 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 153 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-12-03 07:36:22,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 545 states. [2018-12-03 07:36:22,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 545 to 506. [2018-12-03 07:36:22,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 506 states. [2018-12-03 07:36:22,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 506 states to 506 states and 746 transitions. [2018-12-03 07:36:22,849 INFO L78 Accepts]: Start accepts. Automaton has 506 states and 746 transitions. Word has length 77 [2018-12-03 07:36:22,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:22,849 INFO L480 AbstractCegarLoop]: Abstraction has 506 states and 746 transitions. [2018-12-03 07:36:22,849 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 07:36:22,850 INFO L276 IsEmpty]: Start isEmpty. Operand 506 states and 746 transitions. [2018-12-03 07:36:22,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-12-03 07:36:22,850 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:22,850 INFO L402 BasicCegarLoop]: trace histogram [7, 7, 6, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:22,850 INFO L423 AbstractCegarLoop]: === Iteration 20 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:22,851 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:22,851 INFO L82 PathProgramCache]: Analyzing trace with hash 808901316, now seen corresponding path program 1 times [2018-12-03 07:36:22,851 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:22,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:22,851 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:22,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:22,852 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:22,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:22,988 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 18 proven. 80 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:22,988 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:22,988 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:22,988 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 78 with the following transitions: [2018-12-03 07:36:22,988 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [250], [253], [256], [259], [261], [328], [331], [346], [361], [376], [379], [382], [387], [424], [427], [442], [457], [472], [487], [502], [505], [508], [513], [525], [528], [529], [530] [2018-12-03 07:36:22,989 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:22,989 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:23,166 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:23,166 INFO L272 AbstractInterpreter]: Visited 45 different actions 146 times. Merged at 36 different actions 87 times. Widened at 1 different actions 1 times. Performed 1739 root evaluator evaluations with a maximum evaluation depth of 9. Performed 1739 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 17 fixpoints after 9 different actions. Largest state had 50 variables. [2018-12-03 07:36:23,167 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:23,168 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:23,168 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:23,168 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:23,177 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:23,177 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:23,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:23,220 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:23,266 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 18 proven. 70 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 07:36:23,267 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:23,345 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 35 proven. 43 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-03 07:36:23,360 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:23,360 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 6] total 17 [2018-12-03 07:36:23,360 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:23,360 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-03 07:36:23,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-03 07:36:23,361 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=219, Unknown=0, NotChecked=0, Total=272 [2018-12-03 07:36:23,361 INFO L87 Difference]: Start difference. First operand 506 states and 746 transitions. Second operand 13 states. [2018-12-03 07:36:23,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:23,493 INFO L93 Difference]: Finished difference Result 529 states and 778 transitions. [2018-12-03 07:36:23,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-03 07:36:23,494 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 77 [2018-12-03 07:36:23,494 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:23,495 INFO L225 Difference]: With dead ends: 529 [2018-12-03 07:36:23,496 INFO L226 Difference]: Without dead ends: 525 [2018-12-03 07:36:23,496 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 146 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=60, Invalid=246, Unknown=0, NotChecked=0, Total=306 [2018-12-03 07:36:23,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 525 states. [2018-12-03 07:36:23,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 525 to 525. [2018-12-03 07:36:23,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 525 states. [2018-12-03 07:36:23,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 525 states to 525 states and 772 transitions. [2018-12-03 07:36:23,509 INFO L78 Accepts]: Start accepts. Automaton has 525 states and 772 transitions. Word has length 77 [2018-12-03 07:36:23,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:23,509 INFO L480 AbstractCegarLoop]: Abstraction has 525 states and 772 transitions. [2018-12-03 07:36:23,509 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-03 07:36:23,509 INFO L276 IsEmpty]: Start isEmpty. Operand 525 states and 772 transitions. [2018-12-03 07:36:23,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-12-03 07:36:23,510 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:23,510 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 7, 5, 5, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:23,510 INFO L423 AbstractCegarLoop]: === Iteration 21 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:23,511 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:23,511 INFO L82 PathProgramCache]: Analyzing trace with hash 704934839, now seen corresponding path program 1 times [2018-12-03 07:36:23,511 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:23,511 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:23,511 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:23,511 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:23,512 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:23,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:23,631 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 26 proven. 99 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-12-03 07:36:23,631 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:23,631 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:23,632 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 88 with the following transitions: [2018-12-03 07:36:23,632 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [250], [253], [256], [261], [328], [331], [334], [337], [340], [346], [361], [376], [379], [382], [387], [424], [427], [442], [457], [472], [487], [502], [505], [508], [513], [525], [528], [529], [530] [2018-12-03 07:36:23,633 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:23,633 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:23,685 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:23,685 INFO L272 AbstractInterpreter]: Visited 47 different actions 82 times. Merged at 20 different actions 28 times. Never widened. Performed 892 root evaluator evaluations with a maximum evaluation depth of 9. Performed 892 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 8 fixpoints after 7 different actions. Largest state had 50 variables. [2018-12-03 07:36:23,687 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:23,687 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:23,687 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:23,687 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:23,693 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:23,693 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:23,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:23,734 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:23,770 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 21 proven. 99 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 07:36:23,770 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:23,956 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 21 proven. 58 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2018-12-03 07:36:23,972 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:23,972 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 5] total 12 [2018-12-03 07:36:23,972 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:23,973 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-03 07:36:23,973 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-03 07:36:23,973 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2018-12-03 07:36:23,973 INFO L87 Difference]: Start difference. First operand 525 states and 772 transitions. Second operand 9 states. [2018-12-03 07:36:24,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:24,101 INFO L93 Difference]: Finished difference Result 555 states and 810 transitions. [2018-12-03 07:36:24,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 07:36:24,101 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 87 [2018-12-03 07:36:24,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:24,102 INFO L225 Difference]: With dead ends: 555 [2018-12-03 07:36:24,103 INFO L226 Difference]: Without dead ends: 551 [2018-12-03 07:36:24,103 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 170 SyntacticMatches, 5 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2018-12-03 07:36:24,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 551 states. [2018-12-03 07:36:24,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 544. [2018-12-03 07:36:24,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 544 states. [2018-12-03 07:36:24,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 544 states to 544 states and 798 transitions. [2018-12-03 07:36:24,116 INFO L78 Accepts]: Start accepts. Automaton has 544 states and 798 transitions. Word has length 87 [2018-12-03 07:36:24,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:24,116 INFO L480 AbstractCegarLoop]: Abstraction has 544 states and 798 transitions. [2018-12-03 07:36:24,116 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-03 07:36:24,116 INFO L276 IsEmpty]: Start isEmpty. Operand 544 states and 798 transitions. [2018-12-03 07:36:24,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-12-03 07:36:24,117 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:24,117 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 7, 5, 5, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:24,117 INFO L423 AbstractCegarLoop]: === Iteration 22 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:24,117 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:24,117 INFO L82 PathProgramCache]: Analyzing trace with hash 1100197245, now seen corresponding path program 1 times [2018-12-03 07:36:24,117 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:24,118 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:24,118 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:24,118 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:24,118 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:24,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:24,304 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 21 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:24,304 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:24,304 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:24,304 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 91 with the following transitions: [2018-12-03 07:36:24,304 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [250], [253], [256], [261], [328], [331], [346], [361], [376], [379], [382], [385], [387], [424], [427], [442], [457], [472], [487], [502], [505], [508], [513], [525], [528], [529], [530] [2018-12-03 07:36:24,305 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:24,305 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:24,350 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:24,350 INFO L272 AbstractInterpreter]: Visited 45 different actions 58 times. Merged at 8 different actions 10 times. Never widened. Performed 644 root evaluator evaluations with a maximum evaluation depth of 9. Performed 644 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 6 fixpoints after 5 different actions. Largest state had 50 variables. [2018-12-03 07:36:24,358 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:24,358 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:24,358 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:24,358 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:24,367 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:24,368 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:24,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:24,407 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:24,480 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 21 proven. 110 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 07:36:24,480 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:25,012 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 67 proven. 64 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 07:36:25,027 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:25,028 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 21 [2018-12-03 07:36:25,028 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:25,028 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-03 07:36:25,028 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-03 07:36:25,028 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=341, Unknown=1, NotChecked=0, Total=420 [2018-12-03 07:36:25,028 INFO L87 Difference]: Start difference. First operand 544 states and 798 transitions. Second operand 15 states. [2018-12-03 07:36:25,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:25,321 INFO L93 Difference]: Finished difference Result 575 states and 828 transitions. [2018-12-03 07:36:25,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-03 07:36:25,322 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 90 [2018-12-03 07:36:25,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:25,323 INFO L225 Difference]: With dead ends: 575 [2018-12-03 07:36:25,323 INFO L226 Difference]: Without dead ends: 573 [2018-12-03 07:36:25,323 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 198 GetRequests, 169 SyntacticMatches, 3 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=129, Invalid=626, Unknown=1, NotChecked=0, Total=756 [2018-12-03 07:36:25,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 573 states. [2018-12-03 07:36:25,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 573 to 545. [2018-12-03 07:36:25,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 545 states. [2018-12-03 07:36:25,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 545 states to 545 states and 799 transitions. [2018-12-03 07:36:25,337 INFO L78 Accepts]: Start accepts. Automaton has 545 states and 799 transitions. Word has length 90 [2018-12-03 07:36:25,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:25,337 INFO L480 AbstractCegarLoop]: Abstraction has 545 states and 799 transitions. [2018-12-03 07:36:25,337 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-03 07:36:25,337 INFO L276 IsEmpty]: Start isEmpty. Operand 545 states and 799 transitions. [2018-12-03 07:36:25,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-03 07:36:25,338 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:25,338 INFO L402 BasicCegarLoop]: trace histogram [9, 8, 8, 6, 6, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:25,338 INFO L423 AbstractCegarLoop]: === Iteration 23 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:25,339 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:25,339 INFO L82 PathProgramCache]: Analyzing trace with hash 1191267151, now seen corresponding path program 1 times [2018-12-03 07:36:25,339 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:25,339 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:25,339 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:25,339 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:25,340 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:25,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:25,393 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 54 proven. 118 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 07:36:25,394 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:25,394 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:25,394 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 103 with the following transitions: [2018-12-03 07:36:25,394 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [17], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [250], [253], [256], [261], [328], [331], [346], [361], [376], [379], [382], [387], [424], [427], [442], [445], [448], [451], [457], [472], [487], [502], [505], [508], [513], [525], [528], [529], [530] [2018-12-03 07:36:25,395 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:25,395 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:25,510 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:25,510 INFO L272 AbstractInterpreter]: Visited 48 different actions 137 times. Merged at 39 different actions 70 times. Never widened. Performed 1491 root evaluator evaluations with a maximum evaluation depth of 9. Performed 1491 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 21 fixpoints after 11 different actions. Largest state had 50 variables. [2018-12-03 07:36:25,511 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:25,511 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:25,512 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:25,512 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:25,520 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:25,520 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:25,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:25,567 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:25,577 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 54 proven. 118 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 07:36:25,577 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:25,620 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 54 proven. 118 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 07:36:25,636 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:25,636 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 12 [2018-12-03 07:36:25,636 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:25,636 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-03 07:36:25,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-03 07:36:25,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-12-03 07:36:25,637 INFO L87 Difference]: Start difference. First operand 545 states and 799 transitions. Second operand 7 states. [2018-12-03 07:36:25,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:25,752 INFO L93 Difference]: Finished difference Result 1070 states and 1569 transitions. [2018-12-03 07:36:25,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 07:36:25,752 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-12-03 07:36:25,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:25,754 INFO L225 Difference]: With dead ends: 1070 [2018-12-03 07:36:25,754 INFO L226 Difference]: Without dead ends: 672 [2018-12-03 07:36:25,755 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 203 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-12-03 07:36:25,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 672 states. [2018-12-03 07:36:25,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 672 to 623. [2018-12-03 07:36:25,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 623 states. [2018-12-03 07:36:25,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 623 states to 623 states and 918 transitions. [2018-12-03 07:36:25,764 INFO L78 Accepts]: Start accepts. Automaton has 623 states and 918 transitions. Word has length 102 [2018-12-03 07:36:25,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:25,765 INFO L480 AbstractCegarLoop]: Abstraction has 623 states and 918 transitions. [2018-12-03 07:36:25,765 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-03 07:36:25,765 INFO L276 IsEmpty]: Start isEmpty. Operand 623 states and 918 transitions. [2018-12-03 07:36:25,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-03 07:36:25,765 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:25,765 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 8, 6, 6, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:25,765 INFO L423 AbstractCegarLoop]: === Iteration 24 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:25,765 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:25,765 INFO L82 PathProgramCache]: Analyzing trace with hash 1449432589, now seen corresponding path program 1 times [2018-12-03 07:36:25,765 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:25,766 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:25,766 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:25,766 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:25,766 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:25,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:25,835 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 24 proven. 148 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 07:36:25,835 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:25,835 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:25,835 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 103 with the following transitions: [2018-12-03 07:36:25,835 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [250], [253], [256], [261], [328], [331], [346], [361], [376], [379], [382], [387], [424], [427], [442], [445], [448], [451], [457], [472], [487], [502], [505], [508], [513], [525], [528], [529], [530] [2018-12-03 07:36:25,836 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:25,836 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:25,897 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:25,897 INFO L272 AbstractInterpreter]: Visited 47 different actions 60 times. Merged at 8 different actions 10 times. Never widened. Performed 638 root evaluator evaluations with a maximum evaluation depth of 9. Performed 638 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 6 fixpoints after 5 different actions. Largest state had 50 variables. [2018-12-03 07:36:25,902 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:25,903 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:25,903 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:25,903 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:25,909 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:25,909 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:25,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:25,952 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:25,967 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 24 proven. 148 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 07:36:25,967 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:26,028 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 24 proven. 84 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2018-12-03 07:36:26,043 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:26,044 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 4] total 9 [2018-12-03 07:36:26,044 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:26,044 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-03 07:36:26,044 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-03 07:36:26,044 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-12-03 07:36:26,044 INFO L87 Difference]: Start difference. First operand 623 states and 918 transitions. Second operand 7 states. [2018-12-03 07:36:26,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:26,116 INFO L93 Difference]: Finished difference Result 670 states and 984 transitions. [2018-12-03 07:36:26,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 07:36:26,116 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-12-03 07:36:26,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:26,117 INFO L225 Difference]: With dead ends: 670 [2018-12-03 07:36:26,117 INFO L226 Difference]: Without dead ends: 664 [2018-12-03 07:36:26,118 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 204 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-12-03 07:36:26,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 664 states. [2018-12-03 07:36:26,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 664 to 661. [2018-12-03 07:36:26,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 661 states. [2018-12-03 07:36:26,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 661 states to 661 states and 972 transitions. [2018-12-03 07:36:26,128 INFO L78 Accepts]: Start accepts. Automaton has 661 states and 972 transitions. Word has length 102 [2018-12-03 07:36:26,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:26,128 INFO L480 AbstractCegarLoop]: Abstraction has 661 states and 972 transitions. [2018-12-03 07:36:26,128 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-03 07:36:26,128 INFO L276 IsEmpty]: Start isEmpty. Operand 661 states and 972 transitions. [2018-12-03 07:36:26,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-12-03 07:36:26,128 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:26,129 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 8, 6, 6, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:26,129 INFO L423 AbstractCegarLoop]: === Iteration 25 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:26,129 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:26,129 INFO L82 PathProgramCache]: Analyzing trace with hash -669250513, now seen corresponding path program 1 times [2018-12-03 07:36:26,129 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:26,129 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:26,129 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:26,129 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:26,129 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:26,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:26,263 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 24 proven. 170 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:26,263 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:26,263 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:26,264 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 107 with the following transitions: [2018-12-03 07:36:26,264 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [250], [253], [256], [261], [328], [331], [346], [361], [376], [379], [382], [387], [424], [427], [442], [457], [472], [487], [502], [505], [508], [511], [513], [525], [528], [529], [530] [2018-12-03 07:36:26,264 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:26,264 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:26,344 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:26,344 INFO L272 AbstractInterpreter]: Visited 45 different actions 80 times. Merged at 20 different actions 28 times. Never widened. Performed 902 root evaluator evaluations with a maximum evaluation depth of 11. Performed 902 inverse root evaluator evaluations with a maximum inverse evaluation depth of 11. Found 8 fixpoints after 7 different actions. Largest state had 50 variables. [2018-12-03 07:36:26,346 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:26,346 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:26,346 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:26,346 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:26,353 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:26,353 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:26,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:26,400 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:26,480 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 24 proven. 160 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 07:36:26,480 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:26,604 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 94 proven. 90 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 07:36:26,618 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:26,618 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 23 [2018-12-03 07:36:26,618 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:26,619 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-03 07:36:26,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-03 07:36:26,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=417, Unknown=0, NotChecked=0, Total=506 [2018-12-03 07:36:26,619 INFO L87 Difference]: Start difference. First operand 661 states and 972 transitions. Second operand 16 states. [2018-12-03 07:36:26,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:26,898 INFO L93 Difference]: Finished difference Result 697 states and 1006 transitions. [2018-12-03 07:36:26,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-03 07:36:26,898 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 106 [2018-12-03 07:36:26,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:26,899 INFO L225 Difference]: With dead ends: 697 [2018-12-03 07:36:26,899 INFO L226 Difference]: Without dead ends: 695 [2018-12-03 07:36:26,900 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 201 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=147, Invalid=783, Unknown=0, NotChecked=0, Total=930 [2018-12-03 07:36:26,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 695 states. [2018-12-03 07:36:26,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 695 to 661. [2018-12-03 07:36:26,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 661 states. [2018-12-03 07:36:26,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 661 states to 661 states and 971 transitions. [2018-12-03 07:36:26,910 INFO L78 Accepts]: Start accepts. Automaton has 661 states and 971 transitions. Word has length 106 [2018-12-03 07:36:26,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:26,911 INFO L480 AbstractCegarLoop]: Abstraction has 661 states and 971 transitions. [2018-12-03 07:36:26,911 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-03 07:36:26,911 INFO L276 IsEmpty]: Start isEmpty. Operand 661 states and 971 transitions. [2018-12-03 07:36:26,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-03 07:36:26,911 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:26,911 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 9, 6, 6, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:26,911 INFO L423 AbstractCegarLoop]: === Iteration 26 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:26,911 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:26,912 INFO L82 PathProgramCache]: Analyzing trace with hash -1267384093, now seen corresponding path program 2 times [2018-12-03 07:36:26,912 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:26,912 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:26,912 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:26,912 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:26,912 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:26,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:27,131 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 27 proven. 208 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:27,131 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:27,131 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:27,131 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 07:36:27,131 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 07:36:27,132 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:27,132 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:27,138 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 07:36:27,138 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 07:36:27,180 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-12-03 07:36:27,180 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 07:36:27,183 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:27,288 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 140 proven. 31 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2018-12-03 07:36:27,288 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:27,420 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 139 proven. 32 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2018-12-03 07:36:27,434 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:27,434 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8, 8] total 19 [2018-12-03 07:36:27,434 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:27,435 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-03 07:36:27,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-03 07:36:27,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=290, Unknown=0, NotChecked=0, Total=342 [2018-12-03 07:36:27,435 INFO L87 Difference]: Start difference. First operand 661 states and 971 transitions. Second operand 18 states. [2018-12-03 07:36:28,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:28,146 INFO L93 Difference]: Finished difference Result 1080 states and 1568 transitions. [2018-12-03 07:36:28,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-12-03 07:36:28,146 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 113 [2018-12-03 07:36:28,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:28,147 INFO L225 Difference]: With dead ends: 1080 [2018-12-03 07:36:28,147 INFO L226 Difference]: Without dead ends: 596 [2018-12-03 07:36:28,148 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 273 GetRequests, 229 SyntacticMatches, 5 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 306 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=180, Invalid=1460, Unknown=0, NotChecked=0, Total=1640 [2018-12-03 07:36:28,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 596 states. [2018-12-03 07:36:28,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 596 to 528. [2018-12-03 07:36:28,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 528 states. [2018-12-03 07:36:28,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 528 states to 528 states and 743 transitions. [2018-12-03 07:36:28,158 INFO L78 Accepts]: Start accepts. Automaton has 528 states and 743 transitions. Word has length 113 [2018-12-03 07:36:28,158 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:28,158 INFO L480 AbstractCegarLoop]: Abstraction has 528 states and 743 transitions. [2018-12-03 07:36:28,158 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-03 07:36:28,158 INFO L276 IsEmpty]: Start isEmpty. Operand 528 states and 743 transitions. [2018-12-03 07:36:28,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-12-03 07:36:28,158 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:28,159 INFO L402 BasicCegarLoop]: trace histogram [11, 10, 10, 7, 7, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:28,159 INFO L423 AbstractCegarLoop]: === Iteration 27 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:28,159 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:28,159 INFO L82 PathProgramCache]: Analyzing trace with hash -1815351467, now seen corresponding path program 2 times [2018-12-03 07:36:28,159 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:28,159 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:28,159 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 07:36:28,159 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:28,159 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:28,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:28,205 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 68 proven. 206 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-03 07:36:28,206 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:28,206 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:28,206 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 07:36:28,206 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 07:36:28,206 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:28,206 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:28,215 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 07:36:28,216 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 07:36:28,296 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-12-03 07:36:28,296 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 07:36:28,299 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:28,312 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 68 proven. 206 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-03 07:36:28,312 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:28,357 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 68 proven. 206 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-03 07:36:28,372 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:28,373 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 14 [2018-12-03 07:36:28,373 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:28,373 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-03 07:36:28,373 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-03 07:36:28,373 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-12-03 07:36:28,373 INFO L87 Difference]: Start difference. First operand 528 states and 743 transitions. Second operand 8 states. [2018-12-03 07:36:28,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:28,438 INFO L93 Difference]: Finished difference Result 671 states and 934 transitions. [2018-12-03 07:36:28,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-03 07:36:28,438 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 123 [2018-12-03 07:36:28,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:28,439 INFO L225 Difference]: With dead ends: 671 [2018-12-03 07:36:28,439 INFO L226 Difference]: Without dead ends: 586 [2018-12-03 07:36:28,440 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 245 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-12-03 07:36:28,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 586 states. [2018-12-03 07:36:28,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 586 to 567. [2018-12-03 07:36:28,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 567 states. [2018-12-03 07:36:28,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 567 states to 567 states and 797 transitions. [2018-12-03 07:36:28,452 INFO L78 Accepts]: Start accepts. Automaton has 567 states and 797 transitions. Word has length 123 [2018-12-03 07:36:28,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:28,452 INFO L480 AbstractCegarLoop]: Abstraction has 567 states and 797 transitions. [2018-12-03 07:36:28,452 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-03 07:36:28,452 INFO L276 IsEmpty]: Start isEmpty. Operand 567 states and 797 transitions. [2018-12-03 07:36:28,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2018-12-03 07:36:28,452 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:28,453 INFO L402 BasicCegarLoop]: trace histogram [12, 12, 11, 8, 8, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:28,453 INFO L423 AbstractCegarLoop]: === Iteration 28 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:28,453 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:28,453 INFO L82 PathProgramCache]: Analyzing trace with hash -563823497, now seen corresponding path program 1 times [2018-12-03 07:36:28,453 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:28,453 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:28,453 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 07:36:28,453 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:28,453 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:28,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:28,645 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 36 proven. 308 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-03 07:36:28,645 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:28,645 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:28,645 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 136 with the following transitions: [2018-12-03 07:36:28,646 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [250], [253], [256], [261], [328], [331], [346], [361], [364], [367], [370], [376], [379], [382], [387], [424], [427], [442], [457], [472], [487], [502], [505], [508], [513], [525], [528], [529], [530] [2018-12-03 07:36:28,646 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:28,646 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:28,707 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:28,707 INFO L272 AbstractInterpreter]: Visited 47 different actions 60 times. Merged at 8 different actions 10 times. Never widened. Performed 642 root evaluator evaluations with a maximum evaluation depth of 9. Performed 642 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 6 fixpoints after 5 different actions. Largest state had 50 variables. [2018-12-03 07:36:28,709 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:28,709 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:28,709 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:28,709 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:28,716 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:28,716 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:28,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:28,777 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:28,837 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 335 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-12-03 07:36:28,837 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:28,989 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 277 proven. 64 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-03 07:36:29,013 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-12-03 07:36:29,014 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [10, 9] total 22 [2018-12-03 07:36:29,014 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:36:29,014 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-03 07:36:29,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-03 07:36:29,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=289, Unknown=0, NotChecked=0, Total=462 [2018-12-03 07:36:29,014 INFO L87 Difference]: Start difference. First operand 567 states and 797 transitions. Second operand 8 states. [2018-12-03 07:36:29,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:29,077 INFO L93 Difference]: Finished difference Result 708 states and 994 transitions. [2018-12-03 07:36:29,077 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-03 07:36:29,077 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 135 [2018-12-03 07:36:29,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:29,079 INFO L225 Difference]: With dead ends: 708 [2018-12-03 07:36:29,079 INFO L226 Difference]: Without dead ends: 704 [2018-12-03 07:36:29,079 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 285 GetRequests, 261 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 90 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=173, Invalid=289, Unknown=0, NotChecked=0, Total=462 [2018-12-03 07:36:29,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 704 states. [2018-12-03 07:36:29,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 704 to 700. [2018-12-03 07:36:29,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 700 states. [2018-12-03 07:36:29,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 986 transitions. [2018-12-03 07:36:29,091 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 986 transitions. Word has length 135 [2018-12-03 07:36:29,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:29,091 INFO L480 AbstractCegarLoop]: Abstraction has 700 states and 986 transitions. [2018-12-03 07:36:29,091 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-03 07:36:29,091 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 986 transitions. [2018-12-03 07:36:29,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-12-03 07:36:29,092 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:29,092 INFO L402 BasicCegarLoop]: trace histogram [12, 12, 11, 8, 8, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:29,092 INFO L423 AbstractCegarLoop]: === Iteration 29 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:29,092 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:29,092 INFO L82 PathProgramCache]: Analyzing trace with hash -287211762, now seen corresponding path program 2 times [2018-12-03 07:36:29,092 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:29,092 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:29,093 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:29,093 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:29,093 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:29,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:29,309 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 33 proven. 334 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:29,309 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:29,309 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:29,309 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 07:36:29,309 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 07:36:29,309 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:29,309 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:29,317 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 07:36:29,317 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 07:36:29,421 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-12-03 07:36:29,421 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 07:36:29,423 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:29,552 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 341 proven. 6 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-03 07:36:29,552 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:29,948 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 307 proven. 44 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 07:36:29,963 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:29,963 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 10, 11] total 30 [2018-12-03 07:36:29,963 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:29,963 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-12-03 07:36:29,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-12-03 07:36:29,964 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=262, Invalid=608, Unknown=0, NotChecked=0, Total=870 [2018-12-03 07:36:29,964 INFO L87 Difference]: Start difference. First operand 700 states and 986 transitions. Second operand 21 states. [2018-12-03 07:36:30,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:30,561 INFO L93 Difference]: Finished difference Result 715 states and 998 transitions. [2018-12-03 07:36:30,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-12-03 07:36:30,561 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 136 [2018-12-03 07:36:30,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:30,563 INFO L225 Difference]: With dead ends: 715 [2018-12-03 07:36:30,563 INFO L226 Difference]: Without dead ends: 713 [2018-12-03 07:36:30,563 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 296 GetRequests, 258 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 229 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=413, Invalid=1069, Unknown=0, NotChecked=0, Total=1482 [2018-12-03 07:36:30,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 713 states. [2018-12-03 07:36:30,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 713 to 700. [2018-12-03 07:36:30,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 700 states. [2018-12-03 07:36:30,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 985 transitions. [2018-12-03 07:36:30,576 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 985 transitions. Word has length 136 [2018-12-03 07:36:30,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:30,576 INFO L480 AbstractCegarLoop]: Abstraction has 700 states and 985 transitions. [2018-12-03 07:36:30,576 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-12-03 07:36:30,576 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 985 transitions. [2018-12-03 07:36:30,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-12-03 07:36:30,577 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:30,577 INFO L402 BasicCegarLoop]: trace histogram [13, 12, 12, 9, 9, 6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:30,577 INFO L423 AbstractCegarLoop]: === Iteration 30 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:30,577 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:30,577 INFO L82 PathProgramCache]: Analyzing trace with hash -568234875, now seen corresponding path program 1 times [2018-12-03 07:36:30,577 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:30,578 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:30,578 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 07:36:30,578 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:30,578 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:30,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:30,644 INFO L134 CoverageAnalysis]: Checked inductivity of 447 backedges. 91 proven. 330 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-12-03 07:36:30,644 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:30,644 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:30,644 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 152 with the following transitions: [2018-12-03 07:36:30,644 INFO L205 CegarAbsIntRunner]: [0], [1], [5], [9], [14], [17], [19], [23], [26], [29], [34], [41], [44], [47], [50], [55], [137], [232], [235], [250], [253], [256], [261], [328], [331], [346], [361], [376], [379], [382], [387], [424], [427], [442], [457], [472], [487], [490], [493], [496], [502], [505], [508], [513], [525], [528], [529], [530] [2018-12-03 07:36:30,645 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 07:36:30,645 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 07:36:30,777 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 07:36:30,777 INFO L272 AbstractInterpreter]: Visited 48 different actions 157 times. Merged at 39 different actions 89 times. Widened at 1 different actions 1 times. Performed 1794 root evaluator evaluations with a maximum evaluation depth of 9. Performed 1794 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 19 fixpoints after 11 different actions. Largest state had 50 variables. [2018-12-03 07:36:30,782 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:30,783 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 07:36:30,783 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:30,783 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:30,790 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:30,790 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:30,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:30,852 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:30,870 INFO L134 CoverageAnalysis]: Checked inductivity of 447 backedges. 91 proven. 330 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-12-03 07:36:30,870 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:30,939 INFO L134 CoverageAnalysis]: Checked inductivity of 447 backedges. 91 proven. 330 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-12-03 07:36:30,955 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:30,955 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 16 [2018-12-03 07:36:30,955 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:30,955 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-03 07:36:30,955 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-03 07:36:30,955 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-12-03 07:36:30,955 INFO L87 Difference]: Start difference. First operand 700 states and 985 transitions. Second operand 9 states. [2018-12-03 07:36:31,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:31,044 INFO L93 Difference]: Finished difference Result 1199 states and 1686 transitions. [2018-12-03 07:36:31,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 07:36:31,044 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 151 [2018-12-03 07:36:31,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:31,045 INFO L225 Difference]: With dead ends: 1199 [2018-12-03 07:36:31,046 INFO L226 Difference]: Without dead ends: 801 [2018-12-03 07:36:31,046 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 315 GetRequests, 301 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-12-03 07:36:31,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 801 states. [2018-12-03 07:36:31,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 801 to 778. [2018-12-03 07:36:31,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 778 states. [2018-12-03 07:36:31,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 778 states to 778 states and 1097 transitions. [2018-12-03 07:36:31,059 INFO L78 Accepts]: Start accepts. Automaton has 778 states and 1097 transitions. Word has length 151 [2018-12-03 07:36:31,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:31,060 INFO L480 AbstractCegarLoop]: Abstraction has 778 states and 1097 transitions. [2018-12-03 07:36:31,060 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-03 07:36:31,060 INFO L276 IsEmpty]: Start isEmpty. Operand 778 states and 1097 transitions. [2018-12-03 07:36:31,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-12-03 07:36:31,060 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:31,060 INFO L402 BasicCegarLoop]: trace histogram [13, 13, 12, 9, 9, 6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:31,060 INFO L423 AbstractCegarLoop]: === Iteration 31 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:31,061 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:31,061 INFO L82 PathProgramCache]: Analyzing trace with hash -1445028928, now seen corresponding path program 2 times [2018-12-03 07:36:31,061 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:31,061 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:31,061 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:31,061 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:31,061 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:31,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:31,279 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 36 proven. 417 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:36:31,279 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:31,279 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:31,279 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 07:36:31,279 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 07:36:31,279 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:31,279 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:31,287 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 07:36:31,287 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 07:36:31,374 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-12-03 07:36:31,374 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 07:36:31,377 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:31,561 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 414 proven. 19 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-03 07:36:31,561 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:31,801 WARN L180 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 14 [2018-12-03 07:36:32,076 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 380 proven. 57 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 07:36:32,100 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:32,100 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 11, 12] total 34 [2018-12-03 07:36:32,100 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:32,101 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-03 07:36:32,101 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-03 07:36:32,101 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=318, Invalid=804, Unknown=0, NotChecked=0, Total=1122 [2018-12-03 07:36:32,101 INFO L87 Difference]: Start difference. First operand 778 states and 1097 transitions. Second operand 24 states. [2018-12-03 07:36:32,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:32,832 INFO L93 Difference]: Finished difference Result 826 states and 1142 transitions. [2018-12-03 07:36:32,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-12-03 07:36:32,832 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 152 [2018-12-03 07:36:32,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:32,834 INFO L225 Difference]: With dead ends: 826 [2018-12-03 07:36:32,834 INFO L226 Difference]: Without dead ends: 824 [2018-12-03 07:36:32,834 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 346 GetRequests, 291 SyntacticMatches, 0 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 546 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=712, Invalid=2480, Unknown=0, NotChecked=0, Total=3192 [2018-12-03 07:36:32,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 824 states. [2018-12-03 07:36:32,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 824 to 778. [2018-12-03 07:36:32,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 778 states. [2018-12-03 07:36:32,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 778 states to 778 states and 1095 transitions. [2018-12-03 07:36:32,849 INFO L78 Accepts]: Start accepts. Automaton has 778 states and 1095 transitions. Word has length 152 [2018-12-03 07:36:32,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:32,850 INFO L480 AbstractCegarLoop]: Abstraction has 778 states and 1095 transitions. [2018-12-03 07:36:32,850 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-03 07:36:32,850 INFO L276 IsEmpty]: Start isEmpty. Operand 778 states and 1095 transitions. [2018-12-03 07:36:32,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2018-12-03 07:36:32,850 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:32,850 INFO L402 BasicCegarLoop]: trace histogram [15, 14, 14, 10, 10, 6, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:32,851 INFO L423 AbstractCegarLoop]: === Iteration 32 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:32,851 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:32,851 INFO L82 PathProgramCache]: Analyzing trace with hash 305812452, now seen corresponding path program 3 times [2018-12-03 07:36:32,851 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:32,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:32,851 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 07:36:32,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:32,851 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:32,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:32,939 INFO L134 CoverageAnalysis]: Checked inductivity of 598 backedges. 98 proven. 470 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-12-03 07:36:32,939 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:32,939 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:32,939 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 07:36:32,939 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 07:36:32,939 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:32,939 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:32,947 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-03 07:36:32,947 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-03 07:36:33,011 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-03 07:36:33,011 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 07:36:33,014 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:33,028 INFO L134 CoverageAnalysis]: Checked inductivity of 598 backedges. 98 proven. 470 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-12-03 07:36:33,028 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:33,114 INFO L134 CoverageAnalysis]: Checked inductivity of 598 backedges. 98 proven. 470 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-12-03 07:36:33,128 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:33,129 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 18 [2018-12-03 07:36:33,129 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:33,129 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-03 07:36:33,129 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-03 07:36:33,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-12-03 07:36:33,129 INFO L87 Difference]: Start difference. First operand 778 states and 1095 transitions. Second operand 10 states. [2018-12-03 07:36:33,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:33,223 INFO L93 Difference]: Finished difference Result 967 states and 1346 transitions. [2018-12-03 07:36:33,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-03 07:36:33,223 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 169 [2018-12-03 07:36:33,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:33,225 INFO L225 Difference]: With dead ends: 967 [2018-12-03 07:36:33,225 INFO L226 Difference]: Without dead ends: 882 [2018-12-03 07:36:33,225 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 353 GetRequests, 337 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-12-03 07:36:33,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 882 states. [2018-12-03 07:36:33,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 882 to 856. [2018-12-03 07:36:33,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 856 states. [2018-12-03 07:36:33,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 856 states to 856 states and 1202 transitions. [2018-12-03 07:36:33,242 INFO L78 Accepts]: Start accepts. Automaton has 856 states and 1202 transitions. Word has length 169 [2018-12-03 07:36:33,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:33,243 INFO L480 AbstractCegarLoop]: Abstraction has 856 states and 1202 transitions. [2018-12-03 07:36:33,243 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-03 07:36:33,243 INFO L276 IsEmpty]: Start isEmpty. Operand 856 states and 1202 transitions. [2018-12-03 07:36:33,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2018-12-03 07:36:33,244 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:33,244 INFO L402 BasicCegarLoop]: trace histogram [17, 16, 16, 12, 12, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:33,244 INFO L423 AbstractCegarLoop]: === Iteration 33 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:33,244 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:33,244 INFO L82 PathProgramCache]: Analyzing trace with hash -730696556, now seen corresponding path program 2 times [2018-12-03 07:36:33,244 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:33,245 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:33,245 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 07:36:33,245 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:33,245 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:33,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:33,322 INFO L134 CoverageAnalysis]: Checked inductivity of 811 backedges. 125 proven. 650 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-03 07:36:33,322 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:33,322 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:33,323 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 07:36:33,323 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 07:36:33,323 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:33,323 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:33,329 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 07:36:33,329 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 07:36:33,367 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-12-03 07:36:33,367 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 07:36:33,369 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:33,474 INFO L134 CoverageAnalysis]: Checked inductivity of 811 backedges. 295 proven. 4 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-12-03 07:36:33,474 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:33,535 INFO L134 CoverageAnalysis]: Checked inductivity of 811 backedges. 295 proven. 4 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-12-03 07:36:33,552 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:33,552 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 6, 6] total 18 [2018-12-03 07:36:33,552 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:33,553 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-03 07:36:33,553 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-03 07:36:33,553 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=116, Invalid=190, Unknown=0, NotChecked=0, Total=306 [2018-12-03 07:36:33,553 INFO L87 Difference]: Start difference. First operand 856 states and 1202 transitions. Second operand 15 states. [2018-12-03 07:36:33,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:33,896 INFO L93 Difference]: Finished difference Result 1006 states and 1400 transitions. [2018-12-03 07:36:33,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-12-03 07:36:33,897 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 197 [2018-12-03 07:36:33,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:33,898 INFO L225 Difference]: With dead ends: 1006 [2018-12-03 07:36:33,898 INFO L226 Difference]: Without dead ends: 530 [2018-12-03 07:36:33,898 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 436 GetRequests, 401 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=407, Invalid=853, Unknown=0, NotChecked=0, Total=1260 [2018-12-03 07:36:33,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 530 states. [2018-12-03 07:36:33,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 530 to 507. [2018-12-03 07:36:33,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 507 states. [2018-12-03 07:36:33,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 507 states to 507 states and 697 transitions. [2018-12-03 07:36:33,913 INFO L78 Accepts]: Start accepts. Automaton has 507 states and 697 transitions. Word has length 197 [2018-12-03 07:36:33,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:33,913 INFO L480 AbstractCegarLoop]: Abstraction has 507 states and 697 transitions. [2018-12-03 07:36:33,913 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-03 07:36:33,913 INFO L276 IsEmpty]: Start isEmpty. Operand 507 states and 697 transitions. [2018-12-03 07:36:33,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2018-12-03 07:36:33,914 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:33,914 INFO L402 BasicCegarLoop]: trace histogram [23, 22, 22, 16, 16, 10, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:33,914 INFO L423 AbstractCegarLoop]: === Iteration 34 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:33,914 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:33,914 INFO L82 PathProgramCache]: Analyzing trace with hash 1318987330, now seen corresponding path program 4 times [2018-12-03 07:36:33,914 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:33,915 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:33,915 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 07:36:33,915 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:33,915 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:33,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:34,050 INFO L134 CoverageAnalysis]: Checked inductivity of 1530 backedges. 158 proven. 1322 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-12-03 07:36:34,050 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:34,050 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:34,050 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 07:36:34,050 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 07:36:34,050 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:34,051 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:34,058 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:34,058 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 07:36:34,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:34,156 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:34,186 INFO L134 CoverageAnalysis]: Checked inductivity of 1530 backedges. 158 proven. 1322 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-12-03 07:36:34,186 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:34,345 INFO L134 CoverageAnalysis]: Checked inductivity of 1530 backedges. 158 proven. 1322 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-12-03 07:36:34,360 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:34,360 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 19 [2018-12-03 07:36:34,360 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:34,360 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-03 07:36:34,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-03 07:36:34,361 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-12-03 07:36:34,361 INFO L87 Difference]: Start difference. First operand 507 states and 697 transitions. Second operand 14 states. [2018-12-03 07:36:34,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:34,442 INFO L93 Difference]: Finished difference Result 713 states and 982 transitions. [2018-12-03 07:36:34,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-03 07:36:34,443 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 261 [2018-12-03 07:36:34,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:34,444 INFO L225 Difference]: With dead ends: 713 [2018-12-03 07:36:34,444 INFO L226 Difference]: Without dead ends: 628 [2018-12-03 07:36:34,444 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 545 GetRequests, 515 SyntacticMatches, 13 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-12-03 07:36:34,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 628 states. [2018-12-03 07:36:34,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 628 to 585. [2018-12-03 07:36:34,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 585 states. [2018-12-03 07:36:34,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 585 states to 585 states and 804 transitions. [2018-12-03 07:36:34,457 INFO L78 Accepts]: Start accepts. Automaton has 585 states and 804 transitions. Word has length 261 [2018-12-03 07:36:34,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:34,457 INFO L480 AbstractCegarLoop]: Abstraction has 585 states and 804 transitions. [2018-12-03 07:36:34,457 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-03 07:36:34,457 INFO L276 IsEmpty]: Start isEmpty. Operand 585 states and 804 transitions. [2018-12-03 07:36:34,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 308 [2018-12-03 07:36:34,458 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:34,458 INFO L402 BasicCegarLoop]: trace histogram [27, 26, 26, 19, 19, 12, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:34,458 INFO L423 AbstractCegarLoop]: === Iteration 35 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:34,458 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:34,459 INFO L82 PathProgramCache]: Analyzing trace with hash 867398673, now seen corresponding path program 5 times [2018-12-03 07:36:34,459 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:34,459 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:34,459 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:36:34,459 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:34,459 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:34,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:34,626 INFO L134 CoverageAnalysis]: Checked inductivity of 2158 backedges. 188 proven. 1910 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-12-03 07:36:34,627 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:34,627 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:34,627 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 07:36:34,627 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 07:36:34,627 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:34,627 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:34,633 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 07:36:34,634 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 07:36:34,815 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 17 check-sat command(s) [2018-12-03 07:36:34,815 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 07:36:34,820 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:34,861 INFO L134 CoverageAnalysis]: Checked inductivity of 2158 backedges. 188 proven. 1910 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-12-03 07:36:34,861 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:35,027 INFO L134 CoverageAnalysis]: Checked inductivity of 2158 backedges. 188 proven. 1910 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-12-03 07:36:35,042 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:35,043 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 19 [2018-12-03 07:36:35,043 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:35,043 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-03 07:36:35,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-03 07:36:35,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-12-03 07:36:35,043 INFO L87 Difference]: Start difference. First operand 585 states and 804 transitions. Second operand 16 states. [2018-12-03 07:36:35,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:35,136 INFO L93 Difference]: Finished difference Result 791 states and 1089 transitions. [2018-12-03 07:36:35,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-03 07:36:35,136 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 307 [2018-12-03 07:36:35,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:35,138 INFO L225 Difference]: With dead ends: 791 [2018-12-03 07:36:35,138 INFO L226 Difference]: Without dead ends: 706 [2018-12-03 07:36:35,138 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 641 GetRequests, 603 SyntacticMatches, 21 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 163 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-12-03 07:36:35,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 706 states. [2018-12-03 07:36:35,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 706 to 663. [2018-12-03 07:36:35,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 663 states. [2018-12-03 07:36:35,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 663 states to 663 states and 911 transitions. [2018-12-03 07:36:35,153 INFO L78 Accepts]: Start accepts. Automaton has 663 states and 911 transitions. Word has length 307 [2018-12-03 07:36:35,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:35,153 INFO L480 AbstractCegarLoop]: Abstraction has 663 states and 911 transitions. [2018-12-03 07:36:35,153 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-03 07:36:35,153 INFO L276 IsEmpty]: Start isEmpty. Operand 663 states and 911 transitions. [2018-12-03 07:36:35,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2018-12-03 07:36:35,154 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:35,154 INFO L402 BasicCegarLoop]: trace histogram [31, 30, 30, 22, 22, 14, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:35,155 INFO L423 AbstractCegarLoop]: === Iteration 36 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:35,155 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:35,155 INFO L82 PathProgramCache]: Analyzing trace with hash 927920032, now seen corresponding path program 6 times [2018-12-03 07:36:35,155 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:35,155 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:35,155 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 07:36:35,155 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:35,155 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:35,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:36:35,367 INFO L134 CoverageAnalysis]: Checked inductivity of 2894 backedges. 218 proven. 2606 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-12-03 07:36:35,367 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:35,367 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 07:36:35,367 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 07:36:35,367 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 07:36:35,367 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 07:36:35,367 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 07:36:35,373 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-03 07:36:35,373 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-03 07:36:35,527 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-03 07:36:35,527 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 07:36:35,533 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 07:36:35,587 INFO L134 CoverageAnalysis]: Checked inductivity of 2894 backedges. 218 proven. 2606 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-12-03 07:36:35,587 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 07:36:35,792 INFO L134 CoverageAnalysis]: Checked inductivity of 2894 backedges. 218 proven. 2606 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-12-03 07:36:35,807 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 07:36:35,807 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18] total 19 [2018-12-03 07:36:35,807 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 07:36:35,808 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-03 07:36:35,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-03 07:36:35,808 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-12-03 07:36:35,808 INFO L87 Difference]: Start difference. First operand 663 states and 911 transitions. Second operand 18 states. [2018-12-03 07:36:35,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:36:35,935 INFO L93 Difference]: Finished difference Result 869 states and 1196 transitions. [2018-12-03 07:36:35,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-03 07:36:35,936 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 353 [2018-12-03 07:36:35,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:36:35,938 INFO L225 Difference]: With dead ends: 869 [2018-12-03 07:36:35,938 INFO L226 Difference]: Without dead ends: 784 [2018-12-03 07:36:35,938 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 737 GetRequests, 691 SyntacticMatches, 29 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-12-03 07:36:35,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 784 states. [2018-12-03 07:36:35,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 784 to 741. [2018-12-03 07:36:35,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 741 states. [2018-12-03 07:36:35,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 741 states to 741 states and 1018 transitions. [2018-12-03 07:36:35,955 INFO L78 Accepts]: Start accepts. Automaton has 741 states and 1018 transitions. Word has length 353 [2018-12-03 07:36:35,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:36:35,955 INFO L480 AbstractCegarLoop]: Abstraction has 741 states and 1018 transitions. [2018-12-03 07:36:35,955 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-03 07:36:35,955 INFO L276 IsEmpty]: Start isEmpty. Operand 741 states and 1018 transitions. [2018-12-03 07:36:35,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 400 [2018-12-03 07:36:35,957 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:36:35,957 INFO L402 BasicCegarLoop]: trace histogram [35, 34, 34, 25, 25, 16, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:36:35,957 INFO L423 AbstractCegarLoop]: === Iteration 37 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:36:35,958 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:36:35,958 INFO L82 PathProgramCache]: Analyzing trace with hash 1934002415, now seen corresponding path program 7 times [2018-12-03 07:36:35,958 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:36:35,958 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:35,958 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 07:36:35,958 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:36:35,959 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:36:36,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-03 07:36:36,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-03 07:36:36,751 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-03 07:36:36,837 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.12 07:36:36 BoogieIcfgContainer [2018-12-03 07:36:36,837 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-03 07:36:36,838 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-03 07:36:36,838 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-03 07:36:36,838 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-03 07:36:36,838 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 07:36:16" (3/4) ... [2018-12-03 07:36:36,840 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-03 07:36:36,943 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_bcbeffe8-4db4-47ce-97c5-2e1eeeb0e015/bin-2019/utaipan/witness.graphml [2018-12-03 07:36:36,944 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-03 07:36:36,944 INFO L168 Benchmark]: Toolchain (without parser) took 20884.77 ms. Allocated memory was 1.0 GB in the beginning and 1.7 GB in the end (delta: 681.6 MB). Free memory was 953.3 MB in the beginning and 1.5 GB in the end (delta: -497.5 MB). Peak memory consumption was 184.1 MB. Max. memory is 11.5 GB. [2018-12-03 07:36:36,945 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-03 07:36:36,945 INFO L168 Benchmark]: CACSL2BoogieTranslator took 237.82 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 108.0 MB). Free memory was 950.6 MB in the beginning and 1.1 GB in the end (delta: -156.5 MB). Peak memory consumption was 34.9 MB. Max. memory is 11.5 GB. [2018-12-03 07:36:36,945 INFO L168 Benchmark]: Boogie Procedure Inliner took 15.48 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-12-03 07:36:36,945 INFO L168 Benchmark]: Boogie Preprocessor took 26.82 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-12-03 07:36:36,945 INFO L168 Benchmark]: RCFGBuilder took 410.85 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.7 MB). Peak memory consumption was 54.7 MB. Max. memory is 11.5 GB. [2018-12-03 07:36:36,945 INFO L168 Benchmark]: TraceAbstraction took 20084.89 ms. Allocated memory was 1.1 GB in the beginning and 1.7 GB in the end (delta: 573.6 MB). Free memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: -437.5 MB). Peak memory consumption was 136.1 MB. Max. memory is 11.5 GB. [2018-12-03 07:36:36,946 INFO L168 Benchmark]: Witness Printer took 105.90 ms. Allocated memory is still 1.7 GB. Free memory was 1.5 GB in the beginning and 1.5 GB in the end (delta: 33.8 MB). Peak memory consumption was 33.8 MB. Max. memory is 11.5 GB. [2018-12-03 07:36:36,947 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 237.82 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 108.0 MB). Free memory was 950.6 MB in the beginning and 1.1 GB in the end (delta: -156.5 MB). Peak memory consumption was 34.9 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 15.48 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.82 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 410.85 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.7 MB). Peak memory consumption was 54.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 20084.89 ms. Allocated memory was 1.1 GB in the beginning and 1.7 GB in the end (delta: 573.6 MB). Free memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: -437.5 MB). Peak memory consumption was 136.1 MB. Max. memory is 11.5 GB. * Witness Printer took 105.90 ms. Allocated memory is still 1.7 GB. Free memory was 1.5 GB in the beginning and 1.5 GB in the end (delta: 33.8 MB). Peak memory consumption was 33.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 569]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L5] int m_Protocol = 1; [L6] int m_msg_2 = 2; [L7] int m_recv_ack_2 = 3; [L8] int m_msg_1_1 = 4; [L9] int m_msg_1_2 = 5; [L10] int m_recv_ack_1_1 = 6; [L11] int m_recv_ack_1_2 = 7; VAL [\old(m_msg_1_1)=21, \old(m_msg_1_2)=18, \old(m_msg_2)=19, \old(m_Protocol)=23, \old(m_recv_ack_1_1)=20, \old(m_recv_ack_1_2)=22, \old(m_recv_ack_2)=24, m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L16] int q = 0; [L17] int method_id; [L20] int this_expect = 0; [L21] int this_buffer_empty = 0; VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, q=0, this_buffer_empty=0, this_expect=0] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=1, P9=0, q=0, this_buffer_empty=0, this_expect=0] [L43] COND TRUE q == 0 [L44] COND TRUE __VERIFIER_nondet_int() [L48] method_id = 1 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=1, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=1, P9=0, q=0, this_buffer_empty=0, this_expect=0] [L50] COND FALSE !(0) [L54] q = 1 [L56] this_expect=0 [L56] this_buffer_empty=1 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=1, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=1, P9=0, q=1, this_buffer_empty=1, this_expect=0] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=1, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=0] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=1, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=0] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=0] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=1] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=3, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=1] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=3, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=1] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=3, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=1] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=3, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=1] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=3, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=1] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=3, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=1] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=3, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=2] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=2] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=2] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=2] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=2] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=2] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=2] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=2] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=1, this_buffer_empty=1, this_expect=2] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-10, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=2] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-10, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=2] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-10, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=2] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-10, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=3] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=3] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=0, P3=0, P4=0, P5=0, P6=-2, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=0, P3=0, P4=0, P5=0, P6=-2, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=0, P3=0, P4=0, P5=0, P6=-2, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=0, P3=0, P4=0, P5=0, P6=-2, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=0, P3=0, P4=0, P5=0, P6=-2, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=3] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=5, P2=0, P3=0, P4=0, P5=0, P6=-2, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=3] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=5, P2=0, P3=0, P4=0, P5=0, P6=-2, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=4] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=4] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=4] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=4] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=4] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=4] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=4] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=1, this_buffer_empty=1, this_expect=4] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=4] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=4] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=4] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=5] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=5] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=5] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=5] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=5] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=5] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=5] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=0, P3=0, P4=0, P5=0, P6=1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=5] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=0, P3=0, P4=0, P5=0, P6=1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=5] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=0, P3=0, P4=0, P5=0, P6=1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=5] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=0, P3=0, P4=0, P5=0, P6=1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=5] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=0, P3=0, P4=0, P5=0, P6=1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=5] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=11, P2=0, P3=0, P4=0, P5=0, P6=1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=5] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=11, P2=0, P3=0, P4=0, P5=0, P6=1, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=6] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=6] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=6] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=6] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=6] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=6] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=6] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=6] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=6] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-4, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=6] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-4, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=6] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-4, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=6] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-4, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=7] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=7] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=7] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=7] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=7] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=7] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=7] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=0, P3=0, P4=0, P5=0, P6=-2, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=7] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=0, P3=0, P4=0, P5=0, P6=-2, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=7] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=0, P3=0, P4=0, P5=0, P6=-2, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=7] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=0, P3=0, P4=0, P5=0, P6=-2, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=7] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=0, P3=0, P4=0, P5=0, P6=-2, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=7] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=13, P2=0, P3=0, P4=0, P5=0, P6=-2, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=7] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=13, P2=0, P3=0, P4=0, P5=0, P6=-2, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=8] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=1, this_buffer_empty=1, this_expect=8] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-14, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=8] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-14, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=8] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-14, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=8] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-14, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=9] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=9] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=9] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=9] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=9] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=9] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=9] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=9] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=9] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=9] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=9] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=9] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=15, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=9] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=15, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=10] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=10] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=10] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=10] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=10] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=10] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=10] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=10] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=10] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=10] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=10] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=10] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=11] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=11] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=11] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=11] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=11] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=11] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=11] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=11] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=11] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=11] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=11] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=11] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=17, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=11] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=17, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=12] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=2, q=5, this_buffer_empty=0, this_expect=12] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=2, q=5, this_buffer_empty=0, this_expect=12] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=2, q=5, this_buffer_empty=0, this_expect=12] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=2, q=5, this_buffer_empty=0, this_expect=12] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=2, q=5, this_buffer_empty=0, this_expect=12] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=2, q=5, this_buffer_empty=0, this_expect=12] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=2, q=5, this_buffer_empty=0, this_expect=12] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=2, q=1, this_buffer_empty=1, this_expect=12] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-6, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=12] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-6, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=12] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-6, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=12] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-6, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=13] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=13] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=13] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=13] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=13] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=13] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=1, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=13] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=13] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=13] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=13] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=13] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=13] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=7, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=13] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=7, P2=0, P3=0, P4=0, P5=0, P6=-1, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=14] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=1, q=1, this_buffer_empty=1, this_expect=14] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-12, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=14] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-12, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=14] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-12, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=14] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-12, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=15] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=15] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=15] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=15] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=15] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=15] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=15] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=0, P3=0, P4=0, P5=0, P6=1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=15] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=0, P3=0, P4=0, P5=0, P6=1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=15] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=0, P3=0, P4=0, P5=0, P6=1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=15] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=0, P3=0, P4=0, P5=0, P6=1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=15] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=0, P3=0, P4=0, P5=0, P6=1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=15] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=9, P2=0, P3=0, P4=0, P5=0, P6=1, P7=0, P8=0, P9=0, q=4, this_buffer_empty=1, this_expect=15] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=9, P2=0, P3=0, P4=0, P5=0, P6=1, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=16] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=16] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=16] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=16] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=16] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=16] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=16] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=5, this_buffer_empty=0, this_expect=16] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=16] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-8, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=16] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-8, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=16] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-8, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=1, this_buffer_empty=1, this_expect=16] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-8, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=17] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND TRUE this_expect > 16 [L39] this_expect = -16 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=-16] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=-16] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=-16] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=-16] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=-16] [L286] COND TRUE (((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2)))) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=-16] [L569] __VERIFIER_error() VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=0, P3=0, P4=0, P5=0, P6=0, P7=0, P8=0, P9=0, q=3, this_buffer_empty=0, this_expect=-16] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 115 locations, 1 error locations. UNSAFE Result, 20.0s OverallTime, 37 OverallIterations, 35 TraceHistogramMax, 5.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 7137 SDtfs, 11576 SDslu, 33091 SDs, 0 SdLazy, 6340 SolverSat, 902 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 6852 GetRequests, 6274 SyntacticMatches, 107 SemanticMatches, 471 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 2289 ImplicationChecksByTransitivity, 6.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=856occurred in iteration=32, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 2.0s AbstIntTime, 19 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 36 MinimizatonAttempts, 717 StatesRemovedByMinimization, 34 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 2.1s SatisfiabilityAnalysisTime, 7.5s InterpolantComputationTime, 7029 NumberOfCodeBlocks, 6845 NumberOfCodeBlocksAsserted, 124 NumberOfCheckSat, 9731 ConstructedInterpolants, 493 QuantifiedInterpolants, 7164298 SizeOfPredicates, 84 NumberOfNonLiveVariables, 18339 ConjunctsInSsa, 436 ConjunctsInUnsatCore, 92 InterpolantComputations, 11 PerfectInterpolantSequences, 9336/34569 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...